1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/virtio.h> 30 #include <linux/virtio_ids.h> 31 #include <linux/virtio_config.h> 32 #include <linux/virtio_gpu.h> 33 34 #include <drm/drm_atomic.h> 35 #include <drm/drm_encoder.h> 36 #include <drm/drm_fb_helper.h> 37 #include <drm/drm_gem.h> 38 #include <drm/drm_gem_shmem_helper.h> 39 #include <drm/drm_ioctl.h> 40 #include <drm/drm_probe_helper.h> 41 #include <drm/virtgpu_drm.h> 42 43 #define DRIVER_NAME "virtio_gpu" 44 #define DRIVER_DESC "virtio GPU" 45 #define DRIVER_DATE "0" 46 47 #define DRIVER_MAJOR 0 48 #define DRIVER_MINOR 1 49 #define DRIVER_PATCHLEVEL 0 50 51 struct virtio_gpu_object_params { 52 uint32_t format; 53 uint32_t width; 54 uint32_t height; 55 unsigned long size; 56 bool dumb; 57 /* 3d */ 58 bool virgl; 59 uint32_t target; 60 uint32_t bind; 61 uint32_t depth; 62 uint32_t array_size; 63 uint32_t last_level; 64 uint32_t nr_samples; 65 uint32_t flags; 66 }; 67 68 struct virtio_gpu_object { 69 struct drm_gem_shmem_object base; 70 uint32_t hw_res_handle; 71 72 struct sg_table *pages; 73 uint32_t mapped; 74 bool dumb; 75 bool created; 76 }; 77 #define gem_to_virtio_gpu_obj(gobj) \ 78 container_of((gobj), struct virtio_gpu_object, base.base) 79 80 struct virtio_gpu_object_array { 81 struct ww_acquire_ctx ticket; 82 struct list_head next; 83 u32 nents, total; 84 struct drm_gem_object *objs[]; 85 }; 86 87 struct virtio_gpu_vbuffer; 88 struct virtio_gpu_device; 89 90 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 91 struct virtio_gpu_vbuffer *vbuf); 92 93 struct virtio_gpu_fence_driver { 94 atomic64_t last_seq; 95 uint64_t sync_seq; 96 uint64_t context; 97 struct list_head fences; 98 spinlock_t lock; 99 }; 100 101 struct virtio_gpu_fence { 102 struct dma_fence f; 103 struct virtio_gpu_fence_driver *drv; 104 struct list_head node; 105 }; 106 107 struct virtio_gpu_vbuffer { 108 char *buf; 109 int size; 110 111 void *data_buf; 112 uint32_t data_size; 113 114 char *resp_buf; 115 int resp_size; 116 virtio_gpu_resp_cb resp_cb; 117 118 struct virtio_gpu_object_array *objs; 119 struct list_head list; 120 }; 121 122 struct virtio_gpu_output { 123 int index; 124 struct drm_crtc crtc; 125 struct drm_connector conn; 126 struct drm_encoder enc; 127 struct virtio_gpu_display_one info; 128 struct virtio_gpu_update_cursor cursor; 129 struct edid *edid; 130 int cur_x; 131 int cur_y; 132 bool enabled; 133 }; 134 #define drm_crtc_to_virtio_gpu_output(x) \ 135 container_of(x, struct virtio_gpu_output, crtc) 136 137 struct virtio_gpu_framebuffer { 138 struct drm_framebuffer base; 139 struct virtio_gpu_fence *fence; 140 }; 141 #define to_virtio_gpu_framebuffer(x) \ 142 container_of(x, struct virtio_gpu_framebuffer, base) 143 144 struct virtio_gpu_queue { 145 struct virtqueue *vq; 146 spinlock_t qlock; 147 wait_queue_head_t ack_queue; 148 struct work_struct dequeue_work; 149 }; 150 151 struct virtio_gpu_drv_capset { 152 uint32_t id; 153 uint32_t max_version; 154 uint32_t max_size; 155 }; 156 157 struct virtio_gpu_drv_cap_cache { 158 struct list_head head; 159 void *caps_cache; 160 uint32_t id; 161 uint32_t version; 162 uint32_t size; 163 atomic_t is_valid; 164 }; 165 166 struct virtio_gpu_device { 167 struct device *dev; 168 struct drm_device *ddev; 169 170 struct virtio_device *vdev; 171 172 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 173 uint32_t num_scanouts; 174 175 struct virtio_gpu_queue ctrlq; 176 struct virtio_gpu_queue cursorq; 177 struct kmem_cache *vbufs; 178 bool vqs_ready; 179 180 bool disable_notify; 181 bool pending_notify; 182 183 struct ida resource_ida; 184 185 wait_queue_head_t resp_wq; 186 /* current display info */ 187 spinlock_t display_info_lock; 188 bool display_info_pending; 189 190 struct virtio_gpu_fence_driver fence_drv; 191 192 struct ida ctx_id_ida; 193 194 bool has_virgl_3d; 195 bool has_edid; 196 197 struct work_struct config_changed_work; 198 199 struct work_struct obj_free_work; 200 spinlock_t obj_free_lock; 201 struct list_head obj_free_list; 202 203 struct virtio_gpu_drv_capset *capsets; 204 uint32_t num_capsets; 205 struct list_head cap_cache; 206 }; 207 208 struct virtio_gpu_fpriv { 209 uint32_t ctx_id; 210 }; 211 212 /* virtio_ioctl.c */ 213 #define DRM_VIRTIO_NUM_IOCTLS 10 214 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 215 216 /* virtio_kms.c */ 217 int virtio_gpu_init(struct drm_device *dev); 218 void virtio_gpu_deinit(struct drm_device *dev); 219 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 220 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 221 222 /* virtio_gem.c */ 223 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj); 224 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev); 225 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev); 226 int virtio_gpu_gem_create(struct drm_file *file, 227 struct drm_device *dev, 228 struct virtio_gpu_object_params *params, 229 struct drm_gem_object **obj_p, 230 uint32_t *handle_p); 231 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 232 struct drm_file *file); 233 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 234 struct drm_file *file); 235 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 236 struct drm_device *dev, 237 struct drm_mode_create_dumb *args); 238 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 239 struct drm_device *dev, 240 uint32_t handle, uint64_t *offset_p); 241 242 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 243 struct virtio_gpu_object_array* 244 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 245 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 246 struct drm_gem_object *obj); 247 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 248 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 249 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 250 struct dma_fence *fence); 251 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 252 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 253 struct virtio_gpu_object_array *objs); 254 void virtio_gpu_array_put_free_work(struct work_struct *work); 255 256 /* virtio vg */ 257 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 258 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 259 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 260 struct virtio_gpu_object *bo, 261 struct virtio_gpu_object_params *params, 262 struct virtio_gpu_object_array *objs, 263 struct virtio_gpu_fence *fence); 264 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 265 uint32_t resource_id); 266 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 267 uint64_t offset, 268 uint32_t width, uint32_t height, 269 uint32_t x, uint32_t y, 270 struct virtio_gpu_object_array *objs, 271 struct virtio_gpu_fence *fence); 272 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 273 uint32_t resource_id, 274 uint32_t x, uint32_t y, 275 uint32_t width, uint32_t height); 276 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 277 uint32_t scanout_id, uint32_t resource_id, 278 uint32_t width, uint32_t height, 279 uint32_t x, uint32_t y); 280 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 281 struct virtio_gpu_object *obj, 282 struct virtio_gpu_fence *fence); 283 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev, 284 struct virtio_gpu_object *obj); 285 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev); 286 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev); 287 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 288 struct virtio_gpu_output *output); 289 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 290 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 291 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 292 int idx, int version, 293 struct virtio_gpu_drv_cap_cache **cache_p); 294 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 295 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 296 uint32_t nlen, const char *name); 297 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 298 uint32_t id); 299 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 300 uint32_t ctx_id, 301 struct virtio_gpu_object_array *objs); 302 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 303 uint32_t ctx_id, 304 struct virtio_gpu_object_array *objs); 305 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 306 void *data, uint32_t data_size, 307 uint32_t ctx_id, 308 struct virtio_gpu_object_array *objs, 309 struct virtio_gpu_fence *fence); 310 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 311 uint32_t ctx_id, 312 uint64_t offset, uint32_t level, 313 struct drm_virtgpu_3d_box *box, 314 struct virtio_gpu_object_array *objs, 315 struct virtio_gpu_fence *fence); 316 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 317 uint32_t ctx_id, 318 uint64_t offset, uint32_t level, 319 struct drm_virtgpu_3d_box *box, 320 struct virtio_gpu_object_array *objs, 321 struct virtio_gpu_fence *fence); 322 void 323 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 324 struct virtio_gpu_object *bo, 325 struct virtio_gpu_object_params *params, 326 struct virtio_gpu_object_array *objs, 327 struct virtio_gpu_fence *fence); 328 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 329 void virtio_gpu_cursor_ack(struct virtqueue *vq); 330 void virtio_gpu_fence_ack(struct virtqueue *vq); 331 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 332 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 333 void virtio_gpu_dequeue_fence_func(struct work_struct *work); 334 335 void virtio_gpu_disable_notify(struct virtio_gpu_device *vgdev); 336 void virtio_gpu_enable_notify(struct virtio_gpu_device *vgdev); 337 338 /* virtio_gpu_display.c */ 339 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 340 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 341 342 /* virtio_gpu_plane.c */ 343 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 344 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 345 enum drm_plane_type type, 346 int index); 347 348 /* virtio_gpu_fence.c */ 349 struct virtio_gpu_fence *virtio_gpu_fence_alloc( 350 struct virtio_gpu_device *vgdev); 351 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 352 struct virtio_gpu_ctrl_hdr *cmd_hdr, 353 struct virtio_gpu_fence *fence); 354 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 355 u64 last_seq); 356 357 /* virtio_gpu_object */ 358 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 359 size_t size); 360 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 361 struct virtio_gpu_object_params *params, 362 struct virtio_gpu_object **bo_ptr, 363 struct virtio_gpu_fence *fence); 364 /* virtgpu_prime.c */ 365 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 366 struct drm_device *dev, struct dma_buf_attachment *attach, 367 struct sg_table *sgt); 368 369 /* virgl debugfs */ 370 int virtio_gpu_debugfs_init(struct drm_minor *minor); 371 372 #endif 373