xref: /linux/drivers/gpu/drm/xe/xe_bo_types.h (revision 021bc4b9)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef _XE_BO_TYPES_H_
7 #define _XE_BO_TYPES_H_
8 
9 #include <linux/iosys-map.h>
10 
11 #include <drm/drm_mm.h>
12 #include <drm/ttm/ttm_bo.h>
13 #include <drm/ttm/ttm_device.h>
14 #include <drm/ttm/ttm_execbuf_util.h>
15 #include <drm/ttm/ttm_placement.h>
16 
17 struct xe_device;
18 struct xe_vm;
19 
20 #define XE_BO_MAX_PLACEMENTS	3
21 
22 /* TODO: To be selected with VM_MADVISE */
23 #define	XE_BO_PRIORITY_NORMAL	1
24 
25 /** @xe_bo: XE buffer object */
26 struct xe_bo {
27 	/** @ttm: TTM base buffer object */
28 	struct ttm_buffer_object ttm;
29 	/** @size: Size of this buffer object */
30 	size_t size;
31 	/** @flags: flags for this buffer object */
32 	u32 flags;
33 	/** @vm: VM this BO is attached to, for extobj this will be NULL */
34 	struct xe_vm *vm;
35 	/** @tile: Tile this BO is attached to (kernel BO only) */
36 	struct xe_tile *tile;
37 	/** @placements: valid placements for this BO */
38 	struct ttm_place placements[XE_BO_MAX_PLACEMENTS];
39 	/** @placement: current placement for this BO */
40 	struct ttm_placement placement;
41 	/** @ggtt_node: GGTT node if this BO is mapped in the GGTT */
42 	struct drm_mm_node ggtt_node;
43 	/** @vmap: iosys map of this buffer */
44 	struct iosys_map vmap;
45 	/** @ttm_kmap: TTM bo kmap object for internal use only. Keep off. */
46 	struct ttm_bo_kmap_obj kmap;
47 	/** @pinned_link: link to present / evicted list of pinned BO */
48 	struct list_head pinned_link;
49 #ifdef CONFIG_PROC_FS
50 	/**
51 	 * @client: @xe_drm_client which created the bo
52 	 */
53 	struct xe_drm_client *client;
54 	/**
55 	 * @client_link: Link into @xe_drm_client.objects_list
56 	 */
57 	struct list_head client_link;
58 #endif
59 	/** @props: BO user controlled properties */
60 	struct {
61 		/** @preferred_mem: preferred memory class for this BO */
62 		s16 preferred_mem_class;
63 		/** @prefered_gt: preferred GT for this BO */
64 		s16 preferred_gt;
65 		/** @preferred_mem_type: preferred memory type */
66 		s32 preferred_mem_type;
67 		/**
68 		 * @cpu_atomic: the CPU expects to do atomics operations to
69 		 * this BO
70 		 */
71 		bool cpu_atomic;
72 		/**
73 		 * @device_atomic: the device expects to do atomics operations
74 		 * to this BO
75 		 */
76 		bool device_atomic;
77 	} props;
78 	/** @freed: List node for delayed put. */
79 	struct llist_node freed;
80 	/** @created: Whether the bo has passed initial creation */
81 	bool created;
82 
83 	/** @ccs_cleared */
84 	bool ccs_cleared;
85 
86 	/**
87 	 * @cpu_caching: CPU caching mode. Currently only used for userspace
88 	 * objects.
89 	 */
90 	u16 cpu_caching;
91 };
92 
93 #define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
94 #define intel_bo_to_i915(bo) to_i915(intel_bo_to_drm_bo(bo)->dev)
95 
96 #endif
97