1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * HWMON driver for ASUS motherboards that publish some sensor values 4 * via the embedded controller registers. 5 * 6 * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com> 7 8 * EC provides: 9 * - Chipset temperature 10 * - CPU temperature 11 * - Motherboard temperature 12 * - T_Sensor temperature 13 * - VRM temperature 14 * - Water In temperature 15 * - Water Out temperature 16 * - CPU Optional fan RPM 17 * - Chipset fan RPM 18 * - VRM Heat Sink fan RPM 19 * - Water Flow fan RPM 20 * - CPU current 21 * - CPU core voltage 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/bitops.h> 26 #include <linux/dev_printk.h> 27 #include <linux/dmi.h> 28 #include <linux/hwmon.h> 29 #include <linux/init.h> 30 #include <linux/jiffies.h> 31 #include <linux/kernel.h> 32 #include <linux/module.h> 33 #include <linux/platform_device.h> 34 #include <linux/sort.h> 35 #include <linux/units.h> 36 37 #include <asm/unaligned.h> 38 39 static char *mutex_path_override; 40 41 /* Writing to this EC register switches EC bank */ 42 #define ASUS_EC_BANK_REGISTER 0xff 43 #define SENSOR_LABEL_LEN 16 44 45 /* 46 * Arbitrary set max. allowed bank number. Required for sorting banks and 47 * currently is overkill with just 2 banks used at max, but for the sake 48 * of alignment let's set it to a higher value. 49 */ 50 #define ASUS_EC_MAX_BANK 3 51 52 #define ACPI_LOCK_DELAY_MS 500 53 54 /* ACPI mutex for locking access to the EC for the firmware */ 55 #define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX" 56 57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX" 58 59 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0" 60 61 #define MAX_IDENTICAL_BOARD_VARIATIONS 3 62 63 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */ 64 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK" 65 66 typedef union { 67 u32 value; 68 struct { 69 u8 index; 70 u8 bank; 71 u8 size; 72 u8 dummy; 73 } components; 74 } sensor_address; 75 76 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \ 77 .value = (size << 16) + (bank << 8) + index \ 78 } 79 80 static u32 hwmon_attributes[hwmon_max] = { 81 [hwmon_chip] = HWMON_C_REGISTER_TZ, 82 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, 83 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, 84 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL, 85 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL, 86 }; 87 88 struct ec_sensor_info { 89 char label[SENSOR_LABEL_LEN]; 90 enum hwmon_sensor_types type; 91 sensor_address addr; 92 }; 93 94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \ 95 .label = sensor_label, .type = sensor_type, \ 96 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \ 97 } 98 99 enum ec_sensors { 100 /* chipset temperature [℃] */ 101 ec_sensor_temp_chipset, 102 /* CPU temperature [℃] */ 103 ec_sensor_temp_cpu, 104 /* motherboard temperature [℃] */ 105 ec_sensor_temp_mb, 106 /* "T_Sensor" temperature sensor reading [℃] */ 107 ec_sensor_temp_t_sensor, 108 /* VRM temperature [℃] */ 109 ec_sensor_temp_vrm, 110 /* CPU Core voltage [mV] */ 111 ec_sensor_in_cpu_core, 112 /* CPU_Opt fan [RPM] */ 113 ec_sensor_fan_cpu_opt, 114 /* VRM heat sink fan [RPM] */ 115 ec_sensor_fan_vrm_hs, 116 /* Chipset fan [RPM] */ 117 ec_sensor_fan_chipset, 118 /* Water flow sensor reading [RPM] */ 119 ec_sensor_fan_water_flow, 120 /* CPU current [A] */ 121 ec_sensor_curr_cpu, 122 /* "Water_In" temperature sensor reading [℃] */ 123 ec_sensor_temp_water_in, 124 /* "Water_Out" temperature sensor reading [℃] */ 125 ec_sensor_temp_water_out, 126 /* "Water_Block_In" temperature sensor reading [℃] */ 127 ec_sensor_temp_water_block_in, 128 /* "Water_Block_Out" temperature sensor reading [℃] */ 129 ec_sensor_temp_water_block_out, 130 /* "T_sensor_2" temperature sensor reading [℃] */ 131 ec_sensor_temp_t_sensor_2, 132 /* "Extra_1" temperature sensor reading [℃] */ 133 ec_sensor_temp_sensor_extra_1, 134 /* "Extra_2" temperature sensor reading [℃] */ 135 ec_sensor_temp_sensor_extra_2, 136 /* "Extra_3" temperature sensor reading [℃] */ 137 ec_sensor_temp_sensor_extra_3, 138 }; 139 140 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset) 141 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu) 142 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb) 143 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor) 144 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm) 145 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core) 146 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt) 147 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs) 148 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset) 149 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow) 150 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu) 151 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in) 152 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out) 153 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in) 154 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out) 155 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2) 156 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1) 157 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2) 158 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3) 159 160 enum board_family { 161 family_unknown, 162 family_amd_400_series, 163 family_amd_500_series, 164 family_intel_300_series, 165 family_intel_600_series 166 }; 167 168 /* All the known sensors for ASUS EC controllers */ 169 static const struct ec_sensor_info sensors_family_amd_400[] = { 170 [ec_sensor_temp_chipset] = 171 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 172 [ec_sensor_temp_cpu] = 173 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 174 [ec_sensor_temp_mb] = 175 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 176 [ec_sensor_temp_t_sensor] = 177 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 178 [ec_sensor_temp_vrm] = 179 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 180 [ec_sensor_in_cpu_core] = 181 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 182 [ec_sensor_fan_cpu_opt] = 183 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc), 184 [ec_sensor_fan_vrm_hs] = 185 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 186 [ec_sensor_fan_chipset] = 187 /* no chipset fans in this generation */ 188 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00), 189 [ec_sensor_fan_water_flow] = 190 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4), 191 [ec_sensor_curr_cpu] = 192 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 193 [ec_sensor_temp_water_in] = 194 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d), 195 [ec_sensor_temp_water_out] = 196 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b), 197 }; 198 199 static const struct ec_sensor_info sensors_family_amd_500[] = { 200 [ec_sensor_temp_chipset] = 201 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 202 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 203 [ec_sensor_temp_mb] = 204 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 205 [ec_sensor_temp_t_sensor] = 206 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 207 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 208 [ec_sensor_in_cpu_core] = 209 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 210 [ec_sensor_fan_cpu_opt] = 211 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 212 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 213 [ec_sensor_fan_chipset] = 214 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4), 215 [ec_sensor_fan_water_flow] = 216 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 217 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 218 [ec_sensor_temp_water_in] = 219 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 220 [ec_sensor_temp_water_out] = 221 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 222 [ec_sensor_temp_water_block_in] = 223 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02), 224 [ec_sensor_temp_water_block_out] = 225 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03), 226 [ec_sensor_temp_sensor_extra_1] = 227 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09), 228 [ec_sensor_temp_t_sensor_2] = 229 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a), 230 [ec_sensor_temp_sensor_extra_2] = 231 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b), 232 [ec_sensor_temp_sensor_extra_3] = 233 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c), 234 }; 235 236 static const struct ec_sensor_info sensors_family_intel_300[] = { 237 [ec_sensor_temp_chipset] = 238 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 239 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 240 [ec_sensor_temp_mb] = 241 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 242 [ec_sensor_temp_t_sensor] = 243 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 244 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 245 [ec_sensor_fan_cpu_opt] = 246 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 247 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 248 [ec_sensor_fan_water_flow] = 249 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 250 [ec_sensor_temp_water_in] = 251 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 252 [ec_sensor_temp_water_out] = 253 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 254 }; 255 256 static const struct ec_sensor_info sensors_family_intel_600[] = { 257 [ec_sensor_temp_t_sensor] = 258 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 259 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 260 }; 261 262 /* Shortcuts for common combinations */ 263 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB \ 264 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB) 265 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT) 266 #define SENSOR_SET_WATER_BLOCK \ 267 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT) 268 269 struct ec_board_info { 270 unsigned long sensors; 271 /* 272 * Defines which mutex to use for guarding access to the state and the 273 * hardware. Can be either a full path to an AML mutex or the 274 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock, 275 * or left empty to use a regular mutex object, in which case access to 276 * the hardware is not guarded. 277 */ 278 const char *mutex_path; 279 enum board_family family; 280 }; 281 282 static const struct ec_board_info board_info_prime_x470_pro = { 283 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 284 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 285 SENSOR_FAN_CPU_OPT | 286 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 287 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 288 .family = family_amd_400_series, 289 }; 290 291 static const struct ec_board_info board_info_prime_x570_pro = { 292 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 293 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 294 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 295 .family = family_amd_500_series, 296 }; 297 298 static const struct ec_board_info board_info_pro_art_x570_creator_wifi = { 299 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 300 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT | 301 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 302 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 303 .family = family_amd_500_series, 304 }; 305 306 static const struct ec_board_info board_info_pro_art_b550_creator = { 307 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 308 SENSOR_TEMP_T_SENSOR | 309 SENSOR_FAN_CPU_OPT, 310 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 311 .family = family_amd_500_series, 312 }; 313 314 static const struct ec_board_info board_info_pro_ws_x570_ace = { 315 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 316 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET | 317 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 318 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 319 .family = family_amd_500_series, 320 }; 321 322 static const struct ec_board_info board_info_crosshair_viii_dark_hero = { 323 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 324 SENSOR_TEMP_T_SENSOR | 325 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 326 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW | 327 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 328 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 329 .family = family_amd_500_series, 330 }; 331 332 static const struct ec_board_info board_info_crosshair_viii_hero = { 333 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 334 SENSOR_TEMP_T_SENSOR | 335 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 336 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | 337 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | 338 SENSOR_IN_CPU_CORE, 339 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 340 .family = family_amd_500_series, 341 }; 342 343 static const struct ec_board_info board_info_maximus_xi_hero = { 344 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 345 SENSOR_TEMP_T_SENSOR | 346 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 347 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW, 348 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 349 .family = family_intel_300_series, 350 }; 351 352 static const struct ec_board_info board_info_crosshair_viii_impact = { 353 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 354 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 355 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 356 SENSOR_IN_CPU_CORE, 357 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 358 .family = family_amd_500_series, 359 }; 360 361 static const struct ec_board_info board_info_strix_b550_e_gaming = { 362 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 363 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 364 SENSOR_FAN_CPU_OPT, 365 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 366 .family = family_amd_500_series, 367 }; 368 369 static const struct ec_board_info board_info_strix_b550_i_gaming = { 370 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 371 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 372 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU | 373 SENSOR_IN_CPU_CORE, 374 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 375 .family = family_amd_500_series, 376 }; 377 378 static const struct ec_board_info board_info_strix_x570_e_gaming = { 379 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 380 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 381 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 382 SENSOR_IN_CPU_CORE, 383 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 384 .family = family_amd_500_series, 385 }; 386 387 static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = { 388 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 389 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU | 390 SENSOR_IN_CPU_CORE, 391 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 392 .family = family_amd_500_series, 393 }; 394 395 static const struct ec_board_info board_info_strix_x570_f_gaming = { 396 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 397 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 398 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 399 .family = family_amd_500_series, 400 }; 401 402 static const struct ec_board_info board_info_strix_x570_i_gaming = { 403 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 404 SENSOR_TEMP_T_SENSOR | 405 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET | 406 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 407 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 408 .family = family_amd_500_series, 409 }; 410 411 static const struct ec_board_info board_info_strix_z390_f_gaming = { 412 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 413 SENSOR_TEMP_T_SENSOR | 414 SENSOR_FAN_CPU_OPT, 415 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 416 .family = family_intel_300_series, 417 }; 418 419 static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = { 420 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM, 421 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, 422 .family = family_intel_600_series, 423 }; 424 425 static const struct ec_board_info board_info_zenith_ii_extreme = { 426 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR | 427 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 428 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS | 429 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE | 430 SENSOR_SET_WATER_BLOCK | 431 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 | 432 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3, 433 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0, 434 .family = family_amd_500_series, 435 }; 436 437 #define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \ 438 { \ 439 .matches = { \ 440 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \ 441 "ASUSTeK COMPUTER INC."), \ 442 DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \ 443 }, \ 444 .driver_data = (void *)board_info, \ 445 } 446 447 static const struct dmi_system_id dmi_table[] = { 448 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO", 449 &board_info_prime_x470_pro), 450 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO", 451 &board_info_prime_x570_pro), 452 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI", 453 &board_info_pro_art_x570_creator_wifi), 454 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt B550-CREATOR", 455 &board_info_pro_art_b550_creator), 456 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE", 457 &board_info_pro_ws_x570_ace), 458 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO", 459 &board_info_crosshair_viii_dark_hero), 460 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA", 461 &board_info_crosshair_viii_hero), 462 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO", 463 &board_info_crosshair_viii_hero), 464 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)", 465 &board_info_crosshair_viii_hero), 466 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO", 467 &board_info_maximus_xi_hero), 468 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)", 469 &board_info_maximus_xi_hero), 470 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT", 471 &board_info_crosshair_viii_impact), 472 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING", 473 &board_info_strix_b550_e_gaming), 474 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING", 475 &board_info_strix_b550_i_gaming), 476 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING", 477 &board_info_strix_x570_e_gaming), 478 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II", 479 &board_info_strix_x570_e_gaming_wifi_ii), 480 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING", 481 &board_info_strix_x570_f_gaming), 482 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING", 483 &board_info_strix_x570_i_gaming), 484 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-F GAMING", 485 &board_info_strix_z390_f_gaming), 486 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4", 487 &board_info_strix_z690_a_gaming_wifi_d4), 488 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME", 489 &board_info_zenith_ii_extreme), 490 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA", 491 &board_info_zenith_ii_extreme), 492 {}, 493 }; 494 495 struct ec_sensor { 496 unsigned int info_index; 497 s32 cached_value; 498 }; 499 500 struct lock_data { 501 union { 502 acpi_handle aml; 503 /* global lock handle */ 504 u32 glk; 505 } mutex; 506 bool (*lock)(struct lock_data *data); 507 bool (*unlock)(struct lock_data *data); 508 }; 509 510 /* 511 * The next function pairs implement options for locking access to the 512 * state and the EC 513 */ 514 static bool lock_via_acpi_mutex(struct lock_data *data) 515 { 516 /* 517 * ASUS DSDT does not specify that access to the EC has to be guarded, 518 * but firmware does access it via ACPI 519 */ 520 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml, 521 NULL, ACPI_LOCK_DELAY_MS)); 522 } 523 524 static bool unlock_acpi_mutex(struct lock_data *data) 525 { 526 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL)); 527 } 528 529 static bool lock_via_global_acpi_lock(struct lock_data *data) 530 { 531 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, 532 &data->mutex.glk)); 533 } 534 535 static bool unlock_global_acpi_lock(struct lock_data *data) 536 { 537 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk)); 538 } 539 540 struct ec_sensors_data { 541 const struct ec_board_info *board_info; 542 const struct ec_sensor_info *sensors_info; 543 struct ec_sensor *sensors; 544 /* EC registers to read from */ 545 u16 *registers; 546 u8 *read_buffer; 547 /* sorted list of unique register banks */ 548 u8 banks[ASUS_EC_MAX_BANK + 1]; 549 /* in jiffies */ 550 unsigned long last_updated; 551 struct lock_data lock_data; 552 /* number of board EC sensors */ 553 u8 nr_sensors; 554 /* 555 * number of EC registers to read 556 * (sensor might span more than 1 register) 557 */ 558 u8 nr_registers; 559 /* number of unique register banks */ 560 u8 nr_banks; 561 }; 562 563 static u8 register_bank(u16 reg) 564 { 565 return reg >> 8; 566 } 567 568 static u8 register_index(u16 reg) 569 { 570 return reg & 0x00ff; 571 } 572 573 static bool is_sensor_data_signed(const struct ec_sensor_info *si) 574 { 575 /* 576 * guessed from WMI functions in DSDT code for boards 577 * of the X470 generation 578 */ 579 return si->type == hwmon_temp; 580 } 581 582 static const struct ec_sensor_info * 583 get_sensor_info(const struct ec_sensors_data *state, int index) 584 { 585 return state->sensors_info + state->sensors[index].info_index; 586 } 587 588 static int find_ec_sensor_index(const struct ec_sensors_data *ec, 589 enum hwmon_sensor_types type, int channel) 590 { 591 unsigned int i; 592 593 for (i = 0; i < ec->nr_sensors; i++) { 594 if (get_sensor_info(ec, i)->type == type) { 595 if (channel == 0) 596 return i; 597 channel--; 598 } 599 } 600 return -ENOENT; 601 } 602 603 static int bank_compare(const void *a, const void *b) 604 { 605 return *((const s8 *)a) - *((const s8 *)b); 606 } 607 608 static void setup_sensor_data(struct ec_sensors_data *ec) 609 { 610 struct ec_sensor *s = ec->sensors; 611 bool bank_found; 612 int i, j; 613 u8 bank; 614 615 ec->nr_banks = 0; 616 ec->nr_registers = 0; 617 618 for_each_set_bit(i, &ec->board_info->sensors, 619 BITS_PER_TYPE(ec->board_info->sensors)) { 620 s->info_index = i; 621 s->cached_value = 0; 622 ec->nr_registers += 623 ec->sensors_info[s->info_index].addr.components.size; 624 bank_found = false; 625 bank = ec->sensors_info[s->info_index].addr.components.bank; 626 for (j = 0; j < ec->nr_banks; j++) { 627 if (ec->banks[j] == bank) { 628 bank_found = true; 629 break; 630 } 631 } 632 if (!bank_found) { 633 ec->banks[ec->nr_banks++] = bank; 634 } 635 s++; 636 } 637 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL); 638 } 639 640 static void fill_ec_registers(struct ec_sensors_data *ec) 641 { 642 const struct ec_sensor_info *si; 643 unsigned int i, j, register_idx = 0; 644 645 for (i = 0; i < ec->nr_sensors; ++i) { 646 si = get_sensor_info(ec, i); 647 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) { 648 ec->registers[register_idx] = 649 (si->addr.components.bank << 8) + 650 si->addr.components.index + j; 651 } 652 } 653 } 654 655 static int setup_lock_data(struct device *dev) 656 { 657 const char *mutex_path; 658 int status; 659 struct ec_sensors_data *state = dev_get_drvdata(dev); 660 661 mutex_path = mutex_path_override ? 662 mutex_path_override : state->board_info->mutex_path; 663 664 if (!mutex_path || !strlen(mutex_path)) { 665 dev_err(dev, "Hardware access guard mutex name is empty"); 666 return -EINVAL; 667 } 668 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) { 669 state->lock_data.mutex.glk = 0; 670 state->lock_data.lock = lock_via_global_acpi_lock; 671 state->lock_data.unlock = unlock_global_acpi_lock; 672 } else { 673 status = acpi_get_handle(NULL, (acpi_string)mutex_path, 674 &state->lock_data.mutex.aml); 675 if (ACPI_FAILURE(status)) { 676 dev_err(dev, 677 "Failed to get hardware access guard AML mutex '%s': error %d", 678 mutex_path, status); 679 return -ENOENT; 680 } 681 state->lock_data.lock = lock_via_acpi_mutex; 682 state->lock_data.unlock = unlock_acpi_mutex; 683 } 684 return 0; 685 } 686 687 static int asus_ec_bank_switch(u8 bank, u8 *old) 688 { 689 int status = 0; 690 691 if (old) { 692 status = ec_read(ASUS_EC_BANK_REGISTER, old); 693 } 694 if (status || (old && (*old == bank))) 695 return status; 696 return ec_write(ASUS_EC_BANK_REGISTER, bank); 697 } 698 699 static int asus_ec_block_read(const struct device *dev, 700 struct ec_sensors_data *ec) 701 { 702 int ireg, ibank, status; 703 u8 bank, reg_bank, prev_bank; 704 705 bank = 0; 706 status = asus_ec_bank_switch(bank, &prev_bank); 707 if (status) { 708 dev_warn(dev, "EC bank switch failed"); 709 return status; 710 } 711 712 if (prev_bank) { 713 /* oops... somebody else is working with the EC too */ 714 dev_warn(dev, 715 "Concurrent access to the ACPI EC detected.\nRace condition possible."); 716 } 717 718 /* read registers minimizing bank switches. */ 719 for (ibank = 0; ibank < ec->nr_banks; ibank++) { 720 if (bank != ec->banks[ibank]) { 721 bank = ec->banks[ibank]; 722 if (asus_ec_bank_switch(bank, NULL)) { 723 dev_warn(dev, "EC bank switch to %d failed", 724 bank); 725 break; 726 } 727 } 728 for (ireg = 0; ireg < ec->nr_registers; ireg++) { 729 reg_bank = register_bank(ec->registers[ireg]); 730 if (reg_bank < bank) { 731 continue; 732 } 733 ec_read(register_index(ec->registers[ireg]), 734 ec->read_buffer + ireg); 735 } 736 } 737 738 status = asus_ec_bank_switch(prev_bank, NULL); 739 return status; 740 } 741 742 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data) 743 { 744 if (is_sensor_data_signed(si)) { 745 switch (si->addr.components.size) { 746 case 1: 747 return (s8)*data; 748 case 2: 749 return (s16)get_unaligned_be16(data); 750 case 4: 751 return (s32)get_unaligned_be32(data); 752 default: 753 return 0; 754 } 755 } else { 756 switch (si->addr.components.size) { 757 case 1: 758 return *data; 759 case 2: 760 return get_unaligned_be16(data); 761 case 4: 762 return get_unaligned_be32(data); 763 default: 764 return 0; 765 } 766 } 767 } 768 769 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data) 770 { 771 const struct ec_sensor_info *si; 772 struct ec_sensor *s, *sensor_end; 773 774 sensor_end = ec->sensors + ec->nr_sensors; 775 for (s = ec->sensors; s != sensor_end; s++) { 776 si = ec->sensors_info + s->info_index; 777 s->cached_value = get_sensor_value(si, data); 778 data += si->addr.components.size; 779 } 780 } 781 782 static int update_ec_sensors(const struct device *dev, 783 struct ec_sensors_data *ec) 784 { 785 int status; 786 787 if (!ec->lock_data.lock(&ec->lock_data)) { 788 dev_warn(dev, "Failed to acquire mutex"); 789 return -EBUSY; 790 } 791 792 status = asus_ec_block_read(dev, ec); 793 794 if (!status) { 795 update_sensor_values(ec, ec->read_buffer); 796 } 797 798 if (!ec->lock_data.unlock(&ec->lock_data)) 799 dev_err(dev, "Failed to release mutex"); 800 801 return status; 802 } 803 804 static long scale_sensor_value(s32 value, int data_type) 805 { 806 switch (data_type) { 807 case hwmon_curr: 808 case hwmon_temp: 809 return value * MILLI; 810 default: 811 return value; 812 } 813 } 814 815 static int get_cached_value_or_update(const struct device *dev, 816 int sensor_index, 817 struct ec_sensors_data *state, s32 *value) 818 { 819 if (time_after(jiffies, state->last_updated + HZ)) { 820 if (update_ec_sensors(dev, state)) { 821 dev_err(dev, "update_ec_sensors() failure\n"); 822 return -EIO; 823 } 824 825 state->last_updated = jiffies; 826 } 827 828 *value = state->sensors[sensor_index].cached_value; 829 return 0; 830 } 831 832 /* 833 * Now follow the functions that implement the hwmon interface 834 */ 835 836 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 837 u32 attr, int channel, long *val) 838 { 839 int ret; 840 s32 value = 0; 841 842 struct ec_sensors_data *state = dev_get_drvdata(dev); 843 int sidx = find_ec_sensor_index(state, type, channel); 844 845 if (sidx < 0) { 846 return sidx; 847 } 848 849 ret = get_cached_value_or_update(dev, sidx, state, &value); 850 if (!ret) { 851 *val = scale_sensor_value(value, 852 get_sensor_info(state, sidx)->type); 853 } 854 855 return ret; 856 } 857 858 static int asus_ec_hwmon_read_string(struct device *dev, 859 enum hwmon_sensor_types type, u32 attr, 860 int channel, const char **str) 861 { 862 struct ec_sensors_data *state = dev_get_drvdata(dev); 863 int sensor_index = find_ec_sensor_index(state, type, channel); 864 *str = get_sensor_info(state, sensor_index)->label; 865 866 return 0; 867 } 868 869 static umode_t asus_ec_hwmon_is_visible(const void *drvdata, 870 enum hwmon_sensor_types type, u32 attr, 871 int channel) 872 { 873 const struct ec_sensors_data *state = drvdata; 874 875 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0; 876 } 877 878 static int 879 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan, 880 struct device *dev, int num, 881 enum hwmon_sensor_types type, u32 config) 882 { 883 int i; 884 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL); 885 886 if (!cfg) 887 return -ENOMEM; 888 889 asus_ec_hwmon_chan->type = type; 890 asus_ec_hwmon_chan->config = cfg; 891 for (i = 0; i < num; i++, cfg++) 892 *cfg = config; 893 894 return 0; 895 } 896 897 static const struct hwmon_ops asus_ec_hwmon_ops = { 898 .is_visible = asus_ec_hwmon_is_visible, 899 .read = asus_ec_hwmon_read, 900 .read_string = asus_ec_hwmon_read_string, 901 }; 902 903 static struct hwmon_chip_info asus_ec_chip_info = { 904 .ops = &asus_ec_hwmon_ops, 905 }; 906 907 static const struct ec_board_info *get_board_info(void) 908 { 909 const struct dmi_system_id *dmi_entry; 910 911 dmi_entry = dmi_first_match(dmi_table); 912 return dmi_entry ? dmi_entry->driver_data : NULL; 913 } 914 915 static int asus_ec_probe(struct platform_device *pdev) 916 { 917 const struct hwmon_channel_info **ptr_asus_ec_ci; 918 int nr_count[hwmon_max] = { 0 }, nr_types = 0; 919 struct hwmon_channel_info *asus_ec_hwmon_chan; 920 const struct ec_board_info *pboard_info; 921 const struct hwmon_chip_info *chip_info; 922 struct device *dev = &pdev->dev; 923 struct ec_sensors_data *ec_data; 924 const struct ec_sensor_info *si; 925 enum hwmon_sensor_types type; 926 struct device *hwdev; 927 unsigned int i; 928 int status; 929 930 pboard_info = get_board_info(); 931 if (!pboard_info) 932 return -ENODEV; 933 934 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data), 935 GFP_KERNEL); 936 if (!ec_data) 937 return -ENOMEM; 938 939 dev_set_drvdata(dev, ec_data); 940 ec_data->board_info = pboard_info; 941 942 switch (ec_data->board_info->family) { 943 case family_amd_400_series: 944 ec_data->sensors_info = sensors_family_amd_400; 945 break; 946 case family_amd_500_series: 947 ec_data->sensors_info = sensors_family_amd_500; 948 break; 949 case family_intel_300_series: 950 ec_data->sensors_info = sensors_family_intel_300; 951 break; 952 case family_intel_600_series: 953 ec_data->sensors_info = sensors_family_intel_600; 954 break; 955 default: 956 dev_err(dev, "Unknown board family: %d", 957 ec_data->board_info->family); 958 return -EINVAL; 959 } 960 961 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors); 962 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors, 963 sizeof(struct ec_sensor), GFP_KERNEL); 964 if (!ec_data->sensors) 965 return -ENOMEM; 966 967 status = setup_lock_data(dev); 968 if (status) { 969 dev_err(dev, "Failed to setup state/EC locking: %d", status); 970 return status; 971 } 972 973 setup_sensor_data(ec_data); 974 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers, 975 sizeof(u16), GFP_KERNEL); 976 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers, 977 sizeof(u8), GFP_KERNEL); 978 979 if (!ec_data->registers || !ec_data->read_buffer) 980 return -ENOMEM; 981 982 fill_ec_registers(ec_data); 983 984 for (i = 0; i < ec_data->nr_sensors; ++i) { 985 si = get_sensor_info(ec_data, i); 986 if (!nr_count[si->type]) 987 ++nr_types; 988 ++nr_count[si->type]; 989 } 990 991 if (nr_count[hwmon_temp]) 992 nr_count[hwmon_chip]++, nr_types++; 993 994 asus_ec_hwmon_chan = devm_kcalloc( 995 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL); 996 if (!asus_ec_hwmon_chan) 997 return -ENOMEM; 998 999 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1, 1000 sizeof(*ptr_asus_ec_ci), GFP_KERNEL); 1001 if (!ptr_asus_ec_ci) 1002 return -ENOMEM; 1003 1004 asus_ec_chip_info.info = ptr_asus_ec_ci; 1005 chip_info = &asus_ec_chip_info; 1006 1007 for (type = 0; type < hwmon_max; ++type) { 1008 if (!nr_count[type]) 1009 continue; 1010 1011 asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev, 1012 nr_count[type], type, 1013 hwmon_attributes[type]); 1014 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++; 1015 } 1016 1017 dev_info(dev, "board has %d EC sensors that span %d registers", 1018 ec_data->nr_sensors, ec_data->nr_registers); 1019 1020 hwdev = devm_hwmon_device_register_with_info(dev, "asusec", 1021 ec_data, chip_info, NULL); 1022 1023 return PTR_ERR_OR_ZERO(hwdev); 1024 } 1025 1026 MODULE_DEVICE_TABLE(dmi, dmi_table); 1027 1028 static struct platform_driver asus_ec_sensors_platform_driver = { 1029 .driver = { 1030 .name = "asus-ec-sensors", 1031 }, 1032 .probe = asus_ec_probe, 1033 }; 1034 1035 static struct platform_device *asus_ec_sensors_platform_device; 1036 1037 static int __init asus_ec_init(void) 1038 { 1039 asus_ec_sensors_platform_device = 1040 platform_create_bundle(&asus_ec_sensors_platform_driver, 1041 asus_ec_probe, NULL, 0, NULL, 0); 1042 1043 if (IS_ERR(asus_ec_sensors_platform_device)) 1044 return PTR_ERR(asus_ec_sensors_platform_device); 1045 1046 return 0; 1047 } 1048 1049 static void __exit asus_ec_exit(void) 1050 { 1051 platform_device_unregister(asus_ec_sensors_platform_device); 1052 platform_driver_unregister(&asus_ec_sensors_platform_driver); 1053 } 1054 1055 module_init(asus_ec_init); 1056 module_exit(asus_ec_exit); 1057 1058 module_param_named(mutex_path, mutex_path_override, charp, 0); 1059 MODULE_PARM_DESC(mutex_path, 1060 "Override ACPI mutex path used to guard access to hardware"); 1061 1062 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>"); 1063 MODULE_DESCRIPTION( 1064 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards"); 1065 MODULE_LICENSE("GPL"); 1066