1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Synopsys DesignWare I2C adapter driver.
4  *
5  * Based on the TI DAVINCI I2C adapter driver.
6  *
7  * Copyright (C) 2006 Texas Instruments.
8  * Copyright (C) 2007 MontaVista Software Inc.
9  * Copyright (C) 2009 Provigent Ltd.
10  */
11 #include <linux/acpi.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/dmi.h>
16 #include <linux/err.h>
17 #include <linux/errno.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/syscon.h>
23 #include <linux/module.h>
24 #include <linux/of.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/property.h>
29 #include <linux/regmap.h>
30 #include <linux/reset.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <linux/suspend.h>
34 #include <linux/units.h>
35 
36 #include "i2c-designware-core.h"
37 
38 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
39 {
40 	return clk_get_rate(dev->clk) / KILO;
41 }
42 
43 #ifdef CONFIG_ACPI
44 static const struct acpi_device_id dw_i2c_acpi_match[] = {
45 	{ "INT33C2", 0 },
46 	{ "INT33C3", 0 },
47 	{ "INT3432", 0 },
48 	{ "INT3433", 0 },
49 	{ "80860F41", ACCESS_NO_IRQ_SUSPEND },
50 	{ "808622C1", ACCESS_NO_IRQ_SUSPEND },
51 	{ "AMD0010", ACCESS_INTR_MASK },
52 	{ "AMDI0010", ACCESS_INTR_MASK },
53 	{ "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
54 	{ "AMDI0510", 0 },
55 	{ "APMC0D0F", 0 },
56 	{ "HISI02A1", 0 },
57 	{ "HISI02A2", 0 },
58 	{ "HISI02A3", 0 },
59 	{ "HYGO0010", ACCESS_INTR_MASK },
60 	{ }
61 };
62 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
63 #endif
64 
65 #ifdef CONFIG_OF
66 #define BT1_I2C_CTL			0x100
67 #define BT1_I2C_CTL_ADDR_MASK		GENMASK(7, 0)
68 #define BT1_I2C_CTL_WR			BIT(8)
69 #define BT1_I2C_CTL_GO			BIT(31)
70 #define BT1_I2C_DI			0x104
71 #define BT1_I2C_DO			0x108
72 
73 static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
74 {
75 	struct dw_i2c_dev *dev = context;
76 	int ret;
77 
78 	/*
79 	 * Note these methods shouldn't ever fail because the system controller
80 	 * registers are memory mapped. We check the return value just in case.
81 	 */
82 	ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
83 			   BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
84 	if (ret)
85 		return ret;
86 
87 	return regmap_read(dev->sysmap, BT1_I2C_DO, val);
88 }
89 
90 static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
91 {
92 	struct dw_i2c_dev *dev = context;
93 	int ret;
94 
95 	ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
96 	if (ret)
97 		return ret;
98 
99 	return regmap_write(dev->sysmap, BT1_I2C_CTL,
100 		BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
101 }
102 
103 static struct regmap_config bt1_i2c_cfg = {
104 	.reg_bits = 32,
105 	.val_bits = 32,
106 	.reg_stride = 4,
107 	.fast_io = true,
108 	.reg_read = bt1_i2c_read,
109 	.reg_write = bt1_i2c_write,
110 	.max_register = DW_IC_COMP_TYPE,
111 };
112 
113 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
114 {
115 	dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
116 	if (IS_ERR(dev->sysmap))
117 		return PTR_ERR(dev->sysmap);
118 
119 	dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
120 	return PTR_ERR_OR_ZERO(dev->map);
121 }
122 
123 #define MSCC_ICPU_CFG_TWI_DELAY		0x0
124 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE	BIT(0)
125 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER	0x4
126 
127 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
128 {
129 	writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
130 	       dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
131 
132 	return 0;
133 }
134 
135 static int dw_i2c_of_configure(struct platform_device *pdev)
136 {
137 	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
138 
139 	switch (dev->flags & MODEL_MASK) {
140 	case MODEL_MSCC_OCELOT:
141 		dev->ext = devm_platform_ioremap_resource(pdev, 1);
142 		if (!IS_ERR(dev->ext))
143 			dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
144 		break;
145 	default:
146 		break;
147 	}
148 
149 	return 0;
150 }
151 
152 static const struct of_device_id dw_i2c_of_match[] = {
153 	{ .compatible = "snps,designware-i2c", },
154 	{ .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
155 	{ .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
156 	{},
157 };
158 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
159 #else
160 static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
161 {
162 	return -ENODEV;
163 }
164 
165 static inline int dw_i2c_of_configure(struct platform_device *pdev)
166 {
167 	return -ENODEV;
168 }
169 #endif
170 
171 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
172 {
173 	pm_runtime_disable(dev->dev);
174 
175 	if (dev->shared_with_punit)
176 		pm_runtime_put_noidle(dev->dev);
177 }
178 
179 static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
180 {
181 	struct platform_device *pdev = to_platform_device(dev->dev);
182 	int ret;
183 
184 	switch (dev->flags & MODEL_MASK) {
185 	case MODEL_BAIKAL_BT1:
186 		ret = bt1_i2c_request_regs(dev);
187 		break;
188 	default:
189 		dev->base = devm_platform_ioremap_resource(pdev, 0);
190 		ret = PTR_ERR_OR_ZERO(dev->base);
191 		break;
192 	}
193 
194 	return ret;
195 }
196 
197 static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
198 	{
199 		.ident = "Qtechnology QT5222",
200 		.matches = {
201 			DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
202 			DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
203 		},
204 	},
205 	{ } /* terminate list */
206 };
207 
208 static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = {
209 #ifdef CONFIG_I2C_DESIGNWARE_BAYTRAIL
210 	{
211 		.probe = i2c_dw_baytrail_probe_lock_support,
212 	},
213 #endif
214 #ifdef CONFIG_I2C_DESIGNWARE_AMDPSP
215 	{
216 		.probe = i2c_dw_amdpsp_probe_lock_support,
217 		.remove = i2c_dw_amdpsp_remove_lock_support,
218 	},
219 #endif
220 	{}
221 };
222 
223 static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
224 {
225 	const struct i2c_dw_semaphore_callbacks *ptr;
226 	int i = 0;
227 	int ret;
228 
229 	ptr = i2c_dw_semaphore_cb_table;
230 
231 	dev->semaphore_idx = -1;
232 
233 	while (ptr->probe) {
234 		ret = ptr->probe(dev);
235 		if (ret) {
236 			/*
237 			 * If there is no semaphore device attached to this
238 			 * controller, we shouldn't abort general i2c_controller
239 			 * probe.
240 			 */
241 			if (ret != -ENODEV)
242 				return ret;
243 
244 			i++;
245 			ptr++;
246 			continue;
247 		}
248 
249 		dev->semaphore_idx = i;
250 		break;
251 	}
252 
253 	return 0;
254 }
255 
256 static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev)
257 {
258 	if (dev->semaphore_idx < 0)
259 		return;
260 
261 	if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove)
262 		i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev);
263 }
264 
265 static int dw_i2c_plat_probe(struct platform_device *pdev)
266 {
267 	struct i2c_adapter *adap;
268 	struct dw_i2c_dev *dev;
269 	struct i2c_timings *t;
270 	int irq, ret;
271 
272 	irq = platform_get_irq(pdev, 0);
273 	if (irq < 0)
274 		return irq;
275 
276 	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
277 	if (!dev)
278 		return -ENOMEM;
279 
280 	dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
281 	dev->dev = &pdev->dev;
282 	dev->irq = irq;
283 	platform_set_drvdata(pdev, dev);
284 
285 	ret = dw_i2c_plat_request_regs(dev);
286 	if (ret)
287 		return ret;
288 
289 	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
290 	if (IS_ERR(dev->rst))
291 		return PTR_ERR(dev->rst);
292 
293 	reset_control_deassert(dev->rst);
294 
295 	t = &dev->timings;
296 	i2c_parse_fw_timings(&pdev->dev, t, false);
297 
298 	i2c_dw_adjust_bus_speed(dev);
299 
300 	if (pdev->dev.of_node)
301 		dw_i2c_of_configure(pdev);
302 
303 	if (has_acpi_companion(&pdev->dev))
304 		i2c_dw_acpi_configure(&pdev->dev);
305 
306 	ret = i2c_dw_validate_speed(dev);
307 	if (ret)
308 		goto exit_reset;
309 
310 	ret = i2c_dw_probe_lock_support(dev);
311 	if (ret)
312 		goto exit_reset;
313 
314 	i2c_dw_configure(dev);
315 
316 	/* Optional interface clock */
317 	dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
318 	if (IS_ERR(dev->pclk)) {
319 		ret = PTR_ERR(dev->pclk);
320 		goto exit_reset;
321 	}
322 
323 	dev->clk = devm_clk_get(&pdev->dev, NULL);
324 	if (!i2c_dw_prepare_clk(dev, true)) {
325 		u64 clk_khz;
326 
327 		dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
328 		clk_khz = dev->get_clk_rate_khz(dev);
329 
330 		if (!dev->sda_hold_time && t->sda_hold_ns)
331 			dev->sda_hold_time =
332 				DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
333 	}
334 
335 	adap = &dev->adapter;
336 	adap->owner = THIS_MODULE;
337 	adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
338 					I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
339 	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
340 	adap->dev.of_node = pdev->dev.of_node;
341 	adap->nr = -1;
342 
343 	if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
344 		dev_pm_set_driver_flags(&pdev->dev,
345 					DPM_FLAG_SMART_PREPARE |
346 					DPM_FLAG_MAY_SKIP_RESUME);
347 	} else {
348 		dev_pm_set_driver_flags(&pdev->dev,
349 					DPM_FLAG_SMART_PREPARE |
350 					DPM_FLAG_SMART_SUSPEND |
351 					DPM_FLAG_MAY_SKIP_RESUME);
352 	}
353 
354 	device_enable_async_suspend(&pdev->dev);
355 
356 	/* The code below assumes runtime PM to be disabled. */
357 	WARN_ON(pm_runtime_enabled(&pdev->dev));
358 
359 	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
360 	pm_runtime_use_autosuspend(&pdev->dev);
361 	pm_runtime_set_active(&pdev->dev);
362 
363 	if (dev->shared_with_punit)
364 		pm_runtime_get_noresume(&pdev->dev);
365 
366 	pm_runtime_enable(&pdev->dev);
367 
368 	ret = i2c_dw_probe(dev);
369 	if (ret)
370 		goto exit_probe;
371 
372 	return ret;
373 
374 exit_probe:
375 	dw_i2c_plat_pm_cleanup(dev);
376 exit_reset:
377 	reset_control_assert(dev->rst);
378 	return ret;
379 }
380 
381 static int dw_i2c_plat_remove(struct platform_device *pdev)
382 {
383 	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
384 
385 	pm_runtime_get_sync(&pdev->dev);
386 
387 	i2c_del_adapter(&dev->adapter);
388 
389 	dev->disable(dev);
390 
391 	pm_runtime_dont_use_autosuspend(&pdev->dev);
392 	pm_runtime_put_sync(&pdev->dev);
393 	dw_i2c_plat_pm_cleanup(dev);
394 
395 	i2c_dw_remove_lock_support(dev);
396 
397 	reset_control_assert(dev->rst);
398 
399 	return 0;
400 }
401 
402 #ifdef CONFIG_PM_SLEEP
403 static int dw_i2c_plat_prepare(struct device *dev)
404 {
405 	/*
406 	 * If the ACPI companion device object is present for this device, it
407 	 * may be accessed during suspend and resume of other devices via I2C
408 	 * operation regions, so tell the PM core and middle layers to avoid
409 	 * skipping system suspend/resume callbacks for it in that case.
410 	 */
411 	return !has_acpi_companion(dev);
412 }
413 
414 static void dw_i2c_plat_complete(struct device *dev)
415 {
416 	/*
417 	 * The device can only be in runtime suspend at this point if it has not
418 	 * been resumed throughout the ending system suspend/resume cycle, so if
419 	 * the platform firmware might mess up with it, request the runtime PM
420 	 * framework to resume it.
421 	 */
422 	if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
423 		pm_request_resume(dev);
424 }
425 #else
426 #define dw_i2c_plat_prepare	NULL
427 #define dw_i2c_plat_complete	NULL
428 #endif
429 
430 #ifdef CONFIG_PM
431 static int dw_i2c_plat_runtime_suspend(struct device *dev)
432 {
433 	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
434 
435 	if (i_dev->shared_with_punit)
436 		return 0;
437 
438 	i_dev->disable(i_dev);
439 	i2c_dw_prepare_clk(i_dev, false);
440 
441 	return 0;
442 }
443 
444 static int __maybe_unused dw_i2c_plat_suspend(struct device *dev)
445 {
446 	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
447 
448 	i2c_mark_adapter_suspended(&i_dev->adapter);
449 
450 	return dw_i2c_plat_runtime_suspend(dev);
451 }
452 
453 static int dw_i2c_plat_runtime_resume(struct device *dev)
454 {
455 	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
456 
457 	if (!i_dev->shared_with_punit)
458 		i2c_dw_prepare_clk(i_dev, true);
459 
460 	i_dev->init(i_dev);
461 
462 	return 0;
463 }
464 
465 static int __maybe_unused dw_i2c_plat_resume(struct device *dev)
466 {
467 	struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
468 
469 	dw_i2c_plat_runtime_resume(dev);
470 	i2c_mark_adapter_resumed(&i_dev->adapter);
471 
472 	return 0;
473 }
474 
475 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
476 	.prepare = dw_i2c_plat_prepare,
477 	.complete = dw_i2c_plat_complete,
478 	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
479 	SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend, dw_i2c_plat_runtime_resume, NULL)
480 };
481 
482 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
483 #else
484 #define DW_I2C_DEV_PMOPS NULL
485 #endif
486 
487 /* Work with hotplug and coldplug */
488 MODULE_ALIAS("platform:i2c_designware");
489 
490 static struct platform_driver dw_i2c_driver = {
491 	.probe = dw_i2c_plat_probe,
492 	.remove = dw_i2c_plat_remove,
493 	.driver		= {
494 		.name	= "i2c_designware",
495 		.of_match_table = of_match_ptr(dw_i2c_of_match),
496 		.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
497 		.pm	= DW_I2C_DEV_PMOPS,
498 	},
499 };
500 
501 static int __init dw_i2c_init_driver(void)
502 {
503 	return platform_driver_register(&dw_i2c_driver);
504 }
505 subsys_initcall(dw_i2c_init_driver);
506 
507 static void __exit dw_i2c_exit_driver(void)
508 {
509 	platform_driver_unregister(&dw_i2c_driver);
510 }
511 module_exit(dw_i2c_exit_driver);
512 
513 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
514 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
515 MODULE_LICENSE("GPL");
516