1 // SPDX-License-Identifier: GPL-2.0-only 2 /* ------------------------------------------------------------------------- */ 3 /* i2c-iop3xx.c i2c driver algorithms for Intel XScale IOP3xx & IXP46x */ 4 /* ------------------------------------------------------------------------- */ 5 /* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd 6 * <Peter dot Milne at D hyphen TACQ dot com> 7 * 8 * With acknowledgements to i2c-algo-ibm_ocp.c by 9 * Ian DaSilva, MontaVista Software, Inc. idasilva@mvista.com 10 * 11 * And i2c-algo-pcf.c, which was created by Simon G. Vogl and Hans Berglund: 12 * 13 * Copyright (C) 1995-1997 Simon G. Vogl, 1998-2000 Hans Berglund 14 * 15 * And which acknowledged Kyösti Mälkki <kmalkki@cc.hut.fi>, 16 * Frodo Looijaard <frodol@dds.nl>, Martin Bailey<mbailey@littlefeet-inc.com> 17 * 18 * Major cleanup by Deepak Saxena <dsaxena@plexity.net>, 01/2005: 19 * 20 * - Use driver model to pass per-chip info instead of hardcoding and #ifdefs 21 * - Use ioremap/__raw_readl/__raw_writel instead of direct dereference 22 * - Make it work with IXP46x chips 23 * - Cleanup function names, coding style, etc 24 * 25 * - writing to slave address causes latchup on iop331. 26 * fix: driver refuses to address self. 27 */ 28 29 #include <linux/interrupt.h> 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/errno.h> 35 #include <linux/platform_device.h> 36 #include <linux/i2c.h> 37 #include <linux/io.h> 38 #include <linux/gpio/consumer.h> 39 40 #include "i2c-iop3xx.h" 41 42 /* global unit counter */ 43 static int i2c_id; 44 45 static inline unsigned char 46 iic_cook_addr(struct i2c_msg *msg) 47 { 48 unsigned char addr; 49 50 addr = i2c_8bit_addr_from_msg(msg); 51 52 return addr; 53 } 54 55 static void 56 iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) 57 { 58 /* Follows devman 9.3 */ 59 __raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); 60 __raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); 61 __raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); 62 } 63 64 static void 65 iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) 66 { 67 u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; 68 69 /* 70 * Every time unit enable is asserted, GPOD needs to be cleared 71 * on IOP3XX to avoid data corruption on the bus. We use the 72 * gpiod_set_raw_value() to make sure the 0 hits the hardware 73 * GPOD register. These descriptors are only passed along to 74 * the device if this is necessary. 75 */ 76 if (iop3xx_adap->gpio_scl) 77 gpiod_set_raw_value(iop3xx_adap->gpio_scl, 0); 78 if (iop3xx_adap->gpio_sda) 79 gpiod_set_raw_value(iop3xx_adap->gpio_sda, 0); 80 81 /* NB SR bits not same position as CR IE bits :-( */ 82 iop3xx_adap->SR_enabled = 83 IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD | 84 IOP3XX_ISR_RXFULL | IOP3XX_ISR_TXEMPTY; 85 86 cr |= IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | 87 IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE; 88 89 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 90 } 91 92 static void 93 iop3xx_i2c_transaction_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) 94 { 95 unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); 96 97 cr &= ~(IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE | 98 IOP3XX_ICR_MSTOP | IOP3XX_ICR_SCLEN); 99 100 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 101 } 102 103 /* 104 * NB: the handler has to clear the source of the interrupt! 105 * Then it passes the SR flags of interest to BH via adap data 106 */ 107 static irqreturn_t 108 iop3xx_i2c_irq_handler(int this_irq, void *dev_id) 109 { 110 struct i2c_algo_iop3xx_data *iop3xx_adap = dev_id; 111 u32 sr = __raw_readl(iop3xx_adap->ioaddr + SR_OFFSET); 112 113 if ((sr &= iop3xx_adap->SR_enabled)) { 114 __raw_writel(sr, iop3xx_adap->ioaddr + SR_OFFSET); 115 iop3xx_adap->SR_received |= sr; 116 wake_up_interruptible(&iop3xx_adap->waitq); 117 } 118 return IRQ_HANDLED; 119 } 120 121 /* check all error conditions, clear them , report most important */ 122 static int 123 iop3xx_i2c_error(u32 sr) 124 { 125 int rc = 0; 126 127 if ((sr & IOP3XX_ISR_BERRD)) { 128 if (!rc) 129 rc = -I2C_ERR_BERR; 130 } 131 if ((sr & IOP3XX_ISR_ALD)) { 132 if (!rc) 133 rc = -I2C_ERR_ALD; 134 } 135 return rc; 136 } 137 138 static inline u32 139 iop3xx_i2c_get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) 140 { 141 unsigned long flags; 142 u32 sr; 143 144 spin_lock_irqsave(&iop3xx_adap->lock, flags); 145 sr = iop3xx_adap->SR_received; 146 iop3xx_adap->SR_received = 0; 147 spin_unlock_irqrestore(&iop3xx_adap->lock, flags); 148 149 return sr; 150 } 151 152 /* 153 * sleep until interrupted, then recover and analyse the SR 154 * saved by handler 155 */ 156 typedef int (*compare_func)(unsigned test, unsigned mask); 157 /* returns 1 on correct comparison */ 158 159 static int 160 iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, 161 unsigned flags, unsigned *status, 162 compare_func compare) 163 { 164 unsigned sr = 0; 165 int interrupted; 166 int done; 167 int rc = 0; 168 169 do { 170 interrupted = wait_event_interruptible_timeout ( 171 iop3xx_adap->waitq, 172 (done = compare(sr = iop3xx_i2c_get_srstat(iop3xx_adap), flags)), 173 1 * HZ 174 ); 175 if ((rc = iop3xx_i2c_error(sr)) < 0) { 176 *status = sr; 177 return rc; 178 } else if (!interrupted) { 179 *status = sr; 180 return -ETIMEDOUT; 181 } 182 } while (!done); 183 184 *status = sr; 185 186 return 0; 187 } 188 189 /* 190 * Concrete compare_funcs 191 */ 192 static int 193 all_bits_clear(unsigned test, unsigned mask) 194 { 195 return (test & mask) == 0; 196 } 197 198 static int 199 any_bits_set(unsigned test, unsigned mask) 200 { 201 return (test & mask) != 0; 202 } 203 204 static int 205 iop3xx_i2c_wait_tx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) 206 { 207 return iop3xx_i2c_wait_event( 208 iop3xx_adap, 209 IOP3XX_ISR_TXEMPTY | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, 210 status, any_bits_set); 211 } 212 213 static int 214 iop3xx_i2c_wait_rx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) 215 { 216 return iop3xx_i2c_wait_event( 217 iop3xx_adap, 218 IOP3XX_ISR_RXFULL | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, 219 status, any_bits_set); 220 } 221 222 static int 223 iop3xx_i2c_wait_idle(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) 224 { 225 return iop3xx_i2c_wait_event( 226 iop3xx_adap, IOP3XX_ISR_UNITBUSY, status, all_bits_clear); 227 } 228 229 static int 230 iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, 231 struct i2c_msg *msg) 232 { 233 unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); 234 int status; 235 int rc; 236 237 /* avoid writing to my slave address (hangs on 80331), 238 * forbidden in Intel developer manual 239 */ 240 if (msg->addr == MYSAR) { 241 return -EBUSY; 242 } 243 244 __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); 245 246 cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); 247 cr |= IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE; 248 249 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 250 rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); 251 252 return rc; 253 } 254 255 static int 256 iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, 257 int stop) 258 { 259 unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); 260 int status; 261 int rc = 0; 262 263 __raw_writel(byte, iop3xx_adap->ioaddr + DBR_OFFSET); 264 cr &= ~IOP3XX_ICR_MSTART; 265 if (stop) { 266 cr |= IOP3XX_ICR_MSTOP; 267 } else { 268 cr &= ~IOP3XX_ICR_MSTOP; 269 } 270 cr |= IOP3XX_ICR_TBYTE; 271 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 272 rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); 273 274 return rc; 275 } 276 277 static int 278 iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char *byte, 279 int stop) 280 { 281 unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); 282 int status; 283 int rc = 0; 284 285 cr &= ~IOP3XX_ICR_MSTART; 286 287 if (stop) { 288 cr |= IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK; 289 } else { 290 cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); 291 } 292 cr |= IOP3XX_ICR_TBYTE; 293 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 294 295 rc = iop3xx_i2c_wait_rx_done(iop3xx_adap, &status); 296 297 *byte = __raw_readl(iop3xx_adap->ioaddr + DBR_OFFSET); 298 299 return rc; 300 } 301 302 static int 303 iop3xx_i2c_writebytes(struct i2c_adapter *i2c_adap, const char *buf, int count) 304 { 305 struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; 306 int ii; 307 int rc = 0; 308 309 for (ii = 0; rc == 0 && ii != count; ++ii) 310 rc = iop3xx_i2c_write_byte(iop3xx_adap, buf[ii], ii == count-1); 311 return rc; 312 } 313 314 static int 315 iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) 316 { 317 struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; 318 int ii; 319 int rc = 0; 320 321 for (ii = 0; rc == 0 && ii != count; ++ii) 322 rc = iop3xx_i2c_read_byte(iop3xx_adap, &buf[ii], ii == count-1); 323 324 return rc; 325 } 326 327 /* 328 * Description: This function implements combined transactions. Combined 329 * transactions consist of combinations of reading and writing blocks of data. 330 * FROM THE SAME ADDRESS 331 * Each transfer (i.e. a read or a write) is separated by a repeated start 332 * condition. 333 */ 334 static int 335 iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg *pmsg) 336 { 337 struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; 338 int rc; 339 340 rc = iop3xx_i2c_send_target_addr(iop3xx_adap, pmsg); 341 if (rc < 0) { 342 return rc; 343 } 344 345 if ((pmsg->flags&I2C_M_RD)) { 346 return iop3xx_i2c_readbytes(i2c_adap, pmsg->buf, pmsg->len); 347 } else { 348 return iop3xx_i2c_writebytes(i2c_adap, pmsg->buf, pmsg->len); 349 } 350 } 351 352 /* 353 * master_xfer() - main read/write entry 354 */ 355 static int 356 iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, 357 int num) 358 { 359 struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; 360 int im = 0; 361 int ret = 0; 362 int status; 363 364 iop3xx_i2c_wait_idle(iop3xx_adap, &status); 365 iop3xx_i2c_reset(iop3xx_adap); 366 iop3xx_i2c_enable(iop3xx_adap); 367 368 for (im = 0; ret == 0 && im != num; im++) { 369 ret = iop3xx_i2c_handle_msg(i2c_adap, &msgs[im]); 370 } 371 372 iop3xx_i2c_transaction_cleanup(iop3xx_adap); 373 374 if (ret) 375 return ret; 376 377 return im; 378 } 379 380 static u32 381 iop3xx_i2c_func(struct i2c_adapter *adap) 382 { 383 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 384 } 385 386 static const struct i2c_algorithm iop3xx_i2c_algo = { 387 .master_xfer = iop3xx_i2c_master_xfer, 388 .functionality = iop3xx_i2c_func, 389 }; 390 391 static void 392 iop3xx_i2c_remove(struct platform_device *pdev) 393 { 394 struct i2c_adapter *padapter = platform_get_drvdata(pdev); 395 struct i2c_algo_iop3xx_data *adapter_data = 396 (struct i2c_algo_iop3xx_data *)padapter->algo_data; 397 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 398 unsigned long cr = __raw_readl(adapter_data->ioaddr + CR_OFFSET); 399 400 /* 401 * Disable the actual HW unit 402 */ 403 cr &= ~(IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | 404 IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE); 405 __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); 406 407 iounmap(adapter_data->ioaddr); 408 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); 409 kfree(adapter_data); 410 kfree(padapter); 411 } 412 413 static int 414 iop3xx_i2c_probe(struct platform_device *pdev) 415 { 416 struct resource *res; 417 int ret, irq; 418 struct i2c_adapter *new_adapter; 419 struct i2c_algo_iop3xx_data *adapter_data; 420 421 new_adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); 422 if (!new_adapter) { 423 ret = -ENOMEM; 424 goto out; 425 } 426 427 adapter_data = kzalloc(sizeof(struct i2c_algo_iop3xx_data), GFP_KERNEL); 428 if (!adapter_data) { 429 ret = -ENOMEM; 430 goto free_adapter; 431 } 432 433 adapter_data->gpio_scl = devm_gpiod_get_optional(&pdev->dev, 434 "scl", 435 GPIOD_ASIS); 436 if (IS_ERR(adapter_data->gpio_scl)) { 437 ret = PTR_ERR(adapter_data->gpio_scl); 438 goto free_both; 439 } 440 adapter_data->gpio_sda = devm_gpiod_get_optional(&pdev->dev, 441 "sda", 442 GPIOD_ASIS); 443 if (IS_ERR(adapter_data->gpio_sda)) { 444 ret = PTR_ERR(adapter_data->gpio_sda); 445 goto free_both; 446 } 447 448 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 449 if (!res) { 450 ret = -ENODEV; 451 goto free_both; 452 } 453 454 if (!request_mem_region(res->start, IOP3XX_I2C_IO_SIZE, pdev->name)) { 455 ret = -EBUSY; 456 goto free_both; 457 } 458 459 /* set the adapter enumeration # */ 460 adapter_data->id = i2c_id++; 461 462 adapter_data->ioaddr = ioremap(res->start, IOP3XX_I2C_IO_SIZE); 463 if (!adapter_data->ioaddr) { 464 ret = -ENOMEM; 465 goto release_region; 466 } 467 468 irq = platform_get_irq(pdev, 0); 469 if (irq < 0) { 470 ret = irq; 471 goto unmap; 472 } 473 ret = request_irq(irq, iop3xx_i2c_irq_handler, 0, 474 pdev->name, adapter_data); 475 476 if (ret) 477 goto unmap; 478 479 memcpy(new_adapter->name, pdev->name, strlen(pdev->name)); 480 new_adapter->owner = THIS_MODULE; 481 new_adapter->class = I2C_CLASS_HWMON; 482 new_adapter->dev.parent = &pdev->dev; 483 new_adapter->dev.of_node = pdev->dev.of_node; 484 new_adapter->nr = pdev->id; 485 486 /* 487 * Default values...should these come in from board code? 488 */ 489 new_adapter->timeout = HZ; 490 new_adapter->algo = &iop3xx_i2c_algo; 491 492 init_waitqueue_head(&adapter_data->waitq); 493 spin_lock_init(&adapter_data->lock); 494 495 iop3xx_i2c_reset(adapter_data); 496 iop3xx_i2c_enable(adapter_data); 497 498 platform_set_drvdata(pdev, new_adapter); 499 new_adapter->algo_data = adapter_data; 500 501 i2c_add_numbered_adapter(new_adapter); 502 503 return 0; 504 505 unmap: 506 iounmap(adapter_data->ioaddr); 507 508 release_region: 509 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); 510 511 free_both: 512 kfree(adapter_data); 513 514 free_adapter: 515 kfree(new_adapter); 516 517 out: 518 return ret; 519 } 520 521 static const struct of_device_id i2c_iop3xx_match[] = { 522 { .compatible = "intel,iop3xx-i2c", }, 523 { .compatible = "intel,ixp4xx-i2c", }, 524 {}, 525 }; 526 MODULE_DEVICE_TABLE(of, i2c_iop3xx_match); 527 528 static struct platform_driver iop3xx_i2c_driver = { 529 .probe = iop3xx_i2c_probe, 530 .remove_new = iop3xx_i2c_remove, 531 .driver = { 532 .name = "IOP3xx-I2C", 533 .of_match_table = i2c_iop3xx_match, 534 }, 535 }; 536 537 module_platform_driver(iop3xx_i2c_driver); 538 539 MODULE_AUTHOR("D-TACQ Solutions Ltd <www.d-tacq.com>"); 540 MODULE_DESCRIPTION("IOP3xx iic algorithm and driver"); 541 MODULE_LICENSE("GPL"); 542 MODULE_ALIAS("platform:IOP3xx-I2C"); 543