1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Invensense, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/i2c.h> 9 #include <linux/err.h> 10 #include <linux/delay.h> 11 #include <linux/sysfs.h> 12 #include <linux/jiffies.h> 13 #include <linux/irq.h> 14 #include <linux/interrupt.h> 15 #include <linux/acpi.h> 16 #include <linux/platform_device.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/pm.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/property.h> 21 22 #include <linux/iio/common/inv_sensors_timestamp.h> 23 #include <linux/iio/iio.h> 24 25 #include "inv_mpu_iio.h" 26 #include "inv_mpu_magn.h" 27 28 /* 29 * this is the gyro scale translated from dynamic range plus/minus 30 * {250, 500, 1000, 2000} to rad/s 31 */ 32 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 33 34 /* 35 * this is the accel scale translated from dynamic range plus/minus 36 * {2, 4, 8, 16} to m/s^2 37 */ 38 static const int accel_scale[] = {598, 1196, 2392, 4785}; 39 40 static const struct inv_mpu6050_reg_map reg_set_icm20602 = { 41 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 42 .lpf = INV_MPU6050_REG_CONFIG, 43 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 44 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 45 .fifo_en = INV_MPU6050_REG_FIFO_EN, 46 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 47 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 48 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 49 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 50 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 51 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 52 .temperature = INV_MPU6050_REG_TEMPERATURE, 53 .int_enable = INV_MPU6050_REG_INT_ENABLE, 54 .int_status = INV_MPU6050_REG_INT_STATUS, 55 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 56 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 57 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 58 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 59 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 60 .i2c_if = INV_ICM20602_REG_I2C_IF, 61 }; 62 63 static const struct inv_mpu6050_reg_map reg_set_6500 = { 64 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 65 .lpf = INV_MPU6050_REG_CONFIG, 66 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 67 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 68 .fifo_en = INV_MPU6050_REG_FIFO_EN, 69 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 70 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 71 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 72 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 73 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 74 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 75 .temperature = INV_MPU6050_REG_TEMPERATURE, 76 .int_enable = INV_MPU6050_REG_INT_ENABLE, 77 .int_status = INV_MPU6050_REG_INT_STATUS, 78 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 79 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 80 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 81 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 82 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 83 .i2c_if = 0, 84 }; 85 86 static const struct inv_mpu6050_reg_map reg_set_6050 = { 87 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 88 .lpf = INV_MPU6050_REG_CONFIG, 89 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 90 .fifo_en = INV_MPU6050_REG_FIFO_EN, 91 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 92 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 93 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 94 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 95 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 96 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 97 .temperature = INV_MPU6050_REG_TEMPERATURE, 98 .int_enable = INV_MPU6050_REG_INT_ENABLE, 99 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 100 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 101 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 102 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 103 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 104 .i2c_if = 0, 105 }; 106 107 static const struct inv_mpu6050_chip_config chip_config_6050 = { 108 .clk = INV_CLK_INTERNAL, 109 .fsr = INV_MPU6050_FSR_2000DPS, 110 .lpf = INV_MPU6050_FILTER_20HZ, 111 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 112 .gyro_en = true, 113 .accl_en = true, 114 .temp_en = true, 115 .magn_en = false, 116 .gyro_fifo_enable = false, 117 .accl_fifo_enable = false, 118 .temp_fifo_enable = false, 119 .magn_fifo_enable = false, 120 .accl_fs = INV_MPU6050_FS_02G, 121 .user_ctrl = 0, 122 }; 123 124 static const struct inv_mpu6050_chip_config chip_config_6500 = { 125 .clk = INV_CLK_PLL, 126 .fsr = INV_MPU6050_FSR_2000DPS, 127 .lpf = INV_MPU6050_FILTER_20HZ, 128 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 129 .gyro_en = true, 130 .accl_en = true, 131 .temp_en = true, 132 .magn_en = false, 133 .gyro_fifo_enable = false, 134 .accl_fifo_enable = false, 135 .temp_fifo_enable = false, 136 .magn_fifo_enable = false, 137 .accl_fs = INV_MPU6050_FS_02G, 138 .user_ctrl = 0, 139 }; 140 141 /* Indexed by enum inv_devices */ 142 static const struct inv_mpu6050_hw hw_info[] = { 143 { 144 .whoami = INV_MPU6050_WHOAMI_VALUE, 145 .name = "MPU6050", 146 .reg = ®_set_6050, 147 .config = &chip_config_6050, 148 .fifo_size = 1024, 149 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 150 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 151 }, 152 { 153 .whoami = INV_MPU6500_WHOAMI_VALUE, 154 .name = "MPU6500", 155 .reg = ®_set_6500, 156 .config = &chip_config_6500, 157 .fifo_size = 512, 158 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 159 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 160 }, 161 { 162 .whoami = INV_MPU6515_WHOAMI_VALUE, 163 .name = "MPU6515", 164 .reg = ®_set_6500, 165 .config = &chip_config_6500, 166 .fifo_size = 512, 167 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 168 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 169 }, 170 { 171 .whoami = INV_MPU6880_WHOAMI_VALUE, 172 .name = "MPU6880", 173 .reg = ®_set_6500, 174 .config = &chip_config_6500, 175 .fifo_size = 4096, 176 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 177 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 178 }, 179 { 180 .whoami = INV_MPU6000_WHOAMI_VALUE, 181 .name = "MPU6000", 182 .reg = ®_set_6050, 183 .config = &chip_config_6050, 184 .fifo_size = 1024, 185 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 186 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 187 }, 188 { 189 .whoami = INV_MPU9150_WHOAMI_VALUE, 190 .name = "MPU9150", 191 .reg = ®_set_6050, 192 .config = &chip_config_6050, 193 .fifo_size = 1024, 194 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 195 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 196 }, 197 { 198 .whoami = INV_MPU9250_WHOAMI_VALUE, 199 .name = "MPU9250", 200 .reg = ®_set_6500, 201 .config = &chip_config_6500, 202 .fifo_size = 512, 203 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 204 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 205 }, 206 { 207 .whoami = INV_MPU9255_WHOAMI_VALUE, 208 .name = "MPU9255", 209 .reg = ®_set_6500, 210 .config = &chip_config_6500, 211 .fifo_size = 512, 212 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 213 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 214 }, 215 { 216 .whoami = INV_ICM20608_WHOAMI_VALUE, 217 .name = "ICM20608", 218 .reg = ®_set_6500, 219 .config = &chip_config_6500, 220 .fifo_size = 512, 221 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 222 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 223 }, 224 { 225 .whoami = INV_ICM20608D_WHOAMI_VALUE, 226 .name = "ICM20608D", 227 .reg = ®_set_6500, 228 .config = &chip_config_6500, 229 .fifo_size = 512, 230 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 231 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 232 }, 233 { 234 .whoami = INV_ICM20609_WHOAMI_VALUE, 235 .name = "ICM20609", 236 .reg = ®_set_6500, 237 .config = &chip_config_6500, 238 .fifo_size = 4 * 1024, 239 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 240 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 241 }, 242 { 243 .whoami = INV_ICM20689_WHOAMI_VALUE, 244 .name = "ICM20689", 245 .reg = ®_set_6500, 246 .config = &chip_config_6500, 247 .fifo_size = 4 * 1024, 248 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 249 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 250 }, 251 { 252 .whoami = INV_ICM20600_WHOAMI_VALUE, 253 .name = "ICM20600", 254 .reg = ®_set_icm20602, 255 .config = &chip_config_6500, 256 .fifo_size = 1008, 257 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 258 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 259 }, 260 { 261 .whoami = INV_ICM20602_WHOAMI_VALUE, 262 .name = "ICM20602", 263 .reg = ®_set_icm20602, 264 .config = &chip_config_6500, 265 .fifo_size = 1008, 266 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 267 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 268 }, 269 { 270 .whoami = INV_ICM20690_WHOAMI_VALUE, 271 .name = "ICM20690", 272 .reg = ®_set_6500, 273 .config = &chip_config_6500, 274 .fifo_size = 1024, 275 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 276 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME}, 277 }, 278 { 279 .whoami = INV_IAM20680_WHOAMI_VALUE, 280 .name = "IAM20680", 281 .reg = ®_set_6500, 282 .config = &chip_config_6500, 283 .fifo_size = 512, 284 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 285 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 286 }, 287 }; 288 289 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, 290 int clock, int temp_dis) 291 { 292 u8 val; 293 294 if (clock < 0) 295 clock = st->chip_config.clk; 296 if (temp_dis < 0) 297 temp_dis = !st->chip_config.temp_en; 298 299 val = clock & INV_MPU6050_BIT_CLK_MASK; 300 if (temp_dis) 301 val |= INV_MPU6050_BIT_TEMP_DIS; 302 if (sleep) 303 val |= INV_MPU6050_BIT_SLEEP; 304 305 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); 306 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); 307 } 308 309 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, 310 unsigned int clock) 311 { 312 int ret; 313 314 switch (st->chip_type) { 315 case INV_MPU6050: 316 case INV_MPU6000: 317 case INV_MPU9150: 318 /* old chips: switch clock manually */ 319 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); 320 if (ret) 321 return ret; 322 st->chip_config.clk = clock; 323 break; 324 default: 325 /* automatic clock switching, nothing to do */ 326 break; 327 } 328 329 return 0; 330 } 331 332 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, 333 unsigned int mask) 334 { 335 unsigned int sleep; 336 u8 pwr_mgmt2, user_ctrl; 337 int ret; 338 339 /* delete useless requests */ 340 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en) 341 mask &= ~INV_MPU6050_SENSOR_ACCL; 342 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en) 343 mask &= ~INV_MPU6050_SENSOR_GYRO; 344 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en) 345 mask &= ~INV_MPU6050_SENSOR_TEMP; 346 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en) 347 mask &= ~INV_MPU6050_SENSOR_MAGN; 348 if (mask == 0) 349 return 0; 350 351 /* turn on/off temperature sensor */ 352 if (mask & INV_MPU6050_SENSOR_TEMP) { 353 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en); 354 if (ret) 355 return ret; 356 st->chip_config.temp_en = en; 357 } 358 359 /* update user_crtl for driving magnetometer */ 360 if (mask & INV_MPU6050_SENSOR_MAGN) { 361 user_ctrl = st->chip_config.user_ctrl; 362 if (en) 363 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN; 364 else 365 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; 366 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); 367 if (ret) 368 return ret; 369 st->chip_config.user_ctrl = user_ctrl; 370 st->chip_config.magn_en = en; 371 } 372 373 /* manage accel & gyro engines */ 374 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) { 375 /* compute power management 2 current value */ 376 pwr_mgmt2 = 0; 377 if (!st->chip_config.accl_en) 378 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 379 if (!st->chip_config.gyro_en) 380 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 381 382 /* update to new requested value */ 383 if (mask & INV_MPU6050_SENSOR_ACCL) { 384 if (en) 385 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY; 386 else 387 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 388 } 389 if (mask & INV_MPU6050_SENSOR_GYRO) { 390 if (en) 391 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY; 392 else 393 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 394 } 395 396 /* switch clock to internal when turning gyro off */ 397 if (mask & INV_MPU6050_SENSOR_GYRO && !en) { 398 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL); 399 if (ret) 400 return ret; 401 } 402 403 /* update sensors engine */ 404 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n", 405 pwr_mgmt2); 406 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2); 407 if (ret) 408 return ret; 409 if (mask & INV_MPU6050_SENSOR_ACCL) 410 st->chip_config.accl_en = en; 411 if (mask & INV_MPU6050_SENSOR_GYRO) 412 st->chip_config.gyro_en = en; 413 414 /* compute required time to have sensors stabilized */ 415 sleep = 0; 416 if (en) { 417 if (mask & INV_MPU6050_SENSOR_ACCL) { 418 if (sleep < st->hw->startup_time.accel) 419 sleep = st->hw->startup_time.accel; 420 } 421 if (mask & INV_MPU6050_SENSOR_GYRO) { 422 if (sleep < st->hw->startup_time.gyro) 423 sleep = st->hw->startup_time.gyro; 424 } 425 } else { 426 if (mask & INV_MPU6050_SENSOR_GYRO) { 427 if (sleep < INV_MPU6050_GYRO_DOWN_TIME) 428 sleep = INV_MPU6050_GYRO_DOWN_TIME; 429 } 430 } 431 if (sleep) 432 msleep(sleep); 433 434 /* switch clock to PLL when turning gyro on */ 435 if (mask & INV_MPU6050_SENSOR_GYRO && en) { 436 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL); 437 if (ret) 438 return ret; 439 } 440 } 441 442 return 0; 443 } 444 445 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, 446 bool power_on) 447 { 448 int result; 449 450 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1); 451 if (result) 452 return result; 453 454 if (power_on) 455 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 456 INV_MPU6050_REG_UP_TIME_MAX); 457 458 return 0; 459 } 460 461 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, 462 enum inv_mpu6050_fsr_e val) 463 { 464 unsigned int gyro_shift; 465 u8 data; 466 467 switch (st->chip_type) { 468 case INV_ICM20690: 469 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT; 470 break; 471 default: 472 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT; 473 break; 474 } 475 476 data = val << gyro_shift; 477 return regmap_write(st->map, st->reg->gyro_config, data); 478 } 479 480 /* 481 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent 482 * 483 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope 484 * MPU6500 and above have a dedicated register for accelerometer 485 */ 486 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, 487 enum inv_mpu6050_filter_e val) 488 { 489 int result; 490 491 result = regmap_write(st->map, st->reg->lpf, val); 492 if (result) 493 return result; 494 495 /* set accel lpf */ 496 switch (st->chip_type) { 497 case INV_MPU6050: 498 case INV_MPU6000: 499 case INV_MPU9150: 500 /* old chips, nothing to do */ 501 return 0; 502 case INV_ICM20689: 503 case INV_ICM20690: 504 /* set FIFO size to maximum value */ 505 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX; 506 break; 507 default: 508 break; 509 } 510 511 return regmap_write(st->map, st->reg->accel_lpf, val); 512 } 513 514 /* 515 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 516 * 517 * Initial configuration: 518 * FSR: ± 2000DPS 519 * DLPF: 20Hz 520 * FIFO rate: 50Hz 521 * Clock source: Gyro PLL 522 */ 523 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 524 { 525 int result; 526 u8 d; 527 struct inv_mpu6050_state *st = iio_priv(indio_dev); 528 struct inv_sensors_timestamp_chip timestamp; 529 530 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); 531 if (result) 532 return result; 533 534 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); 535 if (result) 536 return result; 537 538 d = st->chip_config.divider; 539 result = regmap_write(st->map, st->reg->sample_rate_div, d); 540 if (result) 541 return result; 542 543 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 544 result = regmap_write(st->map, st->reg->accl_config, d); 545 if (result) 546 return result; 547 548 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask); 549 if (result) 550 return result; 551 552 /* clock jitter is +/- 2% */ 553 timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ; 554 timestamp.jitter = 20; 555 timestamp.init_period = 556 NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 557 inv_sensors_timestamp_init(&st->timestamp, ×tamp); 558 559 /* magn chip init, noop if not present in the chip */ 560 result = inv_mpu_magn_probe(st); 561 if (result) 562 return result; 563 564 return 0; 565 } 566 567 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 568 int axis, int val) 569 { 570 int ind, result; 571 __be16 d = cpu_to_be16(val); 572 573 ind = (axis - IIO_MOD_X) * 2; 574 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 575 if (result) 576 return -EINVAL; 577 578 return 0; 579 } 580 581 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 582 int axis, int *val) 583 { 584 int ind, result; 585 __be16 d; 586 587 ind = (axis - IIO_MOD_X) * 2; 588 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 589 if (result) 590 return -EINVAL; 591 *val = (short)be16_to_cpup(&d); 592 593 return IIO_VAL_INT; 594 } 595 596 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, 597 struct iio_chan_spec const *chan, 598 int *val) 599 { 600 struct inv_mpu6050_state *st = iio_priv(indio_dev); 601 struct device *pdev = regmap_get_device(st->map); 602 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us; 603 int result; 604 int ret; 605 606 /* compute sample period */ 607 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 608 period_us = 1000000 / freq_hz; 609 610 result = pm_runtime_resume_and_get(pdev); 611 if (result) 612 return result; 613 614 switch (chan->type) { 615 case IIO_ANGL_VEL: 616 if (!st->chip_config.gyro_en) { 617 result = inv_mpu6050_switch_engine(st, true, 618 INV_MPU6050_SENSOR_GYRO); 619 if (result) 620 goto error_power_off; 621 /* need to wait 2 periods to have first valid sample */ 622 min_sleep_us = 2 * period_us; 623 max_sleep_us = 2 * (period_us + period_us / 2); 624 usleep_range(min_sleep_us, max_sleep_us); 625 } 626 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 627 chan->channel2, val); 628 break; 629 case IIO_ACCEL: 630 if (!st->chip_config.accl_en) { 631 result = inv_mpu6050_switch_engine(st, true, 632 INV_MPU6050_SENSOR_ACCL); 633 if (result) 634 goto error_power_off; 635 /* wait 1 period for first sample availability */ 636 min_sleep_us = period_us; 637 max_sleep_us = period_us + period_us / 2; 638 usleep_range(min_sleep_us, max_sleep_us); 639 } 640 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 641 chan->channel2, val); 642 break; 643 case IIO_TEMP: 644 /* temperature sensor work only with accel and/or gyro */ 645 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) { 646 result = -EBUSY; 647 goto error_power_off; 648 } 649 if (!st->chip_config.temp_en) { 650 result = inv_mpu6050_switch_engine(st, true, 651 INV_MPU6050_SENSOR_TEMP); 652 if (result) 653 goto error_power_off; 654 /* wait 1 period for first sample availability */ 655 min_sleep_us = period_us; 656 max_sleep_us = period_us + period_us / 2; 657 usleep_range(min_sleep_us, max_sleep_us); 658 } 659 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 660 IIO_MOD_X, val); 661 break; 662 case IIO_MAGN: 663 if (!st->chip_config.magn_en) { 664 result = inv_mpu6050_switch_engine(st, true, 665 INV_MPU6050_SENSOR_MAGN); 666 if (result) 667 goto error_power_off; 668 /* frequency is limited for magnetometer */ 669 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) { 670 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX; 671 period_us = 1000000 / freq_hz; 672 } 673 /* need to wait 2 periods to have first valid sample */ 674 min_sleep_us = 2 * period_us; 675 max_sleep_us = 2 * (period_us + period_us / 2); 676 usleep_range(min_sleep_us, max_sleep_us); 677 } 678 ret = inv_mpu_magn_read(st, chan->channel2, val); 679 break; 680 default: 681 ret = -EINVAL; 682 break; 683 } 684 685 pm_runtime_mark_last_busy(pdev); 686 pm_runtime_put_autosuspend(pdev); 687 688 return ret; 689 690 error_power_off: 691 pm_runtime_put_autosuspend(pdev); 692 return result; 693 } 694 695 static int 696 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 697 struct iio_chan_spec const *chan, 698 int *val, int *val2, long mask) 699 { 700 struct inv_mpu6050_state *st = iio_priv(indio_dev); 701 int ret = 0; 702 703 switch (mask) { 704 case IIO_CHAN_INFO_RAW: 705 ret = iio_device_claim_direct_mode(indio_dev); 706 if (ret) 707 return ret; 708 mutex_lock(&st->lock); 709 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val); 710 mutex_unlock(&st->lock); 711 iio_device_release_direct_mode(indio_dev); 712 return ret; 713 case IIO_CHAN_INFO_SCALE: 714 switch (chan->type) { 715 case IIO_ANGL_VEL: 716 mutex_lock(&st->lock); 717 *val = 0; 718 *val2 = gyro_scale_6050[st->chip_config.fsr]; 719 mutex_unlock(&st->lock); 720 721 return IIO_VAL_INT_PLUS_NANO; 722 case IIO_ACCEL: 723 mutex_lock(&st->lock); 724 *val = 0; 725 *val2 = accel_scale[st->chip_config.accl_fs]; 726 mutex_unlock(&st->lock); 727 728 return IIO_VAL_INT_PLUS_MICRO; 729 case IIO_TEMP: 730 *val = st->hw->temp.scale / 1000000; 731 *val2 = st->hw->temp.scale % 1000000; 732 return IIO_VAL_INT_PLUS_MICRO; 733 case IIO_MAGN: 734 return inv_mpu_magn_get_scale(st, chan, val, val2); 735 default: 736 return -EINVAL; 737 } 738 case IIO_CHAN_INFO_OFFSET: 739 switch (chan->type) { 740 case IIO_TEMP: 741 *val = st->hw->temp.offset; 742 return IIO_VAL_INT; 743 default: 744 return -EINVAL; 745 } 746 case IIO_CHAN_INFO_CALIBBIAS: 747 switch (chan->type) { 748 case IIO_ANGL_VEL: 749 mutex_lock(&st->lock); 750 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 751 chan->channel2, val); 752 mutex_unlock(&st->lock); 753 return IIO_VAL_INT; 754 case IIO_ACCEL: 755 mutex_lock(&st->lock); 756 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 757 chan->channel2, val); 758 mutex_unlock(&st->lock); 759 return IIO_VAL_INT; 760 761 default: 762 return -EINVAL; 763 } 764 default: 765 return -EINVAL; 766 } 767 } 768 769 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val, 770 int val2) 771 { 772 int result, i; 773 774 if (val != 0) 775 return -EINVAL; 776 777 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 778 if (gyro_scale_6050[i] == val2) { 779 result = inv_mpu6050_set_gyro_fsr(st, i); 780 if (result) 781 return result; 782 783 st->chip_config.fsr = i; 784 return 0; 785 } 786 } 787 788 return -EINVAL; 789 } 790 791 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 792 struct iio_chan_spec const *chan, long mask) 793 { 794 switch (mask) { 795 case IIO_CHAN_INFO_SCALE: 796 switch (chan->type) { 797 case IIO_ANGL_VEL: 798 return IIO_VAL_INT_PLUS_NANO; 799 default: 800 return IIO_VAL_INT_PLUS_MICRO; 801 } 802 default: 803 return IIO_VAL_INT_PLUS_MICRO; 804 } 805 806 return -EINVAL; 807 } 808 809 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val, 810 int val2) 811 { 812 int result, i; 813 u8 d; 814 815 if (val != 0) 816 return -EINVAL; 817 818 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 819 if (accel_scale[i] == val2) { 820 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 821 result = regmap_write(st->map, st->reg->accl_config, d); 822 if (result) 823 return result; 824 825 st->chip_config.accl_fs = i; 826 return 0; 827 } 828 } 829 830 return -EINVAL; 831 } 832 833 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 834 struct iio_chan_spec const *chan, 835 int val, int val2, long mask) 836 { 837 struct inv_mpu6050_state *st = iio_priv(indio_dev); 838 struct device *pdev = regmap_get_device(st->map); 839 int result; 840 841 /* 842 * we should only update scale when the chip is disabled, i.e. 843 * not running 844 */ 845 result = iio_device_claim_direct_mode(indio_dev); 846 if (result) 847 return result; 848 849 mutex_lock(&st->lock); 850 result = pm_runtime_resume_and_get(pdev); 851 if (result) 852 goto error_write_raw_unlock; 853 854 switch (mask) { 855 case IIO_CHAN_INFO_SCALE: 856 switch (chan->type) { 857 case IIO_ANGL_VEL: 858 result = inv_mpu6050_write_gyro_scale(st, val, val2); 859 break; 860 case IIO_ACCEL: 861 result = inv_mpu6050_write_accel_scale(st, val, val2); 862 break; 863 default: 864 result = -EINVAL; 865 break; 866 } 867 break; 868 case IIO_CHAN_INFO_CALIBBIAS: 869 switch (chan->type) { 870 case IIO_ANGL_VEL: 871 result = inv_mpu6050_sensor_set(st, 872 st->reg->gyro_offset, 873 chan->channel2, val); 874 break; 875 case IIO_ACCEL: 876 result = inv_mpu6050_sensor_set(st, 877 st->reg->accl_offset, 878 chan->channel2, val); 879 break; 880 default: 881 result = -EINVAL; 882 break; 883 } 884 break; 885 default: 886 result = -EINVAL; 887 break; 888 } 889 890 pm_runtime_mark_last_busy(pdev); 891 pm_runtime_put_autosuspend(pdev); 892 error_write_raw_unlock: 893 mutex_unlock(&st->lock); 894 iio_device_release_direct_mode(indio_dev); 895 896 return result; 897 } 898 899 /* 900 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 901 * 902 * Based on the Nyquist principle, the bandwidth of the low 903 * pass filter must not exceed the signal sampling rate divided 904 * by 2, or there would be aliasing. 905 * This function basically search for the correct low pass 906 * parameters based on the fifo rate, e.g, sampling frequency. 907 * 908 * lpf is set automatically when setting sampling rate to avoid any aliases. 909 */ 910 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 911 { 912 static const int hz[] = {400, 200, 90, 40, 20, 10}; 913 static const int d[] = { 914 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ, 915 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ, 916 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ 917 }; 918 int i, result; 919 u8 data; 920 921 data = INV_MPU6050_FILTER_5HZ; 922 for (i = 0; i < ARRAY_SIZE(hz); ++i) { 923 if (rate >= hz[i]) { 924 data = d[i]; 925 break; 926 } 927 } 928 result = inv_mpu6050_set_lpf_regs(st, data); 929 if (result) 930 return result; 931 st->chip_config.lpf = data; 932 933 return 0; 934 } 935 936 /* 937 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 938 */ 939 static ssize_t 940 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 941 const char *buf, size_t count) 942 { 943 int fifo_rate; 944 u32 fifo_period; 945 bool fifo_on; 946 u8 d; 947 int result; 948 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 949 struct inv_mpu6050_state *st = iio_priv(indio_dev); 950 struct device *pdev = regmap_get_device(st->map); 951 952 if (kstrtoint(buf, 10, &fifo_rate)) 953 return -EINVAL; 954 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 955 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 956 return -EINVAL; 957 958 /* compute the chip sample rate divider */ 959 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); 960 /* compute back the fifo rate to handle truncation cases */ 961 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); 962 fifo_period = NSEC_PER_SEC / fifo_rate; 963 964 mutex_lock(&st->lock); 965 if (d == st->chip_config.divider) { 966 result = 0; 967 goto fifo_rate_fail_unlock; 968 } 969 970 fifo_on = st->chip_config.accl_fifo_enable || 971 st->chip_config.gyro_fifo_enable || 972 st->chip_config.magn_fifo_enable; 973 result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on); 974 if (result) 975 goto fifo_rate_fail_unlock; 976 977 result = pm_runtime_resume_and_get(pdev); 978 if (result) 979 goto fifo_rate_fail_unlock; 980 981 result = regmap_write(st->map, st->reg->sample_rate_div, d); 982 if (result) 983 goto fifo_rate_fail_power_off; 984 st->chip_config.divider = d; 985 986 result = inv_mpu6050_set_lpf(st, fifo_rate); 987 if (result) 988 goto fifo_rate_fail_power_off; 989 990 /* update rate for magn, noop if not present in chip */ 991 result = inv_mpu_magn_set_rate(st, fifo_rate); 992 if (result) 993 goto fifo_rate_fail_power_off; 994 995 pm_runtime_mark_last_busy(pdev); 996 fifo_rate_fail_power_off: 997 pm_runtime_put_autosuspend(pdev); 998 fifo_rate_fail_unlock: 999 mutex_unlock(&st->lock); 1000 if (result) 1001 return result; 1002 1003 return count; 1004 } 1005 1006 /* 1007 * inv_fifo_rate_show() - Get the current sampling rate. 1008 */ 1009 static ssize_t 1010 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 1011 char *buf) 1012 { 1013 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1014 unsigned fifo_rate; 1015 1016 mutex_lock(&st->lock); 1017 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 1018 mutex_unlock(&st->lock); 1019 1020 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate); 1021 } 1022 1023 /* 1024 * inv_attr_show() - calling this function will show current 1025 * parameters. 1026 * 1027 * Deprecated in favor of IIO mounting matrix API. 1028 * 1029 * See inv_get_mount_matrix() 1030 */ 1031 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 1032 char *buf) 1033 { 1034 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1035 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 1036 s8 *m; 1037 1038 switch (this_attr->address) { 1039 /* 1040 * In MPU6050, the two matrix are the same because gyro and accel 1041 * are integrated in one chip 1042 */ 1043 case ATTR_GYRO_MATRIX: 1044 case ATTR_ACCL_MATRIX: 1045 m = st->plat_data.orientation; 1046 1047 return scnprintf(buf, PAGE_SIZE, 1048 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 1049 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 1050 default: 1051 return -EINVAL; 1052 } 1053 } 1054 1055 /** 1056 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 1057 * MPU6050 device. 1058 * @indio_dev: The IIO device 1059 * @trig: The new trigger 1060 * 1061 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 1062 * device, -EINVAL otherwise. 1063 */ 1064 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 1065 struct iio_trigger *trig) 1066 { 1067 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1068 1069 if (st->trig != trig) 1070 return -EINVAL; 1071 1072 return 0; 1073 } 1074 1075 static const struct iio_mount_matrix * 1076 inv_get_mount_matrix(const struct iio_dev *indio_dev, 1077 const struct iio_chan_spec *chan) 1078 { 1079 struct inv_mpu6050_state *data = iio_priv(indio_dev); 1080 const struct iio_mount_matrix *matrix; 1081 1082 if (chan->type == IIO_MAGN) 1083 matrix = &data->magn_orient; 1084 else 1085 matrix = &data->orientation; 1086 1087 return matrix; 1088 } 1089 1090 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 1091 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 1092 { } 1093 }; 1094 1095 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 1096 { \ 1097 .type = _type, \ 1098 .modified = 1, \ 1099 .channel2 = _channel2, \ 1100 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 1101 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1102 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 1103 .scan_index = _index, \ 1104 .scan_type = { \ 1105 .sign = 's', \ 1106 .realbits = 16, \ 1107 .storagebits = 16, \ 1108 .shift = 0, \ 1109 .endianness = IIO_BE, \ 1110 }, \ 1111 .ext_info = inv_ext_info, \ 1112 } 1113 1114 #define INV_MPU6050_TEMP_CHAN(_index) \ 1115 { \ 1116 .type = IIO_TEMP, \ 1117 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 1118 | BIT(IIO_CHAN_INFO_OFFSET) \ 1119 | BIT(IIO_CHAN_INFO_SCALE), \ 1120 .scan_index = _index, \ 1121 .scan_type = { \ 1122 .sign = 's', \ 1123 .realbits = 16, \ 1124 .storagebits = 16, \ 1125 .shift = 0, \ 1126 .endianness = IIO_BE, \ 1127 }, \ 1128 } 1129 1130 static const struct iio_chan_spec inv_mpu_channels[] = { 1131 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1132 1133 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1134 1135 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1136 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1137 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1138 1139 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1140 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1141 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1142 }; 1143 1144 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \ 1145 (BIT(INV_MPU6050_SCAN_ACCL_X) \ 1146 | BIT(INV_MPU6050_SCAN_ACCL_Y) \ 1147 | BIT(INV_MPU6050_SCAN_ACCL_Z)) 1148 1149 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \ 1150 (BIT(INV_MPU6050_SCAN_GYRO_X) \ 1151 | BIT(INV_MPU6050_SCAN_GYRO_Y) \ 1152 | BIT(INV_MPU6050_SCAN_GYRO_Z)) 1153 1154 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP)) 1155 1156 static const unsigned long inv_mpu_scan_masks[] = { 1157 /* 3-axis accel */ 1158 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1159 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1160 /* 3-axis gyro */ 1161 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1162 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1163 /* 6-axis accel + gyro */ 1164 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1165 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1166 | INV_MPU6050_SCAN_MASK_TEMP, 1167 0, 1168 }; 1169 1170 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ 1171 { \ 1172 .type = IIO_MAGN, \ 1173 .modified = 1, \ 1174 .channel2 = _chan2, \ 1175 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ 1176 BIT(IIO_CHAN_INFO_RAW), \ 1177 .scan_index = _index, \ 1178 .scan_type = { \ 1179 .sign = 's', \ 1180 .realbits = _bits, \ 1181 .storagebits = 16, \ 1182 .shift = 0, \ 1183 .endianness = IIO_BE, \ 1184 }, \ 1185 .ext_info = inv_ext_info, \ 1186 } 1187 1188 static const struct iio_chan_spec inv_mpu9150_channels[] = { 1189 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1190 1191 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1192 1193 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1194 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1195 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1196 1197 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1198 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1199 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1200 1201 /* Magnetometer resolution is 13 bits */ 1202 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X), 1203 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y), 1204 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z), 1205 }; 1206 1207 static const struct iio_chan_spec inv_mpu9250_channels[] = { 1208 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1209 1210 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1211 1212 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1213 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1214 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1215 1216 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1217 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1218 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1219 1220 /* Magnetometer resolution is 16 bits */ 1221 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), 1222 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), 1223 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), 1224 }; 1225 1226 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \ 1227 (BIT(INV_MPU9X50_SCAN_MAGN_X) \ 1228 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \ 1229 | BIT(INV_MPU9X50_SCAN_MAGN_Z)) 1230 1231 static const unsigned long inv_mpu9x50_scan_masks[] = { 1232 /* 3-axis accel */ 1233 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1234 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1235 /* 3-axis gyro */ 1236 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1237 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1238 /* 3-axis magn */ 1239 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1240 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP, 1241 /* 6-axis accel + gyro */ 1242 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1243 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1244 | INV_MPU6050_SCAN_MASK_TEMP, 1245 /* 6-axis accel + magn */ 1246 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1247 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1248 | INV_MPU6050_SCAN_MASK_TEMP, 1249 /* 6-axis gyro + magn */ 1250 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1251 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1252 | INV_MPU6050_SCAN_MASK_TEMP, 1253 /* 9-axis accel + gyro + magn */ 1254 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1255 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1256 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1257 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1258 | INV_MPU6050_SCAN_MASK_TEMP, 1259 0, 1260 }; 1261 1262 static const unsigned long inv_icm20602_scan_masks[] = { 1263 /* 3-axis accel + temp (mandatory) */ 1264 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1265 /* 3-axis gyro + temp (mandatory) */ 1266 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1267 /* 6-axis accel + gyro + temp (mandatory) */ 1268 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1269 | INV_MPU6050_SCAN_MASK_TEMP, 1270 0, 1271 }; 1272 1273 /* 1274 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and 1275 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the 1276 * low-pass filter. Specifically, each of these sampling rates are about twice 1277 * the bandwidth of a corresponding low-pass filter, which should eliminate 1278 * aliasing following the Nyquist principle. By picking a frequency different 1279 * from these, the user risks aliasing effects. 1280 */ 1281 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 1282 static IIO_CONST_ATTR(in_anglvel_scale_available, 1283 "0.000133090 0.000266181 0.000532362 0.001064724"); 1284 static IIO_CONST_ATTR(in_accel_scale_available, 1285 "0.000598 0.001196 0.002392 0.004785"); 1286 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 1287 inv_mpu6050_fifo_rate_store); 1288 1289 /* Deprecated: kept for userspace backward compatibility. */ 1290 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 1291 ATTR_GYRO_MATRIX); 1292 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 1293 ATTR_ACCL_MATRIX); 1294 1295 static struct attribute *inv_attributes[] = { 1296 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 1297 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 1298 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1299 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1300 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1301 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 1302 NULL, 1303 }; 1304 1305 static const struct attribute_group inv_attribute_group = { 1306 .attrs = inv_attributes 1307 }; 1308 1309 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1310 unsigned int reg, 1311 unsigned int writeval, 1312 unsigned int *readval) 1313 { 1314 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1315 int ret; 1316 1317 mutex_lock(&st->lock); 1318 if (readval) 1319 ret = regmap_read(st->map, reg, readval); 1320 else 1321 ret = regmap_write(st->map, reg, writeval); 1322 mutex_unlock(&st->lock); 1323 1324 return ret; 1325 } 1326 1327 static const struct iio_info mpu_info = { 1328 .read_raw = &inv_mpu6050_read_raw, 1329 .write_raw = &inv_mpu6050_write_raw, 1330 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1331 .attrs = &inv_attribute_group, 1332 .validate_trigger = inv_mpu6050_validate_trigger, 1333 .debugfs_reg_access = &inv_mpu6050_reg_access, 1334 }; 1335 1336 /* 1337 * inv_check_and_setup_chip() - check and setup chip. 1338 */ 1339 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 1340 { 1341 int result; 1342 unsigned int regval, mask; 1343 int i; 1344 1345 st->hw = &hw_info[st->chip_type]; 1346 st->reg = hw_info[st->chip_type].reg; 1347 memcpy(&st->chip_config, hw_info[st->chip_type].config, 1348 sizeof(st->chip_config)); 1349 st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL); 1350 if (st->data == NULL) 1351 return -ENOMEM; 1352 1353 /* check chip self-identification */ 1354 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 1355 if (result) 1356 return result; 1357 if (regval != st->hw->whoami) { 1358 /* check whoami against all possible values */ 1359 for (i = 0; i < INV_NUM_PARTS; ++i) { 1360 if (regval == hw_info[i].whoami) { 1361 dev_warn(regmap_get_device(st->map), 1362 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n", 1363 regval, hw_info[i].name, 1364 st->hw->whoami, st->hw->name); 1365 break; 1366 } 1367 } 1368 if (i >= INV_NUM_PARTS) { 1369 dev_err(regmap_get_device(st->map), 1370 "invalid whoami 0x%02x expected 0x%02x (%s)\n", 1371 regval, st->hw->whoami, st->hw->name); 1372 return -ENODEV; 1373 } 1374 } 1375 1376 /* reset to make sure previous state are not there */ 1377 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 1378 INV_MPU6050_BIT_H_RESET); 1379 if (result) 1380 return result; 1381 msleep(INV_MPU6050_POWER_UP_TIME); 1382 switch (st->chip_type) { 1383 case INV_MPU6000: 1384 case INV_MPU6500: 1385 case INV_MPU6515: 1386 case INV_MPU6880: 1387 case INV_MPU9250: 1388 case INV_MPU9255: 1389 /* reset signal path (required for spi connection) */ 1390 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST | 1391 INV_MPU6050_BIT_GYRO_RST; 1392 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET, 1393 regval); 1394 if (result) 1395 return result; 1396 msleep(INV_MPU6050_POWER_UP_TIME); 1397 break; 1398 default: 1399 break; 1400 } 1401 1402 /* 1403 * Turn power on. After reset, the sleep bit could be on 1404 * or off depending on the OTP settings. Turning power on 1405 * make it in a definite state as well as making the hardware 1406 * state align with the software state 1407 */ 1408 result = inv_mpu6050_set_power_itg(st, true); 1409 if (result) 1410 return result; 1411 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1412 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1413 result = inv_mpu6050_switch_engine(st, false, mask); 1414 if (result) 1415 goto error_power_off; 1416 1417 return 0; 1418 1419 error_power_off: 1420 inv_mpu6050_set_power_itg(st, false); 1421 return result; 1422 } 1423 1424 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) 1425 { 1426 int result; 1427 1428 result = regulator_enable(st->vddio_supply); 1429 if (result) { 1430 dev_err(regmap_get_device(st->map), 1431 "Failed to enable vddio regulator: %d\n", result); 1432 } else { 1433 /* Give the device a little bit of time to start up. */ 1434 usleep_range(3000, 5000); 1435 } 1436 1437 return result; 1438 } 1439 1440 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) 1441 { 1442 int result; 1443 1444 result = regulator_disable(st->vddio_supply); 1445 if (result) 1446 dev_err(regmap_get_device(st->map), 1447 "Failed to disable vddio regulator: %d\n", result); 1448 1449 return result; 1450 } 1451 1452 static void inv_mpu_core_disable_regulator_action(void *_data) 1453 { 1454 struct inv_mpu6050_state *st = _data; 1455 int result; 1456 1457 result = regulator_disable(st->vdd_supply); 1458 if (result) 1459 dev_err(regmap_get_device(st->map), 1460 "Failed to disable vdd regulator: %d\n", result); 1461 1462 inv_mpu_core_disable_regulator_vddio(st); 1463 } 1464 1465 static void inv_mpu_pm_disable(void *data) 1466 { 1467 struct device *dev = data; 1468 1469 pm_runtime_disable(dev); 1470 } 1471 1472 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 1473 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 1474 { 1475 struct inv_mpu6050_state *st; 1476 struct iio_dev *indio_dev; 1477 struct inv_mpu6050_platform_data *pdata; 1478 struct device *dev = regmap_get_device(regmap); 1479 int result; 1480 struct irq_data *desc; 1481 int irq_type; 1482 1483 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 1484 if (!indio_dev) 1485 return -ENOMEM; 1486 1487 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 1488 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 1489 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 1490 chip_type, name); 1491 return -ENODEV; 1492 } 1493 st = iio_priv(indio_dev); 1494 mutex_init(&st->lock); 1495 st->chip_type = chip_type; 1496 st->irq = irq; 1497 st->map = regmap; 1498 1499 st->level_shifter = device_property_read_bool(dev, 1500 "invensense,level-shifter"); 1501 pdata = dev_get_platdata(dev); 1502 if (!pdata) { 1503 result = iio_read_mount_matrix(dev, &st->orientation); 1504 if (result) { 1505 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 1506 result); 1507 return result; 1508 } 1509 } else { 1510 st->plat_data = *pdata; 1511 } 1512 1513 if (irq > 0) { 1514 desc = irq_get_irq_data(irq); 1515 if (!desc) { 1516 dev_err(dev, "Could not find IRQ %d\n", irq); 1517 return -EINVAL; 1518 } 1519 1520 irq_type = irqd_get_trigger_type(desc); 1521 if (!irq_type) 1522 irq_type = IRQF_TRIGGER_RISING; 1523 } else { 1524 /* Doesn't really matter, use the default */ 1525 irq_type = IRQF_TRIGGER_RISING; 1526 } 1527 1528 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge 1529 st->irq_mask = INV_MPU6050_ACTIVE_HIGH; 1530 else if (irq_type == IRQF_TRIGGER_FALLING) 1531 st->irq_mask = INV_MPU6050_ACTIVE_LOW; 1532 else if (irq_type == IRQF_TRIGGER_HIGH) 1533 st->irq_mask = INV_MPU6050_ACTIVE_HIGH | 1534 INV_MPU6050_LATCH_INT_EN; 1535 else if (irq_type == IRQF_TRIGGER_LOW) 1536 st->irq_mask = INV_MPU6050_ACTIVE_LOW | 1537 INV_MPU6050_LATCH_INT_EN; 1538 else { 1539 dev_err(dev, "Invalid interrupt type 0x%x specified\n", 1540 irq_type); 1541 return -EINVAL; 1542 } 1543 1544 st->vdd_supply = devm_regulator_get(dev, "vdd"); 1545 if (IS_ERR(st->vdd_supply)) 1546 return dev_err_probe(dev, PTR_ERR(st->vdd_supply), 1547 "Failed to get vdd regulator\n"); 1548 1549 st->vddio_supply = devm_regulator_get(dev, "vddio"); 1550 if (IS_ERR(st->vddio_supply)) 1551 return dev_err_probe(dev, PTR_ERR(st->vddio_supply), 1552 "Failed to get vddio regulator\n"); 1553 1554 result = regulator_enable(st->vdd_supply); 1555 if (result) { 1556 dev_err(dev, "Failed to enable vdd regulator: %d\n", result); 1557 return result; 1558 } 1559 msleep(INV_MPU6050_POWER_UP_TIME); 1560 1561 result = inv_mpu_core_enable_regulator_vddio(st); 1562 if (result) { 1563 regulator_disable(st->vdd_supply); 1564 return result; 1565 } 1566 1567 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, 1568 st); 1569 if (result) { 1570 dev_err(dev, "Failed to setup regulator cleanup action %d\n", 1571 result); 1572 return result; 1573 } 1574 1575 /* fill magnetometer orientation */ 1576 result = inv_mpu_magn_set_orient(st); 1577 if (result) 1578 return result; 1579 1580 /* power is turned on inside check chip type*/ 1581 result = inv_check_and_setup_chip(st); 1582 if (result) 1583 return result; 1584 1585 result = inv_mpu6050_init_config(indio_dev); 1586 if (result) { 1587 dev_err(dev, "Could not initialize device.\n"); 1588 goto error_power_off; 1589 } 1590 1591 dev_set_drvdata(dev, indio_dev); 1592 /* name will be NULL when enumerated via ACPI */ 1593 if (name) 1594 indio_dev->name = name; 1595 else 1596 indio_dev->name = dev_name(dev); 1597 1598 /* requires parent device set in indio_dev */ 1599 if (inv_mpu_bus_setup) { 1600 result = inv_mpu_bus_setup(indio_dev); 1601 if (result) 1602 goto error_power_off; 1603 } 1604 1605 /* chip init is done, turning on runtime power management */ 1606 result = pm_runtime_set_active(dev); 1607 if (result) 1608 goto error_power_off; 1609 pm_runtime_get_noresume(dev); 1610 pm_runtime_enable(dev); 1611 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS); 1612 pm_runtime_use_autosuspend(dev); 1613 pm_runtime_put(dev); 1614 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev); 1615 if (result) 1616 return result; 1617 1618 switch (chip_type) { 1619 case INV_MPU9150: 1620 indio_dev->channels = inv_mpu9150_channels; 1621 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels); 1622 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1623 break; 1624 case INV_MPU9250: 1625 case INV_MPU9255: 1626 indio_dev->channels = inv_mpu9250_channels; 1627 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); 1628 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1629 break; 1630 case INV_ICM20600: 1631 case INV_ICM20602: 1632 indio_dev->channels = inv_mpu_channels; 1633 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1634 indio_dev->available_scan_masks = inv_icm20602_scan_masks; 1635 break; 1636 default: 1637 indio_dev->channels = inv_mpu_channels; 1638 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1639 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1640 break; 1641 } 1642 /* 1643 * Use magnetometer inside the chip only if there is no i2c 1644 * auxiliary device in use. Otherwise Going back to 6-axis only. 1645 */ 1646 if (st->magn_disabled) { 1647 indio_dev->channels = inv_mpu_channels; 1648 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1649 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1650 } 1651 1652 indio_dev->info = &mpu_info; 1653 1654 if (irq > 0) { 1655 /* 1656 * The driver currently only supports buffered capture with its 1657 * own trigger. So no IRQ, no trigger, no buffer 1658 */ 1659 result = devm_iio_triggered_buffer_setup(dev, indio_dev, 1660 iio_pollfunc_store_time, 1661 inv_mpu6050_read_fifo, 1662 NULL); 1663 if (result) { 1664 dev_err(dev, "configure buffer fail %d\n", result); 1665 return result; 1666 } 1667 1668 result = inv_mpu6050_probe_trigger(indio_dev, irq_type); 1669 if (result) { 1670 dev_err(dev, "trigger probe fail %d\n", result); 1671 return result; 1672 } 1673 } 1674 1675 result = devm_iio_device_register(dev, indio_dev); 1676 if (result) { 1677 dev_err(dev, "IIO register fail %d\n", result); 1678 return result; 1679 } 1680 1681 return 0; 1682 1683 error_power_off: 1684 inv_mpu6050_set_power_itg(st, false); 1685 return result; 1686 } 1687 EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, IIO_MPU6050); 1688 1689 static int inv_mpu_resume(struct device *dev) 1690 { 1691 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1692 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1693 int result; 1694 1695 mutex_lock(&st->lock); 1696 result = inv_mpu_core_enable_regulator_vddio(st); 1697 if (result) 1698 goto out_unlock; 1699 1700 result = inv_mpu6050_set_power_itg(st, true); 1701 if (result) 1702 goto out_unlock; 1703 1704 pm_runtime_disable(dev); 1705 pm_runtime_set_active(dev); 1706 pm_runtime_enable(dev); 1707 1708 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); 1709 if (result) 1710 goto out_unlock; 1711 1712 if (iio_buffer_enabled(indio_dev)) 1713 result = inv_mpu6050_prepare_fifo(st, true); 1714 1715 out_unlock: 1716 mutex_unlock(&st->lock); 1717 1718 return result; 1719 } 1720 1721 static int inv_mpu_suspend(struct device *dev) 1722 { 1723 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1724 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1725 int result; 1726 1727 mutex_lock(&st->lock); 1728 1729 st->suspended_sensors = 0; 1730 if (pm_runtime_suspended(dev)) { 1731 result = 0; 1732 goto out_unlock; 1733 } 1734 1735 if (iio_buffer_enabled(indio_dev)) { 1736 result = inv_mpu6050_prepare_fifo(st, false); 1737 if (result) 1738 goto out_unlock; 1739 } 1740 1741 if (st->chip_config.accl_en) 1742 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; 1743 if (st->chip_config.gyro_en) 1744 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO; 1745 if (st->chip_config.temp_en) 1746 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP; 1747 if (st->chip_config.magn_en) 1748 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN; 1749 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors); 1750 if (result) 1751 goto out_unlock; 1752 1753 result = inv_mpu6050_set_power_itg(st, false); 1754 if (result) 1755 goto out_unlock; 1756 1757 inv_mpu_core_disable_regulator_vddio(st); 1758 out_unlock: 1759 mutex_unlock(&st->lock); 1760 1761 return result; 1762 } 1763 1764 static int inv_mpu_runtime_suspend(struct device *dev) 1765 { 1766 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1767 unsigned int sensors; 1768 int ret; 1769 1770 mutex_lock(&st->lock); 1771 1772 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1773 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1774 ret = inv_mpu6050_switch_engine(st, false, sensors); 1775 if (ret) 1776 goto out_unlock; 1777 1778 ret = inv_mpu6050_set_power_itg(st, false); 1779 if (ret) 1780 goto out_unlock; 1781 1782 inv_mpu_core_disable_regulator_vddio(st); 1783 1784 out_unlock: 1785 mutex_unlock(&st->lock); 1786 return ret; 1787 } 1788 1789 static int inv_mpu_runtime_resume(struct device *dev) 1790 { 1791 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1792 int ret; 1793 1794 ret = inv_mpu_core_enable_regulator_vddio(st); 1795 if (ret) 1796 return ret; 1797 1798 return inv_mpu6050_set_power_itg(st, true); 1799 } 1800 1801 EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = { 1802 SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume) 1803 RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL) 1804 }; 1805 1806 MODULE_AUTHOR("Invensense Corporation"); 1807 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 1808 MODULE_LICENSE("GPL"); 1809 MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP); 1810