1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Invensense, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/i2c.h> 9 #include <linux/err.h> 10 #include <linux/delay.h> 11 #include <linux/sysfs.h> 12 #include <linux/jiffies.h> 13 #include <linux/irq.h> 14 #include <linux/interrupt.h> 15 #include <linux/acpi.h> 16 #include <linux/platform_device.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/pm.h> 19 #include <linux/pm_runtime.h> 20 21 #include <linux/iio/common/inv_sensors_timestamp.h> 22 #include <linux/iio/iio.h> 23 24 #include "inv_mpu_iio.h" 25 #include "inv_mpu_magn.h" 26 27 /* 28 * this is the gyro scale translated from dynamic range plus/minus 29 * {250, 500, 1000, 2000} to rad/s 30 */ 31 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 32 33 /* 34 * this is the accel scale translated from dynamic range plus/minus 35 * {2, 4, 8, 16} to m/s^2 36 */ 37 static const int accel_scale[] = {598, 1196, 2392, 4785}; 38 39 static const struct inv_mpu6050_reg_map reg_set_icm20602 = { 40 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 41 .lpf = INV_MPU6050_REG_CONFIG, 42 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 43 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 44 .fifo_en = INV_MPU6050_REG_FIFO_EN, 45 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 46 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 47 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 48 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 49 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 50 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 51 .temperature = INV_MPU6050_REG_TEMPERATURE, 52 .int_enable = INV_MPU6050_REG_INT_ENABLE, 53 .int_status = INV_MPU6050_REG_INT_STATUS, 54 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 55 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 56 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 57 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 58 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 59 .i2c_if = INV_ICM20602_REG_I2C_IF, 60 }; 61 62 static const struct inv_mpu6050_reg_map reg_set_6500 = { 63 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 64 .lpf = INV_MPU6050_REG_CONFIG, 65 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 66 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 67 .fifo_en = INV_MPU6050_REG_FIFO_EN, 68 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 69 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 70 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 71 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 72 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 73 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 74 .temperature = INV_MPU6050_REG_TEMPERATURE, 75 .int_enable = INV_MPU6050_REG_INT_ENABLE, 76 .int_status = INV_MPU6050_REG_INT_STATUS, 77 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 78 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 79 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 80 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 81 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 82 .i2c_if = 0, 83 }; 84 85 static const struct inv_mpu6050_reg_map reg_set_6050 = { 86 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 87 .lpf = INV_MPU6050_REG_CONFIG, 88 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 89 .fifo_en = INV_MPU6050_REG_FIFO_EN, 90 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 91 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 92 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 93 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 94 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 95 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 96 .temperature = INV_MPU6050_REG_TEMPERATURE, 97 .int_enable = INV_MPU6050_REG_INT_ENABLE, 98 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 99 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 100 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 101 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 102 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 103 .i2c_if = 0, 104 }; 105 106 static const struct inv_mpu6050_chip_config chip_config_6050 = { 107 .clk = INV_CLK_INTERNAL, 108 .fsr = INV_MPU6050_FSR_2000DPS, 109 .lpf = INV_MPU6050_FILTER_20HZ, 110 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 111 .gyro_en = true, 112 .accl_en = true, 113 .temp_en = true, 114 .magn_en = false, 115 .gyro_fifo_enable = false, 116 .accl_fifo_enable = false, 117 .temp_fifo_enable = false, 118 .magn_fifo_enable = false, 119 .accl_fs = INV_MPU6050_FS_02G, 120 .user_ctrl = 0, 121 }; 122 123 static const struct inv_mpu6050_chip_config chip_config_6500 = { 124 .clk = INV_CLK_PLL, 125 .fsr = INV_MPU6050_FSR_2000DPS, 126 .lpf = INV_MPU6050_FILTER_20HZ, 127 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 128 .gyro_en = true, 129 .accl_en = true, 130 .temp_en = true, 131 .magn_en = false, 132 .gyro_fifo_enable = false, 133 .accl_fifo_enable = false, 134 .temp_fifo_enable = false, 135 .magn_fifo_enable = false, 136 .accl_fs = INV_MPU6050_FS_02G, 137 .user_ctrl = 0, 138 }; 139 140 /* Indexed by enum inv_devices */ 141 static const struct inv_mpu6050_hw hw_info[] = { 142 { 143 .whoami = INV_MPU6050_WHOAMI_VALUE, 144 .name = "MPU6050", 145 .reg = ®_set_6050, 146 .config = &chip_config_6050, 147 .fifo_size = 1024, 148 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 149 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 150 }, 151 { 152 .whoami = INV_MPU6500_WHOAMI_VALUE, 153 .name = "MPU6500", 154 .reg = ®_set_6500, 155 .config = &chip_config_6500, 156 .fifo_size = 512, 157 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 158 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 159 }, 160 { 161 .whoami = INV_MPU6515_WHOAMI_VALUE, 162 .name = "MPU6515", 163 .reg = ®_set_6500, 164 .config = &chip_config_6500, 165 .fifo_size = 512, 166 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 167 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 168 }, 169 { 170 .whoami = INV_MPU6880_WHOAMI_VALUE, 171 .name = "MPU6880", 172 .reg = ®_set_6500, 173 .config = &chip_config_6500, 174 .fifo_size = 4096, 175 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 176 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 177 }, 178 { 179 .whoami = INV_MPU6000_WHOAMI_VALUE, 180 .name = "MPU6000", 181 .reg = ®_set_6050, 182 .config = &chip_config_6050, 183 .fifo_size = 1024, 184 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 185 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 186 }, 187 { 188 .whoami = INV_MPU9150_WHOAMI_VALUE, 189 .name = "MPU9150", 190 .reg = ®_set_6050, 191 .config = &chip_config_6050, 192 .fifo_size = 1024, 193 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 194 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 195 }, 196 { 197 .whoami = INV_MPU9250_WHOAMI_VALUE, 198 .name = "MPU9250", 199 .reg = ®_set_6500, 200 .config = &chip_config_6500, 201 .fifo_size = 512, 202 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 203 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 204 }, 205 { 206 .whoami = INV_MPU9255_WHOAMI_VALUE, 207 .name = "MPU9255", 208 .reg = ®_set_6500, 209 .config = &chip_config_6500, 210 .fifo_size = 512, 211 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 212 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 213 }, 214 { 215 .whoami = INV_ICM20608_WHOAMI_VALUE, 216 .name = "ICM20608", 217 .reg = ®_set_6500, 218 .config = &chip_config_6500, 219 .fifo_size = 512, 220 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 221 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 222 }, 223 { 224 .whoami = INV_ICM20608D_WHOAMI_VALUE, 225 .name = "ICM20608D", 226 .reg = ®_set_6500, 227 .config = &chip_config_6500, 228 .fifo_size = 512, 229 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 230 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 231 }, 232 { 233 .whoami = INV_ICM20609_WHOAMI_VALUE, 234 .name = "ICM20609", 235 .reg = ®_set_6500, 236 .config = &chip_config_6500, 237 .fifo_size = 4 * 1024, 238 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 239 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 240 }, 241 { 242 .whoami = INV_ICM20689_WHOAMI_VALUE, 243 .name = "ICM20689", 244 .reg = ®_set_6500, 245 .config = &chip_config_6500, 246 .fifo_size = 4 * 1024, 247 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 248 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 249 }, 250 { 251 .whoami = INV_ICM20600_WHOAMI_VALUE, 252 .name = "ICM20600", 253 .reg = ®_set_icm20602, 254 .config = &chip_config_6500, 255 .fifo_size = 1008, 256 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 257 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 258 }, 259 { 260 .whoami = INV_ICM20602_WHOAMI_VALUE, 261 .name = "ICM20602", 262 .reg = ®_set_icm20602, 263 .config = &chip_config_6500, 264 .fifo_size = 1008, 265 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 266 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 267 }, 268 { 269 .whoami = INV_ICM20690_WHOAMI_VALUE, 270 .name = "ICM20690", 271 .reg = ®_set_6500, 272 .config = &chip_config_6500, 273 .fifo_size = 1024, 274 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 275 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME}, 276 }, 277 { 278 .whoami = INV_IAM20680_WHOAMI_VALUE, 279 .name = "IAM20680", 280 .reg = ®_set_6500, 281 .config = &chip_config_6500, 282 .fifo_size = 512, 283 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 284 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 285 }, 286 }; 287 288 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, 289 int clock, int temp_dis) 290 { 291 u8 val; 292 293 if (clock < 0) 294 clock = st->chip_config.clk; 295 if (temp_dis < 0) 296 temp_dis = !st->chip_config.temp_en; 297 298 val = clock & INV_MPU6050_BIT_CLK_MASK; 299 if (temp_dis) 300 val |= INV_MPU6050_BIT_TEMP_DIS; 301 if (sleep) 302 val |= INV_MPU6050_BIT_SLEEP; 303 304 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); 305 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); 306 } 307 308 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, 309 unsigned int clock) 310 { 311 int ret; 312 313 switch (st->chip_type) { 314 case INV_MPU6050: 315 case INV_MPU6000: 316 case INV_MPU9150: 317 /* old chips: switch clock manually */ 318 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); 319 if (ret) 320 return ret; 321 st->chip_config.clk = clock; 322 break; 323 default: 324 /* automatic clock switching, nothing to do */ 325 break; 326 } 327 328 return 0; 329 } 330 331 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, 332 unsigned int mask) 333 { 334 unsigned int sleep; 335 u8 pwr_mgmt2, user_ctrl; 336 int ret; 337 338 /* delete useless requests */ 339 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en) 340 mask &= ~INV_MPU6050_SENSOR_ACCL; 341 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en) 342 mask &= ~INV_MPU6050_SENSOR_GYRO; 343 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en) 344 mask &= ~INV_MPU6050_SENSOR_TEMP; 345 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en) 346 mask &= ~INV_MPU6050_SENSOR_MAGN; 347 if (mask == 0) 348 return 0; 349 350 /* turn on/off temperature sensor */ 351 if (mask & INV_MPU6050_SENSOR_TEMP) { 352 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en); 353 if (ret) 354 return ret; 355 st->chip_config.temp_en = en; 356 } 357 358 /* update user_crtl for driving magnetometer */ 359 if (mask & INV_MPU6050_SENSOR_MAGN) { 360 user_ctrl = st->chip_config.user_ctrl; 361 if (en) 362 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN; 363 else 364 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; 365 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); 366 if (ret) 367 return ret; 368 st->chip_config.user_ctrl = user_ctrl; 369 st->chip_config.magn_en = en; 370 } 371 372 /* manage accel & gyro engines */ 373 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) { 374 /* compute power management 2 current value */ 375 pwr_mgmt2 = 0; 376 if (!st->chip_config.accl_en) 377 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 378 if (!st->chip_config.gyro_en) 379 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 380 381 /* update to new requested value */ 382 if (mask & INV_MPU6050_SENSOR_ACCL) { 383 if (en) 384 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY; 385 else 386 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 387 } 388 if (mask & INV_MPU6050_SENSOR_GYRO) { 389 if (en) 390 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY; 391 else 392 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 393 } 394 395 /* switch clock to internal when turning gyro off */ 396 if (mask & INV_MPU6050_SENSOR_GYRO && !en) { 397 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL); 398 if (ret) 399 return ret; 400 } 401 402 /* update sensors engine */ 403 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n", 404 pwr_mgmt2); 405 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2); 406 if (ret) 407 return ret; 408 if (mask & INV_MPU6050_SENSOR_ACCL) 409 st->chip_config.accl_en = en; 410 if (mask & INV_MPU6050_SENSOR_GYRO) 411 st->chip_config.gyro_en = en; 412 413 /* compute required time to have sensors stabilized */ 414 sleep = 0; 415 if (en) { 416 if (mask & INV_MPU6050_SENSOR_ACCL) { 417 if (sleep < st->hw->startup_time.accel) 418 sleep = st->hw->startup_time.accel; 419 } 420 if (mask & INV_MPU6050_SENSOR_GYRO) { 421 if (sleep < st->hw->startup_time.gyro) 422 sleep = st->hw->startup_time.gyro; 423 } 424 } else { 425 if (mask & INV_MPU6050_SENSOR_GYRO) { 426 if (sleep < INV_MPU6050_GYRO_DOWN_TIME) 427 sleep = INV_MPU6050_GYRO_DOWN_TIME; 428 } 429 } 430 if (sleep) 431 msleep(sleep); 432 433 /* switch clock to PLL when turning gyro on */ 434 if (mask & INV_MPU6050_SENSOR_GYRO && en) { 435 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL); 436 if (ret) 437 return ret; 438 } 439 } 440 441 return 0; 442 } 443 444 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, 445 bool power_on) 446 { 447 int result; 448 449 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1); 450 if (result) 451 return result; 452 453 if (power_on) 454 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 455 INV_MPU6050_REG_UP_TIME_MAX); 456 457 return 0; 458 } 459 460 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, 461 enum inv_mpu6050_fsr_e val) 462 { 463 unsigned int gyro_shift; 464 u8 data; 465 466 switch (st->chip_type) { 467 case INV_ICM20690: 468 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT; 469 break; 470 default: 471 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT; 472 break; 473 } 474 475 data = val << gyro_shift; 476 return regmap_write(st->map, st->reg->gyro_config, data); 477 } 478 479 /* 480 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent 481 * 482 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope 483 * MPU6500 and above have a dedicated register for accelerometer 484 */ 485 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, 486 enum inv_mpu6050_filter_e val) 487 { 488 int result; 489 490 result = regmap_write(st->map, st->reg->lpf, val); 491 if (result) 492 return result; 493 494 /* set accel lpf */ 495 switch (st->chip_type) { 496 case INV_MPU6050: 497 case INV_MPU6000: 498 case INV_MPU9150: 499 /* old chips, nothing to do */ 500 return 0; 501 case INV_ICM20689: 502 case INV_ICM20690: 503 /* set FIFO size to maximum value */ 504 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX; 505 break; 506 default: 507 break; 508 } 509 510 return regmap_write(st->map, st->reg->accel_lpf, val); 511 } 512 513 /* 514 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 515 * 516 * Initial configuration: 517 * FSR: ± 2000DPS 518 * DLPF: 20Hz 519 * FIFO rate: 50Hz 520 * Clock source: Gyro PLL 521 */ 522 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 523 { 524 int result; 525 u8 d; 526 struct inv_mpu6050_state *st = iio_priv(indio_dev); 527 struct inv_sensors_timestamp_chip timestamp; 528 529 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); 530 if (result) 531 return result; 532 533 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); 534 if (result) 535 return result; 536 537 d = st->chip_config.divider; 538 result = regmap_write(st->map, st->reg->sample_rate_div, d); 539 if (result) 540 return result; 541 542 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 543 result = regmap_write(st->map, st->reg->accl_config, d); 544 if (result) 545 return result; 546 547 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask); 548 if (result) 549 return result; 550 551 /* clock jitter is +/- 2% */ 552 timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ; 553 timestamp.jitter = 20; 554 timestamp.init_period = 555 NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 556 inv_sensors_timestamp_init(&st->timestamp, ×tamp); 557 558 /* magn chip init, noop if not present in the chip */ 559 result = inv_mpu_magn_probe(st); 560 if (result) 561 return result; 562 563 return 0; 564 } 565 566 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 567 int axis, int val) 568 { 569 int ind, result; 570 __be16 d = cpu_to_be16(val); 571 572 ind = (axis - IIO_MOD_X) * 2; 573 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 574 if (result) 575 return -EINVAL; 576 577 return 0; 578 } 579 580 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 581 int axis, int *val) 582 { 583 int ind, result; 584 __be16 d; 585 586 ind = (axis - IIO_MOD_X) * 2; 587 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 588 if (result) 589 return -EINVAL; 590 *val = (short)be16_to_cpup(&d); 591 592 return IIO_VAL_INT; 593 } 594 595 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, 596 struct iio_chan_spec const *chan, 597 int *val) 598 { 599 struct inv_mpu6050_state *st = iio_priv(indio_dev); 600 struct device *pdev = regmap_get_device(st->map); 601 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us; 602 int result; 603 int ret; 604 605 /* compute sample period */ 606 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 607 period_us = 1000000 / freq_hz; 608 609 result = pm_runtime_resume_and_get(pdev); 610 if (result) 611 return result; 612 613 switch (chan->type) { 614 case IIO_ANGL_VEL: 615 if (!st->chip_config.gyro_en) { 616 result = inv_mpu6050_switch_engine(st, true, 617 INV_MPU6050_SENSOR_GYRO); 618 if (result) 619 goto error_power_off; 620 /* need to wait 2 periods to have first valid sample */ 621 min_sleep_us = 2 * period_us; 622 max_sleep_us = 2 * (period_us + period_us / 2); 623 usleep_range(min_sleep_us, max_sleep_us); 624 } 625 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 626 chan->channel2, val); 627 break; 628 case IIO_ACCEL: 629 if (!st->chip_config.accl_en) { 630 result = inv_mpu6050_switch_engine(st, true, 631 INV_MPU6050_SENSOR_ACCL); 632 if (result) 633 goto error_power_off; 634 /* wait 1 period for first sample availability */ 635 min_sleep_us = period_us; 636 max_sleep_us = period_us + period_us / 2; 637 usleep_range(min_sleep_us, max_sleep_us); 638 } 639 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 640 chan->channel2, val); 641 break; 642 case IIO_TEMP: 643 /* temperature sensor work only with accel and/or gyro */ 644 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) { 645 result = -EBUSY; 646 goto error_power_off; 647 } 648 if (!st->chip_config.temp_en) { 649 result = inv_mpu6050_switch_engine(st, true, 650 INV_MPU6050_SENSOR_TEMP); 651 if (result) 652 goto error_power_off; 653 /* wait 1 period for first sample availability */ 654 min_sleep_us = period_us; 655 max_sleep_us = period_us + period_us / 2; 656 usleep_range(min_sleep_us, max_sleep_us); 657 } 658 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 659 IIO_MOD_X, val); 660 break; 661 case IIO_MAGN: 662 if (!st->chip_config.magn_en) { 663 result = inv_mpu6050_switch_engine(st, true, 664 INV_MPU6050_SENSOR_MAGN); 665 if (result) 666 goto error_power_off; 667 /* frequency is limited for magnetometer */ 668 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) { 669 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX; 670 period_us = 1000000 / freq_hz; 671 } 672 /* need to wait 2 periods to have first valid sample */ 673 min_sleep_us = 2 * period_us; 674 max_sleep_us = 2 * (period_us + period_us / 2); 675 usleep_range(min_sleep_us, max_sleep_us); 676 } 677 ret = inv_mpu_magn_read(st, chan->channel2, val); 678 break; 679 default: 680 ret = -EINVAL; 681 break; 682 } 683 684 pm_runtime_mark_last_busy(pdev); 685 pm_runtime_put_autosuspend(pdev); 686 687 return ret; 688 689 error_power_off: 690 pm_runtime_put_autosuspend(pdev); 691 return result; 692 } 693 694 static int 695 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 696 struct iio_chan_spec const *chan, 697 int *val, int *val2, long mask) 698 { 699 struct inv_mpu6050_state *st = iio_priv(indio_dev); 700 int ret = 0; 701 702 switch (mask) { 703 case IIO_CHAN_INFO_RAW: 704 ret = iio_device_claim_direct_mode(indio_dev); 705 if (ret) 706 return ret; 707 mutex_lock(&st->lock); 708 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val); 709 mutex_unlock(&st->lock); 710 iio_device_release_direct_mode(indio_dev); 711 return ret; 712 case IIO_CHAN_INFO_SCALE: 713 switch (chan->type) { 714 case IIO_ANGL_VEL: 715 mutex_lock(&st->lock); 716 *val = 0; 717 *val2 = gyro_scale_6050[st->chip_config.fsr]; 718 mutex_unlock(&st->lock); 719 720 return IIO_VAL_INT_PLUS_NANO; 721 case IIO_ACCEL: 722 mutex_lock(&st->lock); 723 *val = 0; 724 *val2 = accel_scale[st->chip_config.accl_fs]; 725 mutex_unlock(&st->lock); 726 727 return IIO_VAL_INT_PLUS_MICRO; 728 case IIO_TEMP: 729 *val = st->hw->temp.scale / 1000000; 730 *val2 = st->hw->temp.scale % 1000000; 731 return IIO_VAL_INT_PLUS_MICRO; 732 case IIO_MAGN: 733 return inv_mpu_magn_get_scale(st, chan, val, val2); 734 default: 735 return -EINVAL; 736 } 737 case IIO_CHAN_INFO_OFFSET: 738 switch (chan->type) { 739 case IIO_TEMP: 740 *val = st->hw->temp.offset; 741 return IIO_VAL_INT; 742 default: 743 return -EINVAL; 744 } 745 case IIO_CHAN_INFO_CALIBBIAS: 746 switch (chan->type) { 747 case IIO_ANGL_VEL: 748 mutex_lock(&st->lock); 749 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 750 chan->channel2, val); 751 mutex_unlock(&st->lock); 752 return IIO_VAL_INT; 753 case IIO_ACCEL: 754 mutex_lock(&st->lock); 755 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 756 chan->channel2, val); 757 mutex_unlock(&st->lock); 758 return IIO_VAL_INT; 759 760 default: 761 return -EINVAL; 762 } 763 default: 764 return -EINVAL; 765 } 766 } 767 768 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val, 769 int val2) 770 { 771 int result, i; 772 773 if (val != 0) 774 return -EINVAL; 775 776 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 777 if (gyro_scale_6050[i] == val2) { 778 result = inv_mpu6050_set_gyro_fsr(st, i); 779 if (result) 780 return result; 781 782 st->chip_config.fsr = i; 783 return 0; 784 } 785 } 786 787 return -EINVAL; 788 } 789 790 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 791 struct iio_chan_spec const *chan, long mask) 792 { 793 switch (mask) { 794 case IIO_CHAN_INFO_SCALE: 795 switch (chan->type) { 796 case IIO_ANGL_VEL: 797 return IIO_VAL_INT_PLUS_NANO; 798 default: 799 return IIO_VAL_INT_PLUS_MICRO; 800 } 801 default: 802 return IIO_VAL_INT_PLUS_MICRO; 803 } 804 805 return -EINVAL; 806 } 807 808 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val, 809 int val2) 810 { 811 int result, i; 812 u8 d; 813 814 if (val != 0) 815 return -EINVAL; 816 817 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 818 if (accel_scale[i] == val2) { 819 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 820 result = regmap_write(st->map, st->reg->accl_config, d); 821 if (result) 822 return result; 823 824 st->chip_config.accl_fs = i; 825 return 0; 826 } 827 } 828 829 return -EINVAL; 830 } 831 832 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 833 struct iio_chan_spec const *chan, 834 int val, int val2, long mask) 835 { 836 struct inv_mpu6050_state *st = iio_priv(indio_dev); 837 struct device *pdev = regmap_get_device(st->map); 838 int result; 839 840 /* 841 * we should only update scale when the chip is disabled, i.e. 842 * not running 843 */ 844 result = iio_device_claim_direct_mode(indio_dev); 845 if (result) 846 return result; 847 848 mutex_lock(&st->lock); 849 result = pm_runtime_resume_and_get(pdev); 850 if (result) 851 goto error_write_raw_unlock; 852 853 switch (mask) { 854 case IIO_CHAN_INFO_SCALE: 855 switch (chan->type) { 856 case IIO_ANGL_VEL: 857 result = inv_mpu6050_write_gyro_scale(st, val, val2); 858 break; 859 case IIO_ACCEL: 860 result = inv_mpu6050_write_accel_scale(st, val, val2); 861 break; 862 default: 863 result = -EINVAL; 864 break; 865 } 866 break; 867 case IIO_CHAN_INFO_CALIBBIAS: 868 switch (chan->type) { 869 case IIO_ANGL_VEL: 870 result = inv_mpu6050_sensor_set(st, 871 st->reg->gyro_offset, 872 chan->channel2, val); 873 break; 874 case IIO_ACCEL: 875 result = inv_mpu6050_sensor_set(st, 876 st->reg->accl_offset, 877 chan->channel2, val); 878 break; 879 default: 880 result = -EINVAL; 881 break; 882 } 883 break; 884 default: 885 result = -EINVAL; 886 break; 887 } 888 889 pm_runtime_mark_last_busy(pdev); 890 pm_runtime_put_autosuspend(pdev); 891 error_write_raw_unlock: 892 mutex_unlock(&st->lock); 893 iio_device_release_direct_mode(indio_dev); 894 895 return result; 896 } 897 898 /* 899 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 900 * 901 * Based on the Nyquist principle, the bandwidth of the low 902 * pass filter must not exceed the signal sampling rate divided 903 * by 2, or there would be aliasing. 904 * This function basically search for the correct low pass 905 * parameters based on the fifo rate, e.g, sampling frequency. 906 * 907 * lpf is set automatically when setting sampling rate to avoid any aliases. 908 */ 909 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 910 { 911 static const int hz[] = {400, 200, 90, 40, 20, 10}; 912 static const int d[] = { 913 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ, 914 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ, 915 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ 916 }; 917 int i, result; 918 u8 data; 919 920 data = INV_MPU6050_FILTER_5HZ; 921 for (i = 0; i < ARRAY_SIZE(hz); ++i) { 922 if (rate >= hz[i]) { 923 data = d[i]; 924 break; 925 } 926 } 927 result = inv_mpu6050_set_lpf_regs(st, data); 928 if (result) 929 return result; 930 st->chip_config.lpf = data; 931 932 return 0; 933 } 934 935 /* 936 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 937 */ 938 static ssize_t 939 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 940 const char *buf, size_t count) 941 { 942 int fifo_rate; 943 u32 fifo_period; 944 bool fifo_on; 945 u8 d; 946 int result; 947 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 948 struct inv_mpu6050_state *st = iio_priv(indio_dev); 949 struct device *pdev = regmap_get_device(st->map); 950 951 if (kstrtoint(buf, 10, &fifo_rate)) 952 return -EINVAL; 953 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 954 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 955 return -EINVAL; 956 957 /* compute the chip sample rate divider */ 958 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); 959 /* compute back the fifo rate to handle truncation cases */ 960 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); 961 fifo_period = NSEC_PER_SEC / fifo_rate; 962 963 mutex_lock(&st->lock); 964 if (d == st->chip_config.divider) { 965 result = 0; 966 goto fifo_rate_fail_unlock; 967 } 968 969 fifo_on = st->chip_config.accl_fifo_enable || 970 st->chip_config.gyro_fifo_enable || 971 st->chip_config.magn_fifo_enable; 972 result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on); 973 if (result) 974 goto fifo_rate_fail_unlock; 975 976 result = pm_runtime_resume_and_get(pdev); 977 if (result) 978 goto fifo_rate_fail_unlock; 979 980 result = regmap_write(st->map, st->reg->sample_rate_div, d); 981 if (result) 982 goto fifo_rate_fail_power_off; 983 st->chip_config.divider = d; 984 985 result = inv_mpu6050_set_lpf(st, fifo_rate); 986 if (result) 987 goto fifo_rate_fail_power_off; 988 989 /* update rate for magn, noop if not present in chip */ 990 result = inv_mpu_magn_set_rate(st, fifo_rate); 991 if (result) 992 goto fifo_rate_fail_power_off; 993 994 pm_runtime_mark_last_busy(pdev); 995 fifo_rate_fail_power_off: 996 pm_runtime_put_autosuspend(pdev); 997 fifo_rate_fail_unlock: 998 mutex_unlock(&st->lock); 999 if (result) 1000 return result; 1001 1002 return count; 1003 } 1004 1005 /* 1006 * inv_fifo_rate_show() - Get the current sampling rate. 1007 */ 1008 static ssize_t 1009 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 1010 char *buf) 1011 { 1012 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1013 unsigned fifo_rate; 1014 1015 mutex_lock(&st->lock); 1016 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 1017 mutex_unlock(&st->lock); 1018 1019 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate); 1020 } 1021 1022 /* 1023 * inv_attr_show() - calling this function will show current 1024 * parameters. 1025 * 1026 * Deprecated in favor of IIO mounting matrix API. 1027 * 1028 * See inv_get_mount_matrix() 1029 */ 1030 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 1031 char *buf) 1032 { 1033 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1034 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 1035 s8 *m; 1036 1037 switch (this_attr->address) { 1038 /* 1039 * In MPU6050, the two matrix are the same because gyro and accel 1040 * are integrated in one chip 1041 */ 1042 case ATTR_GYRO_MATRIX: 1043 case ATTR_ACCL_MATRIX: 1044 m = st->plat_data.orientation; 1045 1046 return scnprintf(buf, PAGE_SIZE, 1047 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 1048 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 1049 default: 1050 return -EINVAL; 1051 } 1052 } 1053 1054 /** 1055 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 1056 * MPU6050 device. 1057 * @indio_dev: The IIO device 1058 * @trig: The new trigger 1059 * 1060 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 1061 * device, -EINVAL otherwise. 1062 */ 1063 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 1064 struct iio_trigger *trig) 1065 { 1066 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1067 1068 if (st->trig != trig) 1069 return -EINVAL; 1070 1071 return 0; 1072 } 1073 1074 static const struct iio_mount_matrix * 1075 inv_get_mount_matrix(const struct iio_dev *indio_dev, 1076 const struct iio_chan_spec *chan) 1077 { 1078 struct inv_mpu6050_state *data = iio_priv(indio_dev); 1079 const struct iio_mount_matrix *matrix; 1080 1081 if (chan->type == IIO_MAGN) 1082 matrix = &data->magn_orient; 1083 else 1084 matrix = &data->orientation; 1085 1086 return matrix; 1087 } 1088 1089 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 1090 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 1091 { } 1092 }; 1093 1094 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 1095 { \ 1096 .type = _type, \ 1097 .modified = 1, \ 1098 .channel2 = _channel2, \ 1099 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 1100 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1101 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 1102 .scan_index = _index, \ 1103 .scan_type = { \ 1104 .sign = 's', \ 1105 .realbits = 16, \ 1106 .storagebits = 16, \ 1107 .shift = 0, \ 1108 .endianness = IIO_BE, \ 1109 }, \ 1110 .ext_info = inv_ext_info, \ 1111 } 1112 1113 #define INV_MPU6050_TEMP_CHAN(_index) \ 1114 { \ 1115 .type = IIO_TEMP, \ 1116 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 1117 | BIT(IIO_CHAN_INFO_OFFSET) \ 1118 | BIT(IIO_CHAN_INFO_SCALE), \ 1119 .scan_index = _index, \ 1120 .scan_type = { \ 1121 .sign = 's', \ 1122 .realbits = 16, \ 1123 .storagebits = 16, \ 1124 .shift = 0, \ 1125 .endianness = IIO_BE, \ 1126 }, \ 1127 } 1128 1129 static const struct iio_chan_spec inv_mpu_channels[] = { 1130 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1131 1132 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1133 1134 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1135 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1136 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1137 1138 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1139 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1140 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1141 }; 1142 1143 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \ 1144 (BIT(INV_MPU6050_SCAN_ACCL_X) \ 1145 | BIT(INV_MPU6050_SCAN_ACCL_Y) \ 1146 | BIT(INV_MPU6050_SCAN_ACCL_Z)) 1147 1148 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \ 1149 (BIT(INV_MPU6050_SCAN_GYRO_X) \ 1150 | BIT(INV_MPU6050_SCAN_GYRO_Y) \ 1151 | BIT(INV_MPU6050_SCAN_GYRO_Z)) 1152 1153 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP)) 1154 1155 static const unsigned long inv_mpu_scan_masks[] = { 1156 /* 3-axis accel */ 1157 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1158 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1159 /* 3-axis gyro */ 1160 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1161 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1162 /* 6-axis accel + gyro */ 1163 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1164 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1165 | INV_MPU6050_SCAN_MASK_TEMP, 1166 0, 1167 }; 1168 1169 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ 1170 { \ 1171 .type = IIO_MAGN, \ 1172 .modified = 1, \ 1173 .channel2 = _chan2, \ 1174 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ 1175 BIT(IIO_CHAN_INFO_RAW), \ 1176 .scan_index = _index, \ 1177 .scan_type = { \ 1178 .sign = 's', \ 1179 .realbits = _bits, \ 1180 .storagebits = 16, \ 1181 .shift = 0, \ 1182 .endianness = IIO_BE, \ 1183 }, \ 1184 .ext_info = inv_ext_info, \ 1185 } 1186 1187 static const struct iio_chan_spec inv_mpu9150_channels[] = { 1188 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1189 1190 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1191 1192 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1193 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1194 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1195 1196 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1197 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1198 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1199 1200 /* Magnetometer resolution is 13 bits */ 1201 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X), 1202 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y), 1203 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z), 1204 }; 1205 1206 static const struct iio_chan_spec inv_mpu9250_channels[] = { 1207 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1208 1209 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1210 1211 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1212 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1213 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1214 1215 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1216 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1217 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1218 1219 /* Magnetometer resolution is 16 bits */ 1220 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), 1221 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), 1222 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), 1223 }; 1224 1225 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \ 1226 (BIT(INV_MPU9X50_SCAN_MAGN_X) \ 1227 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \ 1228 | BIT(INV_MPU9X50_SCAN_MAGN_Z)) 1229 1230 static const unsigned long inv_mpu9x50_scan_masks[] = { 1231 /* 3-axis accel */ 1232 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1233 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1234 /* 3-axis gyro */ 1235 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1236 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1237 /* 3-axis magn */ 1238 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1239 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP, 1240 /* 6-axis accel + gyro */ 1241 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1242 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1243 | INV_MPU6050_SCAN_MASK_TEMP, 1244 /* 6-axis accel + magn */ 1245 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1246 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1247 | INV_MPU6050_SCAN_MASK_TEMP, 1248 /* 6-axis gyro + magn */ 1249 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1250 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1251 | INV_MPU6050_SCAN_MASK_TEMP, 1252 /* 9-axis accel + gyro + magn */ 1253 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1254 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1255 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1256 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1257 | INV_MPU6050_SCAN_MASK_TEMP, 1258 0, 1259 }; 1260 1261 static const unsigned long inv_icm20602_scan_masks[] = { 1262 /* 3-axis accel + temp (mandatory) */ 1263 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1264 /* 3-axis gyro + temp (mandatory) */ 1265 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1266 /* 6-axis accel + gyro + temp (mandatory) */ 1267 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1268 | INV_MPU6050_SCAN_MASK_TEMP, 1269 0, 1270 }; 1271 1272 /* 1273 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and 1274 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the 1275 * low-pass filter. Specifically, each of these sampling rates are about twice 1276 * the bandwidth of a corresponding low-pass filter, which should eliminate 1277 * aliasing following the Nyquist principle. By picking a frequency different 1278 * from these, the user risks aliasing effects. 1279 */ 1280 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 1281 static IIO_CONST_ATTR(in_anglvel_scale_available, 1282 "0.000133090 0.000266181 0.000532362 0.001064724"); 1283 static IIO_CONST_ATTR(in_accel_scale_available, 1284 "0.000598 0.001196 0.002392 0.004785"); 1285 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 1286 inv_mpu6050_fifo_rate_store); 1287 1288 /* Deprecated: kept for userspace backward compatibility. */ 1289 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 1290 ATTR_GYRO_MATRIX); 1291 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 1292 ATTR_ACCL_MATRIX); 1293 1294 static struct attribute *inv_attributes[] = { 1295 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 1296 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 1297 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1298 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1299 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1300 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 1301 NULL, 1302 }; 1303 1304 static const struct attribute_group inv_attribute_group = { 1305 .attrs = inv_attributes 1306 }; 1307 1308 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1309 unsigned int reg, 1310 unsigned int writeval, 1311 unsigned int *readval) 1312 { 1313 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1314 int ret; 1315 1316 mutex_lock(&st->lock); 1317 if (readval) 1318 ret = regmap_read(st->map, reg, readval); 1319 else 1320 ret = regmap_write(st->map, reg, writeval); 1321 mutex_unlock(&st->lock); 1322 1323 return ret; 1324 } 1325 1326 static const struct iio_info mpu_info = { 1327 .read_raw = &inv_mpu6050_read_raw, 1328 .write_raw = &inv_mpu6050_write_raw, 1329 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1330 .attrs = &inv_attribute_group, 1331 .validate_trigger = inv_mpu6050_validate_trigger, 1332 .debugfs_reg_access = &inv_mpu6050_reg_access, 1333 }; 1334 1335 /* 1336 * inv_check_and_setup_chip() - check and setup chip. 1337 */ 1338 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 1339 { 1340 int result; 1341 unsigned int regval, mask; 1342 int i; 1343 1344 st->hw = &hw_info[st->chip_type]; 1345 st->reg = hw_info[st->chip_type].reg; 1346 memcpy(&st->chip_config, hw_info[st->chip_type].config, 1347 sizeof(st->chip_config)); 1348 st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL); 1349 if (st->data == NULL) 1350 return -ENOMEM; 1351 1352 /* check chip self-identification */ 1353 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 1354 if (result) 1355 return result; 1356 if (regval != st->hw->whoami) { 1357 /* check whoami against all possible values */ 1358 for (i = 0; i < INV_NUM_PARTS; ++i) { 1359 if (regval == hw_info[i].whoami) { 1360 dev_warn(regmap_get_device(st->map), 1361 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n", 1362 regval, hw_info[i].name, 1363 st->hw->whoami, st->hw->name); 1364 break; 1365 } 1366 } 1367 if (i >= INV_NUM_PARTS) { 1368 dev_err(regmap_get_device(st->map), 1369 "invalid whoami 0x%02x expected 0x%02x (%s)\n", 1370 regval, st->hw->whoami, st->hw->name); 1371 return -ENODEV; 1372 } 1373 } 1374 1375 /* reset to make sure previous state are not there */ 1376 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 1377 INV_MPU6050_BIT_H_RESET); 1378 if (result) 1379 return result; 1380 msleep(INV_MPU6050_POWER_UP_TIME); 1381 switch (st->chip_type) { 1382 case INV_MPU6000: 1383 case INV_MPU6500: 1384 case INV_MPU6515: 1385 case INV_MPU6880: 1386 case INV_MPU9250: 1387 case INV_MPU9255: 1388 /* reset signal path (required for spi connection) */ 1389 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST | 1390 INV_MPU6050_BIT_GYRO_RST; 1391 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET, 1392 regval); 1393 if (result) 1394 return result; 1395 msleep(INV_MPU6050_POWER_UP_TIME); 1396 break; 1397 default: 1398 break; 1399 } 1400 1401 /* 1402 * Turn power on. After reset, the sleep bit could be on 1403 * or off depending on the OTP settings. Turning power on 1404 * make it in a definite state as well as making the hardware 1405 * state align with the software state 1406 */ 1407 result = inv_mpu6050_set_power_itg(st, true); 1408 if (result) 1409 return result; 1410 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1411 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1412 result = inv_mpu6050_switch_engine(st, false, mask); 1413 if (result) 1414 goto error_power_off; 1415 1416 return 0; 1417 1418 error_power_off: 1419 inv_mpu6050_set_power_itg(st, false); 1420 return result; 1421 } 1422 1423 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) 1424 { 1425 int result; 1426 1427 result = regulator_enable(st->vddio_supply); 1428 if (result) { 1429 dev_err(regmap_get_device(st->map), 1430 "Failed to enable vddio regulator: %d\n", result); 1431 } else { 1432 /* Give the device a little bit of time to start up. */ 1433 usleep_range(3000, 5000); 1434 } 1435 1436 return result; 1437 } 1438 1439 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) 1440 { 1441 int result; 1442 1443 result = regulator_disable(st->vddio_supply); 1444 if (result) 1445 dev_err(regmap_get_device(st->map), 1446 "Failed to disable vddio regulator: %d\n", result); 1447 1448 return result; 1449 } 1450 1451 static void inv_mpu_core_disable_regulator_action(void *_data) 1452 { 1453 struct inv_mpu6050_state *st = _data; 1454 int result; 1455 1456 result = regulator_disable(st->vdd_supply); 1457 if (result) 1458 dev_err(regmap_get_device(st->map), 1459 "Failed to disable vdd regulator: %d\n", result); 1460 1461 inv_mpu_core_disable_regulator_vddio(st); 1462 } 1463 1464 static void inv_mpu_pm_disable(void *data) 1465 { 1466 struct device *dev = data; 1467 1468 pm_runtime_disable(dev); 1469 } 1470 1471 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 1472 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 1473 { 1474 struct inv_mpu6050_state *st; 1475 struct iio_dev *indio_dev; 1476 struct inv_mpu6050_platform_data *pdata; 1477 struct device *dev = regmap_get_device(regmap); 1478 int result; 1479 struct irq_data *desc; 1480 int irq_type; 1481 1482 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 1483 if (!indio_dev) 1484 return -ENOMEM; 1485 1486 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 1487 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 1488 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 1489 chip_type, name); 1490 return -ENODEV; 1491 } 1492 st = iio_priv(indio_dev); 1493 mutex_init(&st->lock); 1494 st->chip_type = chip_type; 1495 st->irq = irq; 1496 st->map = regmap; 1497 1498 pdata = dev_get_platdata(dev); 1499 if (!pdata) { 1500 result = iio_read_mount_matrix(dev, &st->orientation); 1501 if (result) { 1502 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 1503 result); 1504 return result; 1505 } 1506 } else { 1507 st->plat_data = *pdata; 1508 } 1509 1510 if (irq > 0) { 1511 desc = irq_get_irq_data(irq); 1512 if (!desc) { 1513 dev_err(dev, "Could not find IRQ %d\n", irq); 1514 return -EINVAL; 1515 } 1516 1517 irq_type = irqd_get_trigger_type(desc); 1518 if (!irq_type) 1519 irq_type = IRQF_TRIGGER_RISING; 1520 } else { 1521 /* Doesn't really matter, use the default */ 1522 irq_type = IRQF_TRIGGER_RISING; 1523 } 1524 1525 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge 1526 st->irq_mask = INV_MPU6050_ACTIVE_HIGH; 1527 else if (irq_type == IRQF_TRIGGER_FALLING) 1528 st->irq_mask = INV_MPU6050_ACTIVE_LOW; 1529 else if (irq_type == IRQF_TRIGGER_HIGH) 1530 st->irq_mask = INV_MPU6050_ACTIVE_HIGH | 1531 INV_MPU6050_LATCH_INT_EN; 1532 else if (irq_type == IRQF_TRIGGER_LOW) 1533 st->irq_mask = INV_MPU6050_ACTIVE_LOW | 1534 INV_MPU6050_LATCH_INT_EN; 1535 else { 1536 dev_err(dev, "Invalid interrupt type 0x%x specified\n", 1537 irq_type); 1538 return -EINVAL; 1539 } 1540 1541 st->vdd_supply = devm_regulator_get(dev, "vdd"); 1542 if (IS_ERR(st->vdd_supply)) 1543 return dev_err_probe(dev, PTR_ERR(st->vdd_supply), 1544 "Failed to get vdd regulator\n"); 1545 1546 st->vddio_supply = devm_regulator_get(dev, "vddio"); 1547 if (IS_ERR(st->vddio_supply)) 1548 return dev_err_probe(dev, PTR_ERR(st->vddio_supply), 1549 "Failed to get vddio regulator\n"); 1550 1551 result = regulator_enable(st->vdd_supply); 1552 if (result) { 1553 dev_err(dev, "Failed to enable vdd regulator: %d\n", result); 1554 return result; 1555 } 1556 msleep(INV_MPU6050_POWER_UP_TIME); 1557 1558 result = inv_mpu_core_enable_regulator_vddio(st); 1559 if (result) { 1560 regulator_disable(st->vdd_supply); 1561 return result; 1562 } 1563 1564 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, 1565 st); 1566 if (result) { 1567 dev_err(dev, "Failed to setup regulator cleanup action %d\n", 1568 result); 1569 return result; 1570 } 1571 1572 /* fill magnetometer orientation */ 1573 result = inv_mpu_magn_set_orient(st); 1574 if (result) 1575 return result; 1576 1577 /* power is turned on inside check chip type*/ 1578 result = inv_check_and_setup_chip(st); 1579 if (result) 1580 return result; 1581 1582 result = inv_mpu6050_init_config(indio_dev); 1583 if (result) { 1584 dev_err(dev, "Could not initialize device.\n"); 1585 goto error_power_off; 1586 } 1587 1588 dev_set_drvdata(dev, indio_dev); 1589 /* name will be NULL when enumerated via ACPI */ 1590 if (name) 1591 indio_dev->name = name; 1592 else 1593 indio_dev->name = dev_name(dev); 1594 1595 /* requires parent device set in indio_dev */ 1596 if (inv_mpu_bus_setup) { 1597 result = inv_mpu_bus_setup(indio_dev); 1598 if (result) 1599 goto error_power_off; 1600 } 1601 1602 /* chip init is done, turning on runtime power management */ 1603 result = pm_runtime_set_active(dev); 1604 if (result) 1605 goto error_power_off; 1606 pm_runtime_get_noresume(dev); 1607 pm_runtime_enable(dev); 1608 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS); 1609 pm_runtime_use_autosuspend(dev); 1610 pm_runtime_put(dev); 1611 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev); 1612 if (result) 1613 return result; 1614 1615 switch (chip_type) { 1616 case INV_MPU9150: 1617 indio_dev->channels = inv_mpu9150_channels; 1618 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels); 1619 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1620 break; 1621 case INV_MPU9250: 1622 case INV_MPU9255: 1623 indio_dev->channels = inv_mpu9250_channels; 1624 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); 1625 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1626 break; 1627 case INV_ICM20600: 1628 case INV_ICM20602: 1629 indio_dev->channels = inv_mpu_channels; 1630 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1631 indio_dev->available_scan_masks = inv_icm20602_scan_masks; 1632 break; 1633 default: 1634 indio_dev->channels = inv_mpu_channels; 1635 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1636 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1637 break; 1638 } 1639 /* 1640 * Use magnetometer inside the chip only if there is no i2c 1641 * auxiliary device in use. Otherwise Going back to 6-axis only. 1642 */ 1643 if (st->magn_disabled) { 1644 indio_dev->channels = inv_mpu_channels; 1645 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1646 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1647 } 1648 1649 indio_dev->info = &mpu_info; 1650 1651 if (irq > 0) { 1652 /* 1653 * The driver currently only supports buffered capture with its 1654 * own trigger. So no IRQ, no trigger, no buffer 1655 */ 1656 result = devm_iio_triggered_buffer_setup(dev, indio_dev, 1657 iio_pollfunc_store_time, 1658 inv_mpu6050_read_fifo, 1659 NULL); 1660 if (result) { 1661 dev_err(dev, "configure buffer fail %d\n", result); 1662 return result; 1663 } 1664 1665 result = inv_mpu6050_probe_trigger(indio_dev, irq_type); 1666 if (result) { 1667 dev_err(dev, "trigger probe fail %d\n", result); 1668 return result; 1669 } 1670 } 1671 1672 result = devm_iio_device_register(dev, indio_dev); 1673 if (result) { 1674 dev_err(dev, "IIO register fail %d\n", result); 1675 return result; 1676 } 1677 1678 return 0; 1679 1680 error_power_off: 1681 inv_mpu6050_set_power_itg(st, false); 1682 return result; 1683 } 1684 EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, IIO_MPU6050); 1685 1686 static int inv_mpu_resume(struct device *dev) 1687 { 1688 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1689 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1690 int result; 1691 1692 mutex_lock(&st->lock); 1693 result = inv_mpu_core_enable_regulator_vddio(st); 1694 if (result) 1695 goto out_unlock; 1696 1697 result = inv_mpu6050_set_power_itg(st, true); 1698 if (result) 1699 goto out_unlock; 1700 1701 pm_runtime_disable(dev); 1702 pm_runtime_set_active(dev); 1703 pm_runtime_enable(dev); 1704 1705 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); 1706 if (result) 1707 goto out_unlock; 1708 1709 if (iio_buffer_enabled(indio_dev)) 1710 result = inv_mpu6050_prepare_fifo(st, true); 1711 1712 out_unlock: 1713 mutex_unlock(&st->lock); 1714 1715 return result; 1716 } 1717 1718 static int inv_mpu_suspend(struct device *dev) 1719 { 1720 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1721 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1722 int result; 1723 1724 mutex_lock(&st->lock); 1725 1726 st->suspended_sensors = 0; 1727 if (pm_runtime_suspended(dev)) { 1728 result = 0; 1729 goto out_unlock; 1730 } 1731 1732 if (iio_buffer_enabled(indio_dev)) { 1733 result = inv_mpu6050_prepare_fifo(st, false); 1734 if (result) 1735 goto out_unlock; 1736 } 1737 1738 if (st->chip_config.accl_en) 1739 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; 1740 if (st->chip_config.gyro_en) 1741 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO; 1742 if (st->chip_config.temp_en) 1743 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP; 1744 if (st->chip_config.magn_en) 1745 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN; 1746 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors); 1747 if (result) 1748 goto out_unlock; 1749 1750 result = inv_mpu6050_set_power_itg(st, false); 1751 if (result) 1752 goto out_unlock; 1753 1754 inv_mpu_core_disable_regulator_vddio(st); 1755 out_unlock: 1756 mutex_unlock(&st->lock); 1757 1758 return result; 1759 } 1760 1761 static int inv_mpu_runtime_suspend(struct device *dev) 1762 { 1763 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1764 unsigned int sensors; 1765 int ret; 1766 1767 mutex_lock(&st->lock); 1768 1769 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1770 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1771 ret = inv_mpu6050_switch_engine(st, false, sensors); 1772 if (ret) 1773 goto out_unlock; 1774 1775 ret = inv_mpu6050_set_power_itg(st, false); 1776 if (ret) 1777 goto out_unlock; 1778 1779 inv_mpu_core_disable_regulator_vddio(st); 1780 1781 out_unlock: 1782 mutex_unlock(&st->lock); 1783 return ret; 1784 } 1785 1786 static int inv_mpu_runtime_resume(struct device *dev) 1787 { 1788 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1789 int ret; 1790 1791 ret = inv_mpu_core_enable_regulator_vddio(st); 1792 if (ret) 1793 return ret; 1794 1795 return inv_mpu6050_set_power_itg(st, true); 1796 } 1797 1798 EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = { 1799 SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume) 1800 RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL) 1801 }; 1802 1803 MODULE_AUTHOR("Invensense Corporation"); 1804 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 1805 MODULE_LICENSE("GPL"); 1806 MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP); 1807