1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2018 Google LLC. 4 * 5 * Driver for Semtech's SX9310/SX9311 capacitive proximity/button solution. 6 * Based on SX9500 driver and Semtech driver using the input framework 7 * <https://my.syncplicity.com/share/teouwsim8niiaud/ 8 * linux-driver-SX9310_NoSmartHSensing>. 9 * Reworked in April 2019 by Evan Green <evgreen@chromium.org> 10 * and in January 2020 by Daniel Campello <campello@chromium.org>. 11 */ 12 13 #include <linux/bitfield.h> 14 #include <linux/delay.h> 15 #include <linux/i2c.h> 16 #include <linux/interrupt.h> 17 #include <linux/kernel.h> 18 #include <linux/log2.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/module.h> 21 #include <linux/pm.h> 22 #include <linux/property.h> 23 #include <linux/regmap.h> 24 #include <linux/iio/iio.h> 25 26 #include "sx_common.h" 27 28 /* Register definitions. */ 29 #define SX9310_REG_IRQ_SRC SX_COMMON_REG_IRQ_SRC 30 #define SX9310_REG_STAT0 0x01 31 #define SX9310_REG_STAT1 0x02 32 #define SX9310_REG_STAT1_COMPSTAT_MASK GENMASK(3, 0) 33 #define SX9310_REG_IRQ_MSK 0x03 34 #define SX9310_CONVDONE_IRQ BIT(3) 35 #define SX9310_FAR_IRQ BIT(5) 36 #define SX9310_CLOSE_IRQ BIT(6) 37 #define SX9310_REG_IRQ_FUNC 0x04 38 39 #define SX9310_REG_PROX_CTRL0 0x10 40 #define SX9310_REG_PROX_CTRL0_SENSOREN_MASK GENMASK(3, 0) 41 #define SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK GENMASK(7, 4) 42 #define SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS 0x01 43 #define SX9310_REG_PROX_CTRL1 0x11 44 #define SX9310_REG_PROX_CTRL2 0x12 45 #define SX9310_REG_PROX_CTRL2_COMBMODE_MASK GENMASK(7, 6) 46 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3 (0x03 << 6) 47 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 (0x02 << 6) 48 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1 (0x01 << 6) 49 #define SX9310_REG_PROX_CTRL2_COMBMODE_CS3 (0x00 << 6) 50 #define SX9310_REG_PROX_CTRL2_SHIELDEN_MASK GENMASK(3, 2) 51 #define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC (0x01 << 2) 52 #define SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND (0x02 << 2) 53 #define SX9310_REG_PROX_CTRL3 0x13 54 #define SX9310_REG_PROX_CTRL3_GAIN0_MASK GENMASK(3, 2) 55 #define SX9310_REG_PROX_CTRL3_GAIN0_X8 (0x03 << 2) 56 #define SX9310_REG_PROX_CTRL3_GAIN12_MASK GENMASK(1, 0) 57 #define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02 58 #define SX9310_REG_PROX_CTRL4 0x14 59 #define SX9310_REG_PROX_CTRL4_RESOLUTION_MASK GENMASK(2, 0) 60 #define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07 61 #define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE 0x06 62 #define SX9310_REG_PROX_CTRL4_RESOLUTION_FINE 0x05 63 #define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM 0x04 64 #define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE 0x03 65 #define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE 0x02 66 #define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE 0x01 67 #define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST 0x00 68 #define SX9310_REG_PROX_CTRL5 0x15 69 #define SX9310_REG_PROX_CTRL5_RANGE_SMALL (0x03 << 6) 70 #define SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK GENMASK(3, 2) 71 #define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 (0x01 << 2) 72 #define SX9310_REG_PROX_CTRL5_RAWFILT_MASK GENMASK(1, 0) 73 #define SX9310_REG_PROX_CTRL5_RAWFILT_SHIFT 0 74 #define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02 75 #define SX9310_REG_PROX_CTRL6 0x16 76 #define SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT 0x20 77 #define SX9310_REG_PROX_CTRL7 0x17 78 #define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 (0x01 << 3) 79 #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK GENMASK(2, 0) 80 #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_SHIFT 0 81 #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05 82 #define SX9310_REG_PROX_CTRL8 0x18 83 #define SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK GENMASK(7, 3) 84 #define SX9310_REG_PROX_CTRL9 0x19 85 #define SX9310_REG_PROX_CTRL8_9_PTHRESH_28 (0x08 << 3) 86 #define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 (0x11 << 3) 87 #define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03 88 #define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05 89 #define SX9310_REG_PROX_CTRL10 0x1a 90 #define SX9310_REG_PROX_CTRL10_HYST_MASK GENMASK(5, 4) 91 #define SX9310_REG_PROX_CTRL10_HYST_6PCT (0x01 << 4) 92 #define SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK GENMASK(3, 2) 93 #define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK GENMASK(1, 0) 94 #define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 0x01 95 #define SX9310_REG_PROX_CTRL11 0x1b 96 #define SX9310_REG_PROX_CTRL12 0x1c 97 #define SX9310_REG_PROX_CTRL13 0x1d 98 #define SX9310_REG_PROX_CTRL14 0x1e 99 #define SX9310_REG_PROX_CTRL15 0x1f 100 #define SX9310_REG_PROX_CTRL16 0x20 101 #define SX9310_REG_PROX_CTRL17 0x21 102 #define SX9310_REG_PROX_CTRL18 0x22 103 #define SX9310_REG_PROX_CTRL19 0x23 104 #define SX9310_REG_SAR_CTRL0 0x2a 105 #define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES (0x02 << 5) 106 #define SX9310_REG_SAR_CTRL0_SARHYST_8 (0x02 << 3) 107 #define SX9310_REG_SAR_CTRL1 0x2b 108 /* Each increment of the slope register is 0.0078125. */ 109 #define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125) 110 #define SX9310_REG_SAR_CTRL2 0x2c 111 #define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c 112 113 #define SX9310_REG_SENSOR_SEL 0x30 114 #define SX9310_REG_USE_MSB 0x31 115 #define SX9310_REG_USE_LSB 0x32 116 #define SX9310_REG_AVG_MSB 0x33 117 #define SX9310_REG_AVG_LSB 0x34 118 #define SX9310_REG_DIFF_MSB 0x35 119 #define SX9310_REG_DIFF_LSB 0x36 120 #define SX9310_REG_OFFSET_MSB 0x37 121 #define SX9310_REG_OFFSET_LSB 0x38 122 #define SX9310_REG_SAR_MSB 0x39 123 #define SX9310_REG_SAR_LSB 0x3a 124 #define SX9310_REG_I2C_ADDR 0x40 125 #define SX9310_REG_PAUSE 0x41 126 #define SX9310_REG_WHOAMI 0x42 127 #define SX9310_WHOAMI_VALUE 0x01 128 #define SX9311_WHOAMI_VALUE 0x02 129 #define SX9310_REG_RESET 0x7f 130 131 132 /* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */ 133 #define SX9310_NUM_CHANNELS 4 134 static_assert(SX9310_NUM_CHANNELS <= SX_COMMON_MAX_NUM_CHANNELS); 135 136 #define SX9310_NAMED_CHANNEL(idx, name) \ 137 { \ 138 .type = IIO_PROXIMITY, \ 139 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 140 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \ 141 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 142 .info_mask_separate_available = \ 143 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \ 144 .info_mask_shared_by_all_available = \ 145 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 146 .indexed = 1, \ 147 .channel = idx, \ 148 .extend_name = name, \ 149 .address = SX9310_REG_DIFF_MSB, \ 150 .event_spec = sx_common_events, \ 151 .num_event_specs = ARRAY_SIZE(sx_common_events), \ 152 .scan_index = idx, \ 153 .scan_type = { \ 154 .sign = 's', \ 155 .realbits = 12, \ 156 .storagebits = 16, \ 157 .endianness = IIO_BE, \ 158 }, \ 159 } 160 #define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL) 161 162 struct sx931x_info { 163 const char *name; 164 unsigned int whoami; 165 }; 166 167 static const struct iio_chan_spec sx9310_channels[] = { 168 SX9310_CHANNEL(0), /* CS0 */ 169 SX9310_CHANNEL(1), /* CS1 */ 170 SX9310_CHANNEL(2), /* CS2 */ 171 SX9310_NAMED_CHANNEL(3, "comb"), /* COMB */ 172 173 IIO_CHAN_SOFT_TIMESTAMP(4), 174 }; 175 176 /* 177 * Each entry contains the integer part (val) and the fractional part, in micro 178 * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO. 179 */ 180 static const struct { 181 int val; 182 int val2; 183 } sx9310_samp_freq_table[] = { 184 { 500, 0 }, /* 0000: Min (no idle time) */ 185 { 66, 666666 }, /* 0001: 15 ms */ 186 { 33, 333333 }, /* 0010: 30 ms (Typ.) */ 187 { 22, 222222 }, /* 0011: 45 ms */ 188 { 16, 666666 }, /* 0100: 60 ms */ 189 { 11, 111111 }, /* 0101: 90 ms */ 190 { 8, 333333 }, /* 0110: 120 ms */ 191 { 5, 0 }, /* 0111: 200 ms */ 192 { 2, 500000 }, /* 1000: 400 ms */ 193 { 1, 666666 }, /* 1001: 600 ms */ 194 { 1, 250000 }, /* 1010: 800 ms */ 195 { 1, 0 }, /* 1011: 1 s */ 196 { 0, 500000 }, /* 1100: 2 s */ 197 { 0, 333333 }, /* 1101: 3 s */ 198 { 0, 250000 }, /* 1110: 4 s */ 199 { 0, 200000 }, /* 1111: 5 s */ 200 }; 201 static const unsigned int sx9310_scan_period_table[] = { 202 2, 15, 30, 45, 60, 90, 120, 200, 203 400, 600, 800, 1000, 2000, 3000, 4000, 5000, 204 }; 205 206 static const struct regmap_range sx9310_writable_reg_ranges[] = { 207 regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC), 208 regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19), 209 regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2), 210 regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL), 211 regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB), 212 regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE), 213 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), 214 }; 215 216 static const struct regmap_access_table sx9310_writeable_regs = { 217 .yes_ranges = sx9310_writable_reg_ranges, 218 .n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges), 219 }; 220 221 static const struct regmap_range sx9310_readable_reg_ranges[] = { 222 regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC), 223 regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19), 224 regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2), 225 regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB), 226 regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI), 227 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), 228 }; 229 230 static const struct regmap_access_table sx9310_readable_regs = { 231 .yes_ranges = sx9310_readable_reg_ranges, 232 .n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges), 233 }; 234 235 static const struct regmap_range sx9310_volatile_reg_ranges[] = { 236 regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1), 237 regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB), 238 regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB), 239 regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), 240 }; 241 242 static const struct regmap_access_table sx9310_volatile_regs = { 243 .yes_ranges = sx9310_volatile_reg_ranges, 244 .n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges), 245 }; 246 247 static const struct regmap_config sx9310_regmap_config = { 248 .reg_bits = 8, 249 .val_bits = 8, 250 251 .max_register = SX9310_REG_RESET, 252 .cache_type = REGCACHE_RBTREE, 253 254 .wr_table = &sx9310_writeable_regs, 255 .rd_table = &sx9310_readable_regs, 256 .volatile_table = &sx9310_volatile_regs, 257 }; 258 259 static int sx9310_read_prox_data(struct sx_common_data *data, 260 const struct iio_chan_spec *chan, __be16 *val) 261 { 262 int ret; 263 264 ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel); 265 if (ret) 266 return ret; 267 268 return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val)); 269 } 270 271 /* 272 * If we have no interrupt support, we have to wait for a scan period 273 * after enabling a channel to get a result. 274 */ 275 static int sx9310_wait_for_sample(struct sx_common_data *data) 276 { 277 int ret; 278 unsigned int val; 279 280 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val); 281 if (ret) 282 return ret; 283 284 val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val); 285 286 msleep(sx9310_scan_period_table[val]); 287 288 return 0; 289 } 290 291 static int sx9310_read_gain(struct sx_common_data *data, 292 const struct iio_chan_spec *chan, int *val) 293 { 294 unsigned int regval, gain; 295 int ret; 296 297 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, ®val); 298 if (ret) 299 return ret; 300 301 switch (chan->channel) { 302 case 0: 303 case 3: 304 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval); 305 break; 306 case 1: 307 case 2: 308 gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval); 309 break; 310 default: 311 return -EINVAL; 312 } 313 314 *val = 1 << gain; 315 316 return IIO_VAL_INT; 317 } 318 319 static int sx9310_read_samp_freq(struct sx_common_data *data, int *val, int *val2) 320 { 321 unsigned int regval; 322 int ret; 323 324 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, ®val); 325 if (ret) 326 return ret; 327 328 regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval); 329 *val = sx9310_samp_freq_table[regval].val; 330 *val2 = sx9310_samp_freq_table[regval].val2; 331 332 return IIO_VAL_INT_PLUS_MICRO; 333 } 334 335 static int sx9310_read_raw(struct iio_dev *indio_dev, 336 const struct iio_chan_spec *chan, int *val, 337 int *val2, long mask) 338 { 339 struct sx_common_data *data = iio_priv(indio_dev); 340 int ret; 341 342 if (chan->type != IIO_PROXIMITY) 343 return -EINVAL; 344 345 switch (mask) { 346 case IIO_CHAN_INFO_RAW: 347 ret = iio_device_claim_direct_mode(indio_dev); 348 if (ret) 349 return ret; 350 351 ret = sx_common_read_proximity(data, chan, val); 352 iio_device_release_direct_mode(indio_dev); 353 return ret; 354 case IIO_CHAN_INFO_HARDWAREGAIN: 355 ret = iio_device_claim_direct_mode(indio_dev); 356 if (ret) 357 return ret; 358 359 ret = sx9310_read_gain(data, chan, val); 360 iio_device_release_direct_mode(indio_dev); 361 return ret; 362 case IIO_CHAN_INFO_SAMP_FREQ: 363 return sx9310_read_samp_freq(data, val, val2); 364 default: 365 return -EINVAL; 366 } 367 } 368 369 static const int sx9310_gain_vals[] = { 1, 2, 4, 8 }; 370 371 static int sx9310_read_avail(struct iio_dev *indio_dev, 372 struct iio_chan_spec const *chan, 373 const int **vals, int *type, int *length, 374 long mask) 375 { 376 if (chan->type != IIO_PROXIMITY) 377 return -EINVAL; 378 379 switch (mask) { 380 case IIO_CHAN_INFO_HARDWAREGAIN: 381 *type = IIO_VAL_INT; 382 *length = ARRAY_SIZE(sx9310_gain_vals); 383 *vals = sx9310_gain_vals; 384 return IIO_AVAIL_LIST; 385 case IIO_CHAN_INFO_SAMP_FREQ: 386 *type = IIO_VAL_INT_PLUS_MICRO; 387 *length = ARRAY_SIZE(sx9310_samp_freq_table) * 2; 388 *vals = (int *)sx9310_samp_freq_table; 389 return IIO_AVAIL_LIST; 390 default: 391 return -EINVAL; 392 } 393 } 394 395 static const unsigned int sx9310_pthresh_codes[] = { 396 2, 4, 6, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112, 397 128, 144, 160, 192, 224, 256, 320, 384, 512, 640, 768, 1024, 1536 398 }; 399 400 static int sx9310_get_thresh_reg(unsigned int channel) 401 { 402 switch (channel) { 403 case 0: 404 case 3: 405 return SX9310_REG_PROX_CTRL8; 406 case 1: 407 case 2: 408 return SX9310_REG_PROX_CTRL9; 409 default: 410 return -EINVAL; 411 } 412 } 413 414 static int sx9310_read_thresh(struct sx_common_data *data, 415 const struct iio_chan_spec *chan, int *val) 416 { 417 unsigned int reg; 418 unsigned int regval; 419 int ret; 420 421 reg = ret = sx9310_get_thresh_reg(chan->channel); 422 if (ret < 0) 423 return ret; 424 425 ret = regmap_read(data->regmap, reg, ®val); 426 if (ret) 427 return ret; 428 429 regval = FIELD_GET(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval); 430 if (regval >= ARRAY_SIZE(sx9310_pthresh_codes)) 431 return -EINVAL; 432 433 *val = sx9310_pthresh_codes[regval]; 434 return IIO_VAL_INT; 435 } 436 437 static int sx9310_read_hysteresis(struct sx_common_data *data, 438 const struct iio_chan_spec *chan, int *val) 439 { 440 unsigned int regval, pthresh; 441 int ret; 442 443 ret = sx9310_read_thresh(data, chan, &pthresh); 444 if (ret < 0) 445 return ret; 446 447 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val); 448 if (ret) 449 return ret; 450 451 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_HYST_MASK, regval); 452 if (!regval) 453 regval = 5; 454 455 /* regval is at most 5 */ 456 *val = pthresh >> (5 - regval); 457 458 return IIO_VAL_INT; 459 } 460 461 static int sx9310_read_far_debounce(struct sx_common_data *data, int *val) 462 { 463 unsigned int regval; 464 int ret; 465 466 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val); 467 if (ret) 468 return ret; 469 470 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, regval); 471 if (regval) 472 *val = 1 << regval; 473 else 474 *val = 0; 475 476 return IIO_VAL_INT; 477 } 478 479 static int sx9310_read_close_debounce(struct sx_common_data *data, int *val) 480 { 481 unsigned int regval; 482 int ret; 483 484 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val); 485 if (ret) 486 return ret; 487 488 regval = FIELD_GET(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, regval); 489 if (regval) 490 *val = 1 << regval; 491 else 492 *val = 0; 493 494 return IIO_VAL_INT; 495 } 496 497 static int sx9310_read_event_val(struct iio_dev *indio_dev, 498 const struct iio_chan_spec *chan, 499 enum iio_event_type type, 500 enum iio_event_direction dir, 501 enum iio_event_info info, int *val, int *val2) 502 { 503 struct sx_common_data *data = iio_priv(indio_dev); 504 505 if (chan->type != IIO_PROXIMITY) 506 return -EINVAL; 507 508 switch (info) { 509 case IIO_EV_INFO_VALUE: 510 return sx9310_read_thresh(data, chan, val); 511 case IIO_EV_INFO_PERIOD: 512 switch (dir) { 513 case IIO_EV_DIR_RISING: 514 return sx9310_read_far_debounce(data, val); 515 case IIO_EV_DIR_FALLING: 516 return sx9310_read_close_debounce(data, val); 517 default: 518 return -EINVAL; 519 } 520 case IIO_EV_INFO_HYSTERESIS: 521 return sx9310_read_hysteresis(data, chan, val); 522 default: 523 return -EINVAL; 524 } 525 } 526 527 static int sx9310_write_thresh(struct sx_common_data *data, 528 const struct iio_chan_spec *chan, int val) 529 { 530 unsigned int reg; 531 unsigned int regval; 532 int ret, i; 533 534 reg = ret = sx9310_get_thresh_reg(chan->channel); 535 if (ret < 0) 536 return ret; 537 538 for (i = 0; i < ARRAY_SIZE(sx9310_pthresh_codes); i++) { 539 if (sx9310_pthresh_codes[i] == val) { 540 regval = i; 541 break; 542 } 543 } 544 545 if (i == ARRAY_SIZE(sx9310_pthresh_codes)) 546 return -EINVAL; 547 548 regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval); 549 mutex_lock(&data->mutex); 550 ret = regmap_update_bits(data->regmap, reg, 551 SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval); 552 mutex_unlock(&data->mutex); 553 554 return ret; 555 } 556 557 static int sx9310_write_hysteresis(struct sx_common_data *data, 558 const struct iio_chan_spec *chan, int _val) 559 { 560 unsigned int hyst, val = _val; 561 int ret, pthresh; 562 563 ret = sx9310_read_thresh(data, chan, &pthresh); 564 if (ret < 0) 565 return ret; 566 567 if (val == 0) 568 hyst = 0; 569 else if (val == pthresh >> 2) 570 hyst = 3; 571 else if (val == pthresh >> 3) 572 hyst = 2; 573 else if (val == pthresh >> 4) 574 hyst = 1; 575 else 576 return -EINVAL; 577 578 hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst); 579 mutex_lock(&data->mutex); 580 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10, 581 SX9310_REG_PROX_CTRL10_HYST_MASK, hyst); 582 mutex_unlock(&data->mutex); 583 584 return ret; 585 } 586 587 static int sx9310_write_far_debounce(struct sx_common_data *data, int val) 588 { 589 int ret; 590 unsigned int regval; 591 592 if (val > 0) 593 val = ilog2(val); 594 if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val)) 595 return -EINVAL; 596 597 regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val); 598 599 mutex_lock(&data->mutex); 600 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10, 601 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, 602 regval); 603 mutex_unlock(&data->mutex); 604 605 return ret; 606 } 607 608 static int sx9310_write_close_debounce(struct sx_common_data *data, int val) 609 { 610 int ret; 611 unsigned int regval; 612 613 if (val > 0) 614 val = ilog2(val); 615 if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val)) 616 return -EINVAL; 617 618 regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val); 619 620 mutex_lock(&data->mutex); 621 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10, 622 SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, 623 regval); 624 mutex_unlock(&data->mutex); 625 626 return ret; 627 } 628 629 static int sx9310_write_event_val(struct iio_dev *indio_dev, 630 const struct iio_chan_spec *chan, 631 enum iio_event_type type, 632 enum iio_event_direction dir, 633 enum iio_event_info info, int val, int val2) 634 { 635 struct sx_common_data *data = iio_priv(indio_dev); 636 637 if (chan->type != IIO_PROXIMITY) 638 return -EINVAL; 639 640 switch (info) { 641 case IIO_EV_INFO_VALUE: 642 return sx9310_write_thresh(data, chan, val); 643 case IIO_EV_INFO_PERIOD: 644 switch (dir) { 645 case IIO_EV_DIR_RISING: 646 return sx9310_write_far_debounce(data, val); 647 case IIO_EV_DIR_FALLING: 648 return sx9310_write_close_debounce(data, val); 649 default: 650 return -EINVAL; 651 } 652 case IIO_EV_INFO_HYSTERESIS: 653 return sx9310_write_hysteresis(data, chan, val); 654 default: 655 return -EINVAL; 656 } 657 } 658 659 static int sx9310_set_samp_freq(struct sx_common_data *data, int val, int val2) 660 { 661 int i, ret; 662 663 for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++) 664 if (val == sx9310_samp_freq_table[i].val && 665 val2 == sx9310_samp_freq_table[i].val2) 666 break; 667 668 if (i == ARRAY_SIZE(sx9310_samp_freq_table)) 669 return -EINVAL; 670 671 mutex_lock(&data->mutex); 672 673 ret = regmap_update_bits( 674 data->regmap, SX9310_REG_PROX_CTRL0, 675 SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, 676 FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i)); 677 678 mutex_unlock(&data->mutex); 679 680 return ret; 681 } 682 683 static int sx9310_write_gain(struct sx_common_data *data, 684 const struct iio_chan_spec *chan, int val) 685 { 686 unsigned int gain, mask; 687 int ret; 688 689 gain = ilog2(val); 690 691 switch (chan->channel) { 692 case 0: 693 case 3: 694 mask = SX9310_REG_PROX_CTRL3_GAIN0_MASK; 695 gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain); 696 break; 697 case 1: 698 case 2: 699 mask = SX9310_REG_PROX_CTRL3_GAIN12_MASK; 700 gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain); 701 break; 702 default: 703 return -EINVAL; 704 } 705 706 mutex_lock(&data->mutex); 707 ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL3, mask, 708 gain); 709 mutex_unlock(&data->mutex); 710 711 return ret; 712 } 713 714 static int sx9310_write_raw(struct iio_dev *indio_dev, 715 const struct iio_chan_spec *chan, int val, int val2, 716 long mask) 717 { 718 struct sx_common_data *data = iio_priv(indio_dev); 719 720 if (chan->type != IIO_PROXIMITY) 721 return -EINVAL; 722 723 switch (mask) { 724 case IIO_CHAN_INFO_SAMP_FREQ: 725 return sx9310_set_samp_freq(data, val, val2); 726 case IIO_CHAN_INFO_HARDWAREGAIN: 727 return sx9310_write_gain(data, chan, val); 728 default: 729 return -EINVAL; 730 } 731 } 732 733 static const struct sx_common_reg_default sx9310_default_regs[] = { 734 { SX9310_REG_IRQ_MSK, 0x00 }, 735 { SX9310_REG_IRQ_FUNC, 0x00 }, 736 /* 737 * The lower 4 bits should not be set as it enable sensors measurements. 738 * Turning the detection on before the configuration values are set to 739 * good values can cause the device to return erroneous readings. 740 */ 741 { SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS }, 742 { SX9310_REG_PROX_CTRL1, 0x00 }, 743 { SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 | 744 SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC }, 745 { SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 | 746 SX9310_REG_PROX_CTRL3_GAIN12_X4 }, 747 { SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST }, 748 { SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL | 749 SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 | 750 SX9310_REG_PROX_CTRL5_RAWFILT_1P25 }, 751 { SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT }, 752 { SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 | 753 SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 }, 754 { SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 | 755 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 }, 756 { SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 | 757 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 }, 758 { SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT | 759 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 }, 760 { SX9310_REG_PROX_CTRL11, 0x00 }, 761 { SX9310_REG_PROX_CTRL12, 0x00 }, 762 { SX9310_REG_PROX_CTRL13, 0x00 }, 763 { SX9310_REG_PROX_CTRL14, 0x00 }, 764 { SX9310_REG_PROX_CTRL15, 0x00 }, 765 { SX9310_REG_PROX_CTRL16, 0x00 }, 766 { SX9310_REG_PROX_CTRL17, 0x00 }, 767 { SX9310_REG_PROX_CTRL18, 0x00 }, 768 { SX9310_REG_PROX_CTRL19, 0x00 }, 769 { SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES | 770 SX9310_REG_SAR_CTRL0_SARHYST_8 }, 771 { SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) }, 772 { SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT }, 773 }; 774 775 /* Activate all channels and perform an initial compensation. */ 776 static int sx9310_init_compensation(struct iio_dev *indio_dev) 777 { 778 struct sx_common_data *data = iio_priv(indio_dev); 779 int ret; 780 unsigned int val; 781 unsigned int ctrl0; 782 783 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0); 784 if (ret) 785 return ret; 786 787 /* run the compensation phase on all channels */ 788 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, 789 ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK); 790 if (ret) 791 return ret; 792 793 ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val, 794 !(val & SX9310_REG_STAT1_COMPSTAT_MASK), 795 20000, 2000000); 796 if (ret) 797 return ret; 798 799 regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); 800 return ret; 801 } 802 803 static const struct sx_common_reg_default * 804 sx9310_get_default_reg(struct device *dev, int idx, 805 struct sx_common_reg_default *reg_def) 806 { 807 u32 combined[SX9310_NUM_CHANNELS]; 808 u32 start = 0, raw = 0, pos = 0; 809 unsigned long comb_mask = 0; 810 int ret, i, count; 811 const char *res; 812 813 memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def)); 814 switch (reg_def->reg) { 815 case SX9310_REG_PROX_CTRL2: 816 if (device_property_read_bool(dev, "semtech,cs0-ground")) { 817 reg_def->def &= ~SX9310_REG_PROX_CTRL2_SHIELDEN_MASK; 818 reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND; 819 } 820 821 count = device_property_count_u32(dev, "semtech,combined-sensors"); 822 if (count < 0 || count > ARRAY_SIZE(combined)) 823 break; 824 ret = device_property_read_u32_array(dev, "semtech,combined-sensors", 825 combined, count); 826 if (ret) 827 break; 828 829 for (i = 0; i < count; i++) 830 comb_mask |= BIT(combined[i]); 831 832 reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK; 833 if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0))) 834 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3; 835 else if (comb_mask == (BIT(1) | BIT(2))) 836 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2; 837 else if (comb_mask == (BIT(0) | BIT(1))) 838 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1; 839 else if (comb_mask == BIT(3)) 840 reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS3; 841 842 break; 843 case SX9310_REG_PROX_CTRL4: 844 ret = device_property_read_string(dev, "semtech,resolution", &res); 845 if (ret) 846 break; 847 848 reg_def->def &= ~SX9310_REG_PROX_CTRL4_RESOLUTION_MASK; 849 if (!strcmp(res, "coarsest")) 850 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST; 851 else if (!strcmp(res, "very-coarse")) 852 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE; 853 else if (!strcmp(res, "coarse")) 854 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE; 855 else if (!strcmp(res, "medium-coarse")) 856 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE; 857 else if (!strcmp(res, "medium")) 858 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM; 859 else if (!strcmp(res, "fine")) 860 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINE; 861 else if (!strcmp(res, "very-fine")) 862 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE; 863 else if (!strcmp(res, "finest")) 864 reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST; 865 866 break; 867 case SX9310_REG_PROX_CTRL5: 868 ret = device_property_read_u32(dev, "semtech,startup-sensor", &start); 869 if (ret) { 870 start = FIELD_GET(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK, 871 reg_def->def); 872 } 873 874 reg_def->def &= ~SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK; 875 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK, 876 start); 877 878 ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw); 879 if (ret) { 880 raw = FIELD_GET(SX9310_REG_PROX_CTRL5_RAWFILT_MASK, 881 reg_def->def); 882 } else { 883 raw = ilog2(raw); 884 } 885 886 reg_def->def &= ~SX9310_REG_PROX_CTRL5_RAWFILT_MASK; 887 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK, 888 raw); 889 break; 890 case SX9310_REG_PROX_CTRL7: 891 ret = device_property_read_u32(dev, "semtech,avg-pos-strength", &pos); 892 if (ret) 893 break; 894 895 /* Powers of 2, except for a gap between 16 and 64 */ 896 pos = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3); 897 reg_def->def &= ~SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK; 898 reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK, 899 pos); 900 break; 901 } 902 903 return reg_def; 904 } 905 906 static int sx9310_check_whoami(struct device *dev, 907 struct iio_dev *indio_dev) 908 { 909 struct sx_common_data *data = iio_priv(indio_dev); 910 const struct sx931x_info *ddata; 911 unsigned int whoami; 912 int ret; 913 914 ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &whoami); 915 if (ret) 916 return ret; 917 918 ddata = device_get_match_data(dev); 919 if (ddata->whoami != whoami) 920 return -ENODEV; 921 922 indio_dev->name = ddata->name; 923 924 return 0; 925 } 926 927 static const struct sx_common_chip_info sx9310_chip_info = { 928 .reg_stat = SX9310_REG_STAT0, 929 .reg_irq_msk = SX9310_REG_IRQ_MSK, 930 .reg_enable_chan = SX9310_REG_PROX_CTRL0, 931 .reg_reset = SX9310_REG_RESET, 932 933 .mask_enable_chan = SX9310_REG_STAT1_COMPSTAT_MASK, 934 .irq_msk_offset = 3, 935 .num_channels = SX9310_NUM_CHANNELS, 936 .num_default_regs = ARRAY_SIZE(sx9310_default_regs), 937 938 .ops = { 939 .read_prox_data = sx9310_read_prox_data, 940 .check_whoami = sx9310_check_whoami, 941 .init_compensation = sx9310_init_compensation, 942 .wait_for_sample = sx9310_wait_for_sample, 943 .get_default_reg = sx9310_get_default_reg, 944 }, 945 946 .iio_channels = sx9310_channels, 947 .num_iio_channels = ARRAY_SIZE(sx9310_channels), 948 .iio_info = { 949 .read_raw = sx9310_read_raw, 950 .read_avail = sx9310_read_avail, 951 .read_event_value = sx9310_read_event_val, 952 .write_event_value = sx9310_write_event_val, 953 .write_raw = sx9310_write_raw, 954 .read_event_config = sx_common_read_event_config, 955 .write_event_config = sx_common_write_event_config, 956 }, 957 }; 958 959 static int sx9310_probe(struct i2c_client *client) 960 { 961 return sx_common_probe(client, &sx9310_chip_info, &sx9310_regmap_config); 962 } 963 964 static int sx9310_suspend(struct device *dev) 965 { 966 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev)); 967 u8 ctrl0; 968 int ret; 969 970 disable_irq_nosync(data->client->irq); 971 972 mutex_lock(&data->mutex); 973 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, 974 &data->suspend_ctrl); 975 if (ret) 976 goto out; 977 978 ctrl0 = data->suspend_ctrl & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK; 979 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); 980 if (ret) 981 goto out; 982 983 ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0); 984 985 out: 986 mutex_unlock(&data->mutex); 987 return ret; 988 } 989 990 static int sx9310_resume(struct device *dev) 991 { 992 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev)); 993 int ret; 994 995 mutex_lock(&data->mutex); 996 ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1); 997 if (ret) 998 goto out; 999 1000 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, 1001 data->suspend_ctrl); 1002 1003 out: 1004 mutex_unlock(&data->mutex); 1005 if (ret) 1006 return ret; 1007 1008 enable_irq(data->client->irq); 1009 return 0; 1010 } 1011 1012 static DEFINE_SIMPLE_DEV_PM_OPS(sx9310_pm_ops, sx9310_suspend, sx9310_resume); 1013 1014 static const struct sx931x_info sx9310_info = { 1015 .name = "sx9310", 1016 .whoami = SX9310_WHOAMI_VALUE, 1017 }; 1018 1019 static const struct sx931x_info sx9311_info = { 1020 .name = "sx9311", 1021 .whoami = SX9311_WHOAMI_VALUE, 1022 }; 1023 1024 static const struct acpi_device_id sx9310_acpi_match[] = { 1025 { "STH9310", (kernel_ulong_t)&sx9310_info }, 1026 { "STH9311", (kernel_ulong_t)&sx9311_info }, 1027 {} 1028 }; 1029 MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match); 1030 1031 static const struct of_device_id sx9310_of_match[] = { 1032 { .compatible = "semtech,sx9310", &sx9310_info }, 1033 { .compatible = "semtech,sx9311", &sx9311_info }, 1034 {} 1035 }; 1036 MODULE_DEVICE_TABLE(of, sx9310_of_match); 1037 1038 static const struct i2c_device_id sx9310_id[] = { 1039 { "sx9310", (kernel_ulong_t)&sx9310_info }, 1040 { "sx9311", (kernel_ulong_t)&sx9311_info }, 1041 {} 1042 }; 1043 MODULE_DEVICE_TABLE(i2c, sx9310_id); 1044 1045 static struct i2c_driver sx9310_driver = { 1046 .driver = { 1047 .name = "sx9310", 1048 .acpi_match_table = sx9310_acpi_match, 1049 .of_match_table = sx9310_of_match, 1050 .pm = pm_sleep_ptr(&sx9310_pm_ops), 1051 1052 /* 1053 * Lots of i2c transfers in probe + over 200 ms waiting in 1054 * sx9310_init_compensation() mean a slow probe; prefer async 1055 * so we don't delay boot if we're builtin to the kernel. 1056 */ 1057 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1058 }, 1059 .probe = sx9310_probe, 1060 .id_table = sx9310_id, 1061 }; 1062 module_i2c_driver(sx9310_driver); 1063 1064 MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>"); 1065 MODULE_AUTHOR("Daniel Campello <campello@chromium.org>"); 1066 MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor"); 1067 MODULE_LICENSE("GPL v2"); 1068 MODULE_IMPORT_NS(SEMTECH_PROX); 1069