1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright (c) 2018 Hisilicon Limited. 4 */ 5 6 #include <rdma/ib_umem.h> 7 #include <rdma/hns-abi.h> 8 #include "hns_roce_device.h" 9 #include "hns_roce_cmd.h" 10 #include "hns_roce_hem.h" 11 12 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type) 13 { 14 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 15 struct hns_roce_srq *srq; 16 17 xa_lock(&srq_table->xa); 18 srq = xa_load(&srq_table->xa, srqn & (hr_dev->caps.num_srqs - 1)); 19 if (srq) 20 atomic_inc(&srq->refcount); 21 xa_unlock(&srq_table->xa); 22 23 if (!srq) { 24 dev_warn(hr_dev->dev, "Async event for bogus SRQ %08x\n", srqn); 25 return; 26 } 27 28 srq->event(srq, event_type); 29 30 if (atomic_dec_and_test(&srq->refcount)) 31 complete(&srq->free); 32 } 33 34 static void hns_roce_ib_srq_event(struct hns_roce_srq *srq, 35 enum hns_roce_event event_type) 36 { 37 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device); 38 struct ib_srq *ibsrq = &srq->ibsrq; 39 struct ib_event event; 40 41 if (ibsrq->event_handler) { 42 event.device = ibsrq->device; 43 event.element.srq = ibsrq; 44 switch (event_type) { 45 case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH: 46 event.event = IB_EVENT_SRQ_LIMIT_REACHED; 47 break; 48 case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR: 49 event.event = IB_EVENT_SRQ_ERR; 50 break; 51 default: 52 dev_err(hr_dev->dev, 53 "hns_roce:Unexpected event type 0x%x on SRQ %06lx\n", 54 event_type, srq->srqn); 55 return; 56 } 57 58 ibsrq->event_handler(&event, ibsrq->srq_context); 59 } 60 } 61 62 static int hns_roce_sw2hw_srq(struct hns_roce_dev *dev, 63 struct hns_roce_cmd_mailbox *mailbox, 64 unsigned long srq_num) 65 { 66 return hns_roce_cmd_mbox(dev, mailbox->dma, 0, srq_num, 0, 67 HNS_ROCE_CMD_SW2HW_SRQ, 68 HNS_ROCE_CMD_TIMEOUT_MSECS); 69 } 70 71 static int hns_roce_hw2sw_srq(struct hns_roce_dev *dev, 72 struct hns_roce_cmd_mailbox *mailbox, 73 unsigned long srq_num) 74 { 75 return hns_roce_cmd_mbox(dev, 0, mailbox ? mailbox->dma : 0, srq_num, 76 mailbox ? 0 : 1, HNS_ROCE_CMD_HW2SW_SRQ, 77 HNS_ROCE_CMD_TIMEOUT_MSECS); 78 } 79 80 static int hns_roce_srq_alloc(struct hns_roce_dev *hr_dev, u32 pdn, u32 cqn, 81 u16 xrcd, struct hns_roce_mtt *hr_mtt, 82 u64 db_rec_addr, struct hns_roce_srq *srq) 83 { 84 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 85 struct hns_roce_cmd_mailbox *mailbox; 86 dma_addr_t dma_handle_wqe; 87 dma_addr_t dma_handle_idx; 88 u64 *mtts_wqe; 89 u64 *mtts_idx; 90 int ret; 91 92 /* Get the physical address of srq buf */ 93 mtts_wqe = hns_roce_table_find(hr_dev, 94 &hr_dev->mr_table.mtt_srqwqe_table, 95 srq->mtt.first_seg, 96 &dma_handle_wqe); 97 if (!mtts_wqe) { 98 dev_err(hr_dev->dev, 99 "SRQ alloc.Failed to find srq buf addr.\n"); 100 return -EINVAL; 101 } 102 103 /* Get physical address of idx que buf */ 104 mtts_idx = hns_roce_table_find(hr_dev, &hr_dev->mr_table.mtt_idx_table, 105 srq->idx_que.mtt.first_seg, 106 &dma_handle_idx); 107 if (!mtts_idx) { 108 dev_err(hr_dev->dev, 109 "SRQ alloc.Failed to find idx que buf addr.\n"); 110 return -EINVAL; 111 } 112 113 ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn); 114 if (ret == -1) { 115 dev_err(hr_dev->dev, "SRQ alloc.Failed to alloc index.\n"); 116 return -ENOMEM; 117 } 118 119 ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn); 120 if (ret) 121 goto err_out; 122 123 ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL)); 124 if (ret) 125 goto err_put; 126 127 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 128 if (IS_ERR(mailbox)) { 129 ret = PTR_ERR(mailbox); 130 goto err_xa; 131 } 132 133 hr_dev->hw->write_srqc(hr_dev, srq, pdn, xrcd, cqn, mailbox->buf, 134 mtts_wqe, mtts_idx, dma_handle_wqe, 135 dma_handle_idx); 136 137 ret = hns_roce_sw2hw_srq(hr_dev, mailbox, srq->srqn); 138 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 139 if (ret) 140 goto err_xa; 141 142 atomic_set(&srq->refcount, 1); 143 init_completion(&srq->free); 144 return ret; 145 146 err_xa: 147 xa_erase(&srq_table->xa, srq->srqn); 148 149 err_put: 150 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn); 151 152 err_out: 153 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR); 154 return ret; 155 } 156 157 static void hns_roce_srq_free(struct hns_roce_dev *hr_dev, 158 struct hns_roce_srq *srq) 159 { 160 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 161 int ret; 162 163 ret = hns_roce_hw2sw_srq(hr_dev, NULL, srq->srqn); 164 if (ret) 165 dev_err(hr_dev->dev, "HW2SW_SRQ failed (%d) for CQN %06lx\n", 166 ret, srq->srqn); 167 168 xa_erase(&srq_table->xa, srq->srqn); 169 170 if (atomic_dec_and_test(&srq->refcount)) 171 complete(&srq->free); 172 wait_for_completion(&srq->free); 173 174 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn); 175 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn, BITMAP_NO_RR); 176 } 177 178 static int create_user_srq(struct hns_roce_srq *srq, struct ib_udata *udata, 179 int srq_buf_size) 180 { 181 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device); 182 struct hns_roce_ib_create_srq ucmd; 183 u32 page_shift; 184 u32 npages; 185 int ret; 186 187 if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) 188 return -EFAULT; 189 190 srq->umem = ib_umem_get(udata, ucmd.buf_addr, srq_buf_size, 0, 0); 191 if (IS_ERR(srq->umem)) 192 return PTR_ERR(srq->umem); 193 194 npages = (ib_umem_page_count(srq->umem) + 195 (1 << hr_dev->caps.srqwqe_buf_pg_sz) - 1) / 196 (1 << hr_dev->caps.srqwqe_buf_pg_sz); 197 page_shift = PAGE_SHIFT + hr_dev->caps.srqwqe_buf_pg_sz; 198 ret = hns_roce_mtt_init(hr_dev, npages, page_shift, &srq->mtt); 199 if (ret) 200 goto err_user_buf; 201 202 ret = hns_roce_ib_umem_write_mtt(hr_dev, &srq->mtt, srq->umem); 203 if (ret) 204 goto err_user_srq_mtt; 205 206 /* config index queue BA */ 207 srq->idx_que.umem = ib_umem_get(udata, ucmd.que_addr, 208 srq->idx_que.buf_size, 0, 0); 209 if (IS_ERR(srq->idx_que.umem)) { 210 dev_err(hr_dev->dev, "ib_umem_get error for index queue\n"); 211 ret = PTR_ERR(srq->idx_que.umem); 212 goto err_user_srq_mtt; 213 } 214 215 ret = hns_roce_mtt_init(hr_dev, ib_umem_page_count(srq->idx_que.umem), 216 PAGE_SHIFT, &srq->idx_que.mtt); 217 218 if (ret) { 219 dev_err(hr_dev->dev, "hns_roce_mtt_init error for idx que\n"); 220 goto err_user_idx_mtt; 221 } 222 223 ret = hns_roce_ib_umem_write_mtt(hr_dev, &srq->idx_que.mtt, 224 srq->idx_que.umem); 225 if (ret) { 226 dev_err(hr_dev->dev, 227 "hns_roce_ib_umem_write_mtt error for idx que\n"); 228 goto err_user_idx_buf; 229 } 230 231 return 0; 232 233 err_user_idx_buf: 234 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt); 235 236 err_user_idx_mtt: 237 ib_umem_release(srq->idx_que.umem); 238 239 err_user_srq_mtt: 240 hns_roce_mtt_cleanup(hr_dev, &srq->mtt); 241 242 err_user_buf: 243 ib_umem_release(srq->umem); 244 245 return ret; 246 } 247 248 static int hns_roce_create_idx_que(struct ib_pd *pd, struct hns_roce_srq *srq, 249 u32 page_shift) 250 { 251 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 252 struct hns_roce_idx_que *idx_que = &srq->idx_que; 253 254 idx_que->bitmap = bitmap_zalloc(srq->max, GFP_KERNEL); 255 if (!idx_que->bitmap) 256 return -ENOMEM; 257 258 idx_que->buf_size = srq->idx_que.buf_size; 259 260 if (hns_roce_buf_alloc(hr_dev, idx_que->buf_size, (1 << page_shift) * 2, 261 &idx_que->idx_buf, page_shift)) { 262 bitmap_free(idx_que->bitmap); 263 return -ENOMEM; 264 } 265 266 return 0; 267 } 268 269 static int create_kernel_srq(struct hns_roce_srq *srq, int srq_buf_size) 270 { 271 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device); 272 u32 page_shift = PAGE_SHIFT + hr_dev->caps.srqwqe_buf_pg_sz; 273 int ret; 274 275 if (hns_roce_buf_alloc(hr_dev, srq_buf_size, (1 << page_shift) * 2, 276 &srq->buf, page_shift)) 277 return -ENOMEM; 278 279 srq->head = 0; 280 srq->tail = srq->max - 1; 281 282 ret = hns_roce_mtt_init(hr_dev, srq->buf.npages, srq->buf.page_shift, 283 &srq->mtt); 284 if (ret) 285 goto err_kernel_buf; 286 287 ret = hns_roce_buf_write_mtt(hr_dev, &srq->mtt, &srq->buf); 288 if (ret) 289 goto err_kernel_srq_mtt; 290 291 page_shift = PAGE_SHIFT + hr_dev->caps.idx_buf_pg_sz; 292 ret = hns_roce_create_idx_que(srq->ibsrq.pd, srq, page_shift); 293 if (ret) { 294 dev_err(hr_dev->dev, "Create idx queue fail(%d)!\n", ret); 295 goto err_kernel_srq_mtt; 296 } 297 298 /* Init mtt table for idx_que */ 299 ret = hns_roce_mtt_init(hr_dev, srq->idx_que.idx_buf.npages, 300 srq->idx_que.idx_buf.page_shift, 301 &srq->idx_que.mtt); 302 if (ret) 303 goto err_kernel_create_idx; 304 305 /* Write buffer address into the mtt table */ 306 ret = hns_roce_buf_write_mtt(hr_dev, &srq->idx_que.mtt, 307 &srq->idx_que.idx_buf); 308 if (ret) 309 goto err_kernel_idx_buf; 310 311 srq->wrid = kvmalloc_array(srq->max, sizeof(u64), GFP_KERNEL); 312 if (!srq->wrid) { 313 ret = -ENOMEM; 314 goto err_kernel_idx_buf; 315 } 316 317 return 0; 318 319 err_kernel_idx_buf: 320 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt); 321 322 err_kernel_create_idx: 323 hns_roce_buf_free(hr_dev, srq->idx_que.buf_size, 324 &srq->idx_que.idx_buf); 325 kfree(srq->idx_que.bitmap); 326 327 err_kernel_srq_mtt: 328 hns_roce_mtt_cleanup(hr_dev, &srq->mtt); 329 330 err_kernel_buf: 331 hns_roce_buf_free(hr_dev, srq_buf_size, &srq->buf); 332 333 return ret; 334 } 335 336 static void destroy_user_srq(struct hns_roce_dev *hr_dev, 337 struct hns_roce_srq *srq) 338 { 339 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt); 340 ib_umem_release(srq->idx_que.umem); 341 hns_roce_mtt_cleanup(hr_dev, &srq->mtt); 342 ib_umem_release(srq->umem); 343 } 344 345 static void destroy_kernel_srq(struct hns_roce_dev *hr_dev, 346 struct hns_roce_srq *srq, int srq_buf_size) 347 { 348 kvfree(srq->wrid); 349 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt); 350 hns_roce_buf_free(hr_dev, srq->idx_que.buf_size, &srq->idx_que.idx_buf); 351 kfree(srq->idx_que.bitmap); 352 hns_roce_mtt_cleanup(hr_dev, &srq->mtt); 353 hns_roce_buf_free(hr_dev, srq_buf_size, &srq->buf); 354 } 355 356 int hns_roce_create_srq(struct ib_srq *ib_srq, 357 struct ib_srq_init_attr *srq_init_attr, 358 struct ib_udata *udata) 359 { 360 struct hns_roce_dev *hr_dev = to_hr_dev(ib_srq->device); 361 struct hns_roce_ib_create_srq_resp resp = {}; 362 struct hns_roce_srq *srq = to_hr_srq(ib_srq); 363 int srq_desc_size; 364 int srq_buf_size; 365 int ret = 0; 366 u32 cqn; 367 368 /* Check the actual SRQ wqe and SRQ sge num */ 369 if (srq_init_attr->attr.max_wr >= hr_dev->caps.max_srq_wrs || 370 srq_init_attr->attr.max_sge > hr_dev->caps.max_srq_sges) 371 return -EINVAL; 372 373 mutex_init(&srq->mutex); 374 spin_lock_init(&srq->lock); 375 376 srq->max = roundup_pow_of_two(srq_init_attr->attr.max_wr + 1); 377 srq->max_gs = srq_init_attr->attr.max_sge; 378 379 srq_desc_size = max(16, 16 * srq->max_gs); 380 381 srq->wqe_shift = ilog2(srq_desc_size); 382 383 srq_buf_size = srq->max * srq_desc_size; 384 385 srq->idx_que.entry_sz = HNS_ROCE_IDX_QUE_ENTRY_SZ; 386 srq->idx_que.buf_size = srq->max * srq->idx_que.entry_sz; 387 srq->mtt.mtt_type = MTT_TYPE_SRQWQE; 388 srq->idx_que.mtt.mtt_type = MTT_TYPE_IDX; 389 390 if (udata) { 391 ret = create_user_srq(srq, udata, srq_buf_size); 392 if (ret) { 393 dev_err(hr_dev->dev, "Create user srq failed\n"); 394 goto err_srq; 395 } 396 } else { 397 ret = create_kernel_srq(srq, srq_buf_size); 398 if (ret) { 399 dev_err(hr_dev->dev, "Create kernel srq failed\n"); 400 goto err_srq; 401 } 402 } 403 404 cqn = ib_srq_has_cq(srq_init_attr->srq_type) ? 405 to_hr_cq(srq_init_attr->ext.cq)->cqn : 0; 406 407 srq->db_reg_l = hr_dev->reg_base + SRQ_DB_REG; 408 409 ret = hns_roce_srq_alloc(hr_dev, to_hr_pd(ib_srq->pd)->pdn, cqn, 0, 410 &srq->mtt, 0, srq); 411 if (ret) 412 goto err_wrid; 413 414 srq->event = hns_roce_ib_srq_event; 415 resp.srqn = srq->srqn; 416 417 if (udata) { 418 if (ib_copy_to_udata(udata, &resp, 419 min(udata->outlen, sizeof(resp)))) { 420 ret = -EFAULT; 421 goto err_srqc_alloc; 422 } 423 } 424 425 return 0; 426 427 err_srqc_alloc: 428 hns_roce_srq_free(hr_dev, srq); 429 430 err_wrid: 431 if (udata) 432 destroy_user_srq(hr_dev, srq); 433 else 434 destroy_kernel_srq(hr_dev, srq, srq_buf_size); 435 436 err_srq: 437 return ret; 438 } 439 440 void hns_roce_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata) 441 { 442 struct hns_roce_dev *hr_dev = to_hr_dev(ibsrq->device); 443 struct hns_roce_srq *srq = to_hr_srq(ibsrq); 444 445 hns_roce_srq_free(hr_dev, srq); 446 hns_roce_mtt_cleanup(hr_dev, &srq->mtt); 447 448 if (udata) { 449 hns_roce_mtt_cleanup(hr_dev, &srq->idx_que.mtt); 450 } else { 451 kvfree(srq->wrid); 452 hns_roce_buf_free(hr_dev, srq->max << srq->wqe_shift, 453 &srq->buf); 454 } 455 ib_umem_release(srq->idx_que.umem); 456 ib_umem_release(srq->umem); 457 } 458 459 int hns_roce_init_srq_table(struct hns_roce_dev *hr_dev) 460 { 461 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 462 463 xa_init(&srq_table->xa); 464 465 return hns_roce_bitmap_init(&srq_table->bitmap, hr_dev->caps.num_srqs, 466 hr_dev->caps.num_srqs - 1, 467 hr_dev->caps.reserved_srqs, 0); 468 } 469 470 void hns_roce_cleanup_srq_table(struct hns_roce_dev *hr_dev) 471 { 472 hns_roce_bitmap_cleanup(&hr_dev->srq_table.bitmap); 473 } 474