1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Azoteq IQS269A Capacitive Touch Controller 4 * 5 * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com> 6 * 7 * This driver registers up to 3 input devices: one representing capacitive or 8 * inductive keys as well as Hall-effect switches, and one for each of the two 9 * axial sliders presented by the device. 10 */ 11 12 #include <linux/completion.h> 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/err.h> 16 #include <linux/i2c.h> 17 #include <linux/input.h> 18 #include <linux/interrupt.h> 19 #include <linux/kernel.h> 20 #include <linux/mod_devicetable.h> 21 #include <linux/module.h> 22 #include <linux/mutex.h> 23 #include <linux/property.h> 24 #include <linux/regmap.h> 25 #include <linux/slab.h> 26 27 #define IQS269_VER_INFO 0x00 28 #define IQS269_VER_INFO_PROD_NUM 0x4F 29 30 #define IQS269_SYS_FLAGS 0x02 31 #define IQS269_SYS_FLAGS_SHOW_RESET BIT(15) 32 #define IQS269_SYS_FLAGS_PWR_MODE_MASK GENMASK(12, 11) 33 #define IQS269_SYS_FLAGS_PWR_MODE_SHIFT 11 34 #define IQS269_SYS_FLAGS_IN_ATI BIT(10) 35 36 #define IQS269_CHx_COUNTS 0x08 37 38 #define IQS269_SLIDER_X 0x30 39 40 #define IQS269_CAL_DATA_A 0x35 41 #define IQS269_CAL_DATA_A_HALL_BIN_L_MASK GENMASK(15, 12) 42 #define IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT 12 43 #define IQS269_CAL_DATA_A_HALL_BIN_R_MASK GENMASK(11, 8) 44 #define IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT 8 45 46 #define IQS269_SYS_SETTINGS 0x80 47 #define IQS269_SYS_SETTINGS_CLK_DIV BIT(15) 48 #define IQS269_SYS_SETTINGS_ULP_AUTO BIT(14) 49 #define IQS269_SYS_SETTINGS_DIS_AUTO BIT(13) 50 #define IQS269_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11) 51 #define IQS269_SYS_SETTINGS_PWR_MODE_SHIFT 11 52 #define IQS269_SYS_SETTINGS_PWR_MODE_MAX 3 53 #define IQS269_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8) 54 #define IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT 8 55 #define IQS269_SYS_SETTINGS_ULP_UPDATE_MAX 7 56 #define IQS269_SYS_SETTINGS_RESEED_OFFSET BIT(6) 57 #define IQS269_SYS_SETTINGS_EVENT_MODE BIT(5) 58 #define IQS269_SYS_SETTINGS_EVENT_MODE_LP BIT(4) 59 #define IQS269_SYS_SETTINGS_REDO_ATI BIT(2) 60 #define IQS269_SYS_SETTINGS_ACK_RESET BIT(0) 61 62 #define IQS269_FILT_STR_LP_LTA_MASK GENMASK(7, 6) 63 #define IQS269_FILT_STR_LP_LTA_SHIFT 6 64 #define IQS269_FILT_STR_LP_CNT_MASK GENMASK(5, 4) 65 #define IQS269_FILT_STR_LP_CNT_SHIFT 4 66 #define IQS269_FILT_STR_NP_LTA_MASK GENMASK(3, 2) 67 #define IQS269_FILT_STR_NP_LTA_SHIFT 2 68 #define IQS269_FILT_STR_NP_CNT_MASK GENMASK(1, 0) 69 #define IQS269_FILT_STR_MAX 3 70 71 #define IQS269_EVENT_MASK_SYS BIT(6) 72 #define IQS269_EVENT_MASK_DEEP BIT(2) 73 #define IQS269_EVENT_MASK_TOUCH BIT(1) 74 #define IQS269_EVENT_MASK_PROX BIT(0) 75 76 #define IQS269_RATE_NP_MS_MAX 255 77 #define IQS269_RATE_LP_MS_MAX 255 78 #define IQS269_RATE_ULP_MS_MAX 4080 79 #define IQS269_TIMEOUT_PWR_MS_MAX 130560 80 #define IQS269_TIMEOUT_LTA_MS_MAX 130560 81 82 #define IQS269_MISC_A_ATI_BAND_DISABLE BIT(15) 83 #define IQS269_MISC_A_ATI_LP_ONLY BIT(14) 84 #define IQS269_MISC_A_ATI_BAND_TIGHTEN BIT(13) 85 #define IQS269_MISC_A_FILT_DISABLE BIT(12) 86 #define IQS269_MISC_A_GPIO3_SELECT_MASK GENMASK(10, 8) 87 #define IQS269_MISC_A_GPIO3_SELECT_SHIFT 8 88 #define IQS269_MISC_A_DUAL_DIR BIT(6) 89 #define IQS269_MISC_A_TX_FREQ_MASK GENMASK(5, 4) 90 #define IQS269_MISC_A_TX_FREQ_SHIFT 4 91 #define IQS269_MISC_A_TX_FREQ_MAX 3 92 #define IQS269_MISC_A_GLOBAL_CAP_SIZE BIT(0) 93 94 #define IQS269_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6) 95 #define IQS269_MISC_B_RESEED_UI_SEL_SHIFT 6 96 #define IQS269_MISC_B_RESEED_UI_SEL_MAX 3 97 #define IQS269_MISC_B_TRACKING_UI_ENABLE BIT(4) 98 #define IQS269_MISC_B_FILT_STR_SLIDER GENMASK(1, 0) 99 100 #define IQS269_CHx_ENG_A_MEAS_CAP_SIZE BIT(15) 101 #define IQS269_CHx_ENG_A_RX_GND_INACTIVE BIT(13) 102 #define IQS269_CHx_ENG_A_LOCAL_CAP_SIZE BIT(12) 103 #define IQS269_CHx_ENG_A_ATI_MODE_MASK GENMASK(9, 8) 104 #define IQS269_CHx_ENG_A_ATI_MODE_SHIFT 8 105 #define IQS269_CHx_ENG_A_ATI_MODE_MAX 3 106 #define IQS269_CHx_ENG_A_INV_LOGIC BIT(7) 107 #define IQS269_CHx_ENG_A_PROJ_BIAS_MASK GENMASK(6, 5) 108 #define IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT 5 109 #define IQS269_CHx_ENG_A_PROJ_BIAS_MAX 3 110 #define IQS269_CHx_ENG_A_SENSE_MODE_MASK GENMASK(3, 0) 111 #define IQS269_CHx_ENG_A_SENSE_MODE_MAX 15 112 113 #define IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE BIT(13) 114 #define IQS269_CHx_ENG_B_SENSE_FREQ_MASK GENMASK(10, 9) 115 #define IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT 9 116 #define IQS269_CHx_ENG_B_SENSE_FREQ_MAX 3 117 #define IQS269_CHx_ENG_B_STATIC_ENABLE BIT(8) 118 #define IQS269_CHx_ENG_B_ATI_BASE_MASK GENMASK(7, 6) 119 #define IQS269_CHx_ENG_B_ATI_BASE_75 0x00 120 #define IQS269_CHx_ENG_B_ATI_BASE_100 0x40 121 #define IQS269_CHx_ENG_B_ATI_BASE_150 0x80 122 #define IQS269_CHx_ENG_B_ATI_BASE_200 0xC0 123 #define IQS269_CHx_ENG_B_ATI_TARGET_MASK GENMASK(5, 0) 124 #define IQS269_CHx_ENG_B_ATI_TARGET_MAX 2016 125 126 #define IQS269_CHx_WEIGHT_MAX 255 127 #define IQS269_CHx_THRESH_MAX 255 128 #define IQS269_CHx_HYST_DEEP_MASK GENMASK(7, 4) 129 #define IQS269_CHx_HYST_DEEP_SHIFT 4 130 #define IQS269_CHx_HYST_TOUCH_MASK GENMASK(3, 0) 131 #define IQS269_CHx_HYST_MAX 15 132 133 #define IQS269_CHx_HALL_INACTIVE 6 134 #define IQS269_CHx_HALL_ACTIVE 7 135 136 #define IQS269_HALL_PAD_R BIT(0) 137 #define IQS269_HALL_PAD_L BIT(1) 138 #define IQS269_HALL_PAD_INV BIT(6) 139 140 #define IQS269_HALL_UI 0xF5 141 #define IQS269_HALL_UI_ENABLE BIT(15) 142 143 #define IQS269_MAX_REG 0xFF 144 145 #define IQS269_NUM_CH 8 146 #define IQS269_NUM_SL 2 147 148 #define iqs269_irq_wait() usleep_range(200, 250) 149 150 enum iqs269_local_cap_size { 151 IQS269_LOCAL_CAP_SIZE_0, 152 IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY, 153 IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5, 154 }; 155 156 enum iqs269_st_offs { 157 IQS269_ST_OFFS_PROX, 158 IQS269_ST_OFFS_DIR, 159 IQS269_ST_OFFS_TOUCH, 160 IQS269_ST_OFFS_DEEP, 161 }; 162 163 enum iqs269_th_offs { 164 IQS269_TH_OFFS_PROX, 165 IQS269_TH_OFFS_TOUCH, 166 IQS269_TH_OFFS_DEEP, 167 }; 168 169 enum iqs269_event_id { 170 IQS269_EVENT_PROX_DN, 171 IQS269_EVENT_PROX_UP, 172 IQS269_EVENT_TOUCH_DN, 173 IQS269_EVENT_TOUCH_UP, 174 IQS269_EVENT_DEEP_DN, 175 IQS269_EVENT_DEEP_UP, 176 }; 177 178 struct iqs269_switch_desc { 179 unsigned int code; 180 bool enabled; 181 }; 182 183 struct iqs269_event_desc { 184 const char *name; 185 enum iqs269_st_offs st_offs; 186 enum iqs269_th_offs th_offs; 187 bool dir_up; 188 u8 mask; 189 }; 190 191 static const struct iqs269_event_desc iqs269_events[] = { 192 [IQS269_EVENT_PROX_DN] = { 193 .name = "event-prox", 194 .st_offs = IQS269_ST_OFFS_PROX, 195 .th_offs = IQS269_TH_OFFS_PROX, 196 .mask = IQS269_EVENT_MASK_PROX, 197 }, 198 [IQS269_EVENT_PROX_UP] = { 199 .name = "event-prox-alt", 200 .st_offs = IQS269_ST_OFFS_PROX, 201 .th_offs = IQS269_TH_OFFS_PROX, 202 .dir_up = true, 203 .mask = IQS269_EVENT_MASK_PROX, 204 }, 205 [IQS269_EVENT_TOUCH_DN] = { 206 .name = "event-touch", 207 .st_offs = IQS269_ST_OFFS_TOUCH, 208 .th_offs = IQS269_TH_OFFS_TOUCH, 209 .mask = IQS269_EVENT_MASK_TOUCH, 210 }, 211 [IQS269_EVENT_TOUCH_UP] = { 212 .name = "event-touch-alt", 213 .st_offs = IQS269_ST_OFFS_TOUCH, 214 .th_offs = IQS269_TH_OFFS_TOUCH, 215 .dir_up = true, 216 .mask = IQS269_EVENT_MASK_TOUCH, 217 }, 218 [IQS269_EVENT_DEEP_DN] = { 219 .name = "event-deep", 220 .st_offs = IQS269_ST_OFFS_DEEP, 221 .th_offs = IQS269_TH_OFFS_DEEP, 222 .mask = IQS269_EVENT_MASK_DEEP, 223 }, 224 [IQS269_EVENT_DEEP_UP] = { 225 .name = "event-deep-alt", 226 .st_offs = IQS269_ST_OFFS_DEEP, 227 .th_offs = IQS269_TH_OFFS_DEEP, 228 .dir_up = true, 229 .mask = IQS269_EVENT_MASK_DEEP, 230 }, 231 }; 232 233 struct iqs269_ver_info { 234 u8 prod_num; 235 u8 sw_num; 236 u8 hw_num; 237 u8 padding; 238 } __packed; 239 240 struct iqs269_ch_reg { 241 u8 rx_enable; 242 u8 tx_enable; 243 __be16 engine_a; 244 __be16 engine_b; 245 __be16 ati_comp; 246 u8 thresh[3]; 247 u8 hyst; 248 u8 assoc_select; 249 u8 assoc_weight; 250 } __packed; 251 252 struct iqs269_sys_reg { 253 __be16 general; 254 u8 active; 255 u8 filter; 256 u8 reseed; 257 u8 event_mask; 258 u8 rate_np; 259 u8 rate_lp; 260 u8 rate_ulp; 261 u8 timeout_pwr; 262 u8 timeout_rdy; 263 u8 timeout_lta; 264 __be16 misc_a; 265 __be16 misc_b; 266 u8 blocking; 267 u8 padding; 268 u8 slider_select[IQS269_NUM_SL]; 269 u8 timeout_tap; 270 u8 timeout_swipe; 271 u8 thresh_swipe; 272 u8 redo_ati; 273 struct iqs269_ch_reg ch_reg[IQS269_NUM_CH]; 274 } __packed; 275 276 struct iqs269_flags { 277 __be16 system; 278 u8 gesture; 279 u8 padding; 280 u8 states[4]; 281 } __packed; 282 283 struct iqs269_private { 284 struct i2c_client *client; 285 struct regmap *regmap; 286 struct mutex lock; 287 struct iqs269_switch_desc switches[ARRAY_SIZE(iqs269_events)]; 288 struct iqs269_sys_reg sys_reg; 289 struct completion ati_done; 290 struct input_dev *keypad; 291 struct input_dev *slider[IQS269_NUM_SL]; 292 unsigned int keycode[ARRAY_SIZE(iqs269_events) * IQS269_NUM_CH]; 293 unsigned int ch_num; 294 bool hall_enable; 295 bool ati_current; 296 }; 297 298 static int iqs269_ati_mode_set(struct iqs269_private *iqs269, 299 unsigned int ch_num, unsigned int mode) 300 { 301 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 302 u16 engine_a; 303 304 if (ch_num >= IQS269_NUM_CH) 305 return -EINVAL; 306 307 if (mode > IQS269_CHx_ENG_A_ATI_MODE_MAX) 308 return -EINVAL; 309 310 mutex_lock(&iqs269->lock); 311 312 engine_a = be16_to_cpu(ch_reg[ch_num].engine_a); 313 314 engine_a &= ~IQS269_CHx_ENG_A_ATI_MODE_MASK; 315 engine_a |= (mode << IQS269_CHx_ENG_A_ATI_MODE_SHIFT); 316 317 ch_reg[ch_num].engine_a = cpu_to_be16(engine_a); 318 iqs269->ati_current = false; 319 320 mutex_unlock(&iqs269->lock); 321 322 return 0; 323 } 324 325 static int iqs269_ati_mode_get(struct iqs269_private *iqs269, 326 unsigned int ch_num, unsigned int *mode) 327 { 328 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 329 u16 engine_a; 330 331 if (ch_num >= IQS269_NUM_CH) 332 return -EINVAL; 333 334 mutex_lock(&iqs269->lock); 335 engine_a = be16_to_cpu(ch_reg[ch_num].engine_a); 336 mutex_unlock(&iqs269->lock); 337 338 engine_a &= IQS269_CHx_ENG_A_ATI_MODE_MASK; 339 *mode = (engine_a >> IQS269_CHx_ENG_A_ATI_MODE_SHIFT); 340 341 return 0; 342 } 343 344 static int iqs269_ati_base_set(struct iqs269_private *iqs269, 345 unsigned int ch_num, unsigned int base) 346 { 347 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 348 u16 engine_b; 349 350 if (ch_num >= IQS269_NUM_CH) 351 return -EINVAL; 352 353 switch (base) { 354 case 75: 355 base = IQS269_CHx_ENG_B_ATI_BASE_75; 356 break; 357 358 case 100: 359 base = IQS269_CHx_ENG_B_ATI_BASE_100; 360 break; 361 362 case 150: 363 base = IQS269_CHx_ENG_B_ATI_BASE_150; 364 break; 365 366 case 200: 367 base = IQS269_CHx_ENG_B_ATI_BASE_200; 368 break; 369 370 default: 371 return -EINVAL; 372 } 373 374 mutex_lock(&iqs269->lock); 375 376 engine_b = be16_to_cpu(ch_reg[ch_num].engine_b); 377 378 engine_b &= ~IQS269_CHx_ENG_B_ATI_BASE_MASK; 379 engine_b |= base; 380 381 ch_reg[ch_num].engine_b = cpu_to_be16(engine_b); 382 iqs269->ati_current = false; 383 384 mutex_unlock(&iqs269->lock); 385 386 return 0; 387 } 388 389 static int iqs269_ati_base_get(struct iqs269_private *iqs269, 390 unsigned int ch_num, unsigned int *base) 391 { 392 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 393 u16 engine_b; 394 395 if (ch_num >= IQS269_NUM_CH) 396 return -EINVAL; 397 398 mutex_lock(&iqs269->lock); 399 engine_b = be16_to_cpu(ch_reg[ch_num].engine_b); 400 mutex_unlock(&iqs269->lock); 401 402 switch (engine_b & IQS269_CHx_ENG_B_ATI_BASE_MASK) { 403 case IQS269_CHx_ENG_B_ATI_BASE_75: 404 *base = 75; 405 return 0; 406 407 case IQS269_CHx_ENG_B_ATI_BASE_100: 408 *base = 100; 409 return 0; 410 411 case IQS269_CHx_ENG_B_ATI_BASE_150: 412 *base = 150; 413 return 0; 414 415 case IQS269_CHx_ENG_B_ATI_BASE_200: 416 *base = 200; 417 return 0; 418 419 default: 420 return -EINVAL; 421 } 422 } 423 424 static int iqs269_ati_target_set(struct iqs269_private *iqs269, 425 unsigned int ch_num, unsigned int target) 426 { 427 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 428 u16 engine_b; 429 430 if (ch_num >= IQS269_NUM_CH) 431 return -EINVAL; 432 433 if (target > IQS269_CHx_ENG_B_ATI_TARGET_MAX) 434 return -EINVAL; 435 436 mutex_lock(&iqs269->lock); 437 438 engine_b = be16_to_cpu(ch_reg[ch_num].engine_b); 439 440 engine_b &= ~IQS269_CHx_ENG_B_ATI_TARGET_MASK; 441 engine_b |= target / 32; 442 443 ch_reg[ch_num].engine_b = cpu_to_be16(engine_b); 444 iqs269->ati_current = false; 445 446 mutex_unlock(&iqs269->lock); 447 448 return 0; 449 } 450 451 static int iqs269_ati_target_get(struct iqs269_private *iqs269, 452 unsigned int ch_num, unsigned int *target) 453 { 454 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 455 u16 engine_b; 456 457 if (ch_num >= IQS269_NUM_CH) 458 return -EINVAL; 459 460 mutex_lock(&iqs269->lock); 461 engine_b = be16_to_cpu(ch_reg[ch_num].engine_b); 462 mutex_unlock(&iqs269->lock); 463 464 *target = (engine_b & IQS269_CHx_ENG_B_ATI_TARGET_MASK) * 32; 465 466 return 0; 467 } 468 469 static int iqs269_parse_mask(const struct fwnode_handle *fwnode, 470 const char *propname, u8 *mask) 471 { 472 unsigned int val[IQS269_NUM_CH]; 473 int count, error, i; 474 475 count = fwnode_property_count_u32(fwnode, propname); 476 if (count < 0) 477 return 0; 478 479 if (count > IQS269_NUM_CH) 480 return -EINVAL; 481 482 error = fwnode_property_read_u32_array(fwnode, propname, val, count); 483 if (error) 484 return error; 485 486 *mask = 0; 487 488 for (i = 0; i < count; i++) { 489 if (val[i] >= IQS269_NUM_CH) 490 return -EINVAL; 491 492 *mask |= BIT(val[i]); 493 } 494 495 return 0; 496 } 497 498 static int iqs269_parse_chan(struct iqs269_private *iqs269, 499 const struct fwnode_handle *ch_node) 500 { 501 struct i2c_client *client = iqs269->client; 502 struct fwnode_handle *ev_node; 503 struct iqs269_ch_reg *ch_reg; 504 u16 engine_a, engine_b; 505 unsigned int reg, val; 506 int error, i; 507 508 error = fwnode_property_read_u32(ch_node, "reg", ®); 509 if (error) { 510 dev_err(&client->dev, "Failed to read channel number: %d\n", 511 error); 512 return error; 513 } else if (reg >= IQS269_NUM_CH) { 514 dev_err(&client->dev, "Invalid channel number: %u\n", reg); 515 return -EINVAL; 516 } 517 518 iqs269->sys_reg.active |= BIT(reg); 519 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable")) 520 iqs269->sys_reg.reseed |= BIT(reg); 521 522 if (fwnode_property_present(ch_node, "azoteq,blocking-enable")) 523 iqs269->sys_reg.blocking |= BIT(reg); 524 525 if (fwnode_property_present(ch_node, "azoteq,slider0-select")) 526 iqs269->sys_reg.slider_select[0] |= BIT(reg); 527 528 if (fwnode_property_present(ch_node, "azoteq,slider1-select")) 529 iqs269->sys_reg.slider_select[1] |= BIT(reg); 530 531 ch_reg = &iqs269->sys_reg.ch_reg[reg]; 532 533 error = iqs269_parse_mask(ch_node, "azoteq,rx-enable", 534 &ch_reg->rx_enable); 535 if (error) { 536 dev_err(&client->dev, "Invalid channel %u RX enable mask: %d\n", 537 reg, error); 538 return error; 539 } 540 541 error = iqs269_parse_mask(ch_node, "azoteq,tx-enable", 542 &ch_reg->tx_enable); 543 if (error) { 544 dev_err(&client->dev, "Invalid channel %u TX enable mask: %d\n", 545 reg, error); 546 return error; 547 } 548 549 engine_a = be16_to_cpu(ch_reg->engine_a); 550 engine_b = be16_to_cpu(ch_reg->engine_b); 551 552 engine_a |= IQS269_CHx_ENG_A_MEAS_CAP_SIZE; 553 if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease")) 554 engine_a &= ~IQS269_CHx_ENG_A_MEAS_CAP_SIZE; 555 556 engine_a |= IQS269_CHx_ENG_A_RX_GND_INACTIVE; 557 if (fwnode_property_present(ch_node, "azoteq,rx-float-inactive")) 558 engine_a &= ~IQS269_CHx_ENG_A_RX_GND_INACTIVE; 559 560 engine_a &= ~IQS269_CHx_ENG_A_LOCAL_CAP_SIZE; 561 engine_b &= ~IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE; 562 if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", &val)) { 563 switch (val) { 564 case IQS269_LOCAL_CAP_SIZE_0: 565 break; 566 567 case IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5: 568 engine_a |= IQS269_CHx_ENG_A_LOCAL_CAP_SIZE; 569 fallthrough; 570 571 case IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY: 572 engine_b |= IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE; 573 break; 574 575 default: 576 dev_err(&client->dev, 577 "Invalid channel %u local cap. size: %u\n", reg, 578 val); 579 return -EINVAL; 580 } 581 } 582 583 engine_a &= ~IQS269_CHx_ENG_A_INV_LOGIC; 584 if (fwnode_property_present(ch_node, "azoteq,invert-enable")) 585 engine_a |= IQS269_CHx_ENG_A_INV_LOGIC; 586 587 if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) { 588 if (val > IQS269_CHx_ENG_A_PROJ_BIAS_MAX) { 589 dev_err(&client->dev, 590 "Invalid channel %u bias current: %u\n", reg, 591 val); 592 return -EINVAL; 593 } 594 595 engine_a &= ~IQS269_CHx_ENG_A_PROJ_BIAS_MASK; 596 engine_a |= (val << IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT); 597 } 598 599 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) { 600 if (val > IQS269_CHx_ENG_A_SENSE_MODE_MAX) { 601 dev_err(&client->dev, 602 "Invalid channel %u sensing mode: %u\n", reg, 603 val); 604 return -EINVAL; 605 } 606 607 engine_a &= ~IQS269_CHx_ENG_A_SENSE_MODE_MASK; 608 engine_a |= val; 609 } 610 611 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) { 612 if (val > IQS269_CHx_ENG_B_SENSE_FREQ_MAX) { 613 dev_err(&client->dev, 614 "Invalid channel %u sensing frequency: %u\n", 615 reg, val); 616 return -EINVAL; 617 } 618 619 engine_b &= ~IQS269_CHx_ENG_B_SENSE_FREQ_MASK; 620 engine_b |= (val << IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT); 621 } 622 623 engine_b &= ~IQS269_CHx_ENG_B_STATIC_ENABLE; 624 if (fwnode_property_present(ch_node, "azoteq,static-enable")) 625 engine_b |= IQS269_CHx_ENG_B_STATIC_ENABLE; 626 627 ch_reg->engine_a = cpu_to_be16(engine_a); 628 ch_reg->engine_b = cpu_to_be16(engine_b); 629 630 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) { 631 error = iqs269_ati_mode_set(iqs269, reg, val); 632 if (error) { 633 dev_err(&client->dev, 634 "Invalid channel %u ATI mode: %u\n", reg, val); 635 return error; 636 } 637 } 638 639 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) { 640 error = iqs269_ati_base_set(iqs269, reg, val); 641 if (error) { 642 dev_err(&client->dev, 643 "Invalid channel %u ATI base: %u\n", reg, val); 644 return error; 645 } 646 } 647 648 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) { 649 error = iqs269_ati_target_set(iqs269, reg, val); 650 if (error) { 651 dev_err(&client->dev, 652 "Invalid channel %u ATI target: %u\n", reg, 653 val); 654 return error; 655 } 656 } 657 658 error = iqs269_parse_mask(ch_node, "azoteq,assoc-select", 659 &ch_reg->assoc_select); 660 if (error) { 661 dev_err(&client->dev, "Invalid channel %u association: %d\n", 662 reg, error); 663 return error; 664 } 665 666 if (!fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) { 667 if (val > IQS269_CHx_WEIGHT_MAX) { 668 dev_err(&client->dev, 669 "Invalid channel %u associated weight: %u\n", 670 reg, val); 671 return -EINVAL; 672 } 673 674 ch_reg->assoc_weight = val; 675 } 676 677 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) { 678 ev_node = fwnode_get_named_child_node(ch_node, 679 iqs269_events[i].name); 680 if (!ev_node) 681 continue; 682 683 if (!fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) { 684 if (val > IQS269_CHx_THRESH_MAX) { 685 dev_err(&client->dev, 686 "Invalid channel %u threshold: %u\n", 687 reg, val); 688 fwnode_handle_put(ev_node); 689 return -EINVAL; 690 } 691 692 ch_reg->thresh[iqs269_events[i].th_offs] = val; 693 } 694 695 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) { 696 u8 *hyst = &ch_reg->hyst; 697 698 if (val > IQS269_CHx_HYST_MAX) { 699 dev_err(&client->dev, 700 "Invalid channel %u hysteresis: %u\n", 701 reg, val); 702 fwnode_handle_put(ev_node); 703 return -EINVAL; 704 } 705 706 if (i == IQS269_EVENT_DEEP_DN || 707 i == IQS269_EVENT_DEEP_UP) { 708 *hyst &= ~IQS269_CHx_HYST_DEEP_MASK; 709 *hyst |= (val << IQS269_CHx_HYST_DEEP_SHIFT); 710 } else if (i == IQS269_EVENT_TOUCH_DN || 711 i == IQS269_EVENT_TOUCH_UP) { 712 *hyst &= ~IQS269_CHx_HYST_TOUCH_MASK; 713 *hyst |= val; 714 } 715 } 716 717 error = fwnode_property_read_u32(ev_node, "linux,code", &val); 718 fwnode_handle_put(ev_node); 719 if (error == -EINVAL) { 720 continue; 721 } else if (error) { 722 dev_err(&client->dev, 723 "Failed to read channel %u code: %d\n", reg, 724 error); 725 return error; 726 } 727 728 switch (reg) { 729 case IQS269_CHx_HALL_ACTIVE: 730 if (iqs269->hall_enable) { 731 iqs269->switches[i].code = val; 732 iqs269->switches[i].enabled = true; 733 } 734 fallthrough; 735 736 case IQS269_CHx_HALL_INACTIVE: 737 if (iqs269->hall_enable) 738 break; 739 fallthrough; 740 741 default: 742 iqs269->keycode[i * IQS269_NUM_CH + reg] = val; 743 } 744 745 iqs269->sys_reg.event_mask &= ~iqs269_events[i].mask; 746 } 747 748 return 0; 749 } 750 751 static int iqs269_parse_prop(struct iqs269_private *iqs269) 752 { 753 struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg; 754 struct i2c_client *client = iqs269->client; 755 struct fwnode_handle *ch_node; 756 u16 general, misc_a, misc_b; 757 unsigned int val; 758 int error; 759 760 iqs269->hall_enable = device_property_present(&client->dev, 761 "azoteq,hall-enable"); 762 763 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg, 764 sizeof(*sys_reg)); 765 if (error) 766 return error; 767 768 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-lta", 769 &val)) { 770 if (val > IQS269_FILT_STR_MAX) { 771 dev_err(&client->dev, "Invalid filter strength: %u\n", 772 val); 773 return -EINVAL; 774 } 775 776 sys_reg->filter &= ~IQS269_FILT_STR_LP_LTA_MASK; 777 sys_reg->filter |= (val << IQS269_FILT_STR_LP_LTA_SHIFT); 778 } 779 780 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-cnt", 781 &val)) { 782 if (val > IQS269_FILT_STR_MAX) { 783 dev_err(&client->dev, "Invalid filter strength: %u\n", 784 val); 785 return -EINVAL; 786 } 787 788 sys_reg->filter &= ~IQS269_FILT_STR_LP_CNT_MASK; 789 sys_reg->filter |= (val << IQS269_FILT_STR_LP_CNT_SHIFT); 790 } 791 792 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-lta", 793 &val)) { 794 if (val > IQS269_FILT_STR_MAX) { 795 dev_err(&client->dev, "Invalid filter strength: %u\n", 796 val); 797 return -EINVAL; 798 } 799 800 sys_reg->filter &= ~IQS269_FILT_STR_NP_LTA_MASK; 801 sys_reg->filter |= (val << IQS269_FILT_STR_NP_LTA_SHIFT); 802 } 803 804 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-cnt", 805 &val)) { 806 if (val > IQS269_FILT_STR_MAX) { 807 dev_err(&client->dev, "Invalid filter strength: %u\n", 808 val); 809 return -EINVAL; 810 } 811 812 sys_reg->filter &= ~IQS269_FILT_STR_NP_CNT_MASK; 813 sys_reg->filter |= val; 814 } 815 816 if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms", 817 &val)) { 818 if (val > IQS269_RATE_NP_MS_MAX) { 819 dev_err(&client->dev, "Invalid report rate: %u\n", val); 820 return -EINVAL; 821 } 822 823 sys_reg->rate_np = val; 824 } 825 826 if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms", 827 &val)) { 828 if (val > IQS269_RATE_LP_MS_MAX) { 829 dev_err(&client->dev, "Invalid report rate: %u\n", val); 830 return -EINVAL; 831 } 832 833 sys_reg->rate_lp = val; 834 } 835 836 if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms", 837 &val)) { 838 if (val > IQS269_RATE_ULP_MS_MAX) { 839 dev_err(&client->dev, "Invalid report rate: %u\n", val); 840 return -EINVAL; 841 } 842 843 sys_reg->rate_ulp = val / 16; 844 } 845 846 if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms", 847 &val)) { 848 if (val > IQS269_TIMEOUT_PWR_MS_MAX) { 849 dev_err(&client->dev, "Invalid timeout: %u\n", val); 850 return -EINVAL; 851 } 852 853 sys_reg->timeout_pwr = val / 512; 854 } 855 856 if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms", 857 &val)) { 858 if (val > IQS269_TIMEOUT_LTA_MS_MAX) { 859 dev_err(&client->dev, "Invalid timeout: %u\n", val); 860 return -EINVAL; 861 } 862 863 sys_reg->timeout_lta = val / 512; 864 } 865 866 misc_a = be16_to_cpu(sys_reg->misc_a); 867 misc_b = be16_to_cpu(sys_reg->misc_b); 868 869 misc_a &= ~IQS269_MISC_A_ATI_BAND_DISABLE; 870 if (device_property_present(&client->dev, "azoteq,ati-band-disable")) 871 misc_a |= IQS269_MISC_A_ATI_BAND_DISABLE; 872 873 misc_a &= ~IQS269_MISC_A_ATI_LP_ONLY; 874 if (device_property_present(&client->dev, "azoteq,ati-lp-only")) 875 misc_a |= IQS269_MISC_A_ATI_LP_ONLY; 876 877 misc_a &= ~IQS269_MISC_A_ATI_BAND_TIGHTEN; 878 if (device_property_present(&client->dev, "azoteq,ati-band-tighten")) 879 misc_a |= IQS269_MISC_A_ATI_BAND_TIGHTEN; 880 881 misc_a &= ~IQS269_MISC_A_FILT_DISABLE; 882 if (device_property_present(&client->dev, "azoteq,filt-disable")) 883 misc_a |= IQS269_MISC_A_FILT_DISABLE; 884 885 if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select", 886 &val)) { 887 if (val >= IQS269_NUM_CH) { 888 dev_err(&client->dev, "Invalid GPIO3 selection: %u\n", 889 val); 890 return -EINVAL; 891 } 892 893 misc_a &= ~IQS269_MISC_A_GPIO3_SELECT_MASK; 894 misc_a |= (val << IQS269_MISC_A_GPIO3_SELECT_SHIFT); 895 } 896 897 misc_a &= ~IQS269_MISC_A_DUAL_DIR; 898 if (device_property_present(&client->dev, "azoteq,dual-direction")) 899 misc_a |= IQS269_MISC_A_DUAL_DIR; 900 901 if (!device_property_read_u32(&client->dev, "azoteq,tx-freq", &val)) { 902 if (val > IQS269_MISC_A_TX_FREQ_MAX) { 903 dev_err(&client->dev, 904 "Invalid excitation frequency: %u\n", val); 905 return -EINVAL; 906 } 907 908 misc_a &= ~IQS269_MISC_A_TX_FREQ_MASK; 909 misc_a |= (val << IQS269_MISC_A_TX_FREQ_SHIFT); 910 } 911 912 misc_a &= ~IQS269_MISC_A_GLOBAL_CAP_SIZE; 913 if (device_property_present(&client->dev, "azoteq,global-cap-increase")) 914 misc_a |= IQS269_MISC_A_GLOBAL_CAP_SIZE; 915 916 if (!device_property_read_u32(&client->dev, "azoteq,reseed-select", 917 &val)) { 918 if (val > IQS269_MISC_B_RESEED_UI_SEL_MAX) { 919 dev_err(&client->dev, "Invalid reseed selection: %u\n", 920 val); 921 return -EINVAL; 922 } 923 924 misc_b &= ~IQS269_MISC_B_RESEED_UI_SEL_MASK; 925 misc_b |= (val << IQS269_MISC_B_RESEED_UI_SEL_SHIFT); 926 } 927 928 misc_b &= ~IQS269_MISC_B_TRACKING_UI_ENABLE; 929 if (device_property_present(&client->dev, "azoteq,tracking-enable")) 930 misc_b |= IQS269_MISC_B_TRACKING_UI_ENABLE; 931 932 if (!device_property_read_u32(&client->dev, "azoteq,filt-str-slider", 933 &val)) { 934 if (val > IQS269_FILT_STR_MAX) { 935 dev_err(&client->dev, "Invalid filter strength: %u\n", 936 val); 937 return -EINVAL; 938 } 939 940 misc_b &= ~IQS269_MISC_B_FILT_STR_SLIDER; 941 misc_b |= val; 942 } 943 944 sys_reg->misc_a = cpu_to_be16(misc_a); 945 sys_reg->misc_b = cpu_to_be16(misc_b); 946 947 sys_reg->active = 0; 948 sys_reg->reseed = 0; 949 950 sys_reg->blocking = 0; 951 952 sys_reg->slider_select[0] = 0; 953 sys_reg->slider_select[1] = 0; 954 955 sys_reg->event_mask = ~((u8)IQS269_EVENT_MASK_SYS); 956 957 device_for_each_child_node(&client->dev, ch_node) { 958 error = iqs269_parse_chan(iqs269, ch_node); 959 if (error) { 960 fwnode_handle_put(ch_node); 961 return error; 962 } 963 } 964 965 /* 966 * Volunteer all active channels to participate in ATI when REDO-ATI is 967 * manually triggered. 968 */ 969 sys_reg->redo_ati = sys_reg->active; 970 971 general = be16_to_cpu(sys_reg->general); 972 973 if (device_property_present(&client->dev, "azoteq,clk-div")) 974 general |= IQS269_SYS_SETTINGS_CLK_DIV; 975 976 /* 977 * Configure the device to automatically switch between normal and low- 978 * power modes as a function of sensing activity. Ultra-low-power mode, 979 * if enabled, is reserved for suspend. 980 */ 981 general &= ~IQS269_SYS_SETTINGS_ULP_AUTO; 982 general &= ~IQS269_SYS_SETTINGS_DIS_AUTO; 983 general &= ~IQS269_SYS_SETTINGS_PWR_MODE_MASK; 984 985 if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode", 986 &val)) { 987 if (val > IQS269_SYS_SETTINGS_PWR_MODE_MAX) { 988 dev_err(&client->dev, "Invalid suspend mode: %u\n", 989 val); 990 return -EINVAL; 991 } 992 993 general |= (val << IQS269_SYS_SETTINGS_PWR_MODE_SHIFT); 994 } 995 996 if (!device_property_read_u32(&client->dev, "azoteq,ulp-update", 997 &val)) { 998 if (val > IQS269_SYS_SETTINGS_ULP_UPDATE_MAX) { 999 dev_err(&client->dev, "Invalid update rate: %u\n", val); 1000 return -EINVAL; 1001 } 1002 1003 general &= ~IQS269_SYS_SETTINGS_ULP_UPDATE_MASK; 1004 general |= (val << IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT); 1005 } 1006 1007 general &= ~IQS269_SYS_SETTINGS_RESEED_OFFSET; 1008 if (device_property_present(&client->dev, "azoteq,reseed-offset")) 1009 general |= IQS269_SYS_SETTINGS_RESEED_OFFSET; 1010 1011 general |= IQS269_SYS_SETTINGS_EVENT_MODE; 1012 1013 /* 1014 * As per the datasheet, enable streaming during normal-power mode if 1015 * either slider is in use. In that case, the device returns to event 1016 * mode during low-power mode. 1017 */ 1018 if (sys_reg->slider_select[0] || sys_reg->slider_select[1]) 1019 general |= IQS269_SYS_SETTINGS_EVENT_MODE_LP; 1020 1021 general |= IQS269_SYS_SETTINGS_REDO_ATI; 1022 general |= IQS269_SYS_SETTINGS_ACK_RESET; 1023 1024 sys_reg->general = cpu_to_be16(general); 1025 1026 return 0; 1027 } 1028 1029 static int iqs269_dev_init(struct iqs269_private *iqs269) 1030 { 1031 int error; 1032 1033 mutex_lock(&iqs269->lock); 1034 1035 error = regmap_update_bits(iqs269->regmap, IQS269_HALL_UI, 1036 IQS269_HALL_UI_ENABLE, 1037 iqs269->hall_enable ? ~0 : 0); 1038 if (error) 1039 goto err_mutex; 1040 1041 error = regmap_raw_write(iqs269->regmap, IQS269_SYS_SETTINGS, 1042 &iqs269->sys_reg, sizeof(iqs269->sys_reg)); 1043 if (error) 1044 goto err_mutex; 1045 1046 /* 1047 * The following delay gives the device time to deassert its RDY output 1048 * so as to prevent an interrupt from being serviced prematurely. 1049 */ 1050 usleep_range(2000, 2100); 1051 1052 iqs269->ati_current = true; 1053 1054 err_mutex: 1055 mutex_unlock(&iqs269->lock); 1056 1057 return error; 1058 } 1059 1060 static int iqs269_input_init(struct iqs269_private *iqs269) 1061 { 1062 struct i2c_client *client = iqs269->client; 1063 unsigned int sw_code, keycode; 1064 int error, i, j; 1065 1066 iqs269->keypad = devm_input_allocate_device(&client->dev); 1067 if (!iqs269->keypad) 1068 return -ENOMEM; 1069 1070 iqs269->keypad->keycodemax = ARRAY_SIZE(iqs269->keycode); 1071 iqs269->keypad->keycode = iqs269->keycode; 1072 iqs269->keypad->keycodesize = sizeof(*iqs269->keycode); 1073 1074 iqs269->keypad->name = "iqs269a_keypad"; 1075 iqs269->keypad->id.bustype = BUS_I2C; 1076 1077 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) { 1078 sw_code = iqs269->switches[i].code; 1079 1080 for (j = 0; j < IQS269_NUM_CH; j++) { 1081 keycode = iqs269->keycode[i * IQS269_NUM_CH + j]; 1082 1083 /* 1084 * Hall-effect sensing repurposes a pair of dedicated 1085 * channels, only one of which reports events. 1086 */ 1087 switch (j) { 1088 case IQS269_CHx_HALL_ACTIVE: 1089 if (iqs269->hall_enable && 1090 iqs269->switches[i].enabled) 1091 input_set_capability(iqs269->keypad, 1092 EV_SW, sw_code); 1093 fallthrough; 1094 1095 case IQS269_CHx_HALL_INACTIVE: 1096 if (iqs269->hall_enable) 1097 continue; 1098 fallthrough; 1099 1100 default: 1101 if (keycode != KEY_RESERVED) 1102 input_set_capability(iqs269->keypad, 1103 EV_KEY, keycode); 1104 } 1105 } 1106 } 1107 1108 for (i = 0; i < IQS269_NUM_SL; i++) { 1109 if (!iqs269->sys_reg.slider_select[i]) 1110 continue; 1111 1112 iqs269->slider[i] = devm_input_allocate_device(&client->dev); 1113 if (!iqs269->slider[i]) 1114 return -ENOMEM; 1115 1116 iqs269->slider[i]->name = i ? "iqs269a_slider_1" 1117 : "iqs269a_slider_0"; 1118 iqs269->slider[i]->id.bustype = BUS_I2C; 1119 1120 input_set_capability(iqs269->slider[i], EV_KEY, BTN_TOUCH); 1121 input_set_abs_params(iqs269->slider[i], ABS_X, 0, 255, 0, 0); 1122 1123 error = input_register_device(iqs269->slider[i]); 1124 if (error) { 1125 dev_err(&client->dev, 1126 "Failed to register slider %d: %d\n", i, error); 1127 return error; 1128 } 1129 } 1130 1131 return 0; 1132 } 1133 1134 static int iqs269_report(struct iqs269_private *iqs269) 1135 { 1136 struct i2c_client *client = iqs269->client; 1137 struct iqs269_flags flags; 1138 unsigned int sw_code, keycode; 1139 int error, i, j; 1140 u8 slider_x[IQS269_NUM_SL]; 1141 u8 dir_mask, state; 1142 1143 error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS, &flags, 1144 sizeof(flags)); 1145 if (error) { 1146 dev_err(&client->dev, "Failed to read device status: %d\n", 1147 error); 1148 return error; 1149 } 1150 1151 /* 1152 * The device resets itself if its own watchdog bites, which can happen 1153 * in the event of an I2C communication error. In this case, the device 1154 * asserts a SHOW_RESET interrupt and all registers must be restored. 1155 */ 1156 if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_SHOW_RESET) { 1157 dev_err(&client->dev, "Unexpected device reset\n"); 1158 1159 error = iqs269_dev_init(iqs269); 1160 if (error) 1161 dev_err(&client->dev, 1162 "Failed to re-initialize device: %d\n", error); 1163 1164 return error; 1165 } 1166 1167 if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_IN_ATI) 1168 return 0; 1169 1170 error = regmap_raw_read(iqs269->regmap, IQS269_SLIDER_X, slider_x, 1171 sizeof(slider_x)); 1172 if (error) { 1173 dev_err(&client->dev, "Failed to read slider position: %d\n", 1174 error); 1175 return error; 1176 } 1177 1178 for (i = 0; i < IQS269_NUM_SL; i++) { 1179 if (!iqs269->sys_reg.slider_select[i]) 1180 continue; 1181 1182 /* 1183 * Report BTN_TOUCH if any channel that participates in the 1184 * slider is in a state of touch. 1185 */ 1186 if (flags.states[IQS269_ST_OFFS_TOUCH] & 1187 iqs269->sys_reg.slider_select[i]) { 1188 input_report_key(iqs269->slider[i], BTN_TOUCH, 1); 1189 input_report_abs(iqs269->slider[i], ABS_X, slider_x[i]); 1190 } else { 1191 input_report_key(iqs269->slider[i], BTN_TOUCH, 0); 1192 } 1193 1194 input_sync(iqs269->slider[i]); 1195 } 1196 1197 for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) { 1198 dir_mask = flags.states[IQS269_ST_OFFS_DIR]; 1199 if (!iqs269_events[i].dir_up) 1200 dir_mask = ~dir_mask; 1201 1202 state = flags.states[iqs269_events[i].st_offs] & dir_mask; 1203 1204 sw_code = iqs269->switches[i].code; 1205 1206 for (j = 0; j < IQS269_NUM_CH; j++) { 1207 keycode = iqs269->keycode[i * IQS269_NUM_CH + j]; 1208 1209 switch (j) { 1210 case IQS269_CHx_HALL_ACTIVE: 1211 if (iqs269->hall_enable && 1212 iqs269->switches[i].enabled) 1213 input_report_switch(iqs269->keypad, 1214 sw_code, 1215 state & BIT(j)); 1216 fallthrough; 1217 1218 case IQS269_CHx_HALL_INACTIVE: 1219 if (iqs269->hall_enable) 1220 continue; 1221 fallthrough; 1222 1223 default: 1224 input_report_key(iqs269->keypad, keycode, 1225 state & BIT(j)); 1226 } 1227 } 1228 } 1229 1230 input_sync(iqs269->keypad); 1231 1232 /* 1233 * The following completion signals that ATI has finished, any initial 1234 * switch states have been reported and the keypad can be registered. 1235 */ 1236 complete_all(&iqs269->ati_done); 1237 1238 return 0; 1239 } 1240 1241 static irqreturn_t iqs269_irq(int irq, void *context) 1242 { 1243 struct iqs269_private *iqs269 = context; 1244 1245 if (iqs269_report(iqs269)) 1246 return IRQ_NONE; 1247 1248 /* 1249 * The device does not deassert its interrupt (RDY) pin until shortly 1250 * after receiving an I2C stop condition; the following delay ensures 1251 * the interrupt handler does not return before this time. 1252 */ 1253 iqs269_irq_wait(); 1254 1255 return IRQ_HANDLED; 1256 } 1257 1258 static ssize_t counts_show(struct device *dev, 1259 struct device_attribute *attr, char *buf) 1260 { 1261 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1262 struct i2c_client *client = iqs269->client; 1263 __le16 counts; 1264 int error; 1265 1266 if (!iqs269->ati_current || iqs269->hall_enable) 1267 return -EPERM; 1268 1269 if (!completion_done(&iqs269->ati_done)) 1270 return -EBUSY; 1271 1272 /* 1273 * Unsolicited I2C communication prompts the device to assert its RDY 1274 * pin, so disable the interrupt line until the operation is finished 1275 * and RDY has been deasserted. 1276 */ 1277 disable_irq(client->irq); 1278 1279 error = regmap_raw_read(iqs269->regmap, 1280 IQS269_CHx_COUNTS + iqs269->ch_num * 2, 1281 &counts, sizeof(counts)); 1282 1283 iqs269_irq_wait(); 1284 enable_irq(client->irq); 1285 1286 if (error) 1287 return error; 1288 1289 return scnprintf(buf, PAGE_SIZE, "%u\n", le16_to_cpu(counts)); 1290 } 1291 1292 static ssize_t hall_bin_show(struct device *dev, 1293 struct device_attribute *attr, char *buf) 1294 { 1295 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1296 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 1297 struct i2c_client *client = iqs269->client; 1298 unsigned int val; 1299 int error; 1300 1301 disable_irq(client->irq); 1302 1303 error = regmap_read(iqs269->regmap, IQS269_CAL_DATA_A, &val); 1304 1305 iqs269_irq_wait(); 1306 enable_irq(client->irq); 1307 1308 if (error) 1309 return error; 1310 1311 switch (ch_reg[IQS269_CHx_HALL_ACTIVE].rx_enable & 1312 ch_reg[IQS269_CHx_HALL_INACTIVE].rx_enable) { 1313 case IQS269_HALL_PAD_R: 1314 val &= IQS269_CAL_DATA_A_HALL_BIN_R_MASK; 1315 val >>= IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT; 1316 break; 1317 1318 case IQS269_HALL_PAD_L: 1319 val &= IQS269_CAL_DATA_A_HALL_BIN_L_MASK; 1320 val >>= IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT; 1321 break; 1322 1323 default: 1324 return -EINVAL; 1325 } 1326 1327 return scnprintf(buf, PAGE_SIZE, "%u\n", val); 1328 } 1329 1330 static ssize_t hall_enable_show(struct device *dev, 1331 struct device_attribute *attr, char *buf) 1332 { 1333 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1334 1335 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->hall_enable); 1336 } 1337 1338 static ssize_t hall_enable_store(struct device *dev, 1339 struct device_attribute *attr, const char *buf, 1340 size_t count) 1341 { 1342 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1343 unsigned int val; 1344 int error; 1345 1346 error = kstrtouint(buf, 10, &val); 1347 if (error) 1348 return error; 1349 1350 mutex_lock(&iqs269->lock); 1351 1352 iqs269->hall_enable = val; 1353 iqs269->ati_current = false; 1354 1355 mutex_unlock(&iqs269->lock); 1356 1357 return count; 1358 } 1359 1360 static ssize_t ch_number_show(struct device *dev, 1361 struct device_attribute *attr, char *buf) 1362 { 1363 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1364 1365 return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ch_num); 1366 } 1367 1368 static ssize_t ch_number_store(struct device *dev, 1369 struct device_attribute *attr, const char *buf, 1370 size_t count) 1371 { 1372 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1373 unsigned int val; 1374 int error; 1375 1376 error = kstrtouint(buf, 10, &val); 1377 if (error) 1378 return error; 1379 1380 if (val >= IQS269_NUM_CH) 1381 return -EINVAL; 1382 1383 iqs269->ch_num = val; 1384 1385 return count; 1386 } 1387 1388 static ssize_t rx_enable_show(struct device *dev, 1389 struct device_attribute *attr, char *buf) 1390 { 1391 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1392 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 1393 1394 return scnprintf(buf, PAGE_SIZE, "%u\n", 1395 ch_reg[iqs269->ch_num].rx_enable); 1396 } 1397 1398 static ssize_t rx_enable_store(struct device *dev, 1399 struct device_attribute *attr, const char *buf, 1400 size_t count) 1401 { 1402 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1403 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; 1404 unsigned int val; 1405 int error; 1406 1407 error = kstrtouint(buf, 10, &val); 1408 if (error) 1409 return error; 1410 1411 if (val > 0xFF) 1412 return -EINVAL; 1413 1414 mutex_lock(&iqs269->lock); 1415 1416 ch_reg[iqs269->ch_num].rx_enable = val; 1417 iqs269->ati_current = false; 1418 1419 mutex_unlock(&iqs269->lock); 1420 1421 return count; 1422 } 1423 1424 static ssize_t ati_mode_show(struct device *dev, 1425 struct device_attribute *attr, char *buf) 1426 { 1427 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1428 unsigned int val; 1429 int error; 1430 1431 error = iqs269_ati_mode_get(iqs269, iqs269->ch_num, &val); 1432 if (error) 1433 return error; 1434 1435 return scnprintf(buf, PAGE_SIZE, "%u\n", val); 1436 } 1437 1438 static ssize_t ati_mode_store(struct device *dev, 1439 struct device_attribute *attr, const char *buf, 1440 size_t count) 1441 { 1442 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1443 unsigned int val; 1444 int error; 1445 1446 error = kstrtouint(buf, 10, &val); 1447 if (error) 1448 return error; 1449 1450 error = iqs269_ati_mode_set(iqs269, iqs269->ch_num, val); 1451 if (error) 1452 return error; 1453 1454 return count; 1455 } 1456 1457 static ssize_t ati_base_show(struct device *dev, 1458 struct device_attribute *attr, char *buf) 1459 { 1460 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1461 unsigned int val; 1462 int error; 1463 1464 error = iqs269_ati_base_get(iqs269, iqs269->ch_num, &val); 1465 if (error) 1466 return error; 1467 1468 return scnprintf(buf, PAGE_SIZE, "%u\n", val); 1469 } 1470 1471 static ssize_t ati_base_store(struct device *dev, 1472 struct device_attribute *attr, const char *buf, 1473 size_t count) 1474 { 1475 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1476 unsigned int val; 1477 int error; 1478 1479 error = kstrtouint(buf, 10, &val); 1480 if (error) 1481 return error; 1482 1483 error = iqs269_ati_base_set(iqs269, iqs269->ch_num, val); 1484 if (error) 1485 return error; 1486 1487 return count; 1488 } 1489 1490 static ssize_t ati_target_show(struct device *dev, 1491 struct device_attribute *attr, char *buf) 1492 { 1493 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1494 unsigned int val; 1495 int error; 1496 1497 error = iqs269_ati_target_get(iqs269, iqs269->ch_num, &val); 1498 if (error) 1499 return error; 1500 1501 return scnprintf(buf, PAGE_SIZE, "%u\n", val); 1502 } 1503 1504 static ssize_t ati_target_store(struct device *dev, 1505 struct device_attribute *attr, const char *buf, 1506 size_t count) 1507 { 1508 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1509 unsigned int val; 1510 int error; 1511 1512 error = kstrtouint(buf, 10, &val); 1513 if (error) 1514 return error; 1515 1516 error = iqs269_ati_target_set(iqs269, iqs269->ch_num, val); 1517 if (error) 1518 return error; 1519 1520 return count; 1521 } 1522 1523 static ssize_t ati_trigger_show(struct device *dev, 1524 struct device_attribute *attr, char *buf) 1525 { 1526 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1527 1528 return scnprintf(buf, PAGE_SIZE, "%u\n", 1529 iqs269->ati_current && 1530 completion_done(&iqs269->ati_done)); 1531 } 1532 1533 static ssize_t ati_trigger_store(struct device *dev, 1534 struct device_attribute *attr, const char *buf, 1535 size_t count) 1536 { 1537 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1538 struct i2c_client *client = iqs269->client; 1539 unsigned int val; 1540 int error; 1541 1542 error = kstrtouint(buf, 10, &val); 1543 if (error) 1544 return error; 1545 1546 if (!val) 1547 return count; 1548 1549 disable_irq(client->irq); 1550 reinit_completion(&iqs269->ati_done); 1551 1552 error = iqs269_dev_init(iqs269); 1553 1554 iqs269_irq_wait(); 1555 enable_irq(client->irq); 1556 1557 if (error) 1558 return error; 1559 1560 if (!wait_for_completion_timeout(&iqs269->ati_done, 1561 msecs_to_jiffies(2000))) 1562 return -ETIMEDOUT; 1563 1564 return count; 1565 } 1566 1567 static DEVICE_ATTR_RO(counts); 1568 static DEVICE_ATTR_RO(hall_bin); 1569 static DEVICE_ATTR_RW(hall_enable); 1570 static DEVICE_ATTR_RW(ch_number); 1571 static DEVICE_ATTR_RW(rx_enable); 1572 static DEVICE_ATTR_RW(ati_mode); 1573 static DEVICE_ATTR_RW(ati_base); 1574 static DEVICE_ATTR_RW(ati_target); 1575 static DEVICE_ATTR_RW(ati_trigger); 1576 1577 static struct attribute *iqs269_attrs[] = { 1578 &dev_attr_counts.attr, 1579 &dev_attr_hall_bin.attr, 1580 &dev_attr_hall_enable.attr, 1581 &dev_attr_ch_number.attr, 1582 &dev_attr_rx_enable.attr, 1583 &dev_attr_ati_mode.attr, 1584 &dev_attr_ati_base.attr, 1585 &dev_attr_ati_target.attr, 1586 &dev_attr_ati_trigger.attr, 1587 NULL, 1588 }; 1589 ATTRIBUTE_GROUPS(iqs269); 1590 1591 static const struct regmap_config iqs269_regmap_config = { 1592 .reg_bits = 8, 1593 .val_bits = 16, 1594 .max_register = IQS269_MAX_REG, 1595 }; 1596 1597 static int iqs269_probe(struct i2c_client *client) 1598 { 1599 struct iqs269_ver_info ver_info; 1600 struct iqs269_private *iqs269; 1601 int error; 1602 1603 iqs269 = devm_kzalloc(&client->dev, sizeof(*iqs269), GFP_KERNEL); 1604 if (!iqs269) 1605 return -ENOMEM; 1606 1607 i2c_set_clientdata(client, iqs269); 1608 iqs269->client = client; 1609 1610 iqs269->regmap = devm_regmap_init_i2c(client, &iqs269_regmap_config); 1611 if (IS_ERR(iqs269->regmap)) { 1612 error = PTR_ERR(iqs269->regmap); 1613 dev_err(&client->dev, "Failed to initialize register map: %d\n", 1614 error); 1615 return error; 1616 } 1617 1618 mutex_init(&iqs269->lock); 1619 init_completion(&iqs269->ati_done); 1620 1621 error = regmap_raw_read(iqs269->regmap, IQS269_VER_INFO, &ver_info, 1622 sizeof(ver_info)); 1623 if (error) 1624 return error; 1625 1626 if (ver_info.prod_num != IQS269_VER_INFO_PROD_NUM) { 1627 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n", 1628 ver_info.prod_num); 1629 return -EINVAL; 1630 } 1631 1632 error = iqs269_parse_prop(iqs269); 1633 if (error) 1634 return error; 1635 1636 error = iqs269_dev_init(iqs269); 1637 if (error) { 1638 dev_err(&client->dev, "Failed to initialize device: %d\n", 1639 error); 1640 return error; 1641 } 1642 1643 error = iqs269_input_init(iqs269); 1644 if (error) 1645 return error; 1646 1647 error = devm_request_threaded_irq(&client->dev, client->irq, 1648 NULL, iqs269_irq, IRQF_ONESHOT, 1649 client->name, iqs269); 1650 if (error) { 1651 dev_err(&client->dev, "Failed to request IRQ: %d\n", error); 1652 return error; 1653 } 1654 1655 if (!wait_for_completion_timeout(&iqs269->ati_done, 1656 msecs_to_jiffies(2000))) { 1657 dev_err(&client->dev, "Failed to complete ATI\n"); 1658 return -ETIMEDOUT; 1659 } 1660 1661 /* 1662 * The keypad may include one or more switches and is not registered 1663 * until ATI is complete and the initial switch states are read. 1664 */ 1665 error = input_register_device(iqs269->keypad); 1666 if (error) { 1667 dev_err(&client->dev, "Failed to register keypad: %d\n", error); 1668 return error; 1669 } 1670 1671 return error; 1672 } 1673 1674 static u16 iqs269_general_get(struct iqs269_private *iqs269) 1675 { 1676 u16 general = be16_to_cpu(iqs269->sys_reg.general); 1677 1678 general &= ~IQS269_SYS_SETTINGS_REDO_ATI; 1679 general &= ~IQS269_SYS_SETTINGS_ACK_RESET; 1680 1681 return general | IQS269_SYS_SETTINGS_DIS_AUTO; 1682 } 1683 1684 static int iqs269_suspend(struct device *dev) 1685 { 1686 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1687 struct i2c_client *client = iqs269->client; 1688 int error; 1689 u16 general = iqs269_general_get(iqs269); 1690 1691 if (!(general & IQS269_SYS_SETTINGS_PWR_MODE_MASK)) 1692 return 0; 1693 1694 disable_irq(client->irq); 1695 1696 error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS, general); 1697 1698 iqs269_irq_wait(); 1699 enable_irq(client->irq); 1700 1701 return error; 1702 } 1703 1704 static int iqs269_resume(struct device *dev) 1705 { 1706 struct iqs269_private *iqs269 = dev_get_drvdata(dev); 1707 struct i2c_client *client = iqs269->client; 1708 int error; 1709 u16 general = iqs269_general_get(iqs269); 1710 1711 if (!(general & IQS269_SYS_SETTINGS_PWR_MODE_MASK)) 1712 return 0; 1713 1714 disable_irq(client->irq); 1715 1716 error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS, 1717 general & ~IQS269_SYS_SETTINGS_PWR_MODE_MASK); 1718 if (!error) 1719 error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS, 1720 general & ~IQS269_SYS_SETTINGS_DIS_AUTO); 1721 1722 iqs269_irq_wait(); 1723 enable_irq(client->irq); 1724 1725 return error; 1726 } 1727 1728 static DEFINE_SIMPLE_DEV_PM_OPS(iqs269_pm, iqs269_suspend, iqs269_resume); 1729 1730 static const struct of_device_id iqs269_of_match[] = { 1731 { .compatible = "azoteq,iqs269a" }, 1732 { } 1733 }; 1734 MODULE_DEVICE_TABLE(of, iqs269_of_match); 1735 1736 static struct i2c_driver iqs269_i2c_driver = { 1737 .driver = { 1738 .name = "iqs269a", 1739 .dev_groups = iqs269_groups, 1740 .of_match_table = iqs269_of_match, 1741 .pm = pm_sleep_ptr(&iqs269_pm), 1742 }, 1743 .probe = iqs269_probe, 1744 }; 1745 module_i2c_driver(iqs269_i2c_driver); 1746 1747 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>"); 1748 MODULE_DESCRIPTION("Azoteq IQS269A Capacitive Touch Controller"); 1749 MODULE_LICENSE("GPL"); 1750