xref: /linux/drivers/macintosh/via-macii.c (revision 44f57d78)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device driver for the via ADB on (many) Mac II-class machines
4  *
5  * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
6  * Also derived from code Copyright (C) 1996 Paul Mackerras.
7  *
8  * With various updates provided over the years by Michael Schmitz,
9  * Guideo Koerber and others.
10  *
11  * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
12  *
13  * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
14  * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
15  *            - Big overhaul, should actually work now.
16  * 2006-12-31 Finn Thain - Another overhaul.
17  *
18  * Suggested reading:
19  *   Inside Macintosh, ch. 5 ADB Manager
20  *   Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
21  *   Rockwell R6522 VIA datasheet
22  *
23  * Apple's "ADB Analyzer" bus sniffer is invaluable:
24  *   ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
25  */
26 
27 #include <stdarg.h>
28 #include <linux/types.h>
29 #include <linux/errno.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/adb.h>
33 #include <linux/interrupt.h>
34 #include <linux/init.h>
35 #include <asm/macintosh.h>
36 #include <asm/macints.h>
37 #include <asm/mac_via.h>
38 
39 static volatile unsigned char *via;
40 
41 /* VIA registers - spaced 0x200 bytes apart */
42 #define RS		0x200		/* skip between registers */
43 #define B		0		/* B-side data */
44 #define A		RS		/* A-side data */
45 #define DIRB		(2*RS)		/* B-side direction (1=output) */
46 #define DIRA		(3*RS)		/* A-side direction (1=output) */
47 #define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */
48 #define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */
49 #define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */
50 #define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */
51 #define T2CL		(8*RS)		/* Timer 2 ctr/latch (low 8 bits) */
52 #define T2CH		(9*RS)		/* Timer 2 counter (high 8 bits) */
53 #define SR		(10*RS)		/* Shift register */
54 #define ACR		(11*RS)		/* Auxiliary control register */
55 #define PCR		(12*RS)		/* Peripheral control register */
56 #define IFR		(13*RS)		/* Interrupt flag register */
57 #define IER		(14*RS)		/* Interrupt enable register */
58 #define ANH		(15*RS)		/* A-side data, no handshake */
59 
60 /* Bits in B data register: all active low */
61 #define CTLR_IRQ	0x08		/* Controller rcv status (input) */
62 #define ST_MASK		0x30		/* mask for selecting ADB state bits */
63 
64 /* Bits in ACR */
65 #define SR_CTRL		0x1c		/* Shift register control bits */
66 #define SR_EXT		0x0c		/* Shift on external clock */
67 #define SR_OUT		0x10		/* Shift out if 1 */
68 
69 /* Bits in IFR and IER */
70 #define IER_SET		0x80		/* set bits in IER */
71 #define IER_CLR		0		/* clear bits in IER */
72 #define SR_INT		0x04		/* Shift register full/empty */
73 
74 /* ADB transaction states according to GMHW */
75 #define ST_CMD		0x00		/* ADB state: command byte */
76 #define ST_EVEN		0x10		/* ADB state: even data byte */
77 #define ST_ODD		0x20		/* ADB state: odd data byte */
78 #define ST_IDLE		0x30		/* ADB state: idle, nothing to send */
79 
80 static int macii_init_via(void);
81 static void macii_start(void);
82 static irqreturn_t macii_interrupt(int irq, void *arg);
83 static void macii_queue_poll(void);
84 
85 static int macii_probe(void);
86 static int macii_init(void);
87 static int macii_send_request(struct adb_request *req, int sync);
88 static int macii_write(struct adb_request *req);
89 static int macii_autopoll(int devs);
90 static void macii_poll(void);
91 static int macii_reset_bus(void);
92 
93 struct adb_driver via_macii_driver = {
94 	.name         = "Mac II",
95 	.probe        = macii_probe,
96 	.init         = macii_init,
97 	.send_request = macii_send_request,
98 	.autopoll     = macii_autopoll,
99 	.poll         = macii_poll,
100 	.reset_bus    = macii_reset_bus,
101 };
102 
103 static enum macii_state {
104 	idle,
105 	sending,
106 	reading,
107 	read_done,
108 } macii_state;
109 
110 static struct adb_request *current_req; /* first request struct in the queue */
111 static struct adb_request *last_req;     /* last request struct in the queue */
112 static unsigned char reply_buf[16];        /* storage for autopolled replies */
113 static unsigned char *reply_ptr;     /* next byte in reply_buf or req->reply */
114 static int reading_reply;        /* store reply in reply_buf else req->reply */
115 static int data_index;      /* index of the next byte to send from req->data */
116 static int reply_len; /* number of bytes received in reply_buf or req->reply */
117 static int status;          /* VIA's ADB status bits captured upon interrupt */
118 static int last_status;              /* status bits as at previous interrupt */
119 static int srq_asserted;     /* have to poll for the device that asserted it */
120 static int command_byte;         /* the most recent command byte transmitted */
121 static int autopoll_devs;      /* bits set are device addresses to be polled */
122 
123 /* Check for MacII style ADB */
124 static int macii_probe(void)
125 {
126 	if (macintosh_config->adb_type != MAC_ADB_II)
127 		return -ENODEV;
128 
129 	via = via1;
130 
131 	pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
132 	return 0;
133 }
134 
135 /* Initialize the driver */
136 int macii_init(void)
137 {
138 	unsigned long flags;
139 	int err;
140 
141 	local_irq_save(flags);
142 
143 	err = macii_init_via();
144 	if (err)
145 		goto out;
146 
147 	err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
148 			  macii_interrupt);
149 	if (err)
150 		goto out;
151 
152 	macii_state = idle;
153 out:
154 	local_irq_restore(flags);
155 	return err;
156 }
157 
158 /* initialize the hardware */
159 static int macii_init_via(void)
160 {
161 	unsigned char x;
162 
163 	/* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
164 	via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
165 
166 	/* Set up state: idle */
167 	via[B] |= ST_IDLE;
168 	last_status = via[B] & (ST_MASK | CTLR_IRQ);
169 
170 	/* Shift register on input */
171 	via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
172 
173 	/* Wipe any pending data and int */
174 	x = via[SR];
175 
176 	return 0;
177 }
178 
179 /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
180 static void macii_queue_poll(void)
181 {
182 	/* No point polling the active device as it will never assert SRQ, so
183 	 * poll the next device in the autopoll list. This could leave us
184 	 * stuck in a polling loop if an unprobed device is asserting SRQ.
185 	 * In theory, that could only happen if a device was plugged in after
186 	 * probing started. Unplugging it again will break the cycle.
187 	 * (Simply polling the next higher device often ends up polling almost
188 	 * every device (after wrapping around), which takes too long.)
189 	 */
190 	int device_mask;
191 	int next_device;
192 	static struct adb_request req;
193 
194 	if (!autopoll_devs)
195 		return;
196 
197 	device_mask = (1 << (((command_byte & 0xF0) >> 4) + 1)) - 1;
198 	if (autopoll_devs & ~device_mask)
199 		next_device = ffs(autopoll_devs & ~device_mask) - 1;
200 	else
201 		next_device = ffs(autopoll_devs) - 1;
202 
203 	adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_READREG(next_device, 0));
204 
205 	req.sent = 0;
206 	req.complete = 0;
207 	req.reply_len = 0;
208 	req.next = current_req;
209 
210 	if (current_req != NULL) {
211 		current_req = &req;
212 	} else {
213 		current_req = &req;
214 		last_req = &req;
215 	}
216 }
217 
218 /* Send an ADB request; if sync, poll out the reply 'till it's done */
219 static int macii_send_request(struct adb_request *req, int sync)
220 {
221 	int err;
222 
223 	err = macii_write(req);
224 	if (err)
225 		return err;
226 
227 	if (sync)
228 		while (!req->complete)
229 			macii_poll();
230 
231 	return 0;
232 }
233 
234 /* Send an ADB request (append to request queue) */
235 static int macii_write(struct adb_request *req)
236 {
237 	unsigned long flags;
238 
239 	if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
240 		req->complete = 1;
241 		return -EINVAL;
242 	}
243 
244 	req->next = NULL;
245 	req->sent = 0;
246 	req->complete = 0;
247 	req->reply_len = 0;
248 
249 	local_irq_save(flags);
250 
251 	if (current_req != NULL) {
252 		last_req->next = req;
253 		last_req = req;
254 	} else {
255 		current_req = req;
256 		last_req = req;
257 		if (macii_state == idle)
258 			macii_start();
259 	}
260 
261 	local_irq_restore(flags);
262 
263 	return 0;
264 }
265 
266 /* Start auto-polling */
267 static int macii_autopoll(int devs)
268 {
269 	static struct adb_request req;
270 	unsigned long flags;
271 	int err = 0;
272 
273 	/* bit 1 == device 1, and so on. */
274 	autopoll_devs = devs & 0xFFFE;
275 
276 	if (!autopoll_devs)
277 		return 0;
278 
279 	local_irq_save(flags);
280 
281 	if (current_req == NULL) {
282 		/* Send a Talk Reg 0. The controller will repeatedly transmit
283 		 * this as long as it is idle.
284 		 */
285 		adb_request(&req, NULL, ADBREQ_NOSEND, 1,
286 		            ADB_READREG(ffs(autopoll_devs) - 1, 0));
287 		err = macii_write(&req);
288 	}
289 
290 	local_irq_restore(flags);
291 	return err;
292 }
293 
294 static inline int need_autopoll(void)
295 {
296 	/* Was the last command Talk Reg 0
297 	 * and is the target on the autopoll list?
298 	 */
299 	if ((command_byte & 0x0F) == 0x0C &&
300 	    ((1 << ((command_byte & 0xF0) >> 4)) & autopoll_devs))
301 		return 0;
302 	return 1;
303 }
304 
305 /* Prod the chip without interrupts */
306 static void macii_poll(void)
307 {
308 	macii_interrupt(0, NULL);
309 }
310 
311 /* Reset the bus */
312 static int macii_reset_bus(void)
313 {
314 	static struct adb_request req;
315 
316 	/* Command = 0, Address = ignored */
317 	adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);
318 	macii_send_request(&req, 1);
319 
320 	/* Don't want any more requests during the Global Reset low time. */
321 	udelay(3000);
322 
323 	return 0;
324 }
325 
326 /* Start sending ADB packet */
327 static void macii_start(void)
328 {
329 	struct adb_request *req;
330 
331 	req = current_req;
332 
333 	/* Now send it. Be careful though, that first byte of the request
334 	 * is actually ADB_PACKET; the real data begins at index 1!
335 	 * And req->nbytes is the number of bytes of real data plus one.
336 	 */
337 
338 	/* store command byte */
339 	command_byte = req->data[1];
340 	/* Output mode */
341 	via[ACR] |= SR_OUT;
342 	/* Load data */
343 	via[SR] = req->data[1];
344 	/* set ADB state to 'command' */
345 	via[B] = (via[B] & ~ST_MASK) | ST_CMD;
346 
347 	macii_state = sending;
348 	data_index = 2;
349 }
350 
351 /*
352  * The notorious ADB interrupt handler - does all of the protocol handling.
353  * Relies on the ADB controller sending and receiving data, thereby
354  * generating shift register interrupts (SR_INT) for us. This means there has
355  * to be activity on the ADB bus. The chip will poll to achieve this.
356  *
357  * The basic ADB state machine was left unchanged from the original MacII code
358  * by Alan Cox, which was based on the CUDA driver for PowerMac.
359  * The syntax of the ADB status lines is totally different on MacII,
360  * though. MacII uses the states Command -> Even -> Odd -> Even ->...-> Idle
361  * for sending and Idle -> Even -> Odd -> Even ->...-> Idle for receiving.
362  * Start and end of a receive packet are signalled by asserting /IRQ on the
363  * interrupt line (/IRQ means the CTLR_IRQ bit in port B; not to be confused
364  * with the VIA shift register interrupt. /IRQ never actually interrupts the
365  * processor, it's just an ordinary input.)
366  */
367 static irqreturn_t macii_interrupt(int irq, void *arg)
368 {
369 	int x;
370 	struct adb_request *req;
371 	unsigned long flags;
372 
373 	local_irq_save(flags);
374 
375 	if (!arg) {
376 		/* Clear the SR IRQ flag when polling. */
377 		if (via[IFR] & SR_INT)
378 			via[IFR] = SR_INT;
379 		else {
380 			local_irq_restore(flags);
381 			return IRQ_NONE;
382 		}
383 	}
384 
385 	last_status = status;
386 	status = via[B] & (ST_MASK | CTLR_IRQ);
387 
388 	switch (macii_state) {
389 	case idle:
390 		if (reading_reply) {
391 			reply_ptr = current_req->reply;
392 		} else {
393 			WARN_ON(current_req);
394 			reply_ptr = reply_buf;
395 		}
396 
397 		x = via[SR];
398 
399 		if ((status & CTLR_IRQ) && (x == 0xFF)) {
400 			/* Bus timeout without SRQ sequence:
401 			 *     data is "FF" while CTLR_IRQ is "H"
402 			 */
403 			reply_len = 0;
404 			srq_asserted = 0;
405 			macii_state = read_done;
406 		} else {
407 			macii_state = reading;
408 			*reply_ptr = x;
409 			reply_len = 1;
410 		}
411 
412 		/* set ADB state = even for first data byte */
413 		via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
414 		break;
415 
416 	case sending:
417 		req = current_req;
418 		if (data_index >= req->nbytes) {
419 			req->sent = 1;
420 			macii_state = idle;
421 
422 			if (req->reply_expected) {
423 				reading_reply = 1;
424 			} else {
425 				req->complete = 1;
426 				current_req = req->next;
427 				if (req->done)
428 					(*req->done)(req);
429 
430 				if (current_req)
431 					macii_start();
432 				else if (need_autopoll())
433 					macii_autopoll(autopoll_devs);
434 			}
435 
436 			if (macii_state == idle) {
437 				/* reset to shift in */
438 				via[ACR] &= ~SR_OUT;
439 				x = via[SR];
440 				/* set ADB state idle - might get SRQ */
441 				via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
442 			}
443 		} else {
444 			via[SR] = req->data[data_index++];
445 
446 			if ((via[B] & ST_MASK) == ST_CMD) {
447 				/* just sent the command byte, set to EVEN */
448 				via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
449 			} else {
450 				/* invert state bits, toggle ODD/EVEN */
451 				via[B] ^= ST_MASK;
452 			}
453 		}
454 		break;
455 
456 	case reading:
457 		x = via[SR];
458 		WARN_ON((status & ST_MASK) == ST_CMD ||
459 			(status & ST_MASK) == ST_IDLE);
460 
461 		/* Bus timeout with SRQ sequence:
462 		 *     data is "XX FF"      while CTLR_IRQ is "L L"
463 		 * End of packet without SRQ sequence:
464 		 *     data is "XX...YY 00" while CTLR_IRQ is "L...H L"
465 		 * End of packet SRQ sequence:
466 		 *     data is "XX...YY 00" while CTLR_IRQ is "L...L L"
467 		 * (where XX is the first response byte and
468 		 * YY is the last byte of valid response data.)
469 		 */
470 
471 		srq_asserted = 0;
472 		if (!(status & CTLR_IRQ)) {
473 			if (x == 0xFF) {
474 				if (!(last_status & CTLR_IRQ)) {
475 					macii_state = read_done;
476 					reply_len = 0;
477 					srq_asserted = 1;
478 				}
479 			} else if (x == 0x00) {
480 				macii_state = read_done;
481 				if (!(last_status & CTLR_IRQ))
482 					srq_asserted = 1;
483 			}
484 		}
485 
486 		if (macii_state == reading &&
487 		    reply_len < ARRAY_SIZE(reply_buf)) {
488 			reply_ptr++;
489 			*reply_ptr = x;
490 			reply_len++;
491 		}
492 
493 		/* invert state bits, toggle ODD/EVEN */
494 		via[B] ^= ST_MASK;
495 		break;
496 
497 	case read_done:
498 		x = via[SR];
499 
500 		if (reading_reply) {
501 			reading_reply = 0;
502 			req = current_req;
503 			req->reply_len = reply_len;
504 			req->complete = 1;
505 			current_req = req->next;
506 			if (req->done)
507 				(*req->done)(req);
508 		} else if (reply_len && autopoll_devs)
509 			adb_input(reply_buf, reply_len, 0);
510 
511 		macii_state = idle;
512 
513 		/* SRQ seen before, initiate poll now */
514 		if (srq_asserted)
515 			macii_queue_poll();
516 
517 		if (current_req)
518 			macii_start();
519 		else if (need_autopoll())
520 			macii_autopoll(autopoll_devs);
521 
522 		if (macii_state == idle)
523 			via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
524 		break;
525 
526 	default:
527 		break;
528 	}
529 
530 	local_irq_restore(flags);
531 	return IRQ_HANDLED;
532 }
533