1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver 4 5 Copyright (C) 2013 Luis Alves <ljalvs@gmail.com> 6 July, 6th 2013 7 First release based on cx24116 driver by: 8 Steven Toth and Georg Acher, Darron Broad, Igor Liplianin 9 Cards currently supported: 10 TBS6980 - Dual DVBS/S2 PCIe card 11 TBS6981 - Dual DVBS/S2 PCIe card 12 13 */ 14 15 #include <linux/slab.h> 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/moduleparam.h> 19 #include <linux/init.h> 20 #include <linux/firmware.h> 21 22 #include "tuner-i2c.h" 23 #include <media/dvb_frontend.h> 24 #include "cx24117.h" 25 26 27 #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw" 28 #define CX24117_SEARCH_RANGE_KHZ 5000 29 30 /* known registers */ 31 #define CX24117_REG_COMMAND (0x00) /* command buffer */ 32 #define CX24117_REG_EXECUTE (0x1f) /* execute command */ 33 34 #define CX24117_REG_FREQ3_0 (0x34) /* frequency */ 35 #define CX24117_REG_FREQ2_0 (0x35) 36 #define CX24117_REG_FREQ1_0 (0x36) 37 #define CX24117_REG_STATE0 (0x39) 38 #define CX24117_REG_SSTATUS0 (0x3a) /* demod0 signal high / status */ 39 #define CX24117_REG_SIGNAL0 (0x3b) 40 #define CX24117_REG_FREQ5_0 (0x3c) /* +-freq */ 41 #define CX24117_REG_FREQ6_0 (0x3d) 42 #define CX24117_REG_SRATE2_0 (0x3e) /* +- 1000 * srate */ 43 #define CX24117_REG_SRATE1_0 (0x3f) 44 #define CX24117_REG_QUALITY2_0 (0x40) 45 #define CX24117_REG_QUALITY1_0 (0x41) 46 47 #define CX24117_REG_BER4_0 (0x47) 48 #define CX24117_REG_BER3_0 (0x48) 49 #define CX24117_REG_BER2_0 (0x49) 50 #define CX24117_REG_BER1_0 (0x4a) 51 #define CX24117_REG_DVBS_UCB2_0 (0x4b) 52 #define CX24117_REG_DVBS_UCB1_0 (0x4c) 53 #define CX24117_REG_DVBS2_UCB2_0 (0x50) 54 #define CX24117_REG_DVBS2_UCB1_0 (0x51) 55 #define CX24117_REG_QSTATUS0 (0x93) 56 #define CX24117_REG_CLKDIV0 (0xe6) 57 #define CX24117_REG_RATEDIV0 (0xf0) 58 59 60 #define CX24117_REG_FREQ3_1 (0x55) /* frequency */ 61 #define CX24117_REG_FREQ2_1 (0x56) 62 #define CX24117_REG_FREQ1_1 (0x57) 63 #define CX24117_REG_STATE1 (0x5a) 64 #define CX24117_REG_SSTATUS1 (0x5b) /* demod1 signal high / status */ 65 #define CX24117_REG_SIGNAL1 (0x5c) 66 #define CX24117_REG_FREQ5_1 (0x5d) /* +- freq */ 67 #define CX24117_REG_FREQ4_1 (0x5e) 68 #define CX24117_REG_SRATE2_1 (0x5f) 69 #define CX24117_REG_SRATE1_1 (0x60) 70 #define CX24117_REG_QUALITY2_1 (0x61) 71 #define CX24117_REG_QUALITY1_1 (0x62) 72 #define CX24117_REG_BER4_1 (0x68) 73 #define CX24117_REG_BER3_1 (0x69) 74 #define CX24117_REG_BER2_1 (0x6a) 75 #define CX24117_REG_BER1_1 (0x6b) 76 #define CX24117_REG_DVBS_UCB2_1 (0x6c) 77 #define CX24117_REG_DVBS_UCB1_1 (0x6d) 78 #define CX24117_REG_DVBS2_UCB2_1 (0x71) 79 #define CX24117_REG_DVBS2_UCB1_1 (0x72) 80 #define CX24117_REG_QSTATUS1 (0x9f) 81 #define CX24117_REG_CLKDIV1 (0xe7) 82 #define CX24117_REG_RATEDIV1 (0xf1) 83 84 85 /* arg buffer size */ 86 #define CX24117_ARGLEN (0x1e) 87 88 /* rolloff */ 89 #define CX24117_ROLLOFF_020 (0x00) 90 #define CX24117_ROLLOFF_025 (0x01) 91 #define CX24117_ROLLOFF_035 (0x02) 92 93 /* pilot bit */ 94 #define CX24117_PILOT_OFF (0x00) 95 #define CX24117_PILOT_ON (0x40) 96 #define CX24117_PILOT_AUTO (0x80) 97 98 /* signal status */ 99 #define CX24117_HAS_SIGNAL (0x01) 100 #define CX24117_HAS_CARRIER (0x02) 101 #define CX24117_HAS_VITERBI (0x04) 102 #define CX24117_HAS_SYNCLOCK (0x08) 103 #define CX24117_STATUS_MASK (0x0f) 104 #define CX24117_SIGNAL_MASK (0xc0) 105 106 107 /* arg offset for DiSEqC */ 108 #define CX24117_DISEQC_DEMOD (1) 109 #define CX24117_DISEQC_BURST (2) 110 #define CX24117_DISEQC_ARG3_2 (3) /* unknown value=2 */ 111 #define CX24117_DISEQC_ARG4_0 (4) /* unknown value=0 */ 112 #define CX24117_DISEQC_ARG5_0 (5) /* unknown value=0 */ 113 #define CX24117_DISEQC_MSGLEN (6) 114 #define CX24117_DISEQC_MSGOFS (7) 115 116 /* DiSEqC burst */ 117 #define CX24117_DISEQC_MINI_A (0) 118 #define CX24117_DISEQC_MINI_B (1) 119 120 121 #define CX24117_PNE (0) /* 0 disabled / 2 enabled */ 122 #define CX24117_OCC (1) /* 0 disabled / 1 enabled */ 123 124 125 enum cmds { 126 CMD_SET_VCOFREQ = 0x10, 127 CMD_TUNEREQUEST = 0x11, 128 CMD_GLOBAL_MPEGCFG = 0x13, 129 CMD_MPEGCFG = 0x14, 130 CMD_TUNERINIT = 0x15, 131 CMD_GET_SRATE = 0x18, 132 CMD_SET_GOLDCODE = 0x19, 133 CMD_GET_AGCACC = 0x1a, 134 CMD_DEMODINIT = 0x1b, 135 CMD_GETCTLACC = 0x1c, 136 137 CMD_LNBCONFIG = 0x20, 138 CMD_LNBSEND = 0x21, 139 CMD_LNBDCLEVEL = 0x22, 140 CMD_LNBPCBCONFIG = 0x23, 141 CMD_LNBSENDTONEBST = 0x24, 142 CMD_LNBUPDREPLY = 0x25, 143 144 CMD_SET_GPIOMODE = 0x30, 145 CMD_SET_GPIOEN = 0x31, 146 CMD_SET_GPIODIR = 0x32, 147 CMD_SET_GPIOOUT = 0x33, 148 CMD_ENABLERSCORR = 0x34, 149 CMD_FWVERSION = 0x35, 150 CMD_SET_SLEEPMODE = 0x36, 151 CMD_BERCTRL = 0x3c, 152 CMD_EVENTCTRL = 0x3d, 153 }; 154 155 static LIST_HEAD(hybrid_tuner_instance_list); 156 static DEFINE_MUTEX(cx24117_list_mutex); 157 158 /* The Demod/Tuner can't easily provide these, we cache them */ 159 struct cx24117_tuning { 160 u32 frequency; 161 u32 symbol_rate; 162 enum fe_spectral_inversion inversion; 163 enum fe_code_rate fec; 164 165 enum fe_delivery_system delsys; 166 enum fe_modulation modulation; 167 enum fe_pilot pilot; 168 enum fe_rolloff rolloff; 169 170 /* Demod values */ 171 u8 fec_val; 172 u8 fec_mask; 173 u8 inversion_val; 174 u8 pilot_val; 175 u8 rolloff_val; 176 }; 177 178 /* Basic commands that are sent to the firmware */ 179 struct cx24117_cmd { 180 u8 len; 181 u8 args[CX24117_ARGLEN]; 182 }; 183 184 /* common to both fe's */ 185 struct cx24117_priv { 186 u8 demod_address; 187 struct i2c_adapter *i2c; 188 u8 skip_fw_load; 189 struct mutex fe_lock; 190 191 /* Used for sharing this struct between demods */ 192 struct tuner_i2c_props i2c_props; 193 struct list_head hybrid_tuner_instance_list; 194 }; 195 196 /* one per each fe */ 197 struct cx24117_state { 198 struct cx24117_priv *priv; 199 struct dvb_frontend frontend; 200 201 struct cx24117_tuning dcur; 202 struct cx24117_tuning dnxt; 203 struct cx24117_cmd dsec_cmd; 204 205 int demod; 206 }; 207 208 /* modfec (modulation and FEC) lookup table */ 209 /* Check cx24116.c for a detailed description of each field */ 210 static struct cx24117_modfec { 211 enum fe_delivery_system delivery_system; 212 enum fe_modulation modulation; 213 enum fe_code_rate fec; 214 u8 mask; /* In DVBS mode this is used to autodetect */ 215 u8 val; /* Passed to the firmware to indicate mode selection */ 216 } cx24117_modfec_modes[] = { 217 /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ 218 219 /*mod fec mask val */ 220 { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, 221 { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ 222 { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ 223 { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ 224 { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ 225 { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ 226 { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ 227 { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ 228 { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ 229 { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, 230 /* NBC-QPSK */ 231 { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 }, 232 { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, 233 { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, 234 { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, 235 { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, 236 { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, 237 { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, 238 { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, 239 { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, 240 { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 }, 241 /* 8PSK */ 242 { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 }, 243 { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, 244 { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, 245 { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, 246 { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, 247 { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, 248 { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, 249 { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 }, 250 /* 251 * 'val' can be found in the FECSTATUS register when tuning. 252 * FECSTATUS will give the actual FEC in use if tuning was successful. 253 */ 254 }; 255 256 257 static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data) 258 { 259 u8 buf[] = { reg, data }; 260 struct i2c_msg msg = { .addr = state->priv->demod_address, 261 .flags = 0, .buf = buf, .len = 2 }; 262 int ret; 263 264 dev_dbg(&state->priv->i2c->dev, 265 "%s() demod%d i2c wr @0x%02x=0x%02x\n", 266 __func__, state->demod, reg, data); 267 268 ret = i2c_transfer(state->priv->i2c, &msg, 1); 269 if (ret < 0) { 270 dev_warn(&state->priv->i2c->dev, 271 "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n", 272 KBUILD_MODNAME, state->demod, ret, reg, data); 273 return ret; 274 } 275 return 0; 276 } 277 278 static int cx24117_writecmd(struct cx24117_state *state, 279 struct cx24117_cmd *cmd) 280 { 281 struct i2c_msg msg; 282 u8 buf[CX24117_ARGLEN+1]; 283 int ret; 284 285 dev_dbg(&state->priv->i2c->dev, 286 "%s() demod%d i2c wr cmd len=%d\n", 287 __func__, state->demod, cmd->len); 288 289 buf[0] = CX24117_REG_COMMAND; 290 memcpy(&buf[1], cmd->args, cmd->len); 291 292 msg.addr = state->priv->demod_address; 293 msg.flags = 0; 294 msg.len = cmd->len+1; 295 msg.buf = buf; 296 ret = i2c_transfer(state->priv->i2c, &msg, 1); 297 if (ret < 0) { 298 dev_warn(&state->priv->i2c->dev, 299 "%s: demod%d i2c wr cmd err(%i) len=%d\n", 300 KBUILD_MODNAME, state->demod, ret, cmd->len); 301 return ret; 302 } 303 return 0; 304 } 305 306 static int cx24117_readreg(struct cx24117_state *state, u8 reg) 307 { 308 int ret; 309 u8 recv = 0; 310 struct i2c_msg msg[] = { 311 { .addr = state->priv->demod_address, .flags = 0, 312 .buf = ®, .len = 1 }, 313 { .addr = state->priv->demod_address, .flags = I2C_M_RD, 314 .buf = &recv, .len = 1 } 315 }; 316 317 ret = i2c_transfer(state->priv->i2c, msg, 2); 318 if (ret < 0) { 319 dev_warn(&state->priv->i2c->dev, 320 "%s: demod%d i2c rd err(%d) @0x%x\n", 321 KBUILD_MODNAME, state->demod, ret, reg); 322 return ret; 323 } 324 325 dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n", 326 __func__, state->demod, reg, recv); 327 328 return recv; 329 } 330 331 static int cx24117_readregN(struct cx24117_state *state, 332 u8 reg, u8 *buf, int len) 333 { 334 int ret; 335 struct i2c_msg msg[] = { 336 { .addr = state->priv->demod_address, .flags = 0, 337 .buf = ®, .len = 1 }, 338 { .addr = state->priv->demod_address, .flags = I2C_M_RD, 339 .buf = buf, .len = len } 340 }; 341 342 ret = i2c_transfer(state->priv->i2c, msg, 2); 343 if (ret < 0) { 344 dev_warn(&state->priv->i2c->dev, 345 "%s: demod%d i2c rd err(%d) @0x%x\n", 346 KBUILD_MODNAME, state->demod, ret, reg); 347 return ret; 348 } 349 return 0; 350 } 351 352 static int cx24117_set_inversion(struct cx24117_state *state, 353 enum fe_spectral_inversion inversion) 354 { 355 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", 356 __func__, inversion, state->demod); 357 358 switch (inversion) { 359 case INVERSION_OFF: 360 state->dnxt.inversion_val = 0x00; 361 break; 362 case INVERSION_ON: 363 state->dnxt.inversion_val = 0x04; 364 break; 365 case INVERSION_AUTO: 366 state->dnxt.inversion_val = 0x0C; 367 break; 368 default: 369 return -EINVAL; 370 } 371 372 state->dnxt.inversion = inversion; 373 374 return 0; 375 } 376 377 static int cx24117_lookup_fecmod(struct cx24117_state *state, 378 enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f) 379 { 380 int i, ret = -EINVAL; 381 382 dev_dbg(&state->priv->i2c->dev, 383 "%s(demod(0x%02x,0x%02x) demod%d\n", 384 __func__, m, f, state->demod); 385 386 for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) { 387 if ((d == cx24117_modfec_modes[i].delivery_system) && 388 (m == cx24117_modfec_modes[i].modulation) && 389 (f == cx24117_modfec_modes[i].fec)) { 390 ret = i; 391 break; 392 } 393 } 394 395 return ret; 396 } 397 398 static int cx24117_set_fec(struct cx24117_state *state, 399 enum fe_delivery_system delsys, 400 enum fe_modulation mod, 401 enum fe_code_rate fec) 402 { 403 int ret; 404 405 dev_dbg(&state->priv->i2c->dev, 406 "%s(0x%02x,0x%02x) demod%d\n", 407 __func__, mod, fec, state->demod); 408 409 ret = cx24117_lookup_fecmod(state, delsys, mod, fec); 410 if (ret < 0) 411 return ret; 412 413 state->dnxt.fec = fec; 414 state->dnxt.fec_val = cx24117_modfec_modes[ret].val; 415 state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask; 416 dev_dbg(&state->priv->i2c->dev, 417 "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__, 418 state->demod, state->dnxt.fec_mask, state->dnxt.fec_val); 419 420 return 0; 421 } 422 423 static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate) 424 { 425 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", 426 __func__, rate, state->demod); 427 428 state->dnxt.symbol_rate = rate; 429 430 dev_dbg(&state->priv->i2c->dev, 431 "%s() demod%d symbol_rate = %d\n", 432 __func__, state->demod, rate); 433 434 return 0; 435 } 436 437 static int cx24117_load_firmware(struct dvb_frontend *fe, 438 const struct firmware *fw); 439 440 static int cx24117_firmware_ondemand(struct dvb_frontend *fe) 441 { 442 struct cx24117_state *state = fe->demodulator_priv; 443 const struct firmware *fw; 444 int ret = 0; 445 446 dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n", 447 __func__, state->demod, state->priv->skip_fw_load); 448 449 if (state->priv->skip_fw_load) 450 return 0; 451 452 /* check if firmware is already running */ 453 if (cx24117_readreg(state, 0xeb) != 0xa) { 454 /* Load firmware */ 455 /* request the firmware, this will block until loaded */ 456 dev_dbg(&state->priv->i2c->dev, 457 "%s: Waiting for firmware upload (%s)...\n", 458 __func__, CX24117_DEFAULT_FIRMWARE); 459 ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE, 460 state->priv->i2c->dev.parent); 461 dev_dbg(&state->priv->i2c->dev, 462 "%s: Waiting for firmware upload(2)...\n", __func__); 463 if (ret) { 464 dev_err(&state->priv->i2c->dev, 465 "%s: No firmware uploaded (timeout or file not found?)\n", 466 __func__); 467 return ret; 468 } 469 470 /* Make sure we don't recurse back through here 471 * during loading */ 472 state->priv->skip_fw_load = 1; 473 474 ret = cx24117_load_firmware(fe, fw); 475 if (ret) 476 dev_err(&state->priv->i2c->dev, 477 "%s: Writing firmware failed\n", __func__); 478 release_firmware(fw); 479 480 dev_info(&state->priv->i2c->dev, 481 "%s: Firmware upload %s\n", __func__, 482 ret == 0 ? "complete" : "failed"); 483 484 /* Ensure firmware is always loaded if required */ 485 state->priv->skip_fw_load = 0; 486 } 487 488 return ret; 489 } 490 491 /* Take a basic firmware command structure, format it 492 * and forward it for processing 493 */ 494 static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe, 495 struct cx24117_cmd *cmd) 496 { 497 struct cx24117_state *state = fe->demodulator_priv; 498 int i, ret; 499 500 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 501 __func__, state->demod); 502 503 /* Load the firmware if required */ 504 ret = cx24117_firmware_ondemand(fe); 505 if (ret != 0) 506 return ret; 507 508 /* Write the command */ 509 cx24117_writecmd(state, cmd); 510 511 /* Start execution and wait for cmd to terminate */ 512 cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01); 513 i = 0; 514 while (cx24117_readreg(state, CX24117_REG_EXECUTE)) { 515 msleep(20); 516 if (i++ > 40) { 517 /* Avoid looping forever if the firmware does 518 not respond */ 519 dev_warn(&state->priv->i2c->dev, 520 "%s() Firmware not responding\n", __func__); 521 return -EIO; 522 } 523 } 524 return 0; 525 } 526 527 static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd) 528 { 529 struct cx24117_state *state = fe->demodulator_priv; 530 int ret; 531 532 mutex_lock(&state->priv->fe_lock); 533 ret = cx24117_cmd_execute_nolock(fe, cmd); 534 mutex_unlock(&state->priv->fe_lock); 535 536 return ret; 537 } 538 539 static int cx24117_load_firmware(struct dvb_frontend *fe, 540 const struct firmware *fw) 541 { 542 struct cx24117_state *state = fe->demodulator_priv; 543 struct cx24117_cmd cmd; 544 int i, ret; 545 unsigned char vers[4]; 546 547 struct i2c_msg msg; 548 u8 *buf; 549 550 dev_dbg(&state->priv->i2c->dev, 551 "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n", 552 __func__, state->demod, fw->size, fw->data[0], fw->data[1], 553 fw->data[fw->size - 2], fw->data[fw->size - 1]); 554 555 cx24117_writereg(state, 0xea, 0x00); 556 cx24117_writereg(state, 0xea, 0x01); 557 cx24117_writereg(state, 0xea, 0x00); 558 559 cx24117_writereg(state, 0xce, 0x92); 560 561 cx24117_writereg(state, 0xfb, 0x00); 562 cx24117_writereg(state, 0xfc, 0x00); 563 564 cx24117_writereg(state, 0xc3, 0x04); 565 cx24117_writereg(state, 0xc4, 0x04); 566 567 cx24117_writereg(state, 0xce, 0x00); 568 cx24117_writereg(state, 0xcf, 0x00); 569 570 cx24117_writereg(state, 0xea, 0x00); 571 cx24117_writereg(state, 0xeb, 0x0c); 572 cx24117_writereg(state, 0xec, 0x06); 573 cx24117_writereg(state, 0xed, 0x05); 574 cx24117_writereg(state, 0xee, 0x03); 575 cx24117_writereg(state, 0xef, 0x05); 576 577 cx24117_writereg(state, 0xf3, 0x03); 578 cx24117_writereg(state, 0xf4, 0x44); 579 580 cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04); 581 cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02); 582 583 cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04); 584 cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02); 585 586 cx24117_writereg(state, 0xf2, 0x04); 587 cx24117_writereg(state, 0xe8, 0x02); 588 cx24117_writereg(state, 0xea, 0x01); 589 cx24117_writereg(state, 0xc8, 0x00); 590 cx24117_writereg(state, 0xc9, 0x00); 591 cx24117_writereg(state, 0xca, 0x00); 592 cx24117_writereg(state, 0xcb, 0x00); 593 cx24117_writereg(state, 0xcc, 0x00); 594 cx24117_writereg(state, 0xcd, 0x00); 595 cx24117_writereg(state, 0xe4, 0x03); 596 cx24117_writereg(state, 0xeb, 0x0a); 597 598 cx24117_writereg(state, 0xfb, 0x00); 599 cx24117_writereg(state, 0xe0, 0x76); 600 cx24117_writereg(state, 0xf7, 0x81); 601 cx24117_writereg(state, 0xf8, 0x00); 602 cx24117_writereg(state, 0xf9, 0x00); 603 604 buf = kmalloc(fw->size + 1, GFP_KERNEL); 605 if (buf == NULL) { 606 state->priv->skip_fw_load = 0; 607 return -ENOMEM; 608 } 609 610 /* fw upload reg */ 611 buf[0] = 0xfa; 612 memcpy(&buf[1], fw->data, fw->size); 613 614 /* prepare i2c message to send */ 615 msg.addr = state->priv->demod_address; 616 msg.flags = 0; 617 msg.len = fw->size + 1; 618 msg.buf = buf; 619 620 /* send fw */ 621 ret = i2c_transfer(state->priv->i2c, &msg, 1); 622 if (ret < 0) 623 return ret; 624 625 kfree(buf); 626 627 cx24117_writereg(state, 0xf7, 0x0c); 628 cx24117_writereg(state, 0xe0, 0x00); 629 630 /* Init demodulator */ 631 cmd.args[0] = CMD_DEMODINIT; 632 cmd.args[1] = 0x00; 633 cmd.args[2] = 0x01; 634 cmd.args[3] = 0x00; 635 cmd.len = 4; 636 ret = cx24117_cmd_execute_nolock(fe, &cmd); 637 if (ret != 0) 638 goto error; 639 640 /* Set VCO frequency */ 641 cmd.args[0] = CMD_SET_VCOFREQ; 642 cmd.args[1] = 0x06; 643 cmd.args[2] = 0x2b; 644 cmd.args[3] = 0xd8; 645 cmd.args[4] = 0xa5; 646 cmd.args[5] = 0xee; 647 cmd.args[6] = 0x03; 648 cmd.args[7] = 0x9d; 649 cmd.args[8] = 0xfc; 650 cmd.args[9] = 0x06; 651 cmd.args[10] = 0x02; 652 cmd.args[11] = 0x9d; 653 cmd.args[12] = 0xfc; 654 cmd.len = 13; 655 ret = cx24117_cmd_execute_nolock(fe, &cmd); 656 if (ret != 0) 657 goto error; 658 659 /* Tuner init */ 660 cmd.args[0] = CMD_TUNERINIT; 661 cmd.args[1] = 0x00; 662 cmd.args[2] = 0x01; 663 cmd.args[3] = 0x00; 664 cmd.args[4] = 0x00; 665 cmd.args[5] = 0x01; 666 cmd.args[6] = 0x01; 667 cmd.args[7] = 0x01; 668 cmd.args[8] = 0x00; 669 cmd.args[9] = 0x05; 670 cmd.args[10] = 0x02; 671 cmd.args[11] = 0x02; 672 cmd.args[12] = 0x00; 673 cmd.len = 13; 674 ret = cx24117_cmd_execute_nolock(fe, &cmd); 675 if (ret != 0) 676 goto error; 677 678 /* Global MPEG config */ 679 cmd.args[0] = CMD_GLOBAL_MPEGCFG; 680 cmd.args[1] = 0x00; 681 cmd.args[2] = 0x00; 682 cmd.args[3] = 0x00; 683 cmd.args[4] = 0x01; 684 cmd.args[5] = 0x00; 685 cmd.len = 6; 686 ret = cx24117_cmd_execute_nolock(fe, &cmd); 687 if (ret != 0) 688 goto error; 689 690 /* MPEG config for each demod */ 691 for (i = 0; i < 2; i++) { 692 cmd.args[0] = CMD_MPEGCFG; 693 cmd.args[1] = (u8) i; 694 cmd.args[2] = 0x00; 695 cmd.args[3] = 0x05; 696 cmd.args[4] = 0x00; 697 cmd.args[5] = 0x00; 698 cmd.args[6] = 0x55; 699 cmd.args[7] = 0x00; 700 cmd.len = 8; 701 ret = cx24117_cmd_execute_nolock(fe, &cmd); 702 if (ret != 0) 703 goto error; 704 } 705 706 cx24117_writereg(state, 0xce, 0xc0); 707 cx24117_writereg(state, 0xcf, 0x00); 708 cx24117_writereg(state, 0xe5, 0x04); 709 710 /* Get firmware version */ 711 cmd.args[0] = CMD_FWVERSION; 712 cmd.len = 2; 713 for (i = 0; i < 4; i++) { 714 cmd.args[1] = i; 715 ret = cx24117_cmd_execute_nolock(fe, &cmd); 716 if (ret != 0) 717 goto error; 718 vers[i] = cx24117_readreg(state, 0x33); 719 } 720 dev_info(&state->priv->i2c->dev, 721 "%s: FW version %i.%i.%i.%i\n", __func__, 722 vers[0], vers[1], vers[2], vers[3]); 723 return 0; 724 error: 725 state->priv->skip_fw_load = 0; 726 dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__); 727 return ret; 728 } 729 730 static int cx24117_read_status(struct dvb_frontend *fe, enum fe_status *status) 731 { 732 struct cx24117_state *state = fe->demodulator_priv; 733 int lock; 734 735 lock = cx24117_readreg(state, 736 (state->demod == 0) ? CX24117_REG_SSTATUS0 : 737 CX24117_REG_SSTATUS1) & 738 CX24117_STATUS_MASK; 739 740 dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n", 741 __func__, state->demod, lock); 742 743 *status = 0; 744 745 if (lock & CX24117_HAS_SIGNAL) 746 *status |= FE_HAS_SIGNAL; 747 if (lock & CX24117_HAS_CARRIER) 748 *status |= FE_HAS_CARRIER; 749 if (lock & CX24117_HAS_VITERBI) 750 *status |= FE_HAS_VITERBI; 751 if (lock & CX24117_HAS_SYNCLOCK) 752 *status |= FE_HAS_SYNC | FE_HAS_LOCK; 753 754 return 0; 755 } 756 757 static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber) 758 { 759 struct cx24117_state *state = fe->demodulator_priv; 760 int ret; 761 u8 buf[4]; 762 u8 base_reg = (state->demod == 0) ? 763 CX24117_REG_BER4_0 : 764 CX24117_REG_BER4_1; 765 766 ret = cx24117_readregN(state, base_reg, buf, 4); 767 if (ret != 0) 768 return ret; 769 770 *ber = (buf[0] << 24) | (buf[1] << 16) | 771 (buf[1] << 8) | buf[0]; 772 773 dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n", 774 __func__, state->demod, *ber); 775 776 return 0; 777 } 778 779 static int cx24117_read_signal_strength(struct dvb_frontend *fe, 780 u16 *signal_strength) 781 { 782 struct cx24117_state *state = fe->demodulator_priv; 783 struct cx24117_cmd cmd; 784 int ret; 785 u16 sig_reading; 786 u8 buf[2]; 787 u8 reg = (state->demod == 0) ? 788 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1; 789 790 /* Read AGC accumulator register */ 791 cmd.args[0] = CMD_GET_AGCACC; 792 cmd.args[1] = (u8) state->demod; 793 cmd.len = 2; 794 ret = cx24117_cmd_execute(fe, &cmd); 795 if (ret != 0) 796 return ret; 797 798 ret = cx24117_readregN(state, reg, buf, 2); 799 if (ret != 0) 800 return ret; 801 sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1]; 802 803 *signal_strength = -100 * sig_reading + 94324; 804 805 dev_dbg(&state->priv->i2c->dev, 806 "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n", 807 __func__, state->demod, sig_reading, *signal_strength); 808 809 return 0; 810 } 811 812 static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr) 813 { 814 struct cx24117_state *state = fe->demodulator_priv; 815 int ret; 816 u8 buf[2]; 817 u8 reg = (state->demod == 0) ? 818 CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1; 819 820 ret = cx24117_readregN(state, reg, buf, 2); 821 if (ret != 0) 822 return ret; 823 824 *snr = (buf[0] << 8) | buf[1]; 825 826 dev_dbg(&state->priv->i2c->dev, 827 "%s() demod%d snr = 0x%04x\n", 828 __func__, state->demod, *snr); 829 830 return ret; 831 } 832 833 static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 834 { 835 struct cx24117_state *state = fe->demodulator_priv; 836 enum fe_delivery_system delsys = fe->dtv_property_cache.delivery_system; 837 int ret; 838 u8 buf[2]; 839 u8 reg = (state->demod == 0) ? 840 CX24117_REG_DVBS_UCB2_0 : 841 CX24117_REG_DVBS_UCB2_1; 842 843 switch (delsys) { 844 case SYS_DVBS: 845 break; 846 case SYS_DVBS2: 847 reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0); 848 break; 849 default: 850 return -EINVAL; 851 } 852 853 ret = cx24117_readregN(state, reg, buf, 2); 854 if (ret != 0) 855 return ret; 856 *ucblocks = (buf[0] << 8) | buf[1]; 857 858 dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n", 859 __func__, state->demod, *ucblocks); 860 861 return 0; 862 } 863 864 /* Overwrite the current tuning params, we are about to tune */ 865 static void cx24117_clone_params(struct dvb_frontend *fe) 866 { 867 struct cx24117_state *state = fe->demodulator_priv; 868 state->dcur = state->dnxt; 869 } 870 871 /* Wait for LNB */ 872 static int cx24117_wait_for_lnb(struct dvb_frontend *fe) 873 { 874 struct cx24117_state *state = fe->demodulator_priv; 875 int i; 876 u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 : 877 CX24117_REG_QSTATUS1; 878 879 dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n", 880 __func__, state->demod, cx24117_readreg(state, reg)); 881 882 /* Wait for up to 300 ms */ 883 for (i = 0; i < 10; i++) { 884 val = cx24117_readreg(state, reg) & 0x01; 885 if (val != 0) 886 return 0; 887 msleep(30); 888 } 889 890 dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n", 891 KBUILD_MODNAME, state->demod); 892 893 return -ETIMEDOUT; /* -EBUSY ? */ 894 } 895 896 static int cx24117_set_voltage(struct dvb_frontend *fe, 897 enum fe_sec_voltage voltage) 898 { 899 struct cx24117_state *state = fe->demodulator_priv; 900 struct cx24117_cmd cmd; 901 int ret; 902 u8 reg = (state->demod == 0) ? 0x10 : 0x20; 903 904 dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n", 905 __func__, state->demod, 906 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : 907 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : 908 "SEC_VOLTAGE_OFF"); 909 910 /* Prepare a set GPIO logic level CMD */ 911 cmd.args[0] = CMD_SET_GPIOOUT; 912 cmd.args[2] = reg; /* mask */ 913 cmd.len = 3; 914 915 if ((voltage == SEC_VOLTAGE_13) || 916 (voltage == SEC_VOLTAGE_18)) { 917 /* power on LNB */ 918 cmd.args[1] = reg; 919 ret = cx24117_cmd_execute(fe, &cmd); 920 if (ret != 0) 921 return ret; 922 923 ret = cx24117_wait_for_lnb(fe); 924 if (ret != 0) 925 return ret; 926 927 /* Wait for voltage/min repeat delay */ 928 msleep(100); 929 930 /* Set 13V/18V select pin */ 931 cmd.args[0] = CMD_LNBDCLEVEL; 932 cmd.args[1] = state->demod ? 0 : 1; 933 cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); 934 cmd.len = 3; 935 ret = cx24117_cmd_execute(fe, &cmd); 936 937 /* Min delay time before DiSEqC send */ 938 msleep(20); 939 } else { 940 /* power off LNB */ 941 cmd.args[1] = 0x00; 942 ret = cx24117_cmd_execute(fe, &cmd); 943 } 944 945 return ret; 946 } 947 948 static int cx24117_set_tone(struct dvb_frontend *fe, 949 enum fe_sec_tone_mode tone) 950 { 951 struct cx24117_state *state = fe->demodulator_priv; 952 struct cx24117_cmd cmd; 953 int ret; 954 955 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", 956 __func__, state->demod, tone); 957 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { 958 dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n", 959 KBUILD_MODNAME, state->demod, tone); 960 return -EINVAL; 961 } 962 963 /* Wait for LNB ready */ 964 ret = cx24117_wait_for_lnb(fe); 965 if (ret != 0) 966 return ret; 967 968 /* Min delay time after DiSEqC send */ 969 msleep(20); 970 971 /* Set the tone */ 972 cmd.args[0] = CMD_LNBPCBCONFIG; 973 cmd.args[1] = (state->demod ? 0 : 1); 974 cmd.args[2] = 0x00; 975 cmd.args[3] = 0x00; 976 cmd.len = 5; 977 switch (tone) { 978 case SEC_TONE_ON: 979 cmd.args[4] = 0x01; 980 break; 981 case SEC_TONE_OFF: 982 cmd.args[4] = 0x00; 983 break; 984 } 985 986 msleep(20); 987 988 return cx24117_cmd_execute(fe, &cmd); 989 } 990 991 /* Initialise DiSEqC */ 992 static int cx24117_diseqc_init(struct dvb_frontend *fe) 993 { 994 struct cx24117_state *state = fe->demodulator_priv; 995 996 /* Prepare a DiSEqC command */ 997 state->dsec_cmd.args[0] = CMD_LNBSEND; 998 999 /* demod */ 1000 state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1; 1001 1002 /* DiSEqC burst */ 1003 state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A; 1004 1005 /* Unknown */ 1006 state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02; 1007 state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00; 1008 1009 /* Continuation flag? */ 1010 state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00; 1011 1012 /* DiSEqC message length */ 1013 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00; 1014 1015 /* Command length */ 1016 state->dsec_cmd.len = 7; 1017 1018 return 0; 1019 } 1020 1021 /* Send DiSEqC message */ 1022 static int cx24117_send_diseqc_msg(struct dvb_frontend *fe, 1023 struct dvb_diseqc_master_cmd *d) 1024 { 1025 struct cx24117_state *state = fe->demodulator_priv; 1026 int i, ret; 1027 1028 /* Dump DiSEqC message */ 1029 dev_dbg(&state->priv->i2c->dev, "%s: demod %d (", 1030 __func__, state->demod); 1031 for (i = 0; i < d->msg_len; i++) 1032 dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]); 1033 dev_dbg(&state->priv->i2c->dev, ")\n"); 1034 1035 /* Validate length */ 1036 if (d->msg_len > sizeof(d->msg)) 1037 return -EINVAL; 1038 1039 /* DiSEqC message */ 1040 for (i = 0; i < d->msg_len; i++) 1041 state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i]; 1042 1043 /* DiSEqC message length */ 1044 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len; 1045 1046 /* Command length */ 1047 state->dsec_cmd.len = CX24117_DISEQC_MSGOFS + 1048 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN]; 1049 1050 /* 1051 * Message is sent with derived else cached burst 1052 * 1053 * WRITE PORT GROUP COMMAND 38 1054 * 1055 * 0/A/A: E0 10 38 F0..F3 1056 * 1/B/B: E0 10 38 F4..F7 1057 * 2/C/A: E0 10 38 F8..FB 1058 * 3/D/B: E0 10 38 FC..FF 1059 * 1060 * databyte[3]= 8421:8421 1061 * ABCD:WXYZ 1062 * CLR :SET 1063 * 1064 * WX= PORT SELECT 0..3 (X=TONEBURST) 1065 * Y = VOLTAGE (0=13V, 1=18V) 1066 * Z = BAND (0=LOW, 1=HIGH(22K)) 1067 */ 1068 if (d->msg_len >= 4 && d->msg[2] == 0x38) 1069 state->dsec_cmd.args[CX24117_DISEQC_BURST] = 1070 ((d->msg[3] & 4) >> 2); 1071 1072 dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n", 1073 __func__, state->demod, 1074 state->dsec_cmd.args[CX24117_DISEQC_BURST]); 1075 1076 /* Wait for LNB ready */ 1077 ret = cx24117_wait_for_lnb(fe); 1078 if (ret != 0) 1079 return ret; 1080 1081 /* Wait for voltage/min repeat delay */ 1082 msleep(100); 1083 1084 /* Command */ 1085 ret = cx24117_cmd_execute(fe, &state->dsec_cmd); 1086 if (ret != 0) 1087 return ret; 1088 /* 1089 * Wait for send 1090 * 1091 * Eutelsat spec: 1092 * >15ms delay + (XXX determine if FW does this, see set_tone) 1093 * 13.5ms per byte + 1094 * >15ms delay + 1095 * 12.5ms burst + 1096 * >15ms delay (XXX determine if FW does this, see set_tone) 1097 */ 1098 msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60); 1099 1100 return 0; 1101 } 1102 1103 /* Send DiSEqC burst */ 1104 static int cx24117_diseqc_send_burst(struct dvb_frontend *fe, 1105 enum fe_sec_mini_cmd burst) 1106 { 1107 struct cx24117_state *state = fe->demodulator_priv; 1108 1109 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n", 1110 __func__, burst, state->demod); 1111 1112 /* DiSEqC burst */ 1113 if (burst == SEC_MINI_A) 1114 state->dsec_cmd.args[CX24117_DISEQC_BURST] = 1115 CX24117_DISEQC_MINI_A; 1116 else if (burst == SEC_MINI_B) 1117 state->dsec_cmd.args[CX24117_DISEQC_BURST] = 1118 CX24117_DISEQC_MINI_B; 1119 else 1120 return -EINVAL; 1121 1122 return 0; 1123 } 1124 1125 static int cx24117_get_priv(struct cx24117_priv **priv, 1126 struct i2c_adapter *i2c, u8 client_address) 1127 { 1128 int ret; 1129 1130 mutex_lock(&cx24117_list_mutex); 1131 ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv), 1132 hybrid_tuner_instance_list, i2c, client_address, "cx24117"); 1133 mutex_unlock(&cx24117_list_mutex); 1134 1135 return ret; 1136 } 1137 1138 static void cx24117_release_priv(struct cx24117_priv *priv) 1139 { 1140 mutex_lock(&cx24117_list_mutex); 1141 if (priv != NULL) 1142 hybrid_tuner_release_state(priv); 1143 mutex_unlock(&cx24117_list_mutex); 1144 } 1145 1146 static void cx24117_release(struct dvb_frontend *fe) 1147 { 1148 struct cx24117_state *state = fe->demodulator_priv; 1149 dev_dbg(&state->priv->i2c->dev, "%s demod%d\n", 1150 __func__, state->demod); 1151 cx24117_release_priv(state->priv); 1152 kfree(state); 1153 } 1154 1155 static const struct dvb_frontend_ops cx24117_ops; 1156 1157 struct dvb_frontend *cx24117_attach(const struct cx24117_config *config, 1158 struct i2c_adapter *i2c) 1159 { 1160 struct cx24117_state *state = NULL; 1161 struct cx24117_priv *priv = NULL; 1162 int demod = 0; 1163 1164 /* get the common data struct for both demods */ 1165 demod = cx24117_get_priv(&priv, i2c, config->demod_address); 1166 1167 switch (demod) { 1168 case 0: 1169 dev_err(&i2c->dev, 1170 "%s: Error attaching frontend %d\n", 1171 KBUILD_MODNAME, demod); 1172 goto error1; 1173 break; 1174 case 1: 1175 /* new priv instance */ 1176 priv->i2c = i2c; 1177 priv->demod_address = config->demod_address; 1178 mutex_init(&priv->fe_lock); 1179 break; 1180 default: 1181 /* existing priv instance */ 1182 break; 1183 } 1184 1185 /* allocate memory for the internal state */ 1186 state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL); 1187 if (state == NULL) 1188 goto error2; 1189 1190 state->demod = demod - 1; 1191 state->priv = priv; 1192 1193 dev_info(&state->priv->i2c->dev, 1194 "%s: Attaching frontend %d\n", 1195 KBUILD_MODNAME, state->demod); 1196 1197 /* create dvb_frontend */ 1198 memcpy(&state->frontend.ops, &cx24117_ops, 1199 sizeof(struct dvb_frontend_ops)); 1200 state->frontend.demodulator_priv = state; 1201 return &state->frontend; 1202 1203 error2: 1204 cx24117_release_priv(priv); 1205 error1: 1206 return NULL; 1207 } 1208 EXPORT_SYMBOL_GPL(cx24117_attach); 1209 1210 /* 1211 * Initialise or wake up device 1212 * 1213 * Power config will reset and load initial firmware if required 1214 */ 1215 static int cx24117_initfe(struct dvb_frontend *fe) 1216 { 1217 struct cx24117_state *state = fe->demodulator_priv; 1218 struct cx24117_cmd cmd; 1219 int ret; 1220 1221 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1222 __func__, state->demod); 1223 1224 mutex_lock(&state->priv->fe_lock); 1225 1226 /* Set sleep mode off */ 1227 cmd.args[0] = CMD_SET_SLEEPMODE; 1228 cmd.args[1] = (state->demod ? 1 : 0); 1229 cmd.args[2] = 0; 1230 cmd.len = 3; 1231 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1232 if (ret != 0) 1233 goto exit; 1234 1235 ret = cx24117_diseqc_init(fe); 1236 if (ret != 0) 1237 goto exit; 1238 1239 /* Set BER control */ 1240 cmd.args[0] = CMD_BERCTRL; 1241 cmd.args[1] = (state->demod ? 1 : 0); 1242 cmd.args[2] = 0x10; 1243 cmd.args[3] = 0x10; 1244 cmd.len = 4; 1245 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1246 if (ret != 0) 1247 goto exit; 1248 1249 /* Set RS correction (enable/disable) */ 1250 cmd.args[0] = CMD_ENABLERSCORR; 1251 cmd.args[1] = (state->demod ? 1 : 0); 1252 cmd.args[2] = CX24117_OCC; 1253 cmd.len = 3; 1254 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1255 if (ret != 0) 1256 goto exit; 1257 1258 /* Set GPIO direction */ 1259 /* Set as output - controls LNB power on/off */ 1260 cmd.args[0] = CMD_SET_GPIODIR; 1261 cmd.args[1] = 0x30; 1262 cmd.args[2] = 0x30; 1263 cmd.len = 3; 1264 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1265 1266 exit: 1267 mutex_unlock(&state->priv->fe_lock); 1268 1269 return ret; 1270 } 1271 1272 /* 1273 * Put device to sleep 1274 */ 1275 static int cx24117_sleep(struct dvb_frontend *fe) 1276 { 1277 struct cx24117_state *state = fe->demodulator_priv; 1278 struct cx24117_cmd cmd; 1279 1280 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1281 __func__, state->demod); 1282 1283 /* Set sleep mode on */ 1284 cmd.args[0] = CMD_SET_SLEEPMODE; 1285 cmd.args[1] = (state->demod ? 1 : 0); 1286 cmd.args[2] = 1; 1287 cmd.len = 3; 1288 return cx24117_cmd_execute(fe, &cmd); 1289 } 1290 1291 /* dvb-core told us to tune, the tv property cache will be complete, 1292 * it's safe for is to pull values and use them for tuning purposes. 1293 */ 1294 static int cx24117_set_frontend(struct dvb_frontend *fe) 1295 { 1296 struct cx24117_state *state = fe->demodulator_priv; 1297 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1298 struct cx24117_cmd cmd; 1299 enum fe_status tunerstat; 1300 int i, status, ret, retune = 1; 1301 u8 reg_clkdiv, reg_ratediv; 1302 1303 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1304 __func__, state->demod); 1305 1306 switch (c->delivery_system) { 1307 case SYS_DVBS: 1308 dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n", 1309 __func__, state->demod); 1310 1311 /* Only QPSK is supported for DVB-S */ 1312 if (c->modulation != QPSK) { 1313 dev_dbg(&state->priv->i2c->dev, 1314 "%s() demod%d unsupported modulation (%d)\n", 1315 __func__, state->demod, c->modulation); 1316 return -EINVAL; 1317 } 1318 1319 /* Pilot doesn't exist in DVB-S, turn bit off */ 1320 state->dnxt.pilot_val = CX24117_PILOT_OFF; 1321 1322 /* DVB-S only supports 0.35 */ 1323 state->dnxt.rolloff_val = CX24117_ROLLOFF_035; 1324 break; 1325 1326 case SYS_DVBS2: 1327 dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n", 1328 __func__, state->demod); 1329 1330 /* 1331 * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, 1332 * but not hardware auto detection 1333 */ 1334 if (c->modulation != PSK_8 && c->modulation != QPSK) { 1335 dev_dbg(&state->priv->i2c->dev, 1336 "%s() demod%d unsupported modulation (%d)\n", 1337 __func__, state->demod, c->modulation); 1338 return -EOPNOTSUPP; 1339 } 1340 1341 switch (c->pilot) { 1342 case PILOT_AUTO: 1343 state->dnxt.pilot_val = CX24117_PILOT_AUTO; 1344 break; 1345 case PILOT_OFF: 1346 state->dnxt.pilot_val = CX24117_PILOT_OFF; 1347 break; 1348 case PILOT_ON: 1349 state->dnxt.pilot_val = CX24117_PILOT_ON; 1350 break; 1351 default: 1352 dev_dbg(&state->priv->i2c->dev, 1353 "%s() demod%d unsupported pilot mode (%d)\n", 1354 __func__, state->demod, c->pilot); 1355 return -EOPNOTSUPP; 1356 } 1357 1358 switch (c->rolloff) { 1359 case ROLLOFF_20: 1360 state->dnxt.rolloff_val = CX24117_ROLLOFF_020; 1361 break; 1362 case ROLLOFF_25: 1363 state->dnxt.rolloff_val = CX24117_ROLLOFF_025; 1364 break; 1365 case ROLLOFF_35: 1366 state->dnxt.rolloff_val = CX24117_ROLLOFF_035; 1367 break; 1368 case ROLLOFF_AUTO: 1369 state->dnxt.rolloff_val = CX24117_ROLLOFF_035; 1370 /* soft-auto rolloff */ 1371 retune = 3; 1372 break; 1373 default: 1374 dev_warn(&state->priv->i2c->dev, 1375 "%s: demod%d unsupported rolloff (%d)\n", 1376 KBUILD_MODNAME, state->demod, c->rolloff); 1377 return -EOPNOTSUPP; 1378 } 1379 break; 1380 1381 default: 1382 dev_warn(&state->priv->i2c->dev, 1383 "%s: demod %d unsupported delivery system (%d)\n", 1384 KBUILD_MODNAME, state->demod, c->delivery_system); 1385 return -EINVAL; 1386 } 1387 1388 state->dnxt.delsys = c->delivery_system; 1389 state->dnxt.modulation = c->modulation; 1390 state->dnxt.frequency = c->frequency; 1391 state->dnxt.pilot = c->pilot; 1392 state->dnxt.rolloff = c->rolloff; 1393 1394 ret = cx24117_set_inversion(state, c->inversion); 1395 if (ret != 0) 1396 return ret; 1397 1398 ret = cx24117_set_fec(state, 1399 c->delivery_system, c->modulation, c->fec_inner); 1400 if (ret != 0) 1401 return ret; 1402 1403 ret = cx24117_set_symbolrate(state, c->symbol_rate); 1404 if (ret != 0) 1405 return ret; 1406 1407 /* discard the 'current' tuning parameters and prepare to tune */ 1408 cx24117_clone_params(fe); 1409 1410 dev_dbg(&state->priv->i2c->dev, 1411 "%s: delsys = %d\n", __func__, state->dcur.delsys); 1412 dev_dbg(&state->priv->i2c->dev, 1413 "%s: modulation = %d\n", __func__, state->dcur.modulation); 1414 dev_dbg(&state->priv->i2c->dev, 1415 "%s: frequency = %d\n", __func__, state->dcur.frequency); 1416 dev_dbg(&state->priv->i2c->dev, 1417 "%s: pilot = %d (val = 0x%02x)\n", __func__, 1418 state->dcur.pilot, state->dcur.pilot_val); 1419 dev_dbg(&state->priv->i2c->dev, 1420 "%s: retune = %d\n", __func__, retune); 1421 dev_dbg(&state->priv->i2c->dev, 1422 "%s: rolloff = %d (val = 0x%02x)\n", __func__, 1423 state->dcur.rolloff, state->dcur.rolloff_val); 1424 dev_dbg(&state->priv->i2c->dev, 1425 "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); 1426 dev_dbg(&state->priv->i2c->dev, 1427 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, 1428 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); 1429 dev_dbg(&state->priv->i2c->dev, 1430 "%s: Inversion = %d (val = 0x%02x)\n", __func__, 1431 state->dcur.inversion, state->dcur.inversion_val); 1432 1433 /* Prepare a tune request */ 1434 cmd.args[0] = CMD_TUNEREQUEST; 1435 1436 /* demod */ 1437 cmd.args[1] = state->demod; 1438 1439 /* Frequency */ 1440 cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16; 1441 cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8; 1442 cmd.args[4] = (state->dcur.frequency & 0x0000ff); 1443 1444 /* Symbol Rate */ 1445 cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; 1446 cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff); 1447 1448 /* Automatic Inversion */ 1449 cmd.args[7] = state->dcur.inversion_val; 1450 1451 /* Modulation / FEC / Pilot */ 1452 cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val; 1453 1454 cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8; 1455 cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff; 1456 1457 cmd.args[11] = state->dcur.rolloff_val; 1458 cmd.args[12] = state->dcur.fec_mask; 1459 1460 if (state->dcur.symbol_rate > 30000000) { 1461 reg_ratediv = 0x04; 1462 reg_clkdiv = 0x02; 1463 } else if (state->dcur.symbol_rate > 10000000) { 1464 reg_ratediv = 0x06; 1465 reg_clkdiv = 0x03; 1466 } else { 1467 reg_ratediv = 0x0a; 1468 reg_clkdiv = 0x05; 1469 } 1470 1471 cmd.args[13] = reg_ratediv; 1472 cmd.args[14] = reg_clkdiv; 1473 1474 cx24117_writereg(state, (state->demod == 0) ? 1475 CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv); 1476 cx24117_writereg(state, (state->demod == 0) ? 1477 CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv); 1478 1479 cmd.args[15] = CX24117_PNE; 1480 cmd.len = 16; 1481 1482 do { 1483 /* Reset status register */ 1484 status = cx24117_readreg(state, (state->demod == 0) ? 1485 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) & 1486 CX24117_SIGNAL_MASK; 1487 1488 dev_dbg(&state->priv->i2c->dev, 1489 "%s() demod%d status_setfe = %02x\n", 1490 __func__, state->demod, status); 1491 1492 cx24117_writereg(state, (state->demod == 0) ? 1493 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status); 1494 1495 /* Tune */ 1496 ret = cx24117_cmd_execute(fe, &cmd); 1497 if (ret != 0) 1498 break; 1499 1500 /* 1501 * Wait for up to 500 ms before retrying 1502 * 1503 * If we are able to tune then generally it occurs within 100ms. 1504 * If it takes longer, try a different rolloff setting. 1505 */ 1506 for (i = 0; i < 50; i++) { 1507 cx24117_read_status(fe, &tunerstat); 1508 status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); 1509 if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { 1510 dev_dbg(&state->priv->i2c->dev, 1511 "%s() demod%d tuned\n", 1512 __func__, state->demod); 1513 return 0; 1514 } 1515 msleep(20); 1516 } 1517 1518 dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n", 1519 __func__, state->demod); 1520 1521 /* try next rolloff value */ 1522 if (state->dcur.rolloff == 3) 1523 cmd.args[11]--; 1524 1525 } while (--retune); 1526 return -EINVAL; 1527 } 1528 1529 static int cx24117_tune(struct dvb_frontend *fe, bool re_tune, 1530 unsigned int mode_flags, unsigned int *delay, enum fe_status *status) 1531 { 1532 struct cx24117_state *state = fe->demodulator_priv; 1533 1534 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1535 __func__, state->demod); 1536 1537 *delay = HZ / 5; 1538 if (re_tune) { 1539 int ret = cx24117_set_frontend(fe); 1540 if (ret) 1541 return ret; 1542 } 1543 return cx24117_read_status(fe, status); 1544 } 1545 1546 static enum dvbfe_algo cx24117_get_algo(struct dvb_frontend *fe) 1547 { 1548 return DVBFE_ALGO_HW; 1549 } 1550 1551 static int cx24117_get_frontend(struct dvb_frontend *fe, 1552 struct dtv_frontend_properties *c) 1553 { 1554 struct cx24117_state *state = fe->demodulator_priv; 1555 struct cx24117_cmd cmd; 1556 u8 reg, st, inv; 1557 int ret, idx; 1558 unsigned int freq; 1559 short srate_os, freq_os; 1560 1561 u8 buf[0x1f-4]; 1562 1563 /* Read current tune parameters */ 1564 cmd.args[0] = CMD_GETCTLACC; 1565 cmd.args[1] = (u8) state->demod; 1566 cmd.len = 2; 1567 ret = cx24117_cmd_execute(fe, &cmd); 1568 if (ret != 0) 1569 return ret; 1570 1571 /* read all required regs at once */ 1572 reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1; 1573 ret = cx24117_readregN(state, reg, buf, 0x1f-4); 1574 if (ret != 0) 1575 return ret; 1576 1577 st = buf[5]; 1578 1579 /* get spectral inversion */ 1580 inv = (((state->demod == 0) ? ~st : st) >> 6) & 1; 1581 if (inv == 0) 1582 c->inversion = INVERSION_OFF; 1583 else 1584 c->inversion = INVERSION_ON; 1585 1586 /* modulation and fec */ 1587 idx = st & 0x3f; 1588 if (c->delivery_system == SYS_DVBS2) { 1589 if (idx > 11) 1590 idx += 9; 1591 else 1592 idx += 7; 1593 } 1594 1595 c->modulation = cx24117_modfec_modes[idx].modulation; 1596 c->fec_inner = cx24117_modfec_modes[idx].fec; 1597 1598 /* frequency */ 1599 freq = (buf[0] << 16) | (buf[1] << 8) | buf[2]; 1600 freq_os = (buf[8] << 8) | buf[9]; 1601 c->frequency = freq + freq_os; 1602 1603 /* symbol rate */ 1604 srate_os = (buf[10] << 8) | buf[11]; 1605 c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate; 1606 return 0; 1607 } 1608 1609 static const struct dvb_frontend_ops cx24117_ops = { 1610 .delsys = { SYS_DVBS, SYS_DVBS2 }, 1611 .info = { 1612 .name = "Conexant CX24117/CX24132", 1613 .frequency_min_hz = 950 * MHz, 1614 .frequency_max_hz = 2150 * MHz, 1615 .frequency_stepsize_hz = 1011 * kHz, 1616 .frequency_tolerance_hz = 5 * MHz, 1617 .symbol_rate_min = 1000000, 1618 .symbol_rate_max = 45000000, 1619 .caps = FE_CAN_INVERSION_AUTO | 1620 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 1621 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 1622 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 1623 FE_CAN_2G_MODULATION | 1624 FE_CAN_QPSK | FE_CAN_RECOVER 1625 }, 1626 1627 .release = cx24117_release, 1628 1629 .init = cx24117_initfe, 1630 .sleep = cx24117_sleep, 1631 .read_status = cx24117_read_status, 1632 .read_ber = cx24117_read_ber, 1633 .read_signal_strength = cx24117_read_signal_strength, 1634 .read_snr = cx24117_read_snr, 1635 .read_ucblocks = cx24117_read_ucblocks, 1636 .set_tone = cx24117_set_tone, 1637 .set_voltage = cx24117_set_voltage, 1638 .diseqc_send_master_cmd = cx24117_send_diseqc_msg, 1639 .diseqc_send_burst = cx24117_diseqc_send_burst, 1640 .get_frontend_algo = cx24117_get_algo, 1641 .tune = cx24117_tune, 1642 1643 .set_frontend = cx24117_set_frontend, 1644 .get_frontend = cx24117_get_frontend, 1645 }; 1646 1647 1648 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware"); 1649 MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)"); 1650 MODULE_LICENSE("GPL"); 1651 MODULE_VERSION("1.1"); 1652 MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE); 1653 1654