xref: /linux/drivers/media/i2c/ccs/ccs.h (revision e91c37f1)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * drivers/media/i2c/smiapp/ccs.h
4  *
5  * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
6  *
7  * Copyright (C) 2020 Intel Corporation
8  * Copyright (C) 2010--2012 Nokia Corporation
9  * Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
10  */
11 
12 #ifndef __CCS_H__
13 #define __CCS_H__
14 
15 #include <linux/mutex.h>
16 #include <linux/regmap.h>
17 #include <media/v4l2-ctrls.h>
18 #include <media/v4l2-subdev.h>
19 
20 #include "ccs-data.h"
21 #include "ccs-limits.h"
22 #include "ccs-quirk.h"
23 #include "ccs-regs.h"
24 #include "ccs-reg-access.h"
25 #include "../ccs-pll.h"
26 #include "smiapp-reg-defs.h"
27 
28 /*
29  * Standard SMIA++ constants
30  */
31 #define SMIA_VERSION_1			10
32 #define SMIAPP_VERSION_0_8		8 /* Draft 0.8 */
33 #define SMIAPP_VERSION_0_9		9 /* Draft 0.9 */
34 #define SMIAPP_VERSION_1		10
35 
36 #define SMIAPP_PROFILE_0		0
37 #define SMIAPP_PROFILE_1		1
38 #define SMIAPP_PROFILE_2		2
39 
40 #define SMIAPP_NVM_PAGE_SIZE		64	/* bytes */
41 
42 #define SMIAPP_RESET_DELAY_CLOCKS	2400
43 #define SMIAPP_RESET_DELAY(clk)				\
44 	(1000 +	(SMIAPP_RESET_DELAY_CLOCKS * 1000	\
45 		 + (clk) / 1000 - 1) / ((clk) / 1000))
46 
47 #define CCS_COLOUR_COMPONENTS		4
48 
49 #define SMIAPP_NAME			"smiapp"
50 #define CCS_NAME			"ccs"
51 
52 #define CCS_DFL_I2C_ADDR	(0x20 >> 1) /* Default I2C Address */
53 #define CCS_ALT_I2C_ADDR	(0x6e >> 1) /* Alternate I2C Address */
54 
55 #define CCS_LIM(sensor, limit) \
56 	ccs_get_limit(sensor, CCS_L_##limit, 0)
57 
58 #define CCS_LIM_AT(sensor, limit, offset)	\
59 	ccs_get_limit(sensor, CCS_L_##limit, CCS_L_##limit##_OFFSET(offset))
60 
61 struct ccs_flash_strobe_parms {
62 	u8 mode;
63 	u32 strobe_width_high_us;
64 	u16 strobe_delay;
65 	u16 stobe_start_point;
66 	u8 trigger;
67 };
68 
69 struct ccs_hwconfig {
70 	/*
71 	 * Change the cci address if i2c_addr_alt is set.
72 	 * Both default and alternate cci addr need to be present
73 	 */
74 	unsigned short i2c_addr_dfl;	/* Default i2c addr */
75 	unsigned short i2c_addr_alt;	/* Alternate i2c addr */
76 
77 	u32 ext_clk;			/* sensor external clk */
78 
79 	unsigned int lanes;		/* Number of CSI-2 lanes */
80 	u32 csi_signalling_mode;	/* CCS_CSI_SIGNALLING_MODE_* */
81 	u64 *op_sys_clock;
82 
83 	struct ccs_flash_strobe_parms *strobe_setup;
84 };
85 
86 struct ccs_quirk;
87 
88 #define CCS_MODULE_IDENT_FLAG_REV_LE		(1 << 0)
89 
90 struct ccs_module_ident {
91 	u16 mipi_manufacturer_id;
92 	u16 model_id;
93 	u8 smia_manufacturer_id;
94 	u8 revision_number_major;
95 
96 	u8 flags;
97 
98 	char *name;
99 	const struct ccs_quirk *quirk;
100 };
101 
102 struct ccs_module_info {
103 	u32 smia_manufacturer_id;
104 	u32 mipi_manufacturer_id;
105 	u32 model_id;
106 	u32 revision_number;
107 
108 	u32 module_year;
109 	u32 module_month;
110 	u32 module_day;
111 
112 	u32 sensor_smia_manufacturer_id;
113 	u32 sensor_mipi_manufacturer_id;
114 	u32 sensor_model_id;
115 	u32 sensor_revision_number;
116 	u32 sensor_firmware_version;
117 
118 	u32 smia_version;
119 	u32 smiapp_version;
120 	u32 ccs_version;
121 
122 	char *name;
123 	const struct ccs_quirk *quirk;
124 };
125 
126 #define CCS_IDENT_FQ(manufacturer, model, rev, fl, _name, _quirk)	\
127 	{ .smia_manufacturer_id = manufacturer,				\
128 	  .model_id = model,						\
129 	  .revision_number_major = rev,					\
130 	  .flags = fl,							\
131 	  .name = _name,						\
132 	  .quirk = _quirk, }
133 
134 #define CCS_IDENT_LQ(manufacturer, model, rev, _name, _quirk)	\
135 	{ .smia_manufacturer_id = manufacturer,				\
136 	  .model_id = model,						\
137 	  .revision_number_major = rev,					\
138 	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
139 	  .name = _name,						\
140 	  .quirk = _quirk, }
141 
142 #define CCS_IDENT_L(manufacturer, model, rev, _name)			\
143 	{ .smia_manufacturer_id = manufacturer,				\
144 	  .model_id = model,						\
145 	  .revision_number_major = rev,					\
146 	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
147 	  .name = _name, }
148 
149 #define CCS_IDENT_Q(manufacturer, model, rev, _name, _quirk)		\
150 	{ .smia_manufacturer_id = manufacturer,				\
151 	  .model_id = model,						\
152 	  .revision_number_major = rev,					\
153 	  .flags = 0,							\
154 	  .name = _name,						\
155 	  .quirk = _quirk, }
156 
157 #define CCS_IDENT(manufacturer, model, rev, _name)			\
158 	{ .smia_manufacturer_id = manufacturer,				\
159 	  .model_id = model,						\
160 	  .revision_number_major = rev,					\
161 	  .flags = 0,							\
162 	  .name = _name, }
163 
164 struct ccs_csi_data_format {
165 	u32 code;
166 	u8 width;
167 	u8 compressed;
168 	u8 pixel_order;
169 };
170 
171 #define CCS_SUBDEVS			3
172 
173 #define CCS_PA_PAD_SRC			0
174 #define CCS_PAD_SINK			0
175 #define CCS_PAD_SRC			1
176 #define CCS_PADS			2
177 
178 struct ccs_binning_subtype {
179 	u8 horizontal:4;
180 	u8 vertical:4;
181 } __packed;
182 
183 struct ccs_subdev {
184 	struct v4l2_subdev sd;
185 	struct media_pad pads[CCS_PADS];
186 	unsigned short sink_pad;
187 	unsigned short source_pad;
188 	int npads;
189 	struct ccs_sensor *sensor;
190 	struct v4l2_ctrl_handler ctrl_handler;
191 };
192 
193 /*
194  * struct ccs_sensor - Main device structure
195  */
196 struct ccs_sensor {
197 	/*
198 	 * "mutex" is used to serialise access to all fields here
199 	 * except v4l2_ctrls at the end of the struct. "mutex" is also
200 	 * used to serialise access to file handle specific
201 	 * information.
202 	 */
203 	struct mutex mutex;
204 	struct ccs_subdev ssds[CCS_SUBDEVS];
205 	u32 ssds_used;
206 	struct ccs_subdev *src;
207 	struct ccs_subdev *binner;
208 	struct ccs_subdev *scaler;
209 	struct ccs_subdev *pixel_array;
210 	struct ccs_hwconfig hwcfg;
211 	struct regulator_bulk_data *regulators;
212 	struct clk *ext_clk;
213 	struct gpio_desc *xshutdown;
214 	struct gpio_desc *reset;
215 	struct regmap *regmap;
216 	void *ccs_limits;
217 	u8 nbinning_subtypes;
218 	struct ccs_binning_subtype binning_subtypes[CCS_LIM_BINNING_SUB_TYPE_MAX_N + 1];
219 	u32 mbus_frame_fmts;
220 	const struct ccs_csi_data_format *csi_format;
221 	const struct ccs_csi_data_format *internal_csi_format;
222 	struct v4l2_rect pa_src, scaler_sink, src_src;
223 	u32 default_mbus_frame_fmts;
224 	int default_pixel_order;
225 	struct ccs_data_container sdata, mdata;
226 
227 	u8 binning_horizontal;
228 	u8 binning_vertical;
229 
230 	u8 scale_m;
231 	u8 scaling_mode;
232 
233 	u8 frame_skip;
234 	u16 embedded_start; /* embedded data start line */
235 	u16 embedded_end;
236 	u16 image_start; /* image data start line */
237 	u16 visible_pixel_start; /* start pixel of the visible image */
238 
239 	bool streaming;
240 	bool dev_init_done;
241 	bool handler_setup_needed;
242 	u8 compressed_min_bpp;
243 
244 	struct ccs_module_info minfo;
245 
246 	struct ccs_pll pll;
247 
248 	/* Is a default format supported for a given BPP? */
249 	unsigned long *valid_link_freqs;
250 
251 	/* Pixel array controls */
252 	struct v4l2_ctrl *exposure;
253 	struct v4l2_ctrl *hflip;
254 	struct v4l2_ctrl *vflip;
255 	struct v4l2_ctrl *vblank;
256 	struct v4l2_ctrl *hblank;
257 	struct v4l2_ctrl *pixel_rate_parray;
258 	struct v4l2_ctrl *luminance_level;
259 	/* src controls */
260 	struct v4l2_ctrl *link_freq;
261 	struct v4l2_ctrl *pixel_rate_csi;
262 	/* test pattern colour components */
263 	struct v4l2_ctrl *test_data[CCS_COLOUR_COMPONENTS];
264 };
265 
266 #define to_ccs_subdev(_sd)				\
267 	container_of(_sd, struct ccs_subdev, sd)
268 
269 #define to_ccs_sensor(_sd)	\
270 	(to_ccs_subdev(_sd)->sensor)
271 
272 void ccs_replace_limit(struct ccs_sensor *sensor,
273 		       unsigned int limit, unsigned int offset, u32 val);
274 u32 ccs_get_limit(struct ccs_sensor *sensor, unsigned int limit,
275 		  unsigned int offset);
276 
277 #endif /* __CCS_H__ */
278