1238c84f7SMauro Carvalho Chehab /* SPDX-License-Identifier: GPL-2.0-only */ 2238c84f7SMauro Carvalho Chehab /* 3238c84f7SMauro Carvalho Chehab * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver 4238c84f7SMauro Carvalho Chehab * 5238c84f7SMauro Carvalho Chehab * Copyright (C) 2013 Samsung Electronics Co., Ltd. 6238c84f7SMauro Carvalho Chehab * 7238c84f7SMauro Carvalho Chehab * Authors: Sylwester Nawrocki <s.nawrocki@samsung.com> 8238c84f7SMauro Carvalho Chehab * Younghwan Joo <yhwan.joo@samsung.com> 9238c84f7SMauro Carvalho Chehab */ 10238c84f7SMauro Carvalho Chehab #ifndef FIMC_ISP_H_ 11238c84f7SMauro Carvalho Chehab #define FIMC_ISP_H_ 12238c84f7SMauro Carvalho Chehab 13238c84f7SMauro Carvalho Chehab #include <linux/io.h> 14238c84f7SMauro Carvalho Chehab #include <linux/platform_device.h> 15238c84f7SMauro Carvalho Chehab #include <linux/sched.h> 16238c84f7SMauro Carvalho Chehab #include <linux/spinlock.h> 17238c84f7SMauro Carvalho Chehab #include <linux/types.h> 18238c84f7SMauro Carvalho Chehab #include <linux/videodev2.h> 19238c84f7SMauro Carvalho Chehab 20238c84f7SMauro Carvalho Chehab #include <media/media-entity.h> 21238c84f7SMauro Carvalho Chehab #include <media/videobuf2-v4l2.h> 22238c84f7SMauro Carvalho Chehab #include <media/v4l2-device.h> 23238c84f7SMauro Carvalho Chehab #include <media/v4l2-mediabus.h> 24238c84f7SMauro Carvalho Chehab #include <media/drv-intf/exynos-fimc.h> 25238c84f7SMauro Carvalho Chehab 26238c84f7SMauro Carvalho Chehab extern int fimc_isp_debug; 27238c84f7SMauro Carvalho Chehab 28238c84f7SMauro Carvalho Chehab #define isp_dbg(level, dev, fmt, arg...) \ 29238c84f7SMauro Carvalho Chehab v4l2_dbg(level, fimc_isp_debug, dev, fmt, ## arg) 30238c84f7SMauro Carvalho Chehab 31238c84f7SMauro Carvalho Chehab /* FIXME: revisit these constraints */ 32238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SINK_WIDTH_MIN (16 + 8) 33238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SINK_HEIGHT_MIN (12 + 8) 34238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SOURCE_WIDTH_MIN 8 35238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SOURCE_HEIGHT_MIN 8 36238c84f7SMauro Carvalho Chehab #define FIMC_ISP_CAC_MARGIN_WIDTH 16 37238c84f7SMauro Carvalho Chehab #define FIMC_ISP_CAC_MARGIN_HEIGHT 12 38238c84f7SMauro Carvalho Chehab 39238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SINK_WIDTH_MAX (4000 - 16) 40238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SINK_HEIGHT_MAX (4000 + 12) 41238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SOURCE_WIDTH_MAX 4000 42238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SOURCE_HEIGHT_MAX 4000 43238c84f7SMauro Carvalho Chehab 44238c84f7SMauro Carvalho Chehab #define FIMC_ISP_NUM_FORMATS 3 45238c84f7SMauro Carvalho Chehab #define FIMC_ISP_REQ_BUFS_MIN 2 46238c84f7SMauro Carvalho Chehab #define FIMC_ISP_REQ_BUFS_MAX 32 47238c84f7SMauro Carvalho Chehab 48238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SD_PAD_SINK 0 49238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SD_PAD_SRC_FIFO 1 50238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SD_PAD_SRC_DMA 2 51238c84f7SMauro Carvalho Chehab #define FIMC_ISP_SD_PADS_NUM 3 52238c84f7SMauro Carvalho Chehab #define FIMC_ISP_MAX_PLANES 1 53238c84f7SMauro Carvalho Chehab 54238c84f7SMauro Carvalho Chehab /** 55238c84f7SMauro Carvalho Chehab * struct fimc_isp_frame - source/target frame properties 56238c84f7SMauro Carvalho Chehab * @width: full image width 57238c84f7SMauro Carvalho Chehab * @height: full image height 58238c84f7SMauro Carvalho Chehab * @rect: crop/composition rectangle 59238c84f7SMauro Carvalho Chehab */ 60238c84f7SMauro Carvalho Chehab struct fimc_isp_frame { 61238c84f7SMauro Carvalho Chehab u16 width; 62238c84f7SMauro Carvalho Chehab u16 height; 63238c84f7SMauro Carvalho Chehab struct v4l2_rect rect; 64238c84f7SMauro Carvalho Chehab }; 65238c84f7SMauro Carvalho Chehab 66238c84f7SMauro Carvalho Chehab struct fimc_isp_ctrls { 67238c84f7SMauro Carvalho Chehab struct v4l2_ctrl_handler handler; 68238c84f7SMauro Carvalho Chehab 69238c84f7SMauro Carvalho Chehab /* Auto white balance */ 70238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *auto_wb; 71238c84f7SMauro Carvalho Chehab /* Auto ISO control cluster */ 72238c84f7SMauro Carvalho Chehab struct { 73238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *auto_iso; 74238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *iso; 75238c84f7SMauro Carvalho Chehab }; 76238c84f7SMauro Carvalho Chehab /* Adjust - contrast */ 77238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *contrast; 78238c84f7SMauro Carvalho Chehab /* Adjust - saturation */ 79238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *saturation; 80238c84f7SMauro Carvalho Chehab /* Adjust - sharpness */ 81238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *sharpness; 82238c84f7SMauro Carvalho Chehab /* Adjust - brightness */ 83238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *brightness; 84238c84f7SMauro Carvalho Chehab /* Adjust - hue */ 85238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *hue; 86238c84f7SMauro Carvalho Chehab 87238c84f7SMauro Carvalho Chehab /* Auto/manual exposure */ 88238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *auto_exp; 89238c84f7SMauro Carvalho Chehab /* Manual exposure value */ 90238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *exposure; 91238c84f7SMauro Carvalho Chehab /* AE/AWB lock/unlock */ 92238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *aewb_lock; 93238c84f7SMauro Carvalho Chehab /* Exposure metering mode */ 94238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *exp_metering; 95238c84f7SMauro Carvalho Chehab /* AFC */ 96238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *afc; 97238c84f7SMauro Carvalho Chehab /* ISP image effect */ 98238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *colorfx; 99238c84f7SMauro Carvalho Chehab }; 100238c84f7SMauro Carvalho Chehab 101238c84f7SMauro Carvalho Chehab struct isp_video_buf { 102238c84f7SMauro Carvalho Chehab struct vb2_v4l2_buffer vb; 103238c84f7SMauro Carvalho Chehab dma_addr_t dma_addr[FIMC_ISP_MAX_PLANES]; 104238c84f7SMauro Carvalho Chehab unsigned int index; 105238c84f7SMauro Carvalho Chehab }; 106238c84f7SMauro Carvalho Chehab 107238c84f7SMauro Carvalho Chehab #define to_isp_video_buf(_b) container_of(_b, struct isp_video_buf, vb) 108238c84f7SMauro Carvalho Chehab 109238c84f7SMauro Carvalho Chehab #define FIMC_ISP_MAX_BUFS 4 110238c84f7SMauro Carvalho Chehab 111238c84f7SMauro Carvalho Chehab /** 112238c84f7SMauro Carvalho Chehab * struct fimc_is_video - fimc-is video device structure 113238c84f7SMauro Carvalho Chehab * @ve: video_device structure and media pipeline 114238c84f7SMauro Carvalho Chehab * @type: video device type (CAPTURE/OUTPUT) 115238c84f7SMauro Carvalho Chehab * @pad: video device media (sink) pad 116238c84f7SMauro Carvalho Chehab * @pending_buf_q: pending buffers queue head 117238c84f7SMauro Carvalho Chehab * @active_buf_q: a queue head of buffers scheduled in hardware 118238c84f7SMauro Carvalho Chehab * @vb_queue: vb2 buffer queue 119238c84f7SMauro Carvalho Chehab * @reqbufs_count: the number of buffers requested in REQBUFS ioctl 120238c84f7SMauro Carvalho Chehab * @buf_count: number of video buffers scheduled in hardware 121238c84f7SMauro Carvalho Chehab * @buf_mask: bitmask of the queued video buffer indices 122238c84f7SMauro Carvalho Chehab * @frame_count: counter of frames dequeued to user space 123238c84f7SMauro Carvalho Chehab * @streaming: is streaming in progress? 124238c84f7SMauro Carvalho Chehab * @buffers: buffer info 125238c84f7SMauro Carvalho Chehab * @format: current fimc pixel format 126238c84f7SMauro Carvalho Chehab * @pixfmt: current pixel format 127238c84f7SMauro Carvalho Chehab */ 128238c84f7SMauro Carvalho Chehab struct fimc_is_video { 129238c84f7SMauro Carvalho Chehab struct exynos_video_entity ve; 130238c84f7SMauro Carvalho Chehab enum v4l2_buf_type type; 131238c84f7SMauro Carvalho Chehab struct media_pad pad; 132238c84f7SMauro Carvalho Chehab struct list_head pending_buf_q; 133238c84f7SMauro Carvalho Chehab struct list_head active_buf_q; 134238c84f7SMauro Carvalho Chehab struct vb2_queue vb_queue; 135238c84f7SMauro Carvalho Chehab unsigned int reqbufs_count; 136238c84f7SMauro Carvalho Chehab unsigned int buf_count; 137238c84f7SMauro Carvalho Chehab unsigned int buf_mask; 138238c84f7SMauro Carvalho Chehab unsigned int frame_count; 139238c84f7SMauro Carvalho Chehab int streaming; 140238c84f7SMauro Carvalho Chehab struct isp_video_buf *buffers[FIMC_ISP_MAX_BUFS]; 141238c84f7SMauro Carvalho Chehab const struct fimc_fmt *format; 142238c84f7SMauro Carvalho Chehab struct v4l2_pix_format_mplane pixfmt; 143238c84f7SMauro Carvalho Chehab }; 144238c84f7SMauro Carvalho Chehab 145238c84f7SMauro Carvalho Chehab /* struct fimc_isp:state bit definitions */ 146238c84f7SMauro Carvalho Chehab #define ST_ISP_VID_CAP_BUF_PREP 0 147238c84f7SMauro Carvalho Chehab #define ST_ISP_VID_CAP_STREAMING 1 148238c84f7SMauro Carvalho Chehab 149238c84f7SMauro Carvalho Chehab /** 150238c84f7SMauro Carvalho Chehab * struct fimc_isp - FIMC-IS ISP data structure 151238c84f7SMauro Carvalho Chehab * @pdev: pointer to FIMC-IS platform device 152238c84f7SMauro Carvalho Chehab * @subdev: ISP v4l2_subdev 153238c84f7SMauro Carvalho Chehab * @subdev_pads: the ISP subdev media pads 154238c84f7SMauro Carvalho Chehab * @src_fmt: source mediabus format 155238c84f7SMauro Carvalho Chehab * @sink_fmt: sink mediabus format 156238c84f7SMauro Carvalho Chehab * @test_pattern: test pattern controls 157238c84f7SMauro Carvalho Chehab * @ctrls: v4l2 controls structure 158238c84f7SMauro Carvalho Chehab * @video_lock: mutex serializing video device operations 159238c84f7SMauro Carvalho Chehab * @subdev_lock: mutex serializing subdev operations 160238c84f7SMauro Carvalho Chehab * @cac_margin_x: horizontal CAC margin in pixels 161238c84f7SMauro Carvalho Chehab * @cac_margin_y: vertical CAC margin in pixels 162238c84f7SMauro Carvalho Chehab * @state: driver state flags 163238c84f7SMauro Carvalho Chehab * @video_capture: the ISP block video capture device 164238c84f7SMauro Carvalho Chehab */ 165238c84f7SMauro Carvalho Chehab struct fimc_isp { 166238c84f7SMauro Carvalho Chehab struct platform_device *pdev; 167238c84f7SMauro Carvalho Chehab struct v4l2_subdev subdev; 168238c84f7SMauro Carvalho Chehab struct media_pad subdev_pads[FIMC_ISP_SD_PADS_NUM]; 169238c84f7SMauro Carvalho Chehab struct v4l2_mbus_framefmt src_fmt; 170238c84f7SMauro Carvalho Chehab struct v4l2_mbus_framefmt sink_fmt; 171238c84f7SMauro Carvalho Chehab struct v4l2_ctrl *test_pattern; 172238c84f7SMauro Carvalho Chehab struct fimc_isp_ctrls ctrls; 173238c84f7SMauro Carvalho Chehab 174238c84f7SMauro Carvalho Chehab struct mutex video_lock; 175238c84f7SMauro Carvalho Chehab struct mutex subdev_lock; 176238c84f7SMauro Carvalho Chehab 177238c84f7SMauro Carvalho Chehab unsigned int cac_margin_x; 178238c84f7SMauro Carvalho Chehab unsigned int cac_margin_y; 179238c84f7SMauro Carvalho Chehab 180238c84f7SMauro Carvalho Chehab unsigned long state; 181238c84f7SMauro Carvalho Chehab 182238c84f7SMauro Carvalho Chehab struct fimc_is_video video_capture; 183238c84f7SMauro Carvalho Chehab }; 184238c84f7SMauro Carvalho Chehab 185238c84f7SMauro Carvalho Chehab #define ctrl_to_fimc_isp(_ctrl) \ 186238c84f7SMauro Carvalho Chehab container_of(ctrl->handler, struct fimc_isp, ctrls.handler) 187238c84f7SMauro Carvalho Chehab 188238c84f7SMauro Carvalho Chehab struct fimc_is; 189238c84f7SMauro Carvalho Chehab 190238c84f7SMauro Carvalho Chehab int fimc_isp_subdev_create(struct fimc_isp *isp); 191238c84f7SMauro Carvalho Chehab void fimc_isp_subdev_destroy(struct fimc_isp *isp); 192238c84f7SMauro Carvalho Chehab void fimc_isp_irq_handler(struct fimc_is *is); 193238c84f7SMauro Carvalho Chehab int fimc_is_create_controls(struct fimc_isp *isp); 194238c84f7SMauro Carvalho Chehab int fimc_is_delete_controls(struct fimc_isp *isp); 195238c84f7SMauro Carvalho Chehab const struct fimc_fmt *fimc_isp_find_format(const u32 *pixelformat, 196238c84f7SMauro Carvalho Chehab const u32 *mbus_code, int index); 197238c84f7SMauro Carvalho Chehab #endif /* FIMC_ISP_H_ */ 198