xref: /linux/drivers/media/tuners/tda18271-fe.c (revision 4e791048)
1 /*
2     tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
3 
4     Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5 
6     This program is free software; you can redistribute it and/or modify
7     it under the terms of the GNU General Public License as published by
8     the Free Software Foundation; either version 2 of the License, or
9     (at your option) any later version.
10 
11     This program is distributed in the hope that it will be useful,
12     but WITHOUT ANY WARRANTY; without even the implied warranty of
13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14     GNU General Public License for more details.
15 
16     You should have received a copy of the GNU General Public License
17     along with this program; if not, write to the Free Software
18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 
21 #include <linux/delay.h>
22 #include <linux/videodev2.h>
23 #include "tda18271-priv.h"
24 
25 int tda18271_debug;
26 module_param_named(debug, tda18271_debug, int, 0644);
27 MODULE_PARM_DESC(debug, "set debug level "
28 		 "(info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
29 
30 static int tda18271_cal_on_startup = -1;
31 module_param_named(cal, tda18271_cal_on_startup, int, 0644);
32 MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
33 
34 static DEFINE_MUTEX(tda18271_list_mutex);
35 static LIST_HEAD(hybrid_tuner_instance_list);
36 
37 /*---------------------------------------------------------------------*/
38 
39 static int tda18271_toggle_output(struct dvb_frontend *fe, int standby)
40 {
41 	struct tda18271_priv *priv = fe->tuner_priv;
42 
43 	int ret = tda18271_set_standby_mode(fe, standby ? 1 : 0,
44 			priv->output_opt & TDA18271_OUTPUT_LT_OFF ? 1 : 0,
45 			priv->output_opt & TDA18271_OUTPUT_XT_OFF ? 1 : 0);
46 
47 	if (tda_fail(ret))
48 		goto fail;
49 
50 	tda_dbg("%s mode: xtal oscillator %s, slave tuner loop thru %s\n",
51 		standby ? "standby" : "active",
52 		priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on",
53 		priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on");
54 fail:
55 	return ret;
56 }
57 
58 /*---------------------------------------------------------------------*/
59 
60 static inline int charge_pump_source(struct dvb_frontend *fe, int force)
61 {
62 	struct tda18271_priv *priv = fe->tuner_priv;
63 	return tda18271_charge_pump_source(fe,
64 					   (priv->role == TDA18271_SLAVE) ?
65 					   TDA18271_CAL_PLL :
66 					   TDA18271_MAIN_PLL, force);
67 }
68 
69 static inline void tda18271_set_if_notch(struct dvb_frontend *fe)
70 {
71 	struct tda18271_priv *priv = fe->tuner_priv;
72 	unsigned char *regs = priv->tda18271_regs;
73 
74 	switch (priv->mode) {
75 	case TDA18271_ANALOG:
76 		regs[R_MPD]  &= ~0x80; /* IF notch = 0 */
77 		break;
78 	case TDA18271_DIGITAL:
79 		regs[R_MPD]  |= 0x80; /* IF notch = 1 */
80 		break;
81 	}
82 }
83 
84 static int tda18271_channel_configuration(struct dvb_frontend *fe,
85 					  struct tda18271_std_map_item *map,
86 					  u32 freq, u32 bw)
87 {
88 	struct tda18271_priv *priv = fe->tuner_priv;
89 	unsigned char *regs = priv->tda18271_regs;
90 	int ret;
91 	u32 N;
92 
93 	/* update TV broadcast parameters */
94 
95 	/* set standard */
96 	regs[R_EP3]  &= ~0x1f; /* clear std bits */
97 	regs[R_EP3]  |= (map->agc_mode << 3) | map->std;
98 
99 	if (priv->id == TDA18271HDC2) {
100 		/* set rfagc to high speed mode */
101 		regs[R_EP3] &= ~0x04;
102 	}
103 
104 	/* set cal mode to normal */
105 	regs[R_EP4]  &= ~0x03;
106 
107 	/* update IF output level */
108 	regs[R_EP4]  &= ~0x1c; /* clear if level bits */
109 	regs[R_EP4]  |= (map->if_lvl << 2);
110 
111 	/* update FM_RFn */
112 	regs[R_EP4]  &= ~0x80;
113 	regs[R_EP4]  |= map->fm_rfn << 7;
114 
115 	/* update rf top / if top */
116 	regs[R_EB22]  = 0x00;
117 	regs[R_EB22] |= map->rfagc_top;
118 	ret = tda18271_write_regs(fe, R_EB22, 1);
119 	if (tda_fail(ret))
120 		goto fail;
121 
122 	/* --------------------------------------------------------------- */
123 
124 	/* disable Power Level Indicator */
125 	regs[R_EP1]  |= 0x40;
126 
127 	/* make sure thermometer is off */
128 	regs[R_TM]   &= ~0x10;
129 
130 	/* frequency dependent parameters */
131 
132 	tda18271_calc_ir_measure(fe, &freq);
133 
134 	tda18271_calc_bp_filter(fe, &freq);
135 
136 	tda18271_calc_rf_band(fe, &freq);
137 
138 	tda18271_calc_gain_taper(fe, &freq);
139 
140 	/* --------------------------------------------------------------- */
141 
142 	/* dual tuner and agc1 extra configuration */
143 
144 	switch (priv->role) {
145 	case TDA18271_MASTER:
146 		regs[R_EB1]  |= 0x04; /* main vco */
147 		break;
148 	case TDA18271_SLAVE:
149 		regs[R_EB1]  &= ~0x04; /* cal vco */
150 		break;
151 	}
152 
153 	/* agc1 always active */
154 	regs[R_EB1]  &= ~0x02;
155 
156 	/* agc1 has priority on agc2 */
157 	regs[R_EB1]  &= ~0x01;
158 
159 	ret = tda18271_write_regs(fe, R_EB1, 1);
160 	if (tda_fail(ret))
161 		goto fail;
162 
163 	/* --------------------------------------------------------------- */
164 
165 	N = map->if_freq * 1000 + freq;
166 
167 	switch (priv->role) {
168 	case TDA18271_MASTER:
169 		tda18271_calc_main_pll(fe, N);
170 		tda18271_set_if_notch(fe);
171 		tda18271_write_regs(fe, R_MPD, 4);
172 		break;
173 	case TDA18271_SLAVE:
174 		tda18271_calc_cal_pll(fe, N);
175 		tda18271_write_regs(fe, R_CPD, 4);
176 
177 		regs[R_MPD] = regs[R_CPD] & 0x7f;
178 		tda18271_set_if_notch(fe);
179 		tda18271_write_regs(fe, R_MPD, 1);
180 		break;
181 	}
182 
183 	ret = tda18271_write_regs(fe, R_TM, 7);
184 	if (tda_fail(ret))
185 		goto fail;
186 
187 	/* force charge pump source */
188 	charge_pump_source(fe, 1);
189 
190 	msleep(1);
191 
192 	/* return pll to normal operation */
193 	charge_pump_source(fe, 0);
194 
195 	msleep(20);
196 
197 	if (priv->id == TDA18271HDC2) {
198 		/* set rfagc to normal speed mode */
199 		if (map->fm_rfn)
200 			regs[R_EP3] &= ~0x04;
201 		else
202 			regs[R_EP3] |= 0x04;
203 		ret = tda18271_write_regs(fe, R_EP3, 1);
204 	}
205 fail:
206 	return ret;
207 }
208 
209 static int tda18271_read_thermometer(struct dvb_frontend *fe)
210 {
211 	struct tda18271_priv *priv = fe->tuner_priv;
212 	unsigned char *regs = priv->tda18271_regs;
213 	int tm;
214 
215 	/* switch thermometer on */
216 	regs[R_TM]   |= 0x10;
217 	tda18271_write_regs(fe, R_TM, 1);
218 
219 	/* read thermometer info */
220 	tda18271_read_regs(fe);
221 
222 	if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
223 	    (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
224 
225 		if ((regs[R_TM] & 0x20) == 0x20)
226 			regs[R_TM] &= ~0x20;
227 		else
228 			regs[R_TM] |= 0x20;
229 
230 		tda18271_write_regs(fe, R_TM, 1);
231 
232 		msleep(10); /* temperature sensing */
233 
234 		/* read thermometer info */
235 		tda18271_read_regs(fe);
236 	}
237 
238 	tm = tda18271_lookup_thermometer(fe);
239 
240 	/* switch thermometer off */
241 	regs[R_TM]   &= ~0x10;
242 	tda18271_write_regs(fe, R_TM, 1);
243 
244 	/* set CAL mode to normal */
245 	regs[R_EP4]  &= ~0x03;
246 	tda18271_write_regs(fe, R_EP4, 1);
247 
248 	return tm;
249 }
250 
251 /* ------------------------------------------------------------------ */
252 
253 static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
254 						     u32 freq)
255 {
256 	struct tda18271_priv *priv = fe->tuner_priv;
257 	struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
258 	unsigned char *regs = priv->tda18271_regs;
259 	int i, ret;
260 	u8 tm_current, dc_over_dt, rf_tab;
261 	s32 rfcal_comp, approx;
262 
263 	/* power up */
264 	ret = tda18271_set_standby_mode(fe, 0, 0, 0);
265 	if (tda_fail(ret))
266 		goto fail;
267 
268 	/* read die current temperature */
269 	tm_current = tda18271_read_thermometer(fe);
270 
271 	/* frequency dependent parameters */
272 
273 	tda18271_calc_rf_cal(fe, &freq);
274 	rf_tab = regs[R_EB14];
275 
276 	i = tda18271_lookup_rf_band(fe, &freq, NULL);
277 	if (tda_fail(i))
278 		return i;
279 
280 	if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
281 		approx = map[i].rf_a1 * (s32)(freq / 1000 - map[i].rf1) +
282 			map[i].rf_b1 + rf_tab;
283 	} else {
284 		approx = map[i].rf_a2 * (s32)(freq / 1000 - map[i].rf2) +
285 			map[i].rf_b2 + rf_tab;
286 	}
287 
288 	if (approx < 0)
289 		approx = 0;
290 	if (approx > 255)
291 		approx = 255;
292 
293 	tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
294 
295 	/* calculate temperature compensation */
296 	rfcal_comp = dc_over_dt * (s32)(tm_current - priv->tm_rfcal) / 1000;
297 
298 	regs[R_EB14] = (unsigned char)(approx + rfcal_comp);
299 	ret = tda18271_write_regs(fe, R_EB14, 1);
300 fail:
301 	return ret;
302 }
303 
304 static int tda18271_por(struct dvb_frontend *fe)
305 {
306 	struct tda18271_priv *priv = fe->tuner_priv;
307 	unsigned char *regs = priv->tda18271_regs;
308 	int ret;
309 
310 	/* power up detector 1 */
311 	regs[R_EB12] &= ~0x20;
312 	ret = tda18271_write_regs(fe, R_EB12, 1);
313 	if (tda_fail(ret))
314 		goto fail;
315 
316 	regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
317 	regs[R_EB18] &= ~0x03; /* set agc1_gain to  6 dB */
318 	ret = tda18271_write_regs(fe, R_EB18, 1);
319 	if (tda_fail(ret))
320 		goto fail;
321 
322 	regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
323 
324 	/* POR mode */
325 	ret = tda18271_set_standby_mode(fe, 1, 0, 0);
326 	if (tda_fail(ret))
327 		goto fail;
328 
329 	/* disable 1.5 MHz low pass filter */
330 	regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
331 	regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
332 	ret = tda18271_write_regs(fe, R_EB21, 3);
333 fail:
334 	return ret;
335 }
336 
337 static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
338 {
339 	struct tda18271_priv *priv = fe->tuner_priv;
340 	unsigned char *regs = priv->tda18271_regs;
341 	u32 N;
342 
343 	/* set CAL mode to normal */
344 	regs[R_EP4]  &= ~0x03;
345 	tda18271_write_regs(fe, R_EP4, 1);
346 
347 	/* switch off agc1 */
348 	regs[R_EP3]  |= 0x40; /* sm_lt = 1 */
349 
350 	regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
351 	tda18271_write_regs(fe, R_EB18, 1);
352 
353 	/* frequency dependent parameters */
354 
355 	tda18271_calc_bp_filter(fe, &freq);
356 	tda18271_calc_gain_taper(fe, &freq);
357 	tda18271_calc_rf_band(fe, &freq);
358 	tda18271_calc_km(fe, &freq);
359 
360 	tda18271_write_regs(fe, R_EP1, 3);
361 	tda18271_write_regs(fe, R_EB13, 1);
362 
363 	/* main pll charge pump source */
364 	tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
365 
366 	/* cal pll charge pump source */
367 	tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
368 
369 	/* force dcdc converter to 0 V */
370 	regs[R_EB14] = 0x00;
371 	tda18271_write_regs(fe, R_EB14, 1);
372 
373 	/* disable plls lock */
374 	regs[R_EB20] &= ~0x20;
375 	tda18271_write_regs(fe, R_EB20, 1);
376 
377 	/* set CAL mode to RF tracking filter calibration */
378 	regs[R_EP4]  |= 0x03;
379 	tda18271_write_regs(fe, R_EP4, 2);
380 
381 	/* --------------------------------------------------------------- */
382 
383 	/* set the internal calibration signal */
384 	N = freq;
385 
386 	tda18271_calc_cal_pll(fe, N);
387 	tda18271_write_regs(fe, R_CPD, 4);
388 
389 	/* downconvert internal calibration */
390 	N += 1000000;
391 
392 	tda18271_calc_main_pll(fe, N);
393 	tda18271_write_regs(fe, R_MPD, 4);
394 
395 	msleep(5);
396 
397 	tda18271_write_regs(fe, R_EP2, 1);
398 	tda18271_write_regs(fe, R_EP1, 1);
399 	tda18271_write_regs(fe, R_EP2, 1);
400 	tda18271_write_regs(fe, R_EP1, 1);
401 
402 	/* --------------------------------------------------------------- */
403 
404 	/* normal operation for the main pll */
405 	tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
406 
407 	/* normal operation for the cal pll  */
408 	tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
409 
410 	msleep(10); /* plls locking */
411 
412 	/* launch the rf tracking filters calibration */
413 	regs[R_EB20]  |= 0x20;
414 	tda18271_write_regs(fe, R_EB20, 1);
415 
416 	msleep(60); /* calibration */
417 
418 	/* --------------------------------------------------------------- */
419 
420 	/* set CAL mode to normal */
421 	regs[R_EP4]  &= ~0x03;
422 
423 	/* switch on agc1 */
424 	regs[R_EP3]  &= ~0x40; /* sm_lt = 0 */
425 
426 	regs[R_EB18] &= ~0x03; /* set agc1_gain to  6 dB */
427 	tda18271_write_regs(fe, R_EB18, 1);
428 
429 	tda18271_write_regs(fe, R_EP3, 2);
430 
431 	/* synchronization */
432 	tda18271_write_regs(fe, R_EP1, 1);
433 
434 	/* get calibration result */
435 	tda18271_read_extended(fe);
436 
437 	return regs[R_EB14];
438 }
439 
440 static int tda18271_powerscan(struct dvb_frontend *fe,
441 			      u32 *freq_in, u32 *freq_out)
442 {
443 	struct tda18271_priv *priv = fe->tuner_priv;
444 	unsigned char *regs = priv->tda18271_regs;
445 	int sgn, bcal, count, wait, ret;
446 	u8 cid_target;
447 	u16 count_limit;
448 	u32 freq;
449 
450 	freq = *freq_in;
451 
452 	tda18271_calc_rf_band(fe, &freq);
453 	tda18271_calc_rf_cal(fe, &freq);
454 	tda18271_calc_gain_taper(fe, &freq);
455 	tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
456 
457 	tda18271_write_regs(fe, R_EP2, 1);
458 	tda18271_write_regs(fe, R_EB14, 1);
459 
460 	/* downconvert frequency */
461 	freq += 1000000;
462 
463 	tda18271_calc_main_pll(fe, freq);
464 	tda18271_write_regs(fe, R_MPD, 4);
465 
466 	msleep(5); /* pll locking */
467 
468 	/* detection mode */
469 	regs[R_EP4]  &= ~0x03;
470 	regs[R_EP4]  |= 0x01;
471 	tda18271_write_regs(fe, R_EP4, 1);
472 
473 	/* launch power detection measurement */
474 	tda18271_write_regs(fe, R_EP2, 1);
475 
476 	/* read power detection info, stored in EB10 */
477 	ret = tda18271_read_extended(fe);
478 	if (tda_fail(ret))
479 		return ret;
480 
481 	/* algorithm initialization */
482 	sgn = 1;
483 	*freq_out = *freq_in;
484 	bcal = 0;
485 	count = 0;
486 	wait = false;
487 
488 	while ((regs[R_EB10] & 0x3f) < cid_target) {
489 		/* downconvert updated freq to 1 MHz */
490 		freq = *freq_in + (sgn * count) + 1000000;
491 
492 		tda18271_calc_main_pll(fe, freq);
493 		tda18271_write_regs(fe, R_MPD, 4);
494 
495 		if (wait) {
496 			msleep(5); /* pll locking */
497 			wait = false;
498 		} else
499 			udelay(100); /* pll locking */
500 
501 		/* launch power detection measurement */
502 		tda18271_write_regs(fe, R_EP2, 1);
503 
504 		/* read power detection info, stored in EB10 */
505 		ret = tda18271_read_extended(fe);
506 		if (tda_fail(ret))
507 			return ret;
508 
509 		count += 200;
510 
511 		if (count <= count_limit)
512 			continue;
513 
514 		if (sgn <= 0)
515 			break;
516 
517 		sgn = -1 * sgn;
518 		count = 200;
519 		wait = true;
520 	}
521 
522 	if ((regs[R_EB10] & 0x3f) >= cid_target) {
523 		bcal = 1;
524 		*freq_out = freq - 1000000;
525 	} else
526 		bcal = 0;
527 
528 	tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
529 		bcal, *freq_in, *freq_out, freq);
530 
531 	return bcal;
532 }
533 
534 static int tda18271_powerscan_init(struct dvb_frontend *fe)
535 {
536 	struct tda18271_priv *priv = fe->tuner_priv;
537 	unsigned char *regs = priv->tda18271_regs;
538 	int ret;
539 
540 	/* set standard to digital */
541 	regs[R_EP3]  &= ~0x1f; /* clear std bits */
542 	regs[R_EP3]  |= 0x12;
543 
544 	/* set cal mode to normal */
545 	regs[R_EP4]  &= ~0x03;
546 
547 	/* update IF output level */
548 	regs[R_EP4]  &= ~0x1c; /* clear if level bits */
549 
550 	ret = tda18271_write_regs(fe, R_EP3, 2);
551 	if (tda_fail(ret))
552 		goto fail;
553 
554 	regs[R_EB18] &= ~0x03; /* set agc1_gain to   6 dB */
555 	ret = tda18271_write_regs(fe, R_EB18, 1);
556 	if (tda_fail(ret))
557 		goto fail;
558 
559 	regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
560 
561 	/* 1.5 MHz low pass filter */
562 	regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
563 	regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
564 
565 	ret = tda18271_write_regs(fe, R_EB21, 3);
566 fail:
567 	return ret;
568 }
569 
570 static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
571 {
572 	struct tda18271_priv *priv = fe->tuner_priv;
573 	struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
574 	unsigned char *regs = priv->tda18271_regs;
575 	int bcal, rf, i;
576 	s32 divisor, dividend;
577 #define RF1 0
578 #define RF2 1
579 #define RF3 2
580 	u32 rf_default[3];
581 	u32 rf_freq[3];
582 	s32 prog_cal[3];
583 	s32 prog_tab[3];
584 
585 	i = tda18271_lookup_rf_band(fe, &freq, NULL);
586 
587 	if (tda_fail(i))
588 		return i;
589 
590 	rf_default[RF1] = 1000 * map[i].rf1_def;
591 	rf_default[RF2] = 1000 * map[i].rf2_def;
592 	rf_default[RF3] = 1000 * map[i].rf3_def;
593 
594 	for (rf = RF1; rf <= RF3; rf++) {
595 		if (0 == rf_default[rf])
596 			return 0;
597 		tda_cal("freq = %d, rf = %d\n", freq, rf);
598 
599 		/* look for optimized calibration frequency */
600 		bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
601 		if (tda_fail(bcal))
602 			return bcal;
603 
604 		tda18271_calc_rf_cal(fe, &rf_freq[rf]);
605 		prog_tab[rf] = (s32)regs[R_EB14];
606 
607 		if (1 == bcal)
608 			prog_cal[rf] =
609 				(s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
610 		else
611 			prog_cal[rf] = prog_tab[rf];
612 
613 		switch (rf) {
614 		case RF1:
615 			map[i].rf_a1 = 0;
616 			map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
617 			map[i].rf1   = rf_freq[RF1] / 1000;
618 			break;
619 		case RF2:
620 			dividend = (prog_cal[RF2] - prog_tab[RF2] -
621 				    prog_cal[RF1] + prog_tab[RF1]);
622 			divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
623 			map[i].rf_a1 = (dividend / divisor);
624 			map[i].rf2   = rf_freq[RF2] / 1000;
625 			break;
626 		case RF3:
627 			dividend = (prog_cal[RF3] - prog_tab[RF3] -
628 				    prog_cal[RF2] + prog_tab[RF2]);
629 			divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
630 			map[i].rf_a2 = (dividend / divisor);
631 			map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
632 			map[i].rf3   = rf_freq[RF3] / 1000;
633 			break;
634 		default:
635 			BUG();
636 		}
637 	}
638 
639 	return 0;
640 }
641 
642 static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
643 {
644 	struct tda18271_priv *priv = fe->tuner_priv;
645 	unsigned int i;
646 	int ret;
647 
648 	tda_info("tda18271: performing RF tracking filter calibration\n");
649 
650 	/* wait for die temperature stabilization */
651 	msleep(200);
652 
653 	ret = tda18271_powerscan_init(fe);
654 	if (tda_fail(ret))
655 		goto fail;
656 
657 	/* rf band calibration */
658 	for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++) {
659 		ret =
660 		tda18271_rf_tracking_filters_init(fe, 1000 *
661 						  priv->rf_cal_state[i].rfmax);
662 		if (tda_fail(ret))
663 			goto fail;
664 	}
665 
666 	priv->tm_rfcal = tda18271_read_thermometer(fe);
667 fail:
668 	return ret;
669 }
670 
671 /* ------------------------------------------------------------------ */
672 
673 static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
674 {
675 	struct tda18271_priv *priv = fe->tuner_priv;
676 	unsigned char *regs = priv->tda18271_regs;
677 	int ret;
678 
679 	/* test RF_CAL_OK to see if we need init */
680 	if ((regs[R_EP1] & 0x10) == 0)
681 		priv->cal_initialized = false;
682 
683 	if (priv->cal_initialized)
684 		return 0;
685 
686 	ret = tda18271_calc_rf_filter_curve(fe);
687 	if (tda_fail(ret))
688 		goto fail;
689 
690 	ret = tda18271_por(fe);
691 	if (tda_fail(ret))
692 		goto fail;
693 
694 	tda_info("tda18271: RF tracking filter calibration complete\n");
695 
696 	priv->cal_initialized = true;
697 	goto end;
698 fail:
699 	tda_info("tda18271: RF tracking filter calibration failed!\n");
700 end:
701 	return ret;
702 }
703 
704 static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
705 						     u32 freq, u32 bw)
706 {
707 	struct tda18271_priv *priv = fe->tuner_priv;
708 	unsigned char *regs = priv->tda18271_regs;
709 	int ret;
710 	u32 N = 0;
711 
712 	/* calculate bp filter */
713 	tda18271_calc_bp_filter(fe, &freq);
714 	tda18271_write_regs(fe, R_EP1, 1);
715 
716 	regs[R_EB4]  &= 0x07;
717 	regs[R_EB4]  |= 0x60;
718 	tda18271_write_regs(fe, R_EB4, 1);
719 
720 	regs[R_EB7]   = 0x60;
721 	tda18271_write_regs(fe, R_EB7, 1);
722 
723 	regs[R_EB14]  = 0x00;
724 	tda18271_write_regs(fe, R_EB14, 1);
725 
726 	regs[R_EB20]  = 0xcc;
727 	tda18271_write_regs(fe, R_EB20, 1);
728 
729 	/* set cal mode to RF tracking filter calibration */
730 	regs[R_EP4]  |= 0x03;
731 
732 	/* calculate cal pll */
733 
734 	switch (priv->mode) {
735 	case TDA18271_ANALOG:
736 		N = freq - 1250000;
737 		break;
738 	case TDA18271_DIGITAL:
739 		N = freq + bw / 2;
740 		break;
741 	}
742 
743 	tda18271_calc_cal_pll(fe, N);
744 
745 	/* calculate main pll */
746 
747 	switch (priv->mode) {
748 	case TDA18271_ANALOG:
749 		N = freq - 250000;
750 		break;
751 	case TDA18271_DIGITAL:
752 		N = freq + bw / 2 + 1000000;
753 		break;
754 	}
755 
756 	tda18271_calc_main_pll(fe, N);
757 
758 	ret = tda18271_write_regs(fe, R_EP3, 11);
759 	if (tda_fail(ret))
760 		return ret;
761 
762 	msleep(5); /* RF tracking filter calibration initialization */
763 
764 	/* search for K,M,CO for RF calibration */
765 	tda18271_calc_km(fe, &freq);
766 	tda18271_write_regs(fe, R_EB13, 1);
767 
768 	/* search for rf band */
769 	tda18271_calc_rf_band(fe, &freq);
770 
771 	/* search for gain taper */
772 	tda18271_calc_gain_taper(fe, &freq);
773 
774 	tda18271_write_regs(fe, R_EP2, 1);
775 	tda18271_write_regs(fe, R_EP1, 1);
776 	tda18271_write_regs(fe, R_EP2, 1);
777 	tda18271_write_regs(fe, R_EP1, 1);
778 
779 	regs[R_EB4]  &= 0x07;
780 	regs[R_EB4]  |= 0x40;
781 	tda18271_write_regs(fe, R_EB4, 1);
782 
783 	regs[R_EB7]   = 0x40;
784 	tda18271_write_regs(fe, R_EB7, 1);
785 	msleep(10); /* pll locking */
786 
787 	regs[R_EB20]  = 0xec;
788 	tda18271_write_regs(fe, R_EB20, 1);
789 	msleep(60); /* RF tracking filter calibration completion */
790 
791 	regs[R_EP4]  &= ~0x03; /* set cal mode to normal */
792 	tda18271_write_regs(fe, R_EP4, 1);
793 
794 	tda18271_write_regs(fe, R_EP1, 1);
795 
796 	/* RF tracking filter correction for VHF_Low band */
797 	if (0 == tda18271_calc_rf_cal(fe, &freq))
798 		tda18271_write_regs(fe, R_EB14, 1);
799 
800 	return 0;
801 }
802 
803 /* ------------------------------------------------------------------ */
804 
805 static int tda18271_ir_cal_init(struct dvb_frontend *fe)
806 {
807 	struct tda18271_priv *priv = fe->tuner_priv;
808 	unsigned char *regs = priv->tda18271_regs;
809 	int ret;
810 
811 	ret = tda18271_read_regs(fe);
812 	if (tda_fail(ret))
813 		goto fail;
814 
815 	/* test IR_CAL_OK to see if we need init */
816 	if ((regs[R_EP1] & 0x08) == 0)
817 		ret = tda18271_init_regs(fe);
818 fail:
819 	return ret;
820 }
821 
822 static int tda18271_init(struct dvb_frontend *fe)
823 {
824 	struct tda18271_priv *priv = fe->tuner_priv;
825 	int ret;
826 
827 	mutex_lock(&priv->lock);
828 
829 	/* full power up */
830 	ret = tda18271_set_standby_mode(fe, 0, 0, 0);
831 	if (tda_fail(ret))
832 		goto fail;
833 
834 	/* initialization */
835 	ret = tda18271_ir_cal_init(fe);
836 	if (tda_fail(ret))
837 		goto fail;
838 
839 	if (priv->id == TDA18271HDC2)
840 		tda18271c2_rf_cal_init(fe);
841 fail:
842 	mutex_unlock(&priv->lock);
843 
844 	return ret;
845 }
846 
847 static int tda18271_sleep(struct dvb_frontend *fe)
848 {
849 	struct tda18271_priv *priv = fe->tuner_priv;
850 	int ret;
851 
852 	mutex_lock(&priv->lock);
853 
854 	/* enter standby mode, with required output features enabled */
855 	ret = tda18271_toggle_output(fe, 1);
856 
857 	mutex_unlock(&priv->lock);
858 
859 	return ret;
860 }
861 
862 /* ------------------------------------------------------------------ */
863 
864 static int tda18271_agc(struct dvb_frontend *fe)
865 {
866 	struct tda18271_priv *priv = fe->tuner_priv;
867 	int ret = 0;
868 
869 	switch (priv->config) {
870 	case 0:
871 		/* no external agc configuration required */
872 		if (tda18271_debug & DBG_ADV)
873 			tda_dbg("no agc configuration provided\n");
874 		break;
875 	case 3:
876 		/* switch with GPIO of saa713x */
877 		tda_dbg("invoking callback\n");
878 		if (fe->callback)
879 			ret = fe->callback(priv->i2c_props.adap->algo_data,
880 					   DVB_FRONTEND_COMPONENT_TUNER,
881 					   TDA18271_CALLBACK_CMD_AGC_ENABLE,
882 					   priv->mode);
883 		break;
884 	case 1:
885 	case 2:
886 	default:
887 		/* n/a - currently not supported */
888 		tda_err("unsupported configuration: %d\n", priv->config);
889 		ret = -EINVAL;
890 		break;
891 	}
892 	return ret;
893 }
894 
895 static int tda18271_tune(struct dvb_frontend *fe,
896 			 struct tda18271_std_map_item *map, u32 freq, u32 bw)
897 {
898 	struct tda18271_priv *priv = fe->tuner_priv;
899 	int ret;
900 
901 	tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
902 		freq, map->if_freq, bw, map->agc_mode, map->std);
903 
904 	ret = tda18271_agc(fe);
905 	if (tda_fail(ret))
906 		tda_warn("failed to configure agc\n");
907 
908 	ret = tda18271_init(fe);
909 	if (tda_fail(ret))
910 		goto fail;
911 
912 	mutex_lock(&priv->lock);
913 
914 	switch (priv->id) {
915 	case TDA18271HDC1:
916 		tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
917 		break;
918 	case TDA18271HDC2:
919 		tda18271c2_rf_tracking_filters_correction(fe, freq);
920 		break;
921 	}
922 	ret = tda18271_channel_configuration(fe, map, freq, bw);
923 
924 	mutex_unlock(&priv->lock);
925 fail:
926 	return ret;
927 }
928 
929 /* ------------------------------------------------------------------ */
930 
931 static int tda18271_set_params(struct dvb_frontend *fe)
932 {
933 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
934 	u32 delsys = c->delivery_system;
935 	u32 bw = c->bandwidth_hz;
936 	u32 freq = c->frequency;
937 	struct tda18271_priv *priv = fe->tuner_priv;
938 	struct tda18271_std_map *std_map = &priv->std;
939 	struct tda18271_std_map_item *map;
940 	int ret;
941 
942 	priv->mode = TDA18271_DIGITAL;
943 
944 	switch (delsys) {
945 	case SYS_ATSC:
946 		map = &std_map->atsc_6;
947 		bw = 6000000;
948 		break;
949 	case SYS_ISDBT:
950 	case SYS_DVBT:
951 	case SYS_DVBT2:
952 		if (bw <= 6000000) {
953 			map = &std_map->dvbt_6;
954 		} else if (bw <= 7000000) {
955 			map = &std_map->dvbt_7;
956 		} else {
957 			map = &std_map->dvbt_8;
958 		}
959 		break;
960 	case SYS_DVBC_ANNEX_B:
961 		bw = 6000000;
962 		/* falltrough */
963 	case SYS_DVBC_ANNEX_A:
964 	case SYS_DVBC_ANNEX_C:
965 		if (bw <= 6000000) {
966 			map = &std_map->qam_6;
967 		} else if (bw <= 7000000) {
968 			map = &std_map->qam_7;
969 		} else {
970 			map = &std_map->qam_8;
971 		}
972 		break;
973 	default:
974 		tda_warn("modulation type not supported!\n");
975 		return -EINVAL;
976 	}
977 
978 	/* When tuning digital, the analog demod must be tri-stated */
979 	if (fe->ops.analog_ops.standby)
980 		fe->ops.analog_ops.standby(fe);
981 
982 	ret = tda18271_tune(fe, map, freq, bw);
983 
984 	if (tda_fail(ret))
985 		goto fail;
986 
987 	priv->if_freq   = map->if_freq;
988 	priv->frequency = freq;
989 	priv->bandwidth = bw;
990 fail:
991 	return ret;
992 }
993 
994 static int tda18271_set_analog_params(struct dvb_frontend *fe,
995 				      struct analog_parameters *params)
996 {
997 	struct tda18271_priv *priv = fe->tuner_priv;
998 	struct tda18271_std_map *std_map = &priv->std;
999 	struct tda18271_std_map_item *map;
1000 	char *mode;
1001 	int ret;
1002 	u32 freq = params->frequency * 125 *
1003 		((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
1004 
1005 	priv->mode = TDA18271_ANALOG;
1006 
1007 	if (params->mode == V4L2_TUNER_RADIO) {
1008 		map = &std_map->fm_radio;
1009 		mode = "fm";
1010 	} else if (params->std & V4L2_STD_MN) {
1011 		map = &std_map->atv_mn;
1012 		mode = "MN";
1013 	} else if (params->std & V4L2_STD_B) {
1014 		map = &std_map->atv_b;
1015 		mode = "B";
1016 	} else if (params->std & V4L2_STD_GH) {
1017 		map = &std_map->atv_gh;
1018 		mode = "GH";
1019 	} else if (params->std & V4L2_STD_PAL_I) {
1020 		map = &std_map->atv_i;
1021 		mode = "I";
1022 	} else if (params->std & V4L2_STD_DK) {
1023 		map = &std_map->atv_dk;
1024 		mode = "DK";
1025 	} else if (params->std & V4L2_STD_SECAM_L) {
1026 		map = &std_map->atv_l;
1027 		mode = "L";
1028 	} else if (params->std & V4L2_STD_SECAM_LC) {
1029 		map = &std_map->atv_lc;
1030 		mode = "L'";
1031 	} else {
1032 		map = &std_map->atv_i;
1033 		mode = "xx";
1034 	}
1035 
1036 	tda_dbg("setting tda18271 to system %s\n", mode);
1037 
1038 	ret = tda18271_tune(fe, map, freq, 0);
1039 
1040 	if (tda_fail(ret))
1041 		goto fail;
1042 
1043 	priv->if_freq   = map->if_freq;
1044 	priv->frequency = freq;
1045 	priv->bandwidth = 0;
1046 fail:
1047 	return ret;
1048 }
1049 
1050 static int tda18271_release(struct dvb_frontend *fe)
1051 {
1052 	struct tda18271_priv *priv = fe->tuner_priv;
1053 
1054 	mutex_lock(&tda18271_list_mutex);
1055 
1056 	if (priv)
1057 		hybrid_tuner_release_state(priv);
1058 
1059 	mutex_unlock(&tda18271_list_mutex);
1060 
1061 	fe->tuner_priv = NULL;
1062 
1063 	return 0;
1064 }
1065 
1066 static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
1067 {
1068 	struct tda18271_priv *priv = fe->tuner_priv;
1069 	*frequency = priv->frequency;
1070 	return 0;
1071 }
1072 
1073 static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1074 {
1075 	struct tda18271_priv *priv = fe->tuner_priv;
1076 	*bandwidth = priv->bandwidth;
1077 	return 0;
1078 }
1079 
1080 static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
1081 {
1082 	struct tda18271_priv *priv = fe->tuner_priv;
1083 	*frequency = (u32)priv->if_freq * 1000;
1084 	return 0;
1085 }
1086 
1087 /* ------------------------------------------------------------------ */
1088 
1089 #define tda18271_update_std(std_cfg, name) do {				\
1090 	if (map->std_cfg.if_freq +					\
1091 		map->std_cfg.agc_mode + map->std_cfg.std +		\
1092 		map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) {	\
1093 		tda_dbg("Using custom std config for %s\n", name);	\
1094 		memcpy(&std->std_cfg, &map->std_cfg,			\
1095 			sizeof(struct tda18271_std_map_item));		\
1096 	} } while (0)
1097 
1098 #define tda18271_dump_std_item(std_cfg, name) do {			\
1099 	tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, "		\
1100 		"if_lvl = %d, rfagc_top = 0x%02x\n",			\
1101 		name, std->std_cfg.if_freq,				\
1102 		std->std_cfg.agc_mode, std->std_cfg.std,		\
1103 		std->std_cfg.if_lvl, std->std_cfg.rfagc_top);		\
1104 	} while (0)
1105 
1106 static int tda18271_dump_std_map(struct dvb_frontend *fe)
1107 {
1108 	struct tda18271_priv *priv = fe->tuner_priv;
1109 	struct tda18271_std_map *std = &priv->std;
1110 
1111 	tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
1112 	tda18271_dump_std_item(fm_radio, "  fm  ");
1113 	tda18271_dump_std_item(atv_b,  "atv b ");
1114 	tda18271_dump_std_item(atv_dk, "atv dk");
1115 	tda18271_dump_std_item(atv_gh, "atv gh");
1116 	tda18271_dump_std_item(atv_i,  "atv i ");
1117 	tda18271_dump_std_item(atv_l,  "atv l ");
1118 	tda18271_dump_std_item(atv_lc, "atv l'");
1119 	tda18271_dump_std_item(atv_mn, "atv mn");
1120 	tda18271_dump_std_item(atsc_6, "atsc 6");
1121 	tda18271_dump_std_item(dvbt_6, "dvbt 6");
1122 	tda18271_dump_std_item(dvbt_7, "dvbt 7");
1123 	tda18271_dump_std_item(dvbt_8, "dvbt 8");
1124 	tda18271_dump_std_item(qam_6,  "qam 6 ");
1125 	tda18271_dump_std_item(qam_7,  "qam 7 ");
1126 	tda18271_dump_std_item(qam_8,  "qam 8 ");
1127 
1128 	return 0;
1129 }
1130 
1131 static int tda18271_update_std_map(struct dvb_frontend *fe,
1132 				   struct tda18271_std_map *map)
1133 {
1134 	struct tda18271_priv *priv = fe->tuner_priv;
1135 	struct tda18271_std_map *std = &priv->std;
1136 
1137 	if (!map)
1138 		return -EINVAL;
1139 
1140 	tda18271_update_std(fm_radio, "fm");
1141 	tda18271_update_std(atv_b,  "atv b");
1142 	tda18271_update_std(atv_dk, "atv dk");
1143 	tda18271_update_std(atv_gh, "atv gh");
1144 	tda18271_update_std(atv_i,  "atv i");
1145 	tda18271_update_std(atv_l,  "atv l");
1146 	tda18271_update_std(atv_lc, "atv l'");
1147 	tda18271_update_std(atv_mn, "atv mn");
1148 	tda18271_update_std(atsc_6, "atsc 6");
1149 	tda18271_update_std(dvbt_6, "dvbt 6");
1150 	tda18271_update_std(dvbt_7, "dvbt 7");
1151 	tda18271_update_std(dvbt_8, "dvbt 8");
1152 	tda18271_update_std(qam_6,  "qam 6");
1153 	tda18271_update_std(qam_7,  "qam 7");
1154 	tda18271_update_std(qam_8,  "qam 8");
1155 
1156 	return 0;
1157 }
1158 
1159 static int tda18271_get_id(struct dvb_frontend *fe)
1160 {
1161 	struct tda18271_priv *priv = fe->tuner_priv;
1162 	unsigned char *regs = priv->tda18271_regs;
1163 	char *name;
1164 	int ret;
1165 
1166 	mutex_lock(&priv->lock);
1167 	ret = tda18271_read_regs(fe);
1168 	mutex_unlock(&priv->lock);
1169 
1170 	if (ret) {
1171 		tda_info("Error reading device ID @ %d-%04x, bailing out.\n",
1172 			 i2c_adapter_id(priv->i2c_props.adap),
1173 			 priv->i2c_props.addr);
1174 		return -EIO;
1175 	}
1176 
1177 	switch (regs[R_ID] & 0x7f) {
1178 	case 3:
1179 		name = "TDA18271HD/C1";
1180 		priv->id = TDA18271HDC1;
1181 		break;
1182 	case 4:
1183 		name = "TDA18271HD/C2";
1184 		priv->id = TDA18271HDC2;
1185 		break;
1186 	default:
1187 		tda_info("Unknown device (%i) detected @ %d-%04x, device not supported.\n",
1188 			 regs[R_ID], i2c_adapter_id(priv->i2c_props.adap),
1189 			 priv->i2c_props.addr);
1190 		return -EINVAL;
1191 	}
1192 
1193 	tda_info("%s detected @ %d-%04x\n", name,
1194 		 i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr);
1195 
1196 	return 0;
1197 }
1198 
1199 static int tda18271_setup_configuration(struct dvb_frontend *fe,
1200 					struct tda18271_config *cfg)
1201 {
1202 	struct tda18271_priv *priv = fe->tuner_priv;
1203 
1204 	priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
1205 	priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
1206 	priv->config = (cfg) ? cfg->config : 0;
1207 	priv->small_i2c = (cfg) ?
1208 		cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT;
1209 	priv->output_opt = (cfg) ?
1210 		cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON;
1211 
1212 	return 0;
1213 }
1214 
1215 static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg)
1216 {
1217 	/* tda18271_cal_on_startup == -1 when cal module option is unset */
1218 	return ((tda18271_cal_on_startup == -1) ?
1219 		/* honor configuration setting */
1220 		((cfg) && (cfg->rf_cal_on_startup)) :
1221 		/* module option overrides configuration setting */
1222 		(tda18271_cal_on_startup)) ? 1 : 0;
1223 }
1224 
1225 static int tda18271_set_config(struct dvb_frontend *fe, void *priv_cfg)
1226 {
1227 	struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg;
1228 
1229 	tda18271_setup_configuration(fe, cfg);
1230 
1231 	if (tda18271_need_cal_on_startup(cfg))
1232 		tda18271_init(fe);
1233 
1234 	/* override default std map with values in config struct */
1235 	if ((cfg) && (cfg->std_map))
1236 		tda18271_update_std_map(fe, cfg->std_map);
1237 
1238 	return 0;
1239 }
1240 
1241 static const struct dvb_tuner_ops tda18271_tuner_ops = {
1242 	.info = {
1243 		.name = "NXP TDA18271HD",
1244 		.frequency_min  =  45000000,
1245 		.frequency_max  = 864000000,
1246 		.frequency_step =     62500
1247 	},
1248 	.init              = tda18271_init,
1249 	.sleep             = tda18271_sleep,
1250 	.set_params        = tda18271_set_params,
1251 	.set_analog_params = tda18271_set_analog_params,
1252 	.release           = tda18271_release,
1253 	.set_config        = tda18271_set_config,
1254 	.get_frequency     = tda18271_get_frequency,
1255 	.get_bandwidth     = tda18271_get_bandwidth,
1256 	.get_if_frequency  = tda18271_get_if_frequency,
1257 };
1258 
1259 struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
1260 				     struct i2c_adapter *i2c,
1261 				     struct tda18271_config *cfg)
1262 {
1263 	struct tda18271_priv *priv = NULL;
1264 	int instance, ret;
1265 
1266 	mutex_lock(&tda18271_list_mutex);
1267 
1268 	instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
1269 					      hybrid_tuner_instance_list,
1270 					      i2c, addr, "tda18271");
1271 	switch (instance) {
1272 	case 0:
1273 		goto fail;
1274 	case 1:
1275 		/* new tuner instance */
1276 		fe->tuner_priv = priv;
1277 
1278 		tda18271_setup_configuration(fe, cfg);
1279 
1280 		priv->cal_initialized = false;
1281 		mutex_init(&priv->lock);
1282 
1283 		ret = tda18271_get_id(fe);
1284 		if (tda_fail(ret))
1285 			goto fail;
1286 
1287 		ret = tda18271_assign_map_layout(fe);
1288 		if (tda_fail(ret))
1289 			goto fail;
1290 
1291 		/* if delay_cal is set, delay IR & RF calibration until init()
1292 		 * module option 'cal' overrides this delay */
1293 		if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg)))
1294 			break;
1295 
1296 		mutex_lock(&priv->lock);
1297 		tda18271_init_regs(fe);
1298 
1299 		if ((tda18271_need_cal_on_startup(cfg)) &&
1300 		    (priv->id == TDA18271HDC2))
1301 			tda18271c2_rf_cal_init(fe);
1302 
1303 		/* enter standby mode, with required output features enabled */
1304 		ret = tda18271_toggle_output(fe, 1);
1305 		tda_fail(ret);
1306 
1307 		mutex_unlock(&priv->lock);
1308 		break;
1309 	default:
1310 		/* existing tuner instance */
1311 		fe->tuner_priv = priv;
1312 
1313 		/* allow dvb driver to override configuration settings */
1314 		if (cfg) {
1315 			if (cfg->gate != TDA18271_GATE_ANALOG)
1316 				priv->gate = cfg->gate;
1317 			if (cfg->role)
1318 				priv->role = cfg->role;
1319 			if (cfg->config)
1320 				priv->config = cfg->config;
1321 			if (cfg->small_i2c)
1322 				priv->small_i2c = cfg->small_i2c;
1323 			if (cfg->output_opt)
1324 				priv->output_opt = cfg->output_opt;
1325 			if (cfg->std_map)
1326 				tda18271_update_std_map(fe, cfg->std_map);
1327 		}
1328 		if (tda18271_need_cal_on_startup(cfg))
1329 			tda18271_init(fe);
1330 		break;
1331 	}
1332 
1333 	/* override default std map with values in config struct */
1334 	if ((cfg) && (cfg->std_map))
1335 		tda18271_update_std_map(fe, cfg->std_map);
1336 
1337 	mutex_unlock(&tda18271_list_mutex);
1338 
1339 	memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
1340 	       sizeof(struct dvb_tuner_ops));
1341 
1342 	if (tda18271_debug & (DBG_MAP | DBG_ADV))
1343 		tda18271_dump_std_map(fe);
1344 
1345 	return fe;
1346 fail:
1347 	mutex_unlock(&tda18271_list_mutex);
1348 
1349 	tda18271_release(fe);
1350 	return NULL;
1351 }
1352 EXPORT_SYMBOL_GPL(tda18271_attach);
1353 MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
1354 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1355 MODULE_LICENSE("GPL");
1356 MODULE_VERSION("0.4");
1357 
1358 /*
1359  * Overrides for Emacs so that we follow Linus's tabbing style.
1360  * ---------------------------------------------------------------------------
1361  * Local variables:
1362  * c-basic-offset: 8
1363  * End:
1364  */
1365