1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Realtek Simple Management Interface (SMI) driver 3 * It can be discussed how "simple" this interface is. 4 * 5 * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels 6 * but the protocol is not MDIO at all. Instead it is a Realtek 7 * pecularity that need to bit-bang the lines in a special way to 8 * communicate with the switch. 9 * 10 * ASICs we intend to support with this driver: 11 * 12 * RTL8366 - The original version, apparently 13 * RTL8369 - Similar enough to have the same datsheet as RTL8366 14 * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite 15 * different register layout from the other two 16 * RTL8366S - Is this "RTL8366 super"? 17 * RTL8367 - Has an OpenWRT driver as well 18 * RTL8368S - Seems to be an alternative name for RTL8366RB 19 * RTL8370 - Also uses SMI 20 * 21 * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org> 22 * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com> 23 * Copyright (C) 2010 Roman Yeryomin <roman@advem.lv> 24 * Copyright (C) 2011 Colin Leitner <colin.leitner@googlemail.com> 25 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> 26 */ 27 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/device.h> 31 #include <linux/spinlock.h> 32 #include <linux/skbuff.h> 33 #include <linux/of.h> 34 #include <linux/of_mdio.h> 35 #include <linux/delay.h> 36 #include <linux/gpio/consumer.h> 37 #include <linux/platform_device.h> 38 #include <linux/regmap.h> 39 #include <linux/bitops.h> 40 #include <linux/if_bridge.h> 41 42 #include "realtek.h" 43 44 #define REALTEK_SMI_ACK_RETRY_COUNT 5 45 46 static inline void realtek_smi_clk_delay(struct realtek_priv *priv) 47 { 48 ndelay(priv->clk_delay); 49 } 50 51 static void realtek_smi_start(struct realtek_priv *priv) 52 { 53 /* Set GPIO pins to output mode, with initial state: 54 * SCK = 0, SDA = 1 55 */ 56 gpiod_direction_output(priv->mdc, 0); 57 gpiod_direction_output(priv->mdio, 1); 58 realtek_smi_clk_delay(priv); 59 60 /* CLK 1: 0 -> 1, 1 -> 0 */ 61 gpiod_set_value(priv->mdc, 1); 62 realtek_smi_clk_delay(priv); 63 gpiod_set_value(priv->mdc, 0); 64 realtek_smi_clk_delay(priv); 65 66 /* CLK 2: */ 67 gpiod_set_value(priv->mdc, 1); 68 realtek_smi_clk_delay(priv); 69 gpiod_set_value(priv->mdio, 0); 70 realtek_smi_clk_delay(priv); 71 gpiod_set_value(priv->mdc, 0); 72 realtek_smi_clk_delay(priv); 73 gpiod_set_value(priv->mdio, 1); 74 } 75 76 static void realtek_smi_stop(struct realtek_priv *priv) 77 { 78 realtek_smi_clk_delay(priv); 79 gpiod_set_value(priv->mdio, 0); 80 gpiod_set_value(priv->mdc, 1); 81 realtek_smi_clk_delay(priv); 82 gpiod_set_value(priv->mdio, 1); 83 realtek_smi_clk_delay(priv); 84 gpiod_set_value(priv->mdc, 1); 85 realtek_smi_clk_delay(priv); 86 gpiod_set_value(priv->mdc, 0); 87 realtek_smi_clk_delay(priv); 88 gpiod_set_value(priv->mdc, 1); 89 90 /* Add a click */ 91 realtek_smi_clk_delay(priv); 92 gpiod_set_value(priv->mdc, 0); 93 realtek_smi_clk_delay(priv); 94 gpiod_set_value(priv->mdc, 1); 95 96 /* Set GPIO pins to input mode */ 97 gpiod_direction_input(priv->mdio); 98 gpiod_direction_input(priv->mdc); 99 } 100 101 static void realtek_smi_write_bits(struct realtek_priv *priv, u32 data, u32 len) 102 { 103 for (; len > 0; len--) { 104 realtek_smi_clk_delay(priv); 105 106 /* Prepare data */ 107 gpiod_set_value(priv->mdio, !!(data & (1 << (len - 1)))); 108 realtek_smi_clk_delay(priv); 109 110 /* Clocking */ 111 gpiod_set_value(priv->mdc, 1); 112 realtek_smi_clk_delay(priv); 113 gpiod_set_value(priv->mdc, 0); 114 } 115 } 116 117 static void realtek_smi_read_bits(struct realtek_priv *priv, u32 len, u32 *data) 118 { 119 gpiod_direction_input(priv->mdio); 120 121 for (*data = 0; len > 0; len--) { 122 u32 u; 123 124 realtek_smi_clk_delay(priv); 125 126 /* Clocking */ 127 gpiod_set_value(priv->mdc, 1); 128 realtek_smi_clk_delay(priv); 129 u = !!gpiod_get_value(priv->mdio); 130 gpiod_set_value(priv->mdc, 0); 131 132 *data |= (u << (len - 1)); 133 } 134 135 gpiod_direction_output(priv->mdio, 0); 136 } 137 138 static int realtek_smi_wait_for_ack(struct realtek_priv *priv) 139 { 140 int retry_cnt; 141 142 retry_cnt = 0; 143 do { 144 u32 ack; 145 146 realtek_smi_read_bits(priv, 1, &ack); 147 if (ack == 0) 148 break; 149 150 if (++retry_cnt > REALTEK_SMI_ACK_RETRY_COUNT) { 151 dev_err(priv->dev, "ACK timeout\n"); 152 return -ETIMEDOUT; 153 } 154 } while (1); 155 156 return 0; 157 } 158 159 static int realtek_smi_write_byte(struct realtek_priv *priv, u8 data) 160 { 161 realtek_smi_write_bits(priv, data, 8); 162 return realtek_smi_wait_for_ack(priv); 163 } 164 165 static int realtek_smi_write_byte_noack(struct realtek_priv *priv, u8 data) 166 { 167 realtek_smi_write_bits(priv, data, 8); 168 return 0; 169 } 170 171 static int realtek_smi_read_byte0(struct realtek_priv *priv, u8 *data) 172 { 173 u32 t; 174 175 /* Read data */ 176 realtek_smi_read_bits(priv, 8, &t); 177 *data = (t & 0xff); 178 179 /* Send an ACK */ 180 realtek_smi_write_bits(priv, 0x00, 1); 181 182 return 0; 183 } 184 185 static int realtek_smi_read_byte1(struct realtek_priv *priv, u8 *data) 186 { 187 u32 t; 188 189 /* Read data */ 190 realtek_smi_read_bits(priv, 8, &t); 191 *data = (t & 0xff); 192 193 /* Send an ACK */ 194 realtek_smi_write_bits(priv, 0x01, 1); 195 196 return 0; 197 } 198 199 static int realtek_smi_read_reg(struct realtek_priv *priv, u32 addr, u32 *data) 200 { 201 unsigned long flags; 202 u8 lo = 0; 203 u8 hi = 0; 204 int ret; 205 206 spin_lock_irqsave(&priv->lock, flags); 207 208 realtek_smi_start(priv); 209 210 /* Send READ command */ 211 ret = realtek_smi_write_byte(priv, priv->cmd_read); 212 if (ret) 213 goto out; 214 215 /* Set ADDR[7:0] */ 216 ret = realtek_smi_write_byte(priv, addr & 0xff); 217 if (ret) 218 goto out; 219 220 /* Set ADDR[15:8] */ 221 ret = realtek_smi_write_byte(priv, addr >> 8); 222 if (ret) 223 goto out; 224 225 /* Read DATA[7:0] */ 226 realtek_smi_read_byte0(priv, &lo); 227 /* Read DATA[15:8] */ 228 realtek_smi_read_byte1(priv, &hi); 229 230 *data = ((u32)lo) | (((u32)hi) << 8); 231 232 ret = 0; 233 234 out: 235 realtek_smi_stop(priv); 236 spin_unlock_irqrestore(&priv->lock, flags); 237 238 return ret; 239 } 240 241 static int realtek_smi_write_reg(struct realtek_priv *priv, 242 u32 addr, u32 data, bool ack) 243 { 244 unsigned long flags; 245 int ret; 246 247 spin_lock_irqsave(&priv->lock, flags); 248 249 realtek_smi_start(priv); 250 251 /* Send WRITE command */ 252 ret = realtek_smi_write_byte(priv, priv->cmd_write); 253 if (ret) 254 goto out; 255 256 /* Set ADDR[7:0] */ 257 ret = realtek_smi_write_byte(priv, addr & 0xff); 258 if (ret) 259 goto out; 260 261 /* Set ADDR[15:8] */ 262 ret = realtek_smi_write_byte(priv, addr >> 8); 263 if (ret) 264 goto out; 265 266 /* Write DATA[7:0] */ 267 ret = realtek_smi_write_byte(priv, data & 0xff); 268 if (ret) 269 goto out; 270 271 /* Write DATA[15:8] */ 272 if (ack) 273 ret = realtek_smi_write_byte(priv, data >> 8); 274 else 275 ret = realtek_smi_write_byte_noack(priv, data >> 8); 276 if (ret) 277 goto out; 278 279 ret = 0; 280 281 out: 282 realtek_smi_stop(priv); 283 spin_unlock_irqrestore(&priv->lock, flags); 284 285 return ret; 286 } 287 288 /* There is one single case when we need to use this accessor and that 289 * is when issueing soft reset. Since the device reset as soon as we write 290 * that bit, no ACK will come back for natural reasons. 291 */ 292 static int realtek_smi_write_reg_noack(void *ctx, u32 reg, u32 val) 293 { 294 return realtek_smi_write_reg(ctx, reg, val, false); 295 } 296 297 /* Regmap accessors */ 298 299 static int realtek_smi_write(void *ctx, u32 reg, u32 val) 300 { 301 struct realtek_priv *priv = ctx; 302 303 return realtek_smi_write_reg(priv, reg, val, true); 304 } 305 306 static int realtek_smi_read(void *ctx, u32 reg, u32 *val) 307 { 308 struct realtek_priv *priv = ctx; 309 310 return realtek_smi_read_reg(priv, reg, val); 311 } 312 313 static void realtek_smi_lock(void *ctx) 314 { 315 struct realtek_priv *priv = ctx; 316 317 mutex_lock(&priv->map_lock); 318 } 319 320 static void realtek_smi_unlock(void *ctx) 321 { 322 struct realtek_priv *priv = ctx; 323 324 mutex_unlock(&priv->map_lock); 325 } 326 327 static const struct regmap_config realtek_smi_regmap_config = { 328 .reg_bits = 10, /* A4..A0 R4..R0 */ 329 .val_bits = 16, 330 .reg_stride = 1, 331 /* PHY regs are at 0x8000 */ 332 .max_register = 0xffff, 333 .reg_format_endian = REGMAP_ENDIAN_BIG, 334 .reg_read = realtek_smi_read, 335 .reg_write = realtek_smi_write, 336 .cache_type = REGCACHE_NONE, 337 .lock = realtek_smi_lock, 338 .unlock = realtek_smi_unlock, 339 }; 340 341 static const struct regmap_config realtek_smi_nolock_regmap_config = { 342 .reg_bits = 10, /* A4..A0 R4..R0 */ 343 .val_bits = 16, 344 .reg_stride = 1, 345 /* PHY regs are at 0x8000 */ 346 .max_register = 0xffff, 347 .reg_format_endian = REGMAP_ENDIAN_BIG, 348 .reg_read = realtek_smi_read, 349 .reg_write = realtek_smi_write, 350 .cache_type = REGCACHE_NONE, 351 .disable_locking = true, 352 }; 353 354 static int realtek_smi_mdio_read(struct mii_bus *bus, int addr, int regnum) 355 { 356 struct realtek_priv *priv = bus->priv; 357 358 return priv->ops->phy_read(priv, addr, regnum); 359 } 360 361 static int realtek_smi_mdio_write(struct mii_bus *bus, int addr, int regnum, 362 u16 val) 363 { 364 struct realtek_priv *priv = bus->priv; 365 366 return priv->ops->phy_write(priv, addr, regnum, val); 367 } 368 369 static int realtek_smi_setup_mdio(struct dsa_switch *ds) 370 { 371 struct realtek_priv *priv = ds->priv; 372 struct device_node *mdio_np; 373 int ret; 374 375 mdio_np = of_get_compatible_child(priv->dev->of_node, "realtek,smi-mdio"); 376 if (!mdio_np) { 377 dev_err(priv->dev, "no MDIO bus node\n"); 378 return -ENODEV; 379 } 380 381 priv->user_mii_bus = devm_mdiobus_alloc(priv->dev); 382 if (!priv->user_mii_bus) { 383 ret = -ENOMEM; 384 goto err_put_node; 385 } 386 priv->user_mii_bus->priv = priv; 387 priv->user_mii_bus->name = "SMI user MII"; 388 priv->user_mii_bus->read = realtek_smi_mdio_read; 389 priv->user_mii_bus->write = realtek_smi_mdio_write; 390 snprintf(priv->user_mii_bus->id, MII_BUS_ID_SIZE, "SMI-%d", 391 ds->index); 392 priv->user_mii_bus->dev.of_node = mdio_np; 393 priv->user_mii_bus->parent = priv->dev; 394 ds->user_mii_bus = priv->user_mii_bus; 395 396 ret = devm_of_mdiobus_register(priv->dev, priv->user_mii_bus, mdio_np); 397 if (ret) { 398 dev_err(priv->dev, "unable to register MDIO bus %s\n", 399 priv->user_mii_bus->id); 400 goto err_put_node; 401 } 402 403 return 0; 404 405 err_put_node: 406 of_node_put(mdio_np); 407 408 return ret; 409 } 410 411 static int realtek_smi_probe(struct platform_device *pdev) 412 { 413 const struct realtek_variant *var; 414 struct device *dev = &pdev->dev; 415 struct realtek_priv *priv; 416 struct regmap_config rc; 417 struct device_node *np; 418 int ret; 419 420 var = of_device_get_match_data(dev); 421 np = dev->of_node; 422 423 priv = devm_kzalloc(dev, sizeof(*priv) + var->chip_data_sz, GFP_KERNEL); 424 if (!priv) 425 return -ENOMEM; 426 priv->chip_data = (void *)priv + sizeof(*priv); 427 428 mutex_init(&priv->map_lock); 429 430 rc = realtek_smi_regmap_config; 431 rc.lock_arg = priv; 432 priv->map = devm_regmap_init(dev, NULL, priv, &rc); 433 if (IS_ERR(priv->map)) { 434 ret = PTR_ERR(priv->map); 435 dev_err(dev, "regmap init failed: %d\n", ret); 436 return ret; 437 } 438 439 rc = realtek_smi_nolock_regmap_config; 440 priv->map_nolock = devm_regmap_init(dev, NULL, priv, &rc); 441 if (IS_ERR(priv->map_nolock)) { 442 ret = PTR_ERR(priv->map_nolock); 443 dev_err(dev, "regmap init failed: %d\n", ret); 444 return ret; 445 } 446 447 /* Link forward and backward */ 448 priv->dev = dev; 449 priv->clk_delay = var->clk_delay; 450 priv->cmd_read = var->cmd_read; 451 priv->cmd_write = var->cmd_write; 452 priv->ops = var->ops; 453 454 priv->setup_interface = realtek_smi_setup_mdio; 455 priv->write_reg_noack = realtek_smi_write_reg_noack; 456 457 dev_set_drvdata(dev, priv); 458 spin_lock_init(&priv->lock); 459 460 /* TODO: if power is software controlled, set up any regulators here */ 461 462 priv->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 463 if (IS_ERR(priv->reset)) { 464 dev_err(dev, "failed to get RESET GPIO\n"); 465 return PTR_ERR(priv->reset); 466 } 467 if (priv->reset) { 468 gpiod_set_value(priv->reset, 1); 469 dev_dbg(dev, "asserted RESET\n"); 470 msleep(REALTEK_HW_STOP_DELAY); 471 gpiod_set_value(priv->reset, 0); 472 msleep(REALTEK_HW_START_DELAY); 473 dev_dbg(dev, "deasserted RESET\n"); 474 } 475 476 /* Fetch MDIO pins */ 477 priv->mdc = devm_gpiod_get_optional(dev, "mdc", GPIOD_OUT_LOW); 478 if (IS_ERR(priv->mdc)) 479 return PTR_ERR(priv->mdc); 480 priv->mdio = devm_gpiod_get_optional(dev, "mdio", GPIOD_OUT_LOW); 481 if (IS_ERR(priv->mdio)) 482 return PTR_ERR(priv->mdio); 483 484 priv->leds_disabled = of_property_read_bool(np, "realtek,disable-leds"); 485 486 ret = priv->ops->detect(priv); 487 if (ret) { 488 dev_err(dev, "unable to detect switch\n"); 489 return ret; 490 } 491 492 priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL); 493 if (!priv->ds) 494 return -ENOMEM; 495 496 priv->ds->dev = dev; 497 priv->ds->num_ports = priv->num_ports; 498 priv->ds->priv = priv; 499 500 priv->ds->ops = var->ds_ops_smi; 501 ret = dsa_register_switch(priv->ds); 502 if (ret) { 503 dev_err_probe(dev, ret, "unable to register switch\n"); 504 return ret; 505 } 506 return 0; 507 } 508 509 static void realtek_smi_remove(struct platform_device *pdev) 510 { 511 struct realtek_priv *priv = platform_get_drvdata(pdev); 512 513 if (!priv) 514 return; 515 516 dsa_unregister_switch(priv->ds); 517 if (priv->user_mii_bus) 518 of_node_put(priv->user_mii_bus->dev.of_node); 519 520 /* leave the device reset asserted */ 521 if (priv->reset) 522 gpiod_set_value(priv->reset, 1); 523 } 524 525 static void realtek_smi_shutdown(struct platform_device *pdev) 526 { 527 struct realtek_priv *priv = platform_get_drvdata(pdev); 528 529 if (!priv) 530 return; 531 532 dsa_switch_shutdown(priv->ds); 533 534 platform_set_drvdata(pdev, NULL); 535 } 536 537 static const struct of_device_id realtek_smi_of_match[] = { 538 #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB) 539 { 540 .compatible = "realtek,rtl8366rb", 541 .data = &rtl8366rb_variant, 542 }, 543 #endif 544 #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB) 545 { 546 .compatible = "realtek,rtl8365mb", 547 .data = &rtl8365mb_variant, 548 }, 549 #endif 550 { /* sentinel */ }, 551 }; 552 MODULE_DEVICE_TABLE(of, realtek_smi_of_match); 553 554 static struct platform_driver realtek_smi_driver = { 555 .driver = { 556 .name = "realtek-smi", 557 .of_match_table = realtek_smi_of_match, 558 }, 559 .probe = realtek_smi_probe, 560 .remove_new = realtek_smi_remove, 561 .shutdown = realtek_smi_shutdown, 562 }; 563 module_platform_driver(realtek_smi_driver); 564 565 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>"); 566 MODULE_DESCRIPTION("Driver for Realtek ethernet switch connected via SMI interface"); 567 MODULE_LICENSE("GPL"); 568