1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright(c) 2007 Atheros Corporation. All rights reserved. 4 * 5 * Derived from Intel e1000 driver 6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 7 */ 8 9 #include "atl1e.h" 10 11 #define DRV_VERSION "1.0.0.7-NAPI" 12 13 char atl1e_driver_name[] = "ATL1E"; 14 char atl1e_driver_version[] = DRV_VERSION; 15 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026 16 /* 17 * atl1e_pci_tbl - PCI Device ID Table 18 * 19 * Wildcard entries (PCI_ANY_ID) should come last 20 * Last entry must be all 0s 21 * 22 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 23 * Class, Class Mask, private data (not used) } 24 */ 25 static const struct pci_device_id atl1e_pci_tbl[] = { 26 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)}, 27 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)}, 28 /* required last entry */ 29 { 0 } 30 }; 31 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl); 32 33 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>"); 34 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 35 MODULE_LICENSE("GPL"); 36 MODULE_VERSION(DRV_VERSION); 37 38 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); 39 40 static const u16 41 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 42 { 43 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD}, 44 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD}, 45 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD}, 46 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD} 47 }; 48 49 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] = 50 { 51 REG_RXF0_BASE_ADDR_HI, 52 REG_RXF1_BASE_ADDR_HI, 53 REG_RXF2_BASE_ADDR_HI, 54 REG_RXF3_BASE_ADDR_HI 55 }; 56 57 static const u16 58 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 59 { 60 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO}, 61 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO}, 62 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO}, 63 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO} 64 }; 65 66 static const u16 67 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 68 { 69 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO}, 70 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO}, 71 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO}, 72 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO} 73 }; 74 75 static const u16 atl1e_pay_load_size[] = { 76 128, 256, 512, 1024, 2048, 4096, 77 }; 78 79 /** 80 * atl1e_irq_enable - Enable default interrupt generation settings 81 * @adapter: board private structure 82 */ 83 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter) 84 { 85 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 86 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 87 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); 88 AT_WRITE_FLUSH(&adapter->hw); 89 } 90 } 91 92 /** 93 * atl1e_irq_disable - Mask off interrupt generation on the NIC 94 * @adapter: board private structure 95 */ 96 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter) 97 { 98 atomic_inc(&adapter->irq_sem); 99 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 100 AT_WRITE_FLUSH(&adapter->hw); 101 synchronize_irq(adapter->pdev->irq); 102 } 103 104 /** 105 * atl1e_irq_reset - reset interrupt confiure on the NIC 106 * @adapter: board private structure 107 */ 108 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter) 109 { 110 atomic_set(&adapter->irq_sem, 0); 111 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 113 AT_WRITE_FLUSH(&adapter->hw); 114 } 115 116 /** 117 * atl1e_phy_config - Timer Call-back 118 * @data: pointer to netdev cast into an unsigned long 119 */ 120 static void atl1e_phy_config(struct timer_list *t) 121 { 122 struct atl1e_adapter *adapter = from_timer(adapter, t, 123 phy_config_timer); 124 struct atl1e_hw *hw = &adapter->hw; 125 unsigned long flags; 126 127 spin_lock_irqsave(&adapter->mdio_lock, flags); 128 atl1e_restart_autoneg(hw); 129 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 130 } 131 132 void atl1e_reinit_locked(struct atl1e_adapter *adapter) 133 { 134 135 WARN_ON(in_interrupt()); 136 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 137 msleep(1); 138 atl1e_down(adapter); 139 atl1e_up(adapter); 140 clear_bit(__AT_RESETTING, &adapter->flags); 141 } 142 143 static void atl1e_reset_task(struct work_struct *work) 144 { 145 struct atl1e_adapter *adapter; 146 adapter = container_of(work, struct atl1e_adapter, reset_task); 147 148 atl1e_reinit_locked(adapter); 149 } 150 151 static int atl1e_check_link(struct atl1e_adapter *adapter) 152 { 153 struct atl1e_hw *hw = &adapter->hw; 154 struct net_device *netdev = adapter->netdev; 155 int err = 0; 156 u16 speed, duplex, phy_data; 157 158 /* MII_BMSR must read twice */ 159 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 160 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 161 if ((phy_data & BMSR_LSTATUS) == 0) { 162 /* link down */ 163 if (netif_carrier_ok(netdev)) { /* old link state: Up */ 164 u32 value; 165 /* disable rx */ 166 value = AT_READ_REG(hw, REG_MAC_CTRL); 167 value &= ~MAC_CTRL_RX_EN; 168 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 169 adapter->link_speed = SPEED_0; 170 netif_carrier_off(netdev); 171 netif_stop_queue(netdev); 172 } 173 } else { 174 /* Link Up */ 175 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex); 176 if (unlikely(err)) 177 return err; 178 179 /* link result is our setting */ 180 if (adapter->link_speed != speed || 181 adapter->link_duplex != duplex) { 182 adapter->link_speed = speed; 183 adapter->link_duplex = duplex; 184 atl1e_setup_mac_ctrl(adapter); 185 netdev_info(netdev, 186 "NIC Link is Up <%d Mbps %s Duplex>\n", 187 adapter->link_speed, 188 adapter->link_duplex == FULL_DUPLEX ? 189 "Full" : "Half"); 190 } 191 192 if (!netif_carrier_ok(netdev)) { 193 /* Link down -> Up */ 194 netif_carrier_on(netdev); 195 netif_wake_queue(netdev); 196 } 197 } 198 return 0; 199 } 200 201 /** 202 * atl1e_link_chg_task - deal with link change event Out of interrupt context 203 * @netdev: network interface device structure 204 */ 205 static void atl1e_link_chg_task(struct work_struct *work) 206 { 207 struct atl1e_adapter *adapter; 208 unsigned long flags; 209 210 adapter = container_of(work, struct atl1e_adapter, link_chg_task); 211 spin_lock_irqsave(&adapter->mdio_lock, flags); 212 atl1e_check_link(adapter); 213 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 214 } 215 216 static void atl1e_link_chg_event(struct atl1e_adapter *adapter) 217 { 218 struct net_device *netdev = adapter->netdev; 219 u16 phy_data = 0; 220 u16 link_up = 0; 221 222 spin_lock(&adapter->mdio_lock); 223 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 224 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 225 spin_unlock(&adapter->mdio_lock); 226 link_up = phy_data & BMSR_LSTATUS; 227 /* notify upper layer link down ASAP */ 228 if (!link_up) { 229 if (netif_carrier_ok(netdev)) { 230 /* old link state: Up */ 231 netdev_info(netdev, "NIC Link is Down\n"); 232 adapter->link_speed = SPEED_0; 233 netif_stop_queue(netdev); 234 } 235 } 236 schedule_work(&adapter->link_chg_task); 237 } 238 239 static void atl1e_del_timer(struct atl1e_adapter *adapter) 240 { 241 del_timer_sync(&adapter->phy_config_timer); 242 } 243 244 static void atl1e_cancel_work(struct atl1e_adapter *adapter) 245 { 246 cancel_work_sync(&adapter->reset_task); 247 cancel_work_sync(&adapter->link_chg_task); 248 } 249 250 /** 251 * atl1e_tx_timeout - Respond to a Tx Hang 252 * @netdev: network interface device structure 253 */ 254 static void atl1e_tx_timeout(struct net_device *netdev) 255 { 256 struct atl1e_adapter *adapter = netdev_priv(netdev); 257 258 /* Do the reset outside of interrupt context */ 259 schedule_work(&adapter->reset_task); 260 } 261 262 /** 263 * atl1e_set_multi - Multicast and Promiscuous mode set 264 * @netdev: network interface device structure 265 * 266 * The set_multi entry point is called whenever the multicast address 267 * list or the network interface flags are updated. This routine is 268 * responsible for configuring the hardware for proper multicast, 269 * promiscuous mode, and all-multi behavior. 270 */ 271 static void atl1e_set_multi(struct net_device *netdev) 272 { 273 struct atl1e_adapter *adapter = netdev_priv(netdev); 274 struct atl1e_hw *hw = &adapter->hw; 275 struct netdev_hw_addr *ha; 276 u32 mac_ctrl_data = 0; 277 u32 hash_value; 278 279 /* Check for Promiscuous and All Multicast modes */ 280 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL); 281 282 if (netdev->flags & IFF_PROMISC) { 283 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 284 } else if (netdev->flags & IFF_ALLMULTI) { 285 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 286 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 287 } else { 288 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 289 } 290 291 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 292 293 /* clear the old settings from the multicast hash table */ 294 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 295 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 296 297 /* comoute mc addresses' hash value ,and put it into hash table */ 298 netdev_for_each_mc_addr(ha, netdev) { 299 hash_value = atl1e_hash_mc_addr(hw, ha->addr); 300 atl1e_hash_set(hw, hash_value); 301 } 302 } 303 304 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data) 305 { 306 307 if (features & NETIF_F_RXALL) { 308 /* enable RX of ALL frames */ 309 *mac_ctrl_data |= MAC_CTRL_DBG; 310 } else { 311 /* disable RX of ALL frames */ 312 *mac_ctrl_data &= ~MAC_CTRL_DBG; 313 } 314 } 315 316 static void atl1e_rx_mode(struct net_device *netdev, 317 netdev_features_t features) 318 { 319 struct atl1e_adapter *adapter = netdev_priv(netdev); 320 u32 mac_ctrl_data = 0; 321 322 netdev_dbg(adapter->netdev, "%s\n", __func__); 323 324 atl1e_irq_disable(adapter); 325 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 326 __atl1e_rx_mode(features, &mac_ctrl_data); 327 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 328 atl1e_irq_enable(adapter); 329 } 330 331 332 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 333 { 334 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 335 /* enable VLAN tag insert/strip */ 336 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 337 } else { 338 /* disable VLAN tag insert/strip */ 339 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 340 } 341 } 342 343 static void atl1e_vlan_mode(struct net_device *netdev, 344 netdev_features_t features) 345 { 346 struct atl1e_adapter *adapter = netdev_priv(netdev); 347 u32 mac_ctrl_data = 0; 348 349 netdev_dbg(adapter->netdev, "%s\n", __func__); 350 351 atl1e_irq_disable(adapter); 352 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 353 __atl1e_vlan_mode(features, &mac_ctrl_data); 354 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 355 atl1e_irq_enable(adapter); 356 } 357 358 static void atl1e_restore_vlan(struct atl1e_adapter *adapter) 359 { 360 netdev_dbg(adapter->netdev, "%s\n", __func__); 361 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features); 362 } 363 364 /** 365 * atl1e_set_mac - Change the Ethernet Address of the NIC 366 * @netdev: network interface device structure 367 * @p: pointer to an address structure 368 * 369 * Returns 0 on success, negative on failure 370 */ 371 static int atl1e_set_mac_addr(struct net_device *netdev, void *p) 372 { 373 struct atl1e_adapter *adapter = netdev_priv(netdev); 374 struct sockaddr *addr = p; 375 376 if (!is_valid_ether_addr(addr->sa_data)) 377 return -EADDRNOTAVAIL; 378 379 if (netif_running(netdev)) 380 return -EBUSY; 381 382 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 383 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 384 385 atl1e_hw_set_mac_addr(&adapter->hw); 386 387 return 0; 388 } 389 390 static netdev_features_t atl1e_fix_features(struct net_device *netdev, 391 netdev_features_t features) 392 { 393 /* 394 * Since there is no support for separate rx/tx vlan accel 395 * enable/disable make sure tx flag is always in same state as rx. 396 */ 397 if (features & NETIF_F_HW_VLAN_CTAG_RX) 398 features |= NETIF_F_HW_VLAN_CTAG_TX; 399 else 400 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 401 402 return features; 403 } 404 405 static int atl1e_set_features(struct net_device *netdev, 406 netdev_features_t features) 407 { 408 netdev_features_t changed = netdev->features ^ features; 409 410 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 411 atl1e_vlan_mode(netdev, features); 412 413 if (changed & NETIF_F_RXALL) 414 atl1e_rx_mode(netdev, features); 415 416 417 return 0; 418 } 419 420 /** 421 * atl1e_change_mtu - Change the Maximum Transfer Unit 422 * @netdev: network interface device structure 423 * @new_mtu: new value for maximum frame size 424 * 425 * Returns 0 on success, negative on failure 426 */ 427 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu) 428 { 429 struct atl1e_adapter *adapter = netdev_priv(netdev); 430 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 431 432 /* set MTU */ 433 if (netif_running(netdev)) { 434 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 435 msleep(1); 436 netdev->mtu = new_mtu; 437 adapter->hw.max_frame_size = new_mtu; 438 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3; 439 atl1e_down(adapter); 440 atl1e_up(adapter); 441 clear_bit(__AT_RESETTING, &adapter->flags); 442 } 443 return 0; 444 } 445 446 /* 447 * caller should hold mdio_lock 448 */ 449 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 450 { 451 struct atl1e_adapter *adapter = netdev_priv(netdev); 452 u16 result; 453 454 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 455 return result; 456 } 457 458 static void atl1e_mdio_write(struct net_device *netdev, int phy_id, 459 int reg_num, int val) 460 { 461 struct atl1e_adapter *adapter = netdev_priv(netdev); 462 463 if (atl1e_write_phy_reg(&adapter->hw, 464 reg_num & MDIO_REG_ADDR_MASK, val)) 465 netdev_err(netdev, "write phy register failed\n"); 466 } 467 468 static int atl1e_mii_ioctl(struct net_device *netdev, 469 struct ifreq *ifr, int cmd) 470 { 471 struct atl1e_adapter *adapter = netdev_priv(netdev); 472 struct mii_ioctl_data *data = if_mii(ifr); 473 unsigned long flags; 474 int retval = 0; 475 476 if (!netif_running(netdev)) 477 return -EINVAL; 478 479 spin_lock_irqsave(&adapter->mdio_lock, flags); 480 switch (cmd) { 481 case SIOCGMIIPHY: 482 data->phy_id = 0; 483 break; 484 485 case SIOCGMIIREG: 486 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 487 &data->val_out)) { 488 retval = -EIO; 489 goto out; 490 } 491 break; 492 493 case SIOCSMIIREG: 494 if (data->reg_num & ~(0x1F)) { 495 retval = -EFAULT; 496 goto out; 497 } 498 499 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n", 500 data->reg_num, data->val_in); 501 if (atl1e_write_phy_reg(&adapter->hw, 502 data->reg_num, data->val_in)) { 503 retval = -EIO; 504 goto out; 505 } 506 break; 507 508 default: 509 retval = -EOPNOTSUPP; 510 break; 511 } 512 out: 513 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 514 return retval; 515 516 } 517 518 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 519 { 520 switch (cmd) { 521 case SIOCGMIIPHY: 522 case SIOCGMIIREG: 523 case SIOCSMIIREG: 524 return atl1e_mii_ioctl(netdev, ifr, cmd); 525 default: 526 return -EOPNOTSUPP; 527 } 528 } 529 530 static void atl1e_setup_pcicmd(struct pci_dev *pdev) 531 { 532 u16 cmd; 533 534 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 535 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO); 536 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); 537 pci_write_config_word(pdev, PCI_COMMAND, cmd); 538 539 /* 540 * some motherboards BIOS(PXE/EFI) driver may set PME 541 * while they transfer control to OS (Windows/Linux) 542 * so we should clear this bit before NIC work normally 543 */ 544 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); 545 msleep(1); 546 } 547 548 /** 549 * atl1e_alloc_queues - Allocate memory for all rings 550 * @adapter: board private structure to initialize 551 * 552 */ 553 static int atl1e_alloc_queues(struct atl1e_adapter *adapter) 554 { 555 return 0; 556 } 557 558 /** 559 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter) 560 * @adapter: board private structure to initialize 561 * 562 * atl1e_sw_init initializes the Adapter private data structure. 563 * Fields are initialized based on PCI device information and 564 * OS network device settings (MTU size). 565 */ 566 static int atl1e_sw_init(struct atl1e_adapter *adapter) 567 { 568 struct atl1e_hw *hw = &adapter->hw; 569 struct pci_dev *pdev = adapter->pdev; 570 u32 phy_status_data = 0; 571 572 adapter->wol = 0; 573 adapter->link_speed = SPEED_0; /* hardware init */ 574 adapter->link_duplex = FULL_DUPLEX; 575 adapter->num_rx_queues = 1; 576 577 /* PCI config space info */ 578 hw->vendor_id = pdev->vendor; 579 hw->device_id = pdev->device; 580 hw->subsystem_vendor_id = pdev->subsystem_vendor; 581 hw->subsystem_id = pdev->subsystem_device; 582 hw->revision_id = pdev->revision; 583 584 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 585 586 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 587 /* nic type */ 588 if (hw->revision_id >= 0xF0) { 589 hw->nic_type = athr_l2e_revB; 590 } else { 591 if (phy_status_data & PHY_STATUS_100M) 592 hw->nic_type = athr_l1e; 593 else 594 hw->nic_type = athr_l2e_revA; 595 } 596 597 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 598 599 if (phy_status_data & PHY_STATUS_EMI_CA) 600 hw->emi_ca = true; 601 else 602 hw->emi_ca = false; 603 604 hw->phy_configured = false; 605 hw->preamble_len = 7; 606 hw->max_frame_size = adapter->netdev->mtu; 607 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN + 608 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3; 609 610 hw->rrs_type = atl1e_rrs_disable; 611 hw->indirect_tab = 0; 612 hw->base_cpu = 0; 613 614 /* need confirm */ 615 616 hw->ict = 50000; /* 100ms */ 617 hw->smb_timer = 200000; /* 200ms */ 618 hw->tpd_burst = 5; 619 hw->rrd_thresh = 1; 620 hw->tpd_thresh = adapter->tx_ring.count / 2; 621 hw->rx_count_down = 4; /* 2us resolution */ 622 hw->tx_count_down = hw->imt * 4 / 3; 623 hw->dmar_block = atl1e_dma_req_1024; 624 hw->dmaw_block = atl1e_dma_req_1024; 625 hw->dmar_dly_cnt = 15; 626 hw->dmaw_dly_cnt = 4; 627 628 if (atl1e_alloc_queues(adapter)) { 629 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n"); 630 return -ENOMEM; 631 } 632 633 atomic_set(&adapter->irq_sem, 1); 634 spin_lock_init(&adapter->mdio_lock); 635 636 set_bit(__AT_DOWN, &adapter->flags); 637 638 return 0; 639 } 640 641 /** 642 * atl1e_clean_tx_ring - Free Tx-skb 643 * @adapter: board private structure 644 */ 645 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) 646 { 647 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 648 struct atl1e_tx_buffer *tx_buffer = NULL; 649 struct pci_dev *pdev = adapter->pdev; 650 u16 index, ring_count; 651 652 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL) 653 return; 654 655 ring_count = tx_ring->count; 656 /* first unmmap dma */ 657 for (index = 0; index < ring_count; index++) { 658 tx_buffer = &tx_ring->tx_buffer[index]; 659 if (tx_buffer->dma) { 660 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 661 pci_unmap_single(pdev, tx_buffer->dma, 662 tx_buffer->length, PCI_DMA_TODEVICE); 663 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 664 pci_unmap_page(pdev, tx_buffer->dma, 665 tx_buffer->length, PCI_DMA_TODEVICE); 666 tx_buffer->dma = 0; 667 } 668 } 669 /* second free skb */ 670 for (index = 0; index < ring_count; index++) { 671 tx_buffer = &tx_ring->tx_buffer[index]; 672 if (tx_buffer->skb) { 673 dev_kfree_skb_any(tx_buffer->skb); 674 tx_buffer->skb = NULL; 675 } 676 } 677 /* Zero out Tx-buffers */ 678 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) * 679 ring_count); 680 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) * 681 ring_count); 682 } 683 684 /** 685 * atl1e_clean_rx_ring - Free rx-reservation skbs 686 * @adapter: board private structure 687 */ 688 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter) 689 { 690 struct atl1e_rx_ring *rx_ring = 691 &adapter->rx_ring; 692 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc; 693 u16 i, j; 694 695 696 if (adapter->ring_vir_addr == NULL) 697 return; 698 /* Zero out the descriptor ring */ 699 for (i = 0; i < adapter->num_rx_queues; i++) { 700 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 701 if (rx_page_desc[i].rx_page[j].addr != NULL) { 702 memset(rx_page_desc[i].rx_page[j].addr, 0, 703 rx_ring->real_page_size); 704 } 705 } 706 } 707 } 708 709 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size) 710 { 711 *ring_size = ((u32)(adapter->tx_ring.count * 712 sizeof(struct atl1e_tpd_desc) + 7 713 /* tx ring, qword align */ 714 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE * 715 adapter->num_rx_queues + 31 716 /* rx ring, 32 bytes align */ 717 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) * 718 sizeof(u32) + 3)); 719 /* tx, rx cmd, dword align */ 720 } 721 722 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter) 723 { 724 struct atl1e_rx_ring *rx_ring = NULL; 725 726 rx_ring = &adapter->rx_ring; 727 728 rx_ring->real_page_size = adapter->rx_ring.page_size 729 + adapter->hw.max_frame_size 730 + ETH_HLEN + VLAN_HLEN 731 + ETH_FCS_LEN; 732 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32); 733 atl1e_cal_ring_size(adapter, &adapter->ring_size); 734 735 adapter->ring_vir_addr = NULL; 736 adapter->rx_ring.desc = NULL; 737 rwlock_init(&adapter->tx_ring.tx_lock); 738 } 739 740 /* 741 * Read / Write Ptr Initialize: 742 */ 743 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter) 744 { 745 struct atl1e_tx_ring *tx_ring = NULL; 746 struct atl1e_rx_ring *rx_ring = NULL; 747 struct atl1e_rx_page_desc *rx_page_desc = NULL; 748 int i, j; 749 750 tx_ring = &adapter->tx_ring; 751 rx_ring = &adapter->rx_ring; 752 rx_page_desc = rx_ring->rx_page_desc; 753 754 tx_ring->next_to_use = 0; 755 atomic_set(&tx_ring->next_to_clean, 0); 756 757 for (i = 0; i < adapter->num_rx_queues; i++) { 758 rx_page_desc[i].rx_using = 0; 759 rx_page_desc[i].rx_nxseq = 0; 760 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 761 *rx_page_desc[i].rx_page[j].write_offset_addr = 0; 762 rx_page_desc[i].rx_page[j].read_offset = 0; 763 } 764 } 765 } 766 767 /** 768 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources 769 * @adapter: board private structure 770 * 771 * Free all transmit software resources 772 */ 773 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter) 774 { 775 struct pci_dev *pdev = adapter->pdev; 776 777 atl1e_clean_tx_ring(adapter); 778 atl1e_clean_rx_ring(adapter); 779 780 if (adapter->ring_vir_addr) { 781 pci_free_consistent(pdev, adapter->ring_size, 782 adapter->ring_vir_addr, adapter->ring_dma); 783 adapter->ring_vir_addr = NULL; 784 } 785 786 if (adapter->tx_ring.tx_buffer) { 787 kfree(adapter->tx_ring.tx_buffer); 788 adapter->tx_ring.tx_buffer = NULL; 789 } 790 } 791 792 /** 793 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources 794 * @adapter: board private structure 795 * 796 * Return 0 on success, negative on failure 797 */ 798 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter) 799 { 800 struct pci_dev *pdev = adapter->pdev; 801 struct atl1e_tx_ring *tx_ring; 802 struct atl1e_rx_ring *rx_ring; 803 struct atl1e_rx_page_desc *rx_page_desc; 804 int size, i, j; 805 u32 offset = 0; 806 int err = 0; 807 808 if (adapter->ring_vir_addr != NULL) 809 return 0; /* alloced already */ 810 811 tx_ring = &adapter->tx_ring; 812 rx_ring = &adapter->rx_ring; 813 814 /* real ring DMA buffer */ 815 816 size = adapter->ring_size; 817 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size, 818 &adapter->ring_dma); 819 if (adapter->ring_vir_addr == NULL) { 820 netdev_err(adapter->netdev, 821 "pci_alloc_consistent failed, size = D%d\n", size); 822 return -ENOMEM; 823 } 824 825 rx_page_desc = rx_ring->rx_page_desc; 826 827 /* Init TPD Ring */ 828 tx_ring->dma = roundup(adapter->ring_dma, 8); 829 offset = tx_ring->dma - adapter->ring_dma; 830 tx_ring->desc = adapter->ring_vir_addr + offset; 831 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count); 832 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL); 833 if (tx_ring->tx_buffer == NULL) { 834 err = -ENOMEM; 835 goto failed; 836 } 837 838 /* Init RXF-Pages */ 839 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count); 840 offset = roundup(offset, 32); 841 842 for (i = 0; i < adapter->num_rx_queues; i++) { 843 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 844 rx_page_desc[i].rx_page[j].dma = 845 adapter->ring_dma + offset; 846 rx_page_desc[i].rx_page[j].addr = 847 adapter->ring_vir_addr + offset; 848 offset += rx_ring->real_page_size; 849 } 850 } 851 852 /* Init CMB dma address */ 853 tx_ring->cmb_dma = adapter->ring_dma + offset; 854 tx_ring->cmb = adapter->ring_vir_addr + offset; 855 offset += sizeof(u32); 856 857 for (i = 0; i < adapter->num_rx_queues; i++) { 858 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 859 rx_page_desc[i].rx_page[j].write_offset_dma = 860 adapter->ring_dma + offset; 861 rx_page_desc[i].rx_page[j].write_offset_addr = 862 adapter->ring_vir_addr + offset; 863 offset += sizeof(u32); 864 } 865 } 866 867 if (unlikely(offset > adapter->ring_size)) { 868 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n", 869 offset, adapter->ring_size); 870 err = -1; 871 goto failed; 872 } 873 874 return 0; 875 failed: 876 if (adapter->ring_vir_addr != NULL) { 877 pci_free_consistent(pdev, adapter->ring_size, 878 adapter->ring_vir_addr, adapter->ring_dma); 879 adapter->ring_vir_addr = NULL; 880 } 881 return err; 882 } 883 884 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter) 885 { 886 887 struct atl1e_hw *hw = &adapter->hw; 888 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 889 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 890 struct atl1e_rx_page_desc *rx_page_desc = NULL; 891 int i, j; 892 893 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, 894 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32)); 895 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO, 896 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK)); 897 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count)); 898 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO, 899 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK)); 900 901 rx_page_desc = rx_ring->rx_page_desc; 902 /* RXF Page Physical address / Page Length */ 903 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) { 904 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i], 905 (u32)((adapter->ring_dma & 906 AT_DMA_HI_ADDR_MASK) >> 32)); 907 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 908 u32 page_phy_addr; 909 u32 offset_phy_addr; 910 911 page_phy_addr = rx_page_desc[i].rx_page[j].dma; 912 offset_phy_addr = 913 rx_page_desc[i].rx_page[j].write_offset_dma; 914 915 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j], 916 page_phy_addr & AT_DMA_LO_ADDR_MASK); 917 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j], 918 offset_phy_addr & AT_DMA_LO_ADDR_MASK); 919 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1); 920 } 921 } 922 /* Page Length */ 923 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size); 924 /* Load all of base address above */ 925 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 926 } 927 928 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter) 929 { 930 struct atl1e_hw *hw = &adapter->hw; 931 u32 dev_ctrl_data = 0; 932 u32 max_pay_load = 0; 933 u32 jumbo_thresh = 0; 934 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ 935 936 /* configure TXQ param */ 937 if (hw->nic_type != athr_l2e_revB) { 938 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; 939 if (hw->max_frame_size <= 1500) { 940 jumbo_thresh = hw->max_frame_size + extra_size; 941 } else if (hw->max_frame_size < 6*1024) { 942 jumbo_thresh = 943 (hw->max_frame_size + extra_size) * 2 / 3; 944 } else { 945 jumbo_thresh = (hw->max_frame_size + extra_size) / 2; 946 } 947 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3); 948 } 949 950 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL); 951 952 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) & 953 DEVICE_CTRL_MAX_PAYLOAD_MASK; 954 955 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 956 957 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) & 958 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 959 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 960 961 if (hw->nic_type != athr_l2e_revB) 962 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2, 963 atl1e_pay_load_size[hw->dmar_block]); 964 /* enable TXQ */ 965 AT_WRITE_REGW(hw, REG_TXQ_CTRL, 966 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK) 967 << TXQ_CTRL_NUM_TPD_BURST_SHIFT) 968 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN); 969 } 970 971 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter) 972 { 973 struct atl1e_hw *hw = &adapter->hw; 974 u32 rxf_len = 0; 975 u32 rxf_low = 0; 976 u32 rxf_high = 0; 977 u32 rxf_thresh_data = 0; 978 u32 rxq_ctrl_data = 0; 979 980 if (hw->nic_type != athr_l2e_revB) { 981 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM, 982 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) << 983 RXQ_JMBOSZ_TH_SHIFT | 984 (1 & RXQ_JMBO_LKAH_MASK) << 985 RXQ_JMBO_LKAH_SHIFT)); 986 987 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN); 988 rxf_high = rxf_len * 4 / 5; 989 rxf_low = rxf_len / 5; 990 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK) 991 << RXQ_RXF_PAUSE_TH_HI_SHIFT) | 992 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK) 993 << RXQ_RXF_PAUSE_TH_LO_SHIFT); 994 995 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data); 996 } 997 998 /* RRS */ 999 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 1000 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 1001 1002 if (hw->rrs_type & atl1e_rrs_ipv4) 1003 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4; 1004 1005 if (hw->rrs_type & atl1e_rrs_ipv4_tcp) 1006 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP; 1007 1008 if (hw->rrs_type & atl1e_rrs_ipv6) 1009 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6; 1010 1011 if (hw->rrs_type & atl1e_rrs_ipv6_tcp) 1012 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP; 1013 1014 if (hw->rrs_type != atl1e_rrs_disable) 1015 rxq_ctrl_data |= 1016 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT); 1017 1018 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 | 1019 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN; 1020 1021 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1022 } 1023 1024 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter) 1025 { 1026 struct atl1e_hw *hw = &adapter->hw; 1027 u32 dma_ctrl_data = 0; 1028 1029 dma_ctrl_data = DMA_CTRL_RXCMB_EN; 1030 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1031 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1032 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1033 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1034 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER; 1035 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1036 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1037 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1038 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1039 1040 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1041 } 1042 1043 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) 1044 { 1045 u32 value; 1046 struct atl1e_hw *hw = &adapter->hw; 1047 struct net_device *netdev = adapter->netdev; 1048 1049 /* Config MAC CTRL Register */ 1050 value = MAC_CTRL_TX_EN | 1051 MAC_CTRL_RX_EN ; 1052 1053 if (FULL_DUPLEX == adapter->link_duplex) 1054 value |= MAC_CTRL_DUPLX; 1055 1056 value |= ((u32)((SPEED_1000 == adapter->link_speed) ? 1057 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << 1058 MAC_CTRL_SPEED_SHIFT); 1059 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1060 1061 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1062 value |= (((u32)adapter->hw.preamble_len & 1063 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); 1064 1065 __atl1e_vlan_mode(netdev->features, &value); 1066 1067 value |= MAC_CTRL_BC_EN; 1068 if (netdev->flags & IFF_PROMISC) 1069 value |= MAC_CTRL_PROMIS_EN; 1070 if (netdev->flags & IFF_ALLMULTI) 1071 value |= MAC_CTRL_MC_ALL_EN; 1072 if (netdev->features & NETIF_F_RXALL) 1073 value |= MAC_CTRL_DBG; 1074 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 1075 } 1076 1077 /** 1078 * atl1e_configure - Configure Transmit&Receive Unit after Reset 1079 * @adapter: board private structure 1080 * 1081 * Configure the Tx /Rx unit of the MAC after a reset. 1082 */ 1083 static int atl1e_configure(struct atl1e_adapter *adapter) 1084 { 1085 struct atl1e_hw *hw = &adapter->hw; 1086 1087 u32 intr_status_data = 0; 1088 1089 /* clear interrupt status */ 1090 AT_WRITE_REG(hw, REG_ISR, ~0); 1091 1092 /* 1. set MAC Address */ 1093 atl1e_hw_set_mac_addr(hw); 1094 1095 /* 2. Init the Multicast HASH table done by set_muti */ 1096 1097 /* 3. Clear any WOL status */ 1098 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1099 1100 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr 1101 * TPD Ring/SMB/RXF0 Page CMBs, they use the same 1102 * High 32bits memory */ 1103 atl1e_configure_des_ring(adapter); 1104 1105 /* 5. set Interrupt Moderator Timer */ 1106 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt); 1107 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt); 1108 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE | 1109 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN); 1110 1111 /* 6. rx/tx threshold to trig interrupt */ 1112 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh); 1113 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh); 1114 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down); 1115 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down); 1116 1117 /* 7. set Interrupt Clear Timer */ 1118 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict); 1119 1120 /* 8. set MTU */ 1121 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1122 VLAN_HLEN + ETH_FCS_LEN); 1123 1124 /* 9. config TXQ early tx threshold */ 1125 atl1e_configure_tx(adapter); 1126 1127 /* 10. config RXQ */ 1128 atl1e_configure_rx(adapter); 1129 1130 /* 11. config DMA Engine */ 1131 atl1e_configure_dma(adapter); 1132 1133 /* 12. smb timer to trig interrupt */ 1134 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer); 1135 1136 intr_status_data = AT_READ_REG(hw, REG_ISR); 1137 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) { 1138 netdev_err(adapter->netdev, 1139 "atl1e_configure failed, PCIE phy link down\n"); 1140 return -1; 1141 } 1142 1143 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff); 1144 return 0; 1145 } 1146 1147 /** 1148 * atl1e_get_stats - Get System Network Statistics 1149 * @netdev: network interface device structure 1150 * 1151 * Returns the address of the device statistics structure. 1152 * The statistics are actually updated from the timer callback. 1153 */ 1154 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev) 1155 { 1156 struct atl1e_adapter *adapter = netdev_priv(netdev); 1157 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; 1158 struct net_device_stats *net_stats = &netdev->stats; 1159 1160 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1161 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1162 net_stats->multicast = hw_stats->rx_mcast; 1163 net_stats->collisions = hw_stats->tx_1_col + 1164 hw_stats->tx_2_col + 1165 hw_stats->tx_late_col + 1166 hw_stats->tx_abort_col; 1167 1168 net_stats->rx_errors = hw_stats->rx_frag + 1169 hw_stats->rx_fcs_err + 1170 hw_stats->rx_len_err + 1171 hw_stats->rx_sz_ov + 1172 hw_stats->rx_rrd_ov + 1173 hw_stats->rx_align_err + 1174 hw_stats->rx_rxf_ov; 1175 1176 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1177 net_stats->rx_length_errors = hw_stats->rx_len_err; 1178 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1179 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1180 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1181 1182 net_stats->tx_errors = hw_stats->tx_late_col + 1183 hw_stats->tx_abort_col + 1184 hw_stats->tx_underrun + 1185 hw_stats->tx_trunc; 1186 1187 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1188 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1189 net_stats->tx_window_errors = hw_stats->tx_late_col; 1190 1191 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1192 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1193 1194 return net_stats; 1195 } 1196 1197 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) 1198 { 1199 u16 hw_reg_addr = 0; 1200 unsigned long *stats_item = NULL; 1201 1202 /* update rx status */ 1203 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1204 stats_item = &adapter->hw_stats.rx_ok; 1205 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1206 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1207 stats_item++; 1208 hw_reg_addr += 4; 1209 } 1210 /* update tx status */ 1211 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1212 stats_item = &adapter->hw_stats.tx_ok; 1213 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1214 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1215 stats_item++; 1216 hw_reg_addr += 4; 1217 } 1218 } 1219 1220 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter) 1221 { 1222 u16 phy_data; 1223 1224 spin_lock(&adapter->mdio_lock); 1225 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data); 1226 spin_unlock(&adapter->mdio_lock); 1227 } 1228 1229 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) 1230 { 1231 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1232 struct atl1e_tx_buffer *tx_buffer = NULL; 1233 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX); 1234 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1235 1236 while (next_to_clean != hw_next_to_clean) { 1237 tx_buffer = &tx_ring->tx_buffer[next_to_clean]; 1238 if (tx_buffer->dma) { 1239 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 1240 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1241 tx_buffer->length, PCI_DMA_TODEVICE); 1242 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 1243 pci_unmap_page(adapter->pdev, tx_buffer->dma, 1244 tx_buffer->length, PCI_DMA_TODEVICE); 1245 tx_buffer->dma = 0; 1246 } 1247 1248 if (tx_buffer->skb) { 1249 dev_consume_skb_irq(tx_buffer->skb); 1250 tx_buffer->skb = NULL; 1251 } 1252 1253 if (++next_to_clean == tx_ring->count) 1254 next_to_clean = 0; 1255 } 1256 1257 atomic_set(&tx_ring->next_to_clean, next_to_clean); 1258 1259 if (netif_queue_stopped(adapter->netdev) && 1260 netif_carrier_ok(adapter->netdev)) { 1261 netif_wake_queue(adapter->netdev); 1262 } 1263 1264 return true; 1265 } 1266 1267 /** 1268 * atl1e_intr - Interrupt Handler 1269 * @irq: interrupt number 1270 * @data: pointer to a network interface device structure 1271 */ 1272 static irqreturn_t atl1e_intr(int irq, void *data) 1273 { 1274 struct net_device *netdev = data; 1275 struct atl1e_adapter *adapter = netdev_priv(netdev); 1276 struct atl1e_hw *hw = &adapter->hw; 1277 int max_ints = AT_MAX_INT_WORK; 1278 int handled = IRQ_NONE; 1279 u32 status; 1280 1281 do { 1282 status = AT_READ_REG(hw, REG_ISR); 1283 if ((status & IMR_NORMAL_MASK) == 0 || 1284 (status & ISR_DIS_INT) != 0) { 1285 if (max_ints != AT_MAX_INT_WORK) 1286 handled = IRQ_HANDLED; 1287 break; 1288 } 1289 /* link event */ 1290 if (status & ISR_GPHY) 1291 atl1e_clear_phy_int(adapter); 1292 /* Ack ISR */ 1293 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1294 1295 handled = IRQ_HANDLED; 1296 /* check if PCIE PHY Link down */ 1297 if (status & ISR_PHY_LINKDOWN) { 1298 netdev_err(adapter->netdev, 1299 "pcie phy linkdown %x\n", status); 1300 if (netif_running(adapter->netdev)) { 1301 /* reset MAC */ 1302 atl1e_irq_reset(adapter); 1303 schedule_work(&adapter->reset_task); 1304 break; 1305 } 1306 } 1307 1308 /* check if DMA read/write error */ 1309 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { 1310 netdev_err(adapter->netdev, 1311 "PCIE DMA RW error (status = 0x%x)\n", 1312 status); 1313 atl1e_irq_reset(adapter); 1314 schedule_work(&adapter->reset_task); 1315 break; 1316 } 1317 1318 if (status & ISR_SMB) 1319 atl1e_update_hw_stats(adapter); 1320 1321 /* link event */ 1322 if (status & (ISR_GPHY | ISR_MANUAL)) { 1323 netdev->stats.tx_carrier_errors++; 1324 atl1e_link_chg_event(adapter); 1325 break; 1326 } 1327 1328 /* transmit event */ 1329 if (status & ISR_TX_EVENT) 1330 atl1e_clean_tx_irq(adapter); 1331 1332 if (status & ISR_RX_EVENT) { 1333 /* 1334 * disable rx interrupts, without 1335 * the synchronize_irq bit 1336 */ 1337 AT_WRITE_REG(hw, REG_IMR, 1338 IMR_NORMAL_MASK & ~ISR_RX_EVENT); 1339 AT_WRITE_FLUSH(hw); 1340 if (likely(napi_schedule_prep( 1341 &adapter->napi))) 1342 __napi_schedule(&adapter->napi); 1343 } 1344 } while (--max_ints > 0); 1345 /* re-enable Interrupt*/ 1346 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1347 1348 return handled; 1349 } 1350 1351 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter, 1352 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs) 1353 { 1354 u8 *packet = (u8 *)(prrs + 1); 1355 struct iphdr *iph; 1356 u16 head_len = ETH_HLEN; 1357 u16 pkt_flags; 1358 u16 err_flags; 1359 1360 skb_checksum_none_assert(skb); 1361 pkt_flags = prrs->pkt_flag; 1362 err_flags = prrs->err_flag; 1363 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) && 1364 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) { 1365 if (pkt_flags & RRS_IS_IPV4) { 1366 if (pkt_flags & RRS_IS_802_3) 1367 head_len += 8; 1368 iph = (struct iphdr *) (packet + head_len); 1369 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF)) 1370 goto hw_xsum; 1371 } 1372 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) { 1373 skb->ip_summed = CHECKSUM_UNNECESSARY; 1374 return; 1375 } 1376 } 1377 1378 hw_xsum : 1379 return; 1380 } 1381 1382 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter, 1383 u8 que) 1384 { 1385 struct atl1e_rx_page_desc *rx_page_desc = 1386 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc; 1387 u8 rx_using = rx_page_desc[que].rx_using; 1388 1389 return &(rx_page_desc[que].rx_page[rx_using]); 1390 } 1391 1392 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que, 1393 int *work_done, int work_to_do) 1394 { 1395 struct net_device *netdev = adapter->netdev; 1396 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 1397 struct atl1e_rx_page_desc *rx_page_desc = 1398 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc; 1399 struct sk_buff *skb = NULL; 1400 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que); 1401 u32 packet_size, write_offset; 1402 struct atl1e_recv_ret_status *prrs; 1403 1404 write_offset = *(rx_page->write_offset_addr); 1405 if (likely(rx_page->read_offset < write_offset)) { 1406 do { 1407 if (*work_done >= work_to_do) 1408 break; 1409 (*work_done)++; 1410 /* get new packet's rrs */ 1411 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr + 1412 rx_page->read_offset); 1413 /* check sequence number */ 1414 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) { 1415 netdev_err(netdev, 1416 "rx sequence number error (rx=%d) (expect=%d)\n", 1417 prrs->seq_num, 1418 rx_page_desc[que].rx_nxseq); 1419 rx_page_desc[que].rx_nxseq++; 1420 /* just for debug use */ 1421 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0, 1422 (((u32)prrs->seq_num) << 16) | 1423 rx_page_desc[que].rx_nxseq); 1424 goto fatal_err; 1425 } 1426 rx_page_desc[que].rx_nxseq++; 1427 1428 /* error packet */ 1429 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) && 1430 !(netdev->features & NETIF_F_RXALL)) { 1431 if (prrs->err_flag & (RRS_ERR_BAD_CRC | 1432 RRS_ERR_DRIBBLE | RRS_ERR_CODE | 1433 RRS_ERR_TRUNC)) { 1434 /* hardware error, discard this packet*/ 1435 netdev_err(netdev, 1436 "rx packet desc error %x\n", 1437 *((u32 *)prrs + 1)); 1438 goto skip_pkt; 1439 } 1440 } 1441 1442 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1443 RRS_PKT_SIZE_MASK); 1444 if (likely(!(netdev->features & NETIF_F_RXFCS))) 1445 packet_size -= 4; /* CRC */ 1446 1447 skb = netdev_alloc_skb_ip_align(netdev, packet_size); 1448 if (skb == NULL) 1449 goto skip_pkt; 1450 1451 memcpy(skb->data, (u8 *)(prrs + 1), packet_size); 1452 skb_put(skb, packet_size); 1453 skb->protocol = eth_type_trans(skb, netdev); 1454 atl1e_rx_checksum(adapter, skb, prrs); 1455 1456 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) { 1457 u16 vlan_tag = (prrs->vtag >> 4) | 1458 ((prrs->vtag & 7) << 13) | 1459 ((prrs->vtag & 8) << 9); 1460 netdev_dbg(netdev, 1461 "RXD VLAN TAG<RRD>=0x%04x\n", 1462 prrs->vtag); 1463 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1464 } 1465 napi_gro_receive(&adapter->napi, skb); 1466 1467 skip_pkt: 1468 /* skip current packet whether it's ok or not. */ 1469 rx_page->read_offset += 1470 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1471 RRS_PKT_SIZE_MASK) + 1472 sizeof(struct atl1e_recv_ret_status) + 31) & 1473 0xFFFFFFE0); 1474 1475 if (rx_page->read_offset >= rx_ring->page_size) { 1476 /* mark this page clean */ 1477 u16 reg_addr; 1478 u8 rx_using; 1479 1480 rx_page->read_offset = 1481 *(rx_page->write_offset_addr) = 0; 1482 rx_using = rx_page_desc[que].rx_using; 1483 reg_addr = 1484 atl1e_rx_page_vld_regs[que][rx_using]; 1485 AT_WRITE_REGB(&adapter->hw, reg_addr, 1); 1486 rx_page_desc[que].rx_using ^= 1; 1487 rx_page = atl1e_get_rx_page(adapter, que); 1488 } 1489 write_offset = *(rx_page->write_offset_addr); 1490 } while (rx_page->read_offset < write_offset); 1491 } 1492 1493 return; 1494 1495 fatal_err: 1496 if (!test_bit(__AT_DOWN, &adapter->flags)) 1497 schedule_work(&adapter->reset_task); 1498 } 1499 1500 /** 1501 * atl1e_clean - NAPI Rx polling callback 1502 */ 1503 static int atl1e_clean(struct napi_struct *napi, int budget) 1504 { 1505 struct atl1e_adapter *adapter = 1506 container_of(napi, struct atl1e_adapter, napi); 1507 u32 imr_data; 1508 int work_done = 0; 1509 1510 /* Keep link state information with original netdev */ 1511 if (!netif_carrier_ok(adapter->netdev)) 1512 goto quit_polling; 1513 1514 atl1e_clean_rx_irq(adapter, 0, &work_done, budget); 1515 1516 /* If no Tx and not enough Rx work done, exit the polling mode */ 1517 if (work_done < budget) { 1518 quit_polling: 1519 napi_complete_done(napi, work_done); 1520 imr_data = AT_READ_REG(&adapter->hw, REG_IMR); 1521 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT); 1522 /* test debug */ 1523 if (test_bit(__AT_DOWN, &adapter->flags)) { 1524 atomic_dec(&adapter->irq_sem); 1525 netdev_err(adapter->netdev, 1526 "atl1e_clean is called when AT_DOWN\n"); 1527 } 1528 /* reenable RX intr */ 1529 /*atl1e_irq_enable(adapter); */ 1530 1531 } 1532 return work_done; 1533 } 1534 1535 #ifdef CONFIG_NET_POLL_CONTROLLER 1536 1537 /* 1538 * Polling 'interrupt' - used by things like netconsole to send skbs 1539 * without having to re-enable interrupts. It's not called while 1540 * the interrupt routine is executing. 1541 */ 1542 static void atl1e_netpoll(struct net_device *netdev) 1543 { 1544 struct atl1e_adapter *adapter = netdev_priv(netdev); 1545 1546 disable_irq(adapter->pdev->irq); 1547 atl1e_intr(adapter->pdev->irq, netdev); 1548 enable_irq(adapter->pdev->irq); 1549 } 1550 #endif 1551 1552 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter) 1553 { 1554 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1555 u16 next_to_use = 0; 1556 u16 next_to_clean = 0; 1557 1558 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1559 next_to_use = tx_ring->next_to_use; 1560 1561 return (u16)(next_to_clean > next_to_use) ? 1562 (next_to_clean - next_to_use - 1) : 1563 (tx_ring->count + next_to_clean - next_to_use - 1); 1564 } 1565 1566 /* 1567 * get next usable tpd 1568 * Note: should call atl1e_tdp_avail to make sure 1569 * there is enough tpd to use 1570 */ 1571 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter) 1572 { 1573 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1574 u16 next_to_use = 0; 1575 1576 next_to_use = tx_ring->next_to_use; 1577 if (++tx_ring->next_to_use == tx_ring->count) 1578 tx_ring->next_to_use = 0; 1579 1580 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc)); 1581 return &tx_ring->desc[next_to_use]; 1582 } 1583 1584 static struct atl1e_tx_buffer * 1585 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd) 1586 { 1587 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1588 1589 return &tx_ring->tx_buffer[tpd - tx_ring->desc]; 1590 } 1591 1592 /* Calculate the transmit packet descript needed*/ 1593 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb) 1594 { 1595 int i = 0; 1596 u16 tpd_req = 1; 1597 u16 fg_size = 0; 1598 u16 proto_hdr_len = 0; 1599 1600 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1601 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]); 1602 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT); 1603 } 1604 1605 if (skb_is_gso(skb)) { 1606 if (skb->protocol == htons(ETH_P_IP) || 1607 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) { 1608 proto_hdr_len = skb_transport_offset(skb) + 1609 tcp_hdrlen(skb); 1610 if (proto_hdr_len < skb_headlen(skb)) { 1611 tpd_req += ((skb_headlen(skb) - proto_hdr_len + 1612 MAX_TX_BUF_LEN - 1) >> 1613 MAX_TX_BUF_SHIFT); 1614 } 1615 } 1616 1617 } 1618 return tpd_req; 1619 } 1620 1621 static int atl1e_tso_csum(struct atl1e_adapter *adapter, 1622 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1623 { 1624 unsigned short offload_type; 1625 u8 hdr_len; 1626 u32 real_len; 1627 1628 if (skb_is_gso(skb)) { 1629 int err; 1630 1631 err = skb_cow_head(skb, 0); 1632 if (err < 0) 1633 return err; 1634 1635 offload_type = skb_shinfo(skb)->gso_type; 1636 1637 if (offload_type & SKB_GSO_TCPV4) { 1638 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1639 + ntohs(ip_hdr(skb)->tot_len)); 1640 1641 if (real_len < skb->len) 1642 pskb_trim(skb, real_len); 1643 1644 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1645 if (unlikely(skb->len == hdr_len)) { 1646 /* only xsum need */ 1647 netdev_warn(adapter->netdev, 1648 "IPV4 tso with zero data??\n"); 1649 goto check_sum; 1650 } else { 1651 ip_hdr(skb)->check = 0; 1652 ip_hdr(skb)->tot_len = 0; 1653 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1654 ip_hdr(skb)->saddr, 1655 ip_hdr(skb)->daddr, 1656 0, IPPROTO_TCP, 0); 1657 tpd->word3 |= (ip_hdr(skb)->ihl & 1658 TDP_V4_IPHL_MASK) << 1659 TPD_V4_IPHL_SHIFT; 1660 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) & 1661 TPD_TCPHDRLEN_MASK) << 1662 TPD_TCPHDRLEN_SHIFT; 1663 tpd->word3 |= ((skb_shinfo(skb)->gso_size) & 1664 TPD_MSS_MASK) << TPD_MSS_SHIFT; 1665 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT; 1666 } 1667 return 0; 1668 } 1669 } 1670 1671 check_sum: 1672 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1673 u8 css, cso; 1674 1675 cso = skb_checksum_start_offset(skb); 1676 if (unlikely(cso & 0x1)) { 1677 netdev_err(adapter->netdev, 1678 "payload offset should not ant event number\n"); 1679 return -1; 1680 } else { 1681 css = cso + skb->csum_offset; 1682 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) << 1683 TPD_PLOADOFFSET_SHIFT; 1684 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) << 1685 TPD_CCSUMOFFSET_SHIFT; 1686 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT; 1687 } 1688 } 1689 1690 return 0; 1691 } 1692 1693 static int atl1e_tx_map(struct atl1e_adapter *adapter, 1694 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1695 { 1696 struct atl1e_tpd_desc *use_tpd = NULL; 1697 struct atl1e_tx_buffer *tx_buffer = NULL; 1698 u16 buf_len = skb_headlen(skb); 1699 u16 map_len = 0; 1700 u16 mapped_len = 0; 1701 u16 hdr_len = 0; 1702 u16 nr_frags; 1703 u16 f; 1704 int segment; 1705 int ring_start = adapter->tx_ring.next_to_use; 1706 int ring_end; 1707 1708 nr_frags = skb_shinfo(skb)->nr_frags; 1709 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK; 1710 if (segment) { 1711 /* TSO */ 1712 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1713 use_tpd = tpd; 1714 1715 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1716 tx_buffer->length = map_len; 1717 tx_buffer->dma = pci_map_single(adapter->pdev, 1718 skb->data, hdr_len, PCI_DMA_TODEVICE); 1719 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) 1720 return -ENOSPC; 1721 1722 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1723 mapped_len += map_len; 1724 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1725 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1726 ((cpu_to_le32(tx_buffer->length) & 1727 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1728 } 1729 1730 while (mapped_len < buf_len) { 1731 /* mapped_len == 0, means we should use the first tpd, 1732 which is given by caller */ 1733 if (mapped_len == 0) { 1734 use_tpd = tpd; 1735 } else { 1736 use_tpd = atl1e_get_tpd(adapter); 1737 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1738 } 1739 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1740 tx_buffer->skb = NULL; 1741 1742 tx_buffer->length = map_len = 1743 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ? 1744 MAX_TX_BUF_LEN : (buf_len - mapped_len); 1745 tx_buffer->dma = 1746 pci_map_single(adapter->pdev, skb->data + mapped_len, 1747 map_len, PCI_DMA_TODEVICE); 1748 1749 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1750 /* We need to unwind the mappings we've done */ 1751 ring_end = adapter->tx_ring.next_to_use; 1752 adapter->tx_ring.next_to_use = ring_start; 1753 while (adapter->tx_ring.next_to_use != ring_end) { 1754 tpd = atl1e_get_tpd(adapter); 1755 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1756 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1757 tx_buffer->length, PCI_DMA_TODEVICE); 1758 } 1759 /* Reset the tx rings next pointer */ 1760 adapter->tx_ring.next_to_use = ring_start; 1761 return -ENOSPC; 1762 } 1763 1764 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1765 mapped_len += map_len; 1766 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1767 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1768 ((cpu_to_le32(tx_buffer->length) & 1769 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1770 } 1771 1772 for (f = 0; f < nr_frags; f++) { 1773 const struct skb_frag_struct *frag; 1774 u16 i; 1775 u16 seg_num; 1776 1777 frag = &skb_shinfo(skb)->frags[f]; 1778 buf_len = skb_frag_size(frag); 1779 1780 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN; 1781 for (i = 0; i < seg_num; i++) { 1782 use_tpd = atl1e_get_tpd(adapter); 1783 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1784 1785 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1786 BUG_ON(tx_buffer->skb); 1787 1788 tx_buffer->skb = NULL; 1789 tx_buffer->length = 1790 (buf_len > MAX_TX_BUF_LEN) ? 1791 MAX_TX_BUF_LEN : buf_len; 1792 buf_len -= tx_buffer->length; 1793 1794 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev, 1795 frag, 1796 (i * MAX_TX_BUF_LEN), 1797 tx_buffer->length, 1798 DMA_TO_DEVICE); 1799 1800 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1801 /* We need to unwind the mappings we've done */ 1802 ring_end = adapter->tx_ring.next_to_use; 1803 adapter->tx_ring.next_to_use = ring_start; 1804 while (adapter->tx_ring.next_to_use != ring_end) { 1805 tpd = atl1e_get_tpd(adapter); 1806 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1807 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma, 1808 tx_buffer->length, DMA_TO_DEVICE); 1809 } 1810 1811 /* Reset the ring next to use pointer */ 1812 adapter->tx_ring.next_to_use = ring_start; 1813 return -ENOSPC; 1814 } 1815 1816 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); 1817 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1818 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1819 ((cpu_to_le32(tx_buffer->length) & 1820 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1821 } 1822 } 1823 1824 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK) 1825 /* note this one is a tcp header */ 1826 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT; 1827 /* The last tpd */ 1828 1829 use_tpd->word3 |= 1 << TPD_EOP_SHIFT; 1830 /* The last buffer info contain the skb address, 1831 so it will be free after unmap */ 1832 tx_buffer->skb = skb; 1833 return 0; 1834 } 1835 1836 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count, 1837 struct atl1e_tpd_desc *tpd) 1838 { 1839 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1840 /* Force memory writes to complete before letting h/w 1841 * know there are new descriptors to fetch. (Only 1842 * applicable for weak-ordered memory model archs, 1843 * such as IA-64). */ 1844 wmb(); 1845 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use); 1846 } 1847 1848 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb, 1849 struct net_device *netdev) 1850 { 1851 struct atl1e_adapter *adapter = netdev_priv(netdev); 1852 u16 tpd_req = 1; 1853 struct atl1e_tpd_desc *tpd; 1854 1855 if (test_bit(__AT_DOWN, &adapter->flags)) { 1856 dev_kfree_skb_any(skb); 1857 return NETDEV_TX_OK; 1858 } 1859 1860 if (unlikely(skb->len <= 0)) { 1861 dev_kfree_skb_any(skb); 1862 return NETDEV_TX_OK; 1863 } 1864 tpd_req = atl1e_cal_tdp_req(skb); 1865 1866 if (atl1e_tpd_avail(adapter) < tpd_req) { 1867 /* no enough descriptor, just stop queue */ 1868 netif_stop_queue(netdev); 1869 return NETDEV_TX_BUSY; 1870 } 1871 1872 tpd = atl1e_get_tpd(adapter); 1873 1874 if (skb_vlan_tag_present(skb)) { 1875 u16 vlan_tag = skb_vlan_tag_get(skb); 1876 u16 atl1e_vlan_tag; 1877 1878 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT; 1879 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag); 1880 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) << 1881 TPD_VLAN_SHIFT; 1882 } 1883 1884 if (skb->protocol == htons(ETH_P_8021Q)) 1885 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT; 1886 1887 if (skb_network_offset(skb) != ETH_HLEN) 1888 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */ 1889 1890 /* do TSO and check sum */ 1891 if (atl1e_tso_csum(adapter, skb, tpd) != 0) { 1892 dev_kfree_skb_any(skb); 1893 return NETDEV_TX_OK; 1894 } 1895 1896 if (atl1e_tx_map(adapter, skb, tpd)) { 1897 dev_kfree_skb_any(skb); 1898 goto out; 1899 } 1900 1901 atl1e_tx_queue(adapter, tpd_req, tpd); 1902 out: 1903 return NETDEV_TX_OK; 1904 } 1905 1906 static void atl1e_free_irq(struct atl1e_adapter *adapter) 1907 { 1908 struct net_device *netdev = adapter->netdev; 1909 1910 free_irq(adapter->pdev->irq, netdev); 1911 } 1912 1913 static int atl1e_request_irq(struct atl1e_adapter *adapter) 1914 { 1915 struct pci_dev *pdev = adapter->pdev; 1916 struct net_device *netdev = adapter->netdev; 1917 int err = 0; 1918 1919 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name, 1920 netdev); 1921 if (err) { 1922 netdev_dbg(adapter->netdev, 1923 "Unable to allocate interrupt Error: %d\n", err); 1924 return err; 1925 } 1926 netdev_dbg(netdev, "atl1e_request_irq OK\n"); 1927 return err; 1928 } 1929 1930 int atl1e_up(struct atl1e_adapter *adapter) 1931 { 1932 struct net_device *netdev = adapter->netdev; 1933 int err = 0; 1934 u32 val; 1935 1936 /* hardware has been reset, we need to reload some things */ 1937 err = atl1e_init_hw(&adapter->hw); 1938 if (err) { 1939 err = -EIO; 1940 return err; 1941 } 1942 atl1e_init_ring_ptrs(adapter); 1943 atl1e_set_multi(netdev); 1944 atl1e_restore_vlan(adapter); 1945 1946 if (atl1e_configure(adapter)) { 1947 err = -EIO; 1948 goto err_up; 1949 } 1950 1951 clear_bit(__AT_DOWN, &adapter->flags); 1952 napi_enable(&adapter->napi); 1953 atl1e_irq_enable(adapter); 1954 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL); 1955 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, 1956 val | MASTER_CTRL_MANUAL_INT); 1957 1958 err_up: 1959 return err; 1960 } 1961 1962 void atl1e_down(struct atl1e_adapter *adapter) 1963 { 1964 struct net_device *netdev = adapter->netdev; 1965 1966 /* signal that we're down so the interrupt handler does not 1967 * reschedule our watchdog timer */ 1968 set_bit(__AT_DOWN, &adapter->flags); 1969 1970 netif_stop_queue(netdev); 1971 1972 /* reset MAC to disable all RX/TX */ 1973 atl1e_reset_hw(&adapter->hw); 1974 msleep(1); 1975 1976 napi_disable(&adapter->napi); 1977 atl1e_del_timer(adapter); 1978 atl1e_irq_disable(adapter); 1979 1980 netif_carrier_off(netdev); 1981 adapter->link_speed = SPEED_0; 1982 adapter->link_duplex = -1; 1983 atl1e_clean_tx_ring(adapter); 1984 atl1e_clean_rx_ring(adapter); 1985 } 1986 1987 /** 1988 * atl1e_open - Called when a network interface is made active 1989 * @netdev: network interface device structure 1990 * 1991 * Returns 0 on success, negative value on failure 1992 * 1993 * The open entry point is called when a network interface is made 1994 * active by the system (IFF_UP). At this point all resources needed 1995 * for transmit and receive operations are allocated, the interrupt 1996 * handler is registered with the OS, the watchdog timer is started, 1997 * and the stack is notified that the interface is ready. 1998 */ 1999 static int atl1e_open(struct net_device *netdev) 2000 { 2001 struct atl1e_adapter *adapter = netdev_priv(netdev); 2002 int err; 2003 2004 /* disallow open during test */ 2005 if (test_bit(__AT_TESTING, &adapter->flags)) 2006 return -EBUSY; 2007 2008 /* allocate rx/tx dma buffer & descriptors */ 2009 atl1e_init_ring_resources(adapter); 2010 err = atl1e_setup_ring_resources(adapter); 2011 if (unlikely(err)) 2012 return err; 2013 2014 err = atl1e_request_irq(adapter); 2015 if (unlikely(err)) 2016 goto err_req_irq; 2017 2018 err = atl1e_up(adapter); 2019 if (unlikely(err)) 2020 goto err_up; 2021 2022 return 0; 2023 2024 err_up: 2025 atl1e_free_irq(adapter); 2026 err_req_irq: 2027 atl1e_free_ring_resources(adapter); 2028 atl1e_reset_hw(&adapter->hw); 2029 2030 return err; 2031 } 2032 2033 /** 2034 * atl1e_close - Disables a network interface 2035 * @netdev: network interface device structure 2036 * 2037 * Returns 0, this is not allowed to fail 2038 * 2039 * The close entry point is called when an interface is de-activated 2040 * by the OS. The hardware is still under the drivers control, but 2041 * needs to be disabled. A global MAC reset is issued to stop the 2042 * hardware, and all transmit and receive resources are freed. 2043 */ 2044 static int atl1e_close(struct net_device *netdev) 2045 { 2046 struct atl1e_adapter *adapter = netdev_priv(netdev); 2047 2048 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2049 atl1e_down(adapter); 2050 atl1e_free_irq(adapter); 2051 atl1e_free_ring_resources(adapter); 2052 2053 return 0; 2054 } 2055 2056 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state) 2057 { 2058 struct net_device *netdev = pci_get_drvdata(pdev); 2059 struct atl1e_adapter *adapter = netdev_priv(netdev); 2060 struct atl1e_hw *hw = &adapter->hw; 2061 u32 ctrl = 0; 2062 u32 mac_ctrl_data = 0; 2063 u32 wol_ctrl_data = 0; 2064 u16 mii_advertise_data = 0; 2065 u16 mii_bmsr_data = 0; 2066 u16 mii_intr_status_data = 0; 2067 u32 wufc = adapter->wol; 2068 u32 i; 2069 #ifdef CONFIG_PM 2070 int retval = 0; 2071 #endif 2072 2073 if (netif_running(netdev)) { 2074 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2075 atl1e_down(adapter); 2076 } 2077 netif_device_detach(netdev); 2078 2079 #ifdef CONFIG_PM 2080 retval = pci_save_state(pdev); 2081 if (retval) 2082 return retval; 2083 #endif 2084 2085 if (wufc) { 2086 /* get link status */ 2087 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2088 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2089 2090 mii_advertise_data = ADVERTISE_10HALF; 2091 2092 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) || 2093 (atl1e_write_phy_reg(hw, 2094 MII_ADVERTISE, mii_advertise_data) != 0) || 2095 (atl1e_phy_commit(hw)) != 0) { 2096 netdev_dbg(adapter->netdev, "set phy register failed\n"); 2097 goto wol_dis; 2098 } 2099 2100 hw->phy_configured = false; /* re-init PHY when resume */ 2101 2102 /* turn on magic packet wol */ 2103 if (wufc & AT_WUFC_MAG) 2104 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2105 2106 if (wufc & AT_WUFC_LNKC) { 2107 /* if orignal link status is link, just wait for retrive link */ 2108 if (mii_bmsr_data & BMSR_LSTATUS) { 2109 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { 2110 msleep(100); 2111 atl1e_read_phy_reg(hw, MII_BMSR, 2112 &mii_bmsr_data); 2113 if (mii_bmsr_data & BMSR_LSTATUS) 2114 break; 2115 } 2116 2117 if ((mii_bmsr_data & BMSR_LSTATUS) == 0) 2118 netdev_dbg(adapter->netdev, 2119 "Link may change when suspend\n"); 2120 } 2121 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2122 /* only link up can wake up */ 2123 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) { 2124 netdev_dbg(adapter->netdev, 2125 "read write phy register failed\n"); 2126 goto wol_dis; 2127 } 2128 } 2129 /* clear phy interrupt */ 2130 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data); 2131 /* Config MAC Ctrl register */ 2132 mac_ctrl_data = MAC_CTRL_RX_EN; 2133 /* set to 10/100M halt duplex */ 2134 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT; 2135 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2136 MAC_CTRL_PRMLEN_MASK) << 2137 MAC_CTRL_PRMLEN_SHIFT); 2138 2139 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data); 2140 2141 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2142 if (wufc & AT_WUFC_MAG) 2143 mac_ctrl_data |= MAC_CTRL_BC_EN; 2144 2145 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n", 2146 mac_ctrl_data); 2147 2148 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2149 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2150 /* pcie patch */ 2151 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2152 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2153 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2154 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); 2155 goto suspend_exit; 2156 } 2157 wol_dis: 2158 2159 /* WOL disabled */ 2160 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2161 2162 /* pcie patch */ 2163 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2164 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2165 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2166 2167 atl1e_force_ps(hw); 2168 hw->phy_configured = false; /* re-init PHY when resume */ 2169 2170 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); 2171 2172 suspend_exit: 2173 2174 if (netif_running(netdev)) 2175 atl1e_free_irq(adapter); 2176 2177 pci_disable_device(pdev); 2178 2179 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 2180 2181 return 0; 2182 } 2183 2184 #ifdef CONFIG_PM 2185 static int atl1e_resume(struct pci_dev *pdev) 2186 { 2187 struct net_device *netdev = pci_get_drvdata(pdev); 2188 struct atl1e_adapter *adapter = netdev_priv(netdev); 2189 u32 err; 2190 2191 pci_set_power_state(pdev, PCI_D0); 2192 pci_restore_state(pdev); 2193 2194 err = pci_enable_device(pdev); 2195 if (err) { 2196 netdev_err(adapter->netdev, 2197 "Cannot enable PCI device from suspend\n"); 2198 return err; 2199 } 2200 2201 pci_set_master(pdev); 2202 2203 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ 2204 2205 pci_enable_wake(pdev, PCI_D3hot, 0); 2206 pci_enable_wake(pdev, PCI_D3cold, 0); 2207 2208 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2209 2210 if (netif_running(netdev)) { 2211 err = atl1e_request_irq(adapter); 2212 if (err) 2213 return err; 2214 } 2215 2216 atl1e_reset_hw(&adapter->hw); 2217 2218 if (netif_running(netdev)) 2219 atl1e_up(adapter); 2220 2221 netif_device_attach(netdev); 2222 2223 return 0; 2224 } 2225 #endif 2226 2227 static void atl1e_shutdown(struct pci_dev *pdev) 2228 { 2229 atl1e_suspend(pdev, PMSG_SUSPEND); 2230 } 2231 2232 static const struct net_device_ops atl1e_netdev_ops = { 2233 .ndo_open = atl1e_open, 2234 .ndo_stop = atl1e_close, 2235 .ndo_start_xmit = atl1e_xmit_frame, 2236 .ndo_get_stats = atl1e_get_stats, 2237 .ndo_set_rx_mode = atl1e_set_multi, 2238 .ndo_validate_addr = eth_validate_addr, 2239 .ndo_set_mac_address = atl1e_set_mac_addr, 2240 .ndo_fix_features = atl1e_fix_features, 2241 .ndo_set_features = atl1e_set_features, 2242 .ndo_change_mtu = atl1e_change_mtu, 2243 .ndo_do_ioctl = atl1e_ioctl, 2244 .ndo_tx_timeout = atl1e_tx_timeout, 2245 #ifdef CONFIG_NET_POLL_CONTROLLER 2246 .ndo_poll_controller = atl1e_netpoll, 2247 #endif 2248 2249 }; 2250 2251 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2252 { 2253 SET_NETDEV_DEV(netdev, &pdev->dev); 2254 pci_set_drvdata(pdev, netdev); 2255 2256 netdev->netdev_ops = &atl1e_netdev_ops; 2257 2258 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2259 /* MTU range: 42 - 8170 */ 2260 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2261 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 2262 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 2263 atl1e_set_ethtool_ops(netdev); 2264 2265 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO | 2266 NETIF_F_HW_VLAN_CTAG_RX; 2267 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX; 2268 /* not enabled by default */ 2269 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS; 2270 return 0; 2271 } 2272 2273 /** 2274 * atl1e_probe - Device Initialization Routine 2275 * @pdev: PCI device information struct 2276 * @ent: entry in atl1e_pci_tbl 2277 * 2278 * Returns 0 on success, negative on failure 2279 * 2280 * atl1e_probe initializes an adapter identified by a pci_dev structure. 2281 * The OS initialization, configuring of the adapter private structure, 2282 * and a hardware reset occur. 2283 */ 2284 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2285 { 2286 struct net_device *netdev; 2287 struct atl1e_adapter *adapter = NULL; 2288 static int cards_found; 2289 2290 int err = 0; 2291 2292 err = pci_enable_device(pdev); 2293 if (err) { 2294 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2295 return err; 2296 } 2297 2298 /* 2299 * The atl1e chip can DMA to 64-bit addresses, but it uses a single 2300 * shared register for the high 32 bits, so only a single, aligned, 2301 * 4 GB physical address range can be used at a time. 2302 * 2303 * Supporting 64-bit DMA on this hardware is more trouble than it's 2304 * worth. It is far easier to limit to 32-bit DMA than update 2305 * various kernel subsystems to support the mechanics required by a 2306 * fixed-high-32-bit system. 2307 */ 2308 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2309 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2310 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2311 goto err_dma; 2312 } 2313 2314 err = pci_request_regions(pdev, atl1e_driver_name); 2315 if (err) { 2316 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2317 goto err_pci_reg; 2318 } 2319 2320 pci_set_master(pdev); 2321 2322 netdev = alloc_etherdev(sizeof(struct atl1e_adapter)); 2323 if (netdev == NULL) { 2324 err = -ENOMEM; 2325 goto err_alloc_etherdev; 2326 } 2327 2328 err = atl1e_init_netdev(netdev, pdev); 2329 if (err) { 2330 netdev_err(netdev, "init netdevice failed\n"); 2331 goto err_init_netdev; 2332 } 2333 adapter = netdev_priv(netdev); 2334 adapter->bd_number = cards_found; 2335 adapter->netdev = netdev; 2336 adapter->pdev = pdev; 2337 adapter->hw.adapter = adapter; 2338 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0); 2339 if (!adapter->hw.hw_addr) { 2340 err = -EIO; 2341 netdev_err(netdev, "cannot map device registers\n"); 2342 goto err_ioremap; 2343 } 2344 2345 /* init mii data */ 2346 adapter->mii.dev = netdev; 2347 adapter->mii.mdio_read = atl1e_mdio_read; 2348 adapter->mii.mdio_write = atl1e_mdio_write; 2349 adapter->mii.phy_id_mask = 0x1f; 2350 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2351 2352 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64); 2353 2354 timer_setup(&adapter->phy_config_timer, atl1e_phy_config, 0); 2355 2356 /* get user settings */ 2357 atl1e_check_options(adapter); 2358 /* 2359 * Mark all PCI regions associated with PCI device 2360 * pdev as being reserved by owner atl1e_driver_name 2361 * Enables bus-mastering on the device and calls 2362 * pcibios_set_master to do the needed arch specific settings 2363 */ 2364 atl1e_setup_pcicmd(pdev); 2365 /* setup the private structure */ 2366 err = atl1e_sw_init(adapter); 2367 if (err) { 2368 netdev_err(netdev, "net device private data init failed\n"); 2369 goto err_sw_init; 2370 } 2371 2372 /* Init GPHY as early as possible due to power saving issue */ 2373 atl1e_phy_init(&adapter->hw); 2374 /* reset the controller to 2375 * put the device in a known good starting state */ 2376 err = atl1e_reset_hw(&adapter->hw); 2377 if (err) { 2378 err = -EIO; 2379 goto err_reset; 2380 } 2381 2382 if (atl1e_read_mac_addr(&adapter->hw) != 0) { 2383 err = -EIO; 2384 netdev_err(netdev, "get mac address failed\n"); 2385 goto err_eeprom; 2386 } 2387 2388 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2389 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr); 2390 2391 INIT_WORK(&adapter->reset_task, atl1e_reset_task); 2392 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task); 2393 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE); 2394 err = register_netdev(netdev); 2395 if (err) { 2396 netdev_err(netdev, "register netdevice failed\n"); 2397 goto err_register; 2398 } 2399 2400 /* assume we have no link for now */ 2401 netif_stop_queue(netdev); 2402 netif_carrier_off(netdev); 2403 2404 cards_found++; 2405 2406 return 0; 2407 2408 err_reset: 2409 err_register: 2410 err_sw_init: 2411 err_eeprom: 2412 pci_iounmap(pdev, adapter->hw.hw_addr); 2413 err_init_netdev: 2414 err_ioremap: 2415 free_netdev(netdev); 2416 err_alloc_etherdev: 2417 pci_release_regions(pdev); 2418 err_pci_reg: 2419 err_dma: 2420 pci_disable_device(pdev); 2421 return err; 2422 } 2423 2424 /** 2425 * atl1e_remove - Device Removal Routine 2426 * @pdev: PCI device information struct 2427 * 2428 * atl1e_remove is called by the PCI subsystem to alert the driver 2429 * that it should release a PCI device. The could be caused by a 2430 * Hot-Plug event, or because the driver is going to be removed from 2431 * memory. 2432 */ 2433 static void atl1e_remove(struct pci_dev *pdev) 2434 { 2435 struct net_device *netdev = pci_get_drvdata(pdev); 2436 struct atl1e_adapter *adapter = netdev_priv(netdev); 2437 2438 /* 2439 * flush_scheduled work may reschedule our watchdog task, so 2440 * explicitly disable watchdog tasks from being rescheduled 2441 */ 2442 set_bit(__AT_DOWN, &adapter->flags); 2443 2444 atl1e_del_timer(adapter); 2445 atl1e_cancel_work(adapter); 2446 2447 unregister_netdev(netdev); 2448 atl1e_free_ring_resources(adapter); 2449 atl1e_force_ps(&adapter->hw); 2450 pci_iounmap(pdev, adapter->hw.hw_addr); 2451 pci_release_regions(pdev); 2452 free_netdev(netdev); 2453 pci_disable_device(pdev); 2454 } 2455 2456 /** 2457 * atl1e_io_error_detected - called when PCI error is detected 2458 * @pdev: Pointer to PCI device 2459 * @state: The current pci connection state 2460 * 2461 * This function is called after a PCI bus error affecting 2462 * this device has been detected. 2463 */ 2464 static pci_ers_result_t 2465 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2466 { 2467 struct net_device *netdev = pci_get_drvdata(pdev); 2468 struct atl1e_adapter *adapter = netdev_priv(netdev); 2469 2470 netif_device_detach(netdev); 2471 2472 if (state == pci_channel_io_perm_failure) 2473 return PCI_ERS_RESULT_DISCONNECT; 2474 2475 if (netif_running(netdev)) 2476 atl1e_down(adapter); 2477 2478 pci_disable_device(pdev); 2479 2480 /* Request a slot slot reset. */ 2481 return PCI_ERS_RESULT_NEED_RESET; 2482 } 2483 2484 /** 2485 * atl1e_io_slot_reset - called after the pci bus has been reset. 2486 * @pdev: Pointer to PCI device 2487 * 2488 * Restart the card from scratch, as if from a cold-boot. Implementation 2489 * resembles the first-half of the e1000_resume routine. 2490 */ 2491 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev) 2492 { 2493 struct net_device *netdev = pci_get_drvdata(pdev); 2494 struct atl1e_adapter *adapter = netdev_priv(netdev); 2495 2496 if (pci_enable_device(pdev)) { 2497 netdev_err(adapter->netdev, 2498 "Cannot re-enable PCI device after reset\n"); 2499 return PCI_ERS_RESULT_DISCONNECT; 2500 } 2501 pci_set_master(pdev); 2502 2503 pci_enable_wake(pdev, PCI_D3hot, 0); 2504 pci_enable_wake(pdev, PCI_D3cold, 0); 2505 2506 atl1e_reset_hw(&adapter->hw); 2507 2508 return PCI_ERS_RESULT_RECOVERED; 2509 } 2510 2511 /** 2512 * atl1e_io_resume - called when traffic can start flowing again. 2513 * @pdev: Pointer to PCI device 2514 * 2515 * This callback is called when the error recovery driver tells us that 2516 * its OK to resume normal operation. Implementation resembles the 2517 * second-half of the atl1e_resume routine. 2518 */ 2519 static void atl1e_io_resume(struct pci_dev *pdev) 2520 { 2521 struct net_device *netdev = pci_get_drvdata(pdev); 2522 struct atl1e_adapter *adapter = netdev_priv(netdev); 2523 2524 if (netif_running(netdev)) { 2525 if (atl1e_up(adapter)) { 2526 netdev_err(adapter->netdev, 2527 "can't bring device back up after reset\n"); 2528 return; 2529 } 2530 } 2531 2532 netif_device_attach(netdev); 2533 } 2534 2535 static const struct pci_error_handlers atl1e_err_handler = { 2536 .error_detected = atl1e_io_error_detected, 2537 .slot_reset = atl1e_io_slot_reset, 2538 .resume = atl1e_io_resume, 2539 }; 2540 2541 static struct pci_driver atl1e_driver = { 2542 .name = atl1e_driver_name, 2543 .id_table = atl1e_pci_tbl, 2544 .probe = atl1e_probe, 2545 .remove = atl1e_remove, 2546 /* Power Management Hooks */ 2547 #ifdef CONFIG_PM 2548 .suspend = atl1e_suspend, 2549 .resume = atl1e_resume, 2550 #endif 2551 .shutdown = atl1e_shutdown, 2552 .err_handler = &atl1e_err_handler 2553 }; 2554 2555 module_pci_driver(atl1e_driver); 2556