1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/module.h> 19 #include <linux/interrupt.h> 20 #include <linux/pci.h> 21 #include <linux/firmware.h> 22 #include <net/vxlan.h> 23 #include <linux/kthread.h> 24 #include "liquidio_common.h" 25 #include "octeon_droq.h" 26 #include "octeon_iq.h" 27 #include "response_manager.h" 28 #include "octeon_device.h" 29 #include "octeon_nic.h" 30 #include "octeon_main.h" 31 #include "octeon_network.h" 32 #include "cn66xx_regs.h" 33 #include "cn66xx_device.h" 34 #include "cn68xx_device.h" 35 #include "cn23xx_pf_device.h" 36 #include "liquidio_image.h" 37 #include "lio_vf_rep.h" 38 39 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>"); 40 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver"); 41 MODULE_LICENSE("GPL"); 42 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME 43 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 44 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME 45 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 46 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME 47 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 48 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME 49 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 50 51 static int ddr_timeout = 10000; 52 module_param(ddr_timeout, int, 0644); 53 MODULE_PARM_DESC(ddr_timeout, 54 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check"); 55 56 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 57 58 static int debug = -1; 59 module_param(debug, int, 0644); 60 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits"); 61 62 static char fw_type[LIO_MAX_FW_TYPE_LEN] = LIO_FW_NAME_TYPE_AUTO; 63 module_param_string(fw_type, fw_type, sizeof(fw_type), 0444); 64 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded (default is \"auto\"), which uses firmware in flash, if present, else loads \"nic\"."); 65 66 static u32 console_bitmask; 67 module_param(console_bitmask, int, 0644); 68 MODULE_PARM_DESC(console_bitmask, 69 "Bitmask indicating which consoles have debug output redirected to syslog."); 70 71 /** 72 * octeon_console_debug_enabled - determines if a given console has debug enabled. 73 * @console: console to check 74 * Return: 1 = enabled. 0 otherwise 75 */ 76 static int octeon_console_debug_enabled(u32 console) 77 { 78 return (console_bitmask >> (console)) & 0x1; 79 } 80 81 /* Polling interval for determining when NIC application is alive */ 82 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100 83 84 /* runtime link query interval */ 85 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000 86 /* update localtime to octeon firmware every 60 seconds. 87 * make firmware to use same time reference, so that it will be easy to 88 * correlate firmware logged events/errors with host events, for debugging. 89 */ 90 #define LIO_SYNC_OCTEON_TIME_INTERVAL_MS 60000 91 92 /* time to wait for possible in-flight requests in milliseconds */ 93 #define WAIT_INFLIGHT_REQUEST msecs_to_jiffies(1000) 94 95 struct oct_link_status_resp { 96 u64 rh; 97 struct oct_link_info link_info; 98 u64 status; 99 }; 100 101 struct oct_timestamp_resp { 102 u64 rh; 103 u64 timestamp; 104 u64 status; 105 }; 106 107 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp)) 108 109 union tx_info { 110 u64 u64; 111 struct { 112 #ifdef __BIG_ENDIAN_BITFIELD 113 u16 gso_size; 114 u16 gso_segs; 115 u32 reserved; 116 #else 117 u32 reserved; 118 u16 gso_segs; 119 u16 gso_size; 120 #endif 121 } s; 122 }; 123 124 /* Octeon device properties to be used by the NIC module. 125 * Each octeon device in the system will be represented 126 * by this structure in the NIC module. 127 */ 128 129 #define OCTNIC_GSO_MAX_HEADER_SIZE 128 130 #define OCTNIC_GSO_MAX_SIZE \ 131 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE) 132 133 struct handshake { 134 struct completion init; 135 struct completion started; 136 struct pci_dev *pci_dev; 137 int init_ok; 138 int started_ok; 139 }; 140 141 #ifdef CONFIG_PCI_IOV 142 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs); 143 #endif 144 145 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 146 char *prefix, char *suffix); 147 148 static int octeon_device_init(struct octeon_device *); 149 static int liquidio_stop(struct net_device *netdev); 150 static void liquidio_remove(struct pci_dev *pdev); 151 static int liquidio_probe(struct pci_dev *pdev, 152 const struct pci_device_id *ent); 153 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 154 int linkstate); 155 156 static struct handshake handshake[MAX_OCTEON_DEVICES]; 157 static struct completion first_stage; 158 159 static void octeon_droq_bh(struct tasklet_struct *t) 160 { 161 int q_no; 162 int reschedule = 0; 163 struct octeon_device_priv *oct_priv = from_tasklet(oct_priv, t, 164 droq_tasklet); 165 struct octeon_device *oct = oct_priv->dev; 166 167 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { 168 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) 169 continue; 170 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], 171 MAX_PACKET_BUDGET); 172 lio_enable_irq(oct->droq[q_no], NULL); 173 174 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) { 175 /* set time and cnt interrupt thresholds for this DROQ 176 * for NAPI 177 */ 178 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; 179 180 octeon_write_csr64( 181 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no), 182 0x5700000040ULL); 183 octeon_write_csr64( 184 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0); 185 } 186 } 187 188 if (reschedule) 189 tasklet_schedule(&oct_priv->droq_tasklet); 190 } 191 192 static int lio_wait_for_oq_pkts(struct octeon_device *oct) 193 { 194 struct octeon_device_priv *oct_priv = 195 (struct octeon_device_priv *)oct->priv; 196 int retry = 100, pkt_cnt = 0, pending_pkts = 0; 197 int i; 198 199 do { 200 pending_pkts = 0; 201 202 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 203 if (!(oct->io_qmask.oq & BIT_ULL(i))) 204 continue; 205 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); 206 } 207 if (pkt_cnt > 0) { 208 pending_pkts += pkt_cnt; 209 tasklet_schedule(&oct_priv->droq_tasklet); 210 } 211 pkt_cnt = 0; 212 schedule_timeout_uninterruptible(1); 213 214 } while (retry-- && pending_pkts); 215 216 return pkt_cnt; 217 } 218 219 /** 220 * force_io_queues_off - Forces all IO queues off on a given device 221 * @oct: Pointer to Octeon device 222 */ 223 static void force_io_queues_off(struct octeon_device *oct) 224 { 225 if ((oct->chip_id == OCTEON_CN66XX) || 226 (oct->chip_id == OCTEON_CN68XX)) { 227 /* Reset the Enable bits for Input Queues. */ 228 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0); 229 230 /* Reset the Enable bits for Output Queues. */ 231 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0); 232 } 233 } 234 235 /** 236 * pcierror_quiesce_device - Cause device to go quiet so it can be safely removed/reset/etc 237 * @oct: Pointer to Octeon device 238 */ 239 static inline void pcierror_quiesce_device(struct octeon_device *oct) 240 { 241 int i; 242 243 /* Disable the input and output queues now. No more packets will 244 * arrive from Octeon, but we should wait for all packet processing 245 * to finish. 246 */ 247 force_io_queues_off(oct); 248 249 /* To allow for in-flight requests */ 250 schedule_timeout_uninterruptible(WAIT_INFLIGHT_REQUEST); 251 252 if (wait_for_pending_requests(oct)) 253 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 254 255 /* Force all requests waiting to be fetched by OCTEON to complete. */ 256 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 257 struct octeon_instr_queue *iq; 258 259 if (!(oct->io_qmask.iq & BIT_ULL(i))) 260 continue; 261 iq = oct->instr_queue[i]; 262 263 if (atomic_read(&iq->instr_pending)) { 264 spin_lock_bh(&iq->lock); 265 iq->fill_cnt = 0; 266 iq->octeon_read_index = iq->host_write_index; 267 iq->stats.instr_processed += 268 atomic_read(&iq->instr_pending); 269 lio_process_iq_request_list(oct, iq, 0); 270 spin_unlock_bh(&iq->lock); 271 } 272 } 273 274 /* Force all pending ordered list requests to time out. */ 275 lio_process_ordered_list(oct, 1); 276 277 /* We do not need to wait for output queue packets to be processed. */ 278 } 279 280 /** 281 * cleanup_aer_uncorrect_error_status - Cleanup PCI AER uncorrectable error status 282 * @dev: Pointer to PCI device 283 */ 284 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 285 { 286 int pos = 0x100; 287 u32 status, mask; 288 289 pr_info("%s :\n", __func__); 290 291 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); 292 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); 293 if (dev->error_state == pci_channel_io_normal) 294 status &= ~mask; /* Clear corresponding nonfatal bits */ 295 else 296 status &= mask; /* Clear corresponding fatal bits */ 297 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); 298 } 299 300 /** 301 * stop_pci_io - Stop all PCI IO to a given device 302 * @oct: Pointer to Octeon device 303 */ 304 static void stop_pci_io(struct octeon_device *oct) 305 { 306 /* No more instructions will be forwarded. */ 307 atomic_set(&oct->status, OCT_DEV_IN_RESET); 308 309 pci_disable_device(oct->pci_dev); 310 311 /* Disable interrupts */ 312 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 313 314 pcierror_quiesce_device(oct); 315 316 /* Release the interrupt line */ 317 free_irq(oct->pci_dev->irq, oct); 318 319 if (oct->flags & LIO_FLAG_MSI_ENABLED) 320 pci_disable_msi(oct->pci_dev); 321 322 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 323 lio_get_state_string(&oct->status)); 324 325 /* making it a common function for all OCTEON models */ 326 cleanup_aer_uncorrect_error_status(oct->pci_dev); 327 } 328 329 /** 330 * liquidio_pcie_error_detected - called when PCI error is detected 331 * @pdev: Pointer to PCI device 332 * @state: The current pci connection state 333 * 334 * This function is called after a PCI bus error affecting 335 * this device has been detected. 336 */ 337 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev, 338 pci_channel_state_t state) 339 { 340 struct octeon_device *oct = pci_get_drvdata(pdev); 341 342 /* Non-correctable Non-fatal errors */ 343 if (state == pci_channel_io_normal) { 344 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n"); 345 cleanup_aer_uncorrect_error_status(oct->pci_dev); 346 return PCI_ERS_RESULT_CAN_RECOVER; 347 } 348 349 /* Non-correctable Fatal errors */ 350 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n"); 351 stop_pci_io(oct); 352 353 /* Always return a DISCONNECT. There is no support for recovery but only 354 * for a clean shutdown. 355 */ 356 return PCI_ERS_RESULT_DISCONNECT; 357 } 358 359 /** 360 * liquidio_pcie_mmio_enabled - mmio handler 361 * @pdev: Pointer to PCI device 362 */ 363 static pci_ers_result_t liquidio_pcie_mmio_enabled(struct pci_dev __maybe_unused *pdev) 364 { 365 /* We should never hit this since we never ask for a reset for a Fatal 366 * Error. We always return DISCONNECT in io_error above. 367 * But play safe and return RECOVERED for now. 368 */ 369 return PCI_ERS_RESULT_RECOVERED; 370 } 371 372 /** 373 * liquidio_pcie_slot_reset - called after the pci bus has been reset. 374 * @pdev: Pointer to PCI device 375 * 376 * Restart the card from scratch, as if from a cold-boot. Implementation 377 * resembles the first-half of the octeon_resume routine. 378 */ 379 static pci_ers_result_t liquidio_pcie_slot_reset(struct pci_dev __maybe_unused *pdev) 380 { 381 /* We should never hit this since we never ask for a reset for a Fatal 382 * Error. We always return DISCONNECT in io_error above. 383 * But play safe and return RECOVERED for now. 384 */ 385 return PCI_ERS_RESULT_RECOVERED; 386 } 387 388 /** 389 * liquidio_pcie_resume - called when traffic can start flowing again. 390 * @pdev: Pointer to PCI device 391 * 392 * This callback is called when the error recovery driver tells us that 393 * its OK to resume normal operation. Implementation resembles the 394 * second-half of the octeon_resume routine. 395 */ 396 static void liquidio_pcie_resume(struct pci_dev __maybe_unused *pdev) 397 { 398 /* Nothing to be done here. */ 399 } 400 401 #define liquidio_suspend NULL 402 #define liquidio_resume NULL 403 404 /* For PCI-E Advanced Error Recovery (AER) Interface */ 405 static const struct pci_error_handlers liquidio_err_handler = { 406 .error_detected = liquidio_pcie_error_detected, 407 .mmio_enabled = liquidio_pcie_mmio_enabled, 408 .slot_reset = liquidio_pcie_slot_reset, 409 .resume = liquidio_pcie_resume, 410 }; 411 412 static const struct pci_device_id liquidio_pci_tbl[] = { 413 { /* 68xx */ 414 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 415 }, 416 { /* 66xx */ 417 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 418 }, 419 { /* 23xx pf */ 420 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 421 }, 422 { 423 0, 0, 0, 0, 0, 0, 0 424 } 425 }; 426 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl); 427 428 static SIMPLE_DEV_PM_OPS(liquidio_pm_ops, liquidio_suspend, liquidio_resume); 429 430 static struct pci_driver liquidio_pci_driver = { 431 .name = "LiquidIO", 432 .id_table = liquidio_pci_tbl, 433 .probe = liquidio_probe, 434 .remove = liquidio_remove, 435 .err_handler = &liquidio_err_handler, /* For AER */ 436 .driver.pm = &liquidio_pm_ops, 437 #ifdef CONFIG_PCI_IOV 438 .sriov_configure = liquidio_enable_sriov, 439 #endif 440 }; 441 442 /** 443 * liquidio_init_pci - register PCI driver 444 */ 445 static int liquidio_init_pci(void) 446 { 447 return pci_register_driver(&liquidio_pci_driver); 448 } 449 450 /** 451 * liquidio_deinit_pci - unregister PCI driver 452 */ 453 static void liquidio_deinit_pci(void) 454 { 455 pci_unregister_driver(&liquidio_pci_driver); 456 } 457 458 /** 459 * check_txq_status - Check Tx queue status, and take appropriate action 460 * @lio: per-network private data 461 * Return: 0 if full, number of queues woken up otherwise 462 */ 463 static inline int check_txq_status(struct lio *lio) 464 { 465 int numqs = lio->netdev->real_num_tx_queues; 466 int ret_val = 0; 467 int q, iq; 468 469 /* check each sub-queue state */ 470 for (q = 0; q < numqs; q++) { 471 iq = lio->linfo.txpciq[q % 472 lio->oct_dev->num_iqs].s.q_no; 473 if (octnet_iq_is_full(lio->oct_dev, iq)) 474 continue; 475 if (__netif_subqueue_stopped(lio->netdev, q)) { 476 netif_wake_subqueue(lio->netdev, q); 477 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, 478 tx_restart, 1); 479 ret_val++; 480 } 481 } 482 483 return ret_val; 484 } 485 486 /** 487 * print_link_info - Print link information 488 * @netdev: network device 489 */ 490 static void print_link_info(struct net_device *netdev) 491 { 492 struct lio *lio = GET_LIO(netdev); 493 494 if (!ifstate_check(lio, LIO_IFSTATE_RESETTING) && 495 ifstate_check(lio, LIO_IFSTATE_REGISTERED)) { 496 struct oct_link_info *linfo = &lio->linfo; 497 498 if (linfo->link.s.link_up) { 499 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n", 500 linfo->link.s.speed, 501 (linfo->link.s.duplex) ? "Full" : "Half"); 502 } else { 503 netif_info(lio, link, lio->netdev, "Link Down\n"); 504 } 505 } 506 } 507 508 /** 509 * octnet_link_status_change - Routine to notify MTU change 510 * @work: work_struct data structure 511 */ 512 static void octnet_link_status_change(struct work_struct *work) 513 { 514 struct cavium_wk *wk = (struct cavium_wk *)work; 515 struct lio *lio = (struct lio *)wk->ctxptr; 516 517 /* lio->linfo.link.s.mtu always contains max MTU of the lio interface. 518 * this API is invoked only when new max-MTU of the interface is 519 * less than current MTU. 520 */ 521 rtnl_lock(); 522 dev_set_mtu(lio->netdev, lio->linfo.link.s.mtu); 523 rtnl_unlock(); 524 } 525 526 /** 527 * setup_link_status_change_wq - Sets up the mtu status change work 528 * @netdev: network device 529 */ 530 static inline int setup_link_status_change_wq(struct net_device *netdev) 531 { 532 struct lio *lio = GET_LIO(netdev); 533 struct octeon_device *oct = lio->oct_dev; 534 535 lio->link_status_wq.wq = alloc_workqueue("link-status", 536 WQ_MEM_RECLAIM, 0); 537 if (!lio->link_status_wq.wq) { 538 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n"); 539 return -1; 540 } 541 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work, 542 octnet_link_status_change); 543 lio->link_status_wq.wk.ctxptr = lio; 544 545 return 0; 546 } 547 548 static inline void cleanup_link_status_change_wq(struct net_device *netdev) 549 { 550 struct lio *lio = GET_LIO(netdev); 551 552 if (lio->link_status_wq.wq) { 553 cancel_delayed_work_sync(&lio->link_status_wq.wk.work); 554 destroy_workqueue(lio->link_status_wq.wq); 555 } 556 } 557 558 /** 559 * update_link_status - Update link status 560 * @netdev: network device 561 * @ls: link status structure 562 * 563 * Called on receipt of a link status response from the core application to 564 * update each interface's link status. 565 */ 566 static inline void update_link_status(struct net_device *netdev, 567 union oct_link_status *ls) 568 { 569 struct lio *lio = GET_LIO(netdev); 570 int changed = (lio->linfo.link.u64 != ls->u64); 571 int current_max_mtu = lio->linfo.link.s.mtu; 572 struct octeon_device *oct = lio->oct_dev; 573 574 dev_dbg(&oct->pci_dev->dev, "%s: lio->linfo.link.u64=%llx, ls->u64=%llx\n", 575 __func__, lio->linfo.link.u64, ls->u64); 576 lio->linfo.link.u64 = ls->u64; 577 578 if ((lio->intf_open) && (changed)) { 579 print_link_info(netdev); 580 lio->link_changes++; 581 582 if (lio->linfo.link.s.link_up) { 583 dev_dbg(&oct->pci_dev->dev, "%s: link_up", __func__); 584 netif_carrier_on(netdev); 585 wake_txqs(netdev); 586 } else { 587 dev_dbg(&oct->pci_dev->dev, "%s: link_off", __func__); 588 netif_carrier_off(netdev); 589 stop_txqs(netdev); 590 } 591 if (lio->linfo.link.s.mtu != current_max_mtu) { 592 netif_info(lio, probe, lio->netdev, "Max MTU changed from %d to %d\n", 593 current_max_mtu, lio->linfo.link.s.mtu); 594 netdev->max_mtu = lio->linfo.link.s.mtu; 595 } 596 if (lio->linfo.link.s.mtu < netdev->mtu) { 597 dev_warn(&oct->pci_dev->dev, 598 "Current MTU is higher than new max MTU; Reducing the current mtu from %d to %d\n", 599 netdev->mtu, lio->linfo.link.s.mtu); 600 queue_delayed_work(lio->link_status_wq.wq, 601 &lio->link_status_wq.wk.work, 0); 602 } 603 } 604 } 605 606 /** 607 * lio_sync_octeon_time - send latest localtime to octeon firmware so that 608 * firmware will correct it's time, in case there is a time skew 609 * 610 * @work: work scheduled to send time update to octeon firmware 611 **/ 612 static void lio_sync_octeon_time(struct work_struct *work) 613 { 614 struct cavium_wk *wk = (struct cavium_wk *)work; 615 struct lio *lio = (struct lio *)wk->ctxptr; 616 struct octeon_device *oct = lio->oct_dev; 617 struct octeon_soft_command *sc; 618 struct timespec64 ts; 619 struct lio_time *lt; 620 int ret; 621 622 sc = octeon_alloc_soft_command(oct, sizeof(struct lio_time), 16, 0); 623 if (!sc) { 624 dev_err(&oct->pci_dev->dev, 625 "Failed to sync time to octeon: soft command allocation failed\n"); 626 return; 627 } 628 629 lt = (struct lio_time *)sc->virtdptr; 630 631 /* Get time of the day */ 632 ktime_get_real_ts64(&ts); 633 lt->sec = ts.tv_sec; 634 lt->nsec = ts.tv_nsec; 635 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); 636 637 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 638 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 639 OPCODE_NIC_SYNC_OCTEON_TIME, 0, 0, 0); 640 641 init_completion(&sc->complete); 642 sc->sc_status = OCTEON_REQUEST_PENDING; 643 644 ret = octeon_send_soft_command(oct, sc); 645 if (ret == IQ_SEND_FAILED) { 646 dev_err(&oct->pci_dev->dev, 647 "Failed to sync time to octeon: failed to send soft command\n"); 648 octeon_free_soft_command(oct, sc); 649 } else { 650 WRITE_ONCE(sc->caller_is_done, true); 651 } 652 653 queue_delayed_work(lio->sync_octeon_time_wq.wq, 654 &lio->sync_octeon_time_wq.wk.work, 655 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 656 } 657 658 /** 659 * setup_sync_octeon_time_wq - prepare work to periodically update local time to octeon firmware 660 * 661 * @netdev: network device which should send time update to firmware 662 **/ 663 static inline int setup_sync_octeon_time_wq(struct net_device *netdev) 664 { 665 struct lio *lio = GET_LIO(netdev); 666 struct octeon_device *oct = lio->oct_dev; 667 668 lio->sync_octeon_time_wq.wq = 669 alloc_workqueue("update-octeon-time", WQ_MEM_RECLAIM, 0); 670 if (!lio->sync_octeon_time_wq.wq) { 671 dev_err(&oct->pci_dev->dev, "Unable to create wq to update octeon time\n"); 672 return -1; 673 } 674 INIT_DELAYED_WORK(&lio->sync_octeon_time_wq.wk.work, 675 lio_sync_octeon_time); 676 lio->sync_octeon_time_wq.wk.ctxptr = lio; 677 queue_delayed_work(lio->sync_octeon_time_wq.wq, 678 &lio->sync_octeon_time_wq.wk.work, 679 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 680 681 return 0; 682 } 683 684 /** 685 * cleanup_sync_octeon_time_wq - destroy wq 686 * 687 * @netdev: network device which should send time update to firmware 688 * 689 * Stop scheduling and destroy the work created to periodically update local 690 * time to octeon firmware. 691 **/ 692 static inline void cleanup_sync_octeon_time_wq(struct net_device *netdev) 693 { 694 struct lio *lio = GET_LIO(netdev); 695 struct cavium_wq *time_wq = &lio->sync_octeon_time_wq; 696 697 if (time_wq->wq) { 698 cancel_delayed_work_sync(&time_wq->wk.work); 699 destroy_workqueue(time_wq->wq); 700 } 701 } 702 703 static struct octeon_device *get_other_octeon_device(struct octeon_device *oct) 704 { 705 struct octeon_device *other_oct; 706 707 other_oct = lio_get_device(oct->octeon_id + 1); 708 709 if (other_oct && other_oct->pci_dev) { 710 int oct_busnum, other_oct_busnum; 711 712 oct_busnum = oct->pci_dev->bus->number; 713 other_oct_busnum = other_oct->pci_dev->bus->number; 714 715 if (oct_busnum == other_oct_busnum) { 716 int oct_slot, other_oct_slot; 717 718 oct_slot = PCI_SLOT(oct->pci_dev->devfn); 719 other_oct_slot = PCI_SLOT(other_oct->pci_dev->devfn); 720 721 if (oct_slot == other_oct_slot) 722 return other_oct; 723 } 724 } 725 726 return NULL; 727 } 728 729 static void disable_all_vf_links(struct octeon_device *oct) 730 { 731 struct net_device *netdev; 732 int max_vfs, vf, i; 733 734 if (!oct) 735 return; 736 737 max_vfs = oct->sriov_info.max_vfs; 738 739 for (i = 0; i < oct->ifcount; i++) { 740 netdev = oct->props[i].netdev; 741 if (!netdev) 742 continue; 743 744 for (vf = 0; vf < max_vfs; vf++) 745 liquidio_set_vf_link_state(netdev, vf, 746 IFLA_VF_LINK_STATE_DISABLE); 747 } 748 } 749 750 static int liquidio_watchdog(void *param) 751 { 752 bool err_msg_was_printed[LIO_MAX_CORES]; 753 u16 mask_of_crashed_or_stuck_cores = 0; 754 bool all_vf_links_are_disabled = false; 755 struct octeon_device *oct = param; 756 struct octeon_device *other_oct; 757 #ifdef CONFIG_MODULE_UNLOAD 758 long refcount, vfs_referencing_pf; 759 u64 vfs_mask1, vfs_mask2; 760 #endif 761 int core; 762 763 memset(err_msg_was_printed, 0, sizeof(err_msg_was_printed)); 764 765 while (!kthread_should_stop()) { 766 /* sleep for a couple of seconds so that we don't hog the CPU */ 767 set_current_state(TASK_INTERRUPTIBLE); 768 schedule_timeout(msecs_to_jiffies(2000)); 769 770 mask_of_crashed_or_stuck_cores = 771 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2); 772 773 if (!mask_of_crashed_or_stuck_cores) 774 continue; 775 776 WRITE_ONCE(oct->cores_crashed, true); 777 other_oct = get_other_octeon_device(oct); 778 if (other_oct) 779 WRITE_ONCE(other_oct->cores_crashed, true); 780 781 for (core = 0; core < LIO_MAX_CORES; core++) { 782 bool core_crashed_or_got_stuck; 783 784 core_crashed_or_got_stuck = 785 (mask_of_crashed_or_stuck_cores 786 >> core) & 1; 787 788 if (core_crashed_or_got_stuck && 789 !err_msg_was_printed[core]) { 790 dev_err(&oct->pci_dev->dev, 791 "ERROR: Octeon core %d crashed or got stuck! See oct-fwdump for details.\n", 792 core); 793 err_msg_was_printed[core] = true; 794 } 795 } 796 797 if (all_vf_links_are_disabled) 798 continue; 799 800 disable_all_vf_links(oct); 801 disable_all_vf_links(other_oct); 802 all_vf_links_are_disabled = true; 803 804 #ifdef CONFIG_MODULE_UNLOAD 805 vfs_mask1 = READ_ONCE(oct->sriov_info.vf_drv_loaded_mask); 806 vfs_mask2 = READ_ONCE(other_oct->sriov_info.vf_drv_loaded_mask); 807 808 vfs_referencing_pf = hweight64(vfs_mask1); 809 vfs_referencing_pf += hweight64(vfs_mask2); 810 811 refcount = module_refcount(THIS_MODULE); 812 if (refcount >= vfs_referencing_pf) { 813 while (vfs_referencing_pf) { 814 module_put(THIS_MODULE); 815 vfs_referencing_pf--; 816 } 817 } 818 #endif 819 } 820 821 return 0; 822 } 823 824 /** 825 * liquidio_probe - PCI probe handler 826 * @pdev: PCI device structure 827 * @ent: unused 828 */ 829 static int 830 liquidio_probe(struct pci_dev *pdev, const struct pci_device_id __maybe_unused *ent) 831 { 832 struct octeon_device *oct_dev = NULL; 833 struct handshake *hs; 834 835 oct_dev = octeon_allocate_device(pdev->device, 836 sizeof(struct octeon_device_priv)); 837 if (!oct_dev) { 838 dev_err(&pdev->dev, "Unable to allocate device\n"); 839 return -ENOMEM; 840 } 841 842 if (pdev->device == OCTEON_CN23XX_PF_VID) 843 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED; 844 845 /* Enable PTP for 6XXX Device */ 846 if (((pdev->device == OCTEON_CN66XX) || 847 (pdev->device == OCTEON_CN68XX))) 848 oct_dev->ptp_enable = true; 849 else 850 oct_dev->ptp_enable = false; 851 852 dev_info(&pdev->dev, "Initializing device %x:%x.\n", 853 (u32)pdev->vendor, (u32)pdev->device); 854 855 /* Assign octeon_device for this device to the private data area. */ 856 pci_set_drvdata(pdev, oct_dev); 857 858 /* set linux specific device pointer */ 859 oct_dev->pci_dev = (void *)pdev; 860 861 oct_dev->subsystem_id = pdev->subsystem_vendor | 862 (pdev->subsystem_device << 16); 863 864 hs = &handshake[oct_dev->octeon_id]; 865 init_completion(&hs->init); 866 init_completion(&hs->started); 867 hs->pci_dev = pdev; 868 869 if (oct_dev->octeon_id == 0) 870 /* first LiquidIO NIC is detected */ 871 complete(&first_stage); 872 873 if (octeon_device_init(oct_dev)) { 874 complete(&hs->init); 875 liquidio_remove(pdev); 876 return -ENOMEM; 877 } 878 879 if (OCTEON_CN23XX_PF(oct_dev)) { 880 u8 bus, device, function; 881 882 if (atomic_read(oct_dev->adapter_refcount) == 1) { 883 /* Each NIC gets one watchdog kernel thread. The first 884 * PF (of each NIC) that gets pci_driver->probe()'d 885 * creates that thread. 886 */ 887 bus = pdev->bus->number; 888 device = PCI_SLOT(pdev->devfn); 889 function = PCI_FUNC(pdev->devfn); 890 oct_dev->watchdog_task = kthread_run(liquidio_watchdog, 891 oct_dev, 892 "liowd/%02hhx:%02hhx.%hhx", 893 bus, device, function); 894 if (IS_ERR(oct_dev->watchdog_task)) { 895 oct_dev->watchdog_task = NULL; 896 dev_err(&oct_dev->pci_dev->dev, 897 "failed to create kernel_thread\n"); 898 liquidio_remove(pdev); 899 return -1; 900 } 901 } 902 } 903 904 oct_dev->rx_pause = 1; 905 oct_dev->tx_pause = 1; 906 907 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n"); 908 909 return 0; 910 } 911 912 static bool fw_type_is_auto(void) 913 { 914 return strncmp(fw_type, LIO_FW_NAME_TYPE_AUTO, 915 sizeof(LIO_FW_NAME_TYPE_AUTO)) == 0; 916 } 917 918 /** 919 * octeon_pci_flr - PCI FLR for each Octeon device. 920 * @oct: octeon device 921 */ 922 static void octeon_pci_flr(struct octeon_device *oct) 923 { 924 int rc; 925 926 pci_save_state(oct->pci_dev); 927 928 pci_cfg_access_lock(oct->pci_dev); 929 930 /* Quiesce the device completely */ 931 pci_write_config_word(oct->pci_dev, PCI_COMMAND, 932 PCI_COMMAND_INTX_DISABLE); 933 934 rc = __pci_reset_function_locked(oct->pci_dev); 935 936 if (rc != 0) 937 dev_err(&oct->pci_dev->dev, "Error %d resetting PCI function %d\n", 938 rc, oct->pf_num); 939 940 pci_cfg_access_unlock(oct->pci_dev); 941 942 pci_restore_state(oct->pci_dev); 943 } 944 945 /** 946 * octeon_destroy_resources - Destroy resources associated with octeon device 947 * @oct: octeon device 948 */ 949 static void octeon_destroy_resources(struct octeon_device *oct) 950 { 951 int i, refcount; 952 struct msix_entry *msix_entries; 953 struct octeon_device_priv *oct_priv = 954 (struct octeon_device_priv *)oct->priv; 955 956 struct handshake *hs; 957 958 switch (atomic_read(&oct->status)) { 959 case OCT_DEV_RUNNING: 960 case OCT_DEV_CORE_OK: 961 962 /* No more instructions will be forwarded. */ 963 atomic_set(&oct->status, OCT_DEV_IN_RESET); 964 965 oct->app_mode = CVM_DRV_INVALID_APP; 966 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 967 lio_get_state_string(&oct->status)); 968 969 schedule_timeout_uninterruptible(HZ / 10); 970 971 fallthrough; 972 case OCT_DEV_HOST_OK: 973 974 case OCT_DEV_CONSOLE_INIT_DONE: 975 /* Remove any consoles */ 976 octeon_remove_consoles(oct); 977 978 fallthrough; 979 case OCT_DEV_IO_QUEUES_DONE: 980 if (lio_wait_for_instr_fetch(oct)) 981 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); 982 983 if (wait_for_pending_requests(oct)) 984 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 985 986 /* Disable the input and output queues now. No more packets will 987 * arrive from Octeon, but we should wait for all packet 988 * processing to finish. 989 */ 990 oct->fn_list.disable_io_queues(oct); 991 992 if (lio_wait_for_oq_pkts(oct)) 993 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n"); 994 995 /* Force all requests waiting to be fetched by OCTEON to 996 * complete. 997 */ 998 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 999 struct octeon_instr_queue *iq; 1000 1001 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1002 continue; 1003 iq = oct->instr_queue[i]; 1004 1005 if (atomic_read(&iq->instr_pending)) { 1006 spin_lock_bh(&iq->lock); 1007 iq->fill_cnt = 0; 1008 iq->octeon_read_index = iq->host_write_index; 1009 iq->stats.instr_processed += 1010 atomic_read(&iq->instr_pending); 1011 lio_process_iq_request_list(oct, iq, 0); 1012 spin_unlock_bh(&iq->lock); 1013 } 1014 } 1015 1016 lio_process_ordered_list(oct, 1); 1017 octeon_free_sc_done_list(oct); 1018 octeon_free_sc_zombie_list(oct); 1019 1020 fallthrough; 1021 case OCT_DEV_INTR_SET_DONE: 1022 /* Disable interrupts */ 1023 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 1024 1025 if (oct->msix_on) { 1026 msix_entries = (struct msix_entry *)oct->msix_entries; 1027 for (i = 0; i < oct->num_msix_irqs - 1; i++) { 1028 if (oct->ioq_vector[i].vector) { 1029 /* clear the affinity_cpumask */ 1030 irq_set_affinity_hint( 1031 msix_entries[i].vector, 1032 NULL); 1033 free_irq(msix_entries[i].vector, 1034 &oct->ioq_vector[i]); 1035 oct->ioq_vector[i].vector = 0; 1036 } 1037 } 1038 /* non-iov vector's argument is oct struct */ 1039 free_irq(msix_entries[i].vector, oct); 1040 1041 pci_disable_msix(oct->pci_dev); 1042 kfree(oct->msix_entries); 1043 oct->msix_entries = NULL; 1044 } else { 1045 /* Release the interrupt line */ 1046 free_irq(oct->pci_dev->irq, oct); 1047 1048 if (oct->flags & LIO_FLAG_MSI_ENABLED) 1049 pci_disable_msi(oct->pci_dev); 1050 } 1051 1052 kfree(oct->irq_name_storage); 1053 oct->irq_name_storage = NULL; 1054 1055 fallthrough; 1056 case OCT_DEV_MSIX_ALLOC_VECTOR_DONE: 1057 if (OCTEON_CN23XX_PF(oct)) 1058 octeon_free_ioq_vector(oct); 1059 1060 fallthrough; 1061 case OCT_DEV_MBOX_SETUP_DONE: 1062 if (OCTEON_CN23XX_PF(oct)) 1063 oct->fn_list.free_mbox(oct); 1064 1065 fallthrough; 1066 case OCT_DEV_IN_RESET: 1067 case OCT_DEV_DROQ_INIT_DONE: 1068 /* Wait for any pending operations */ 1069 mdelay(100); 1070 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 1071 if (!(oct->io_qmask.oq & BIT_ULL(i))) 1072 continue; 1073 octeon_delete_droq(oct, i); 1074 } 1075 1076 /* Force any pending handshakes to complete */ 1077 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 1078 hs = &handshake[i]; 1079 1080 if (hs->pci_dev) { 1081 handshake[oct->octeon_id].init_ok = 0; 1082 complete(&handshake[oct->octeon_id].init); 1083 handshake[oct->octeon_id].started_ok = 0; 1084 complete(&handshake[oct->octeon_id].started); 1085 } 1086 } 1087 1088 fallthrough; 1089 case OCT_DEV_RESP_LIST_INIT_DONE: 1090 octeon_delete_response_list(oct); 1091 1092 fallthrough; 1093 case OCT_DEV_INSTR_QUEUE_INIT_DONE: 1094 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1095 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1096 continue; 1097 octeon_delete_instr_queue(oct, i); 1098 } 1099 #ifdef CONFIG_PCI_IOV 1100 if (oct->sriov_info.sriov_enabled) 1101 pci_disable_sriov(oct->pci_dev); 1102 #endif 1103 fallthrough; 1104 case OCT_DEV_SC_BUFF_POOL_INIT_DONE: 1105 octeon_free_sc_buffer_pool(oct); 1106 1107 fallthrough; 1108 case OCT_DEV_DISPATCH_INIT_DONE: 1109 octeon_delete_dispatch_list(oct); 1110 cancel_delayed_work_sync(&oct->nic_poll_work.work); 1111 1112 fallthrough; 1113 case OCT_DEV_PCI_MAP_DONE: 1114 refcount = octeon_deregister_device(oct); 1115 1116 /* Soft reset the octeon device before exiting. 1117 * However, if fw was loaded from card (i.e. autoboot), 1118 * perform an FLR instead. 1119 * Implementation note: only soft-reset the device 1120 * if it is a CN6XXX OR the LAST CN23XX device. 1121 */ 1122 if (atomic_read(oct->adapter_fw_state) == FW_IS_PRELOADED) 1123 octeon_pci_flr(oct); 1124 else if (OCTEON_CN6XXX(oct) || !refcount) 1125 oct->fn_list.soft_reset(oct); 1126 1127 octeon_unmap_pci_barx(oct, 0); 1128 octeon_unmap_pci_barx(oct, 1); 1129 1130 fallthrough; 1131 case OCT_DEV_PCI_ENABLE_DONE: 1132 pci_clear_master(oct->pci_dev); 1133 /* Disable the device, releasing the PCI INT */ 1134 pci_disable_device(oct->pci_dev); 1135 1136 fallthrough; 1137 case OCT_DEV_BEGIN_STATE: 1138 /* Nothing to be done here either */ 1139 break; 1140 } /* end switch (oct->status) */ 1141 1142 tasklet_kill(&oct_priv->droq_tasklet); 1143 } 1144 1145 /** 1146 * send_rx_ctrl_cmd - Send Rx control command 1147 * @lio: per-network private data 1148 * @start_stop: whether to start or stop 1149 */ 1150 static int send_rx_ctrl_cmd(struct lio *lio, int start_stop) 1151 { 1152 struct octeon_soft_command *sc; 1153 union octnet_cmd *ncmd; 1154 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1155 int retval; 1156 1157 if (oct->props[lio->ifidx].rx_on == start_stop) 1158 return 0; 1159 1160 sc = (struct octeon_soft_command *) 1161 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE, 1162 16, 0); 1163 if (!sc) { 1164 netif_info(lio, rx_err, lio->netdev, 1165 "Failed to allocate octeon_soft_command struct\n"); 1166 return -ENOMEM; 1167 } 1168 1169 ncmd = (union octnet_cmd *)sc->virtdptr; 1170 1171 ncmd->u64 = 0; 1172 ncmd->s.cmd = OCTNET_CMD_RX_CTL; 1173 ncmd->s.param1 = start_stop; 1174 1175 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3)); 1176 1177 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 1178 1179 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 1180 OPCODE_NIC_CMD, 0, 0, 0); 1181 1182 init_completion(&sc->complete); 1183 sc->sc_status = OCTEON_REQUEST_PENDING; 1184 1185 retval = octeon_send_soft_command(oct, sc); 1186 if (retval == IQ_SEND_FAILED) { 1187 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n"); 1188 octeon_free_soft_command(oct, sc); 1189 } else { 1190 /* Sleep on a wait queue till the cond flag indicates that the 1191 * response arrived or timed-out. 1192 */ 1193 retval = wait_for_sc_completion_timeout(oct, sc, 0); 1194 if (retval) 1195 return retval; 1196 1197 oct->props[lio->ifidx].rx_on = start_stop; 1198 WRITE_ONCE(sc->caller_is_done, true); 1199 } 1200 1201 return retval; 1202 } 1203 1204 /** 1205 * liquidio_destroy_nic_device - Destroy NIC device interface 1206 * @oct: octeon device 1207 * @ifidx: which interface to destroy 1208 * 1209 * Cleanup associated with each interface for an Octeon device when NIC 1210 * module is being unloaded or if initialization fails during load. 1211 */ 1212 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx) 1213 { 1214 struct net_device *netdev = oct->props[ifidx].netdev; 1215 struct octeon_device_priv *oct_priv = 1216 (struct octeon_device_priv *)oct->priv; 1217 struct napi_struct *napi, *n; 1218 struct lio *lio; 1219 1220 if (!netdev) { 1221 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n", 1222 __func__, ifidx); 1223 return; 1224 } 1225 1226 lio = GET_LIO(netdev); 1227 1228 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n"); 1229 1230 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) 1231 liquidio_stop(netdev); 1232 1233 if (oct->props[lio->ifidx].napi_enabled == 1) { 1234 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1235 napi_disable(napi); 1236 1237 oct->props[lio->ifidx].napi_enabled = 0; 1238 1239 if (OCTEON_CN23XX_PF(oct)) 1240 oct->droq[0]->ops.poll_mode = 0; 1241 } 1242 1243 /* Delete NAPI */ 1244 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1245 netif_napi_del(napi); 1246 1247 tasklet_enable(&oct_priv->droq_tasklet); 1248 1249 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) 1250 unregister_netdev(netdev); 1251 1252 cleanup_sync_octeon_time_wq(netdev); 1253 cleanup_link_status_change_wq(netdev); 1254 1255 cleanup_rx_oom_poll_fn(netdev); 1256 1257 lio_delete_glists(lio); 1258 1259 free_netdev(netdev); 1260 1261 oct->props[ifidx].gmxport = -1; 1262 1263 oct->props[ifidx].netdev = NULL; 1264 } 1265 1266 /** 1267 * liquidio_stop_nic_module - Stop complete NIC functionality 1268 * @oct: octeon device 1269 */ 1270 static int liquidio_stop_nic_module(struct octeon_device *oct) 1271 { 1272 int i, j; 1273 struct lio *lio; 1274 1275 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n"); 1276 device_lock(&oct->pci_dev->dev); 1277 if (oct->devlink) { 1278 devlink_unregister(oct->devlink); 1279 devlink_free(oct->devlink); 1280 oct->devlink = NULL; 1281 } 1282 device_unlock(&oct->pci_dev->dev); 1283 1284 if (!oct->ifcount) { 1285 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n"); 1286 return 1; 1287 } 1288 1289 spin_lock_bh(&oct->cmd_resp_wqlock); 1290 oct->cmd_resp_state = OCT_DRV_OFFLINE; 1291 spin_unlock_bh(&oct->cmd_resp_wqlock); 1292 1293 lio_vf_rep_destroy(oct); 1294 1295 for (i = 0; i < oct->ifcount; i++) { 1296 lio = GET_LIO(oct->props[i].netdev); 1297 for (j = 0; j < oct->num_oqs; j++) 1298 octeon_unregister_droq_ops(oct, 1299 lio->linfo.rxpciq[j].s.q_no); 1300 } 1301 1302 for (i = 0; i < oct->ifcount; i++) 1303 liquidio_destroy_nic_device(oct, i); 1304 1305 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n"); 1306 return 0; 1307 } 1308 1309 /** 1310 * liquidio_remove - Cleans up resources at unload time 1311 * @pdev: PCI device structure 1312 */ 1313 static void liquidio_remove(struct pci_dev *pdev) 1314 { 1315 struct octeon_device *oct_dev = pci_get_drvdata(pdev); 1316 1317 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n"); 1318 1319 if (oct_dev->watchdog_task) 1320 kthread_stop(oct_dev->watchdog_task); 1321 1322 if (!oct_dev->octeon_id && 1323 oct_dev->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) 1324 lio_vf_rep_modexit(); 1325 1326 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP)) 1327 liquidio_stop_nic_module(oct_dev); 1328 1329 /* Reset the octeon device and cleanup all memory allocated for 1330 * the octeon device by driver. 1331 */ 1332 octeon_destroy_resources(oct_dev); 1333 1334 dev_info(&oct_dev->pci_dev->dev, "Device removed\n"); 1335 1336 /* This octeon device has been removed. Update the global 1337 * data structure to reflect this. Free the device structure. 1338 */ 1339 octeon_free_device_mem(oct_dev); 1340 } 1341 1342 /** 1343 * octeon_chip_specific_setup - Identify the Octeon device and to map the BAR address space 1344 * @oct: octeon device 1345 */ 1346 static int octeon_chip_specific_setup(struct octeon_device *oct) 1347 { 1348 u32 dev_id, rev_id; 1349 int ret = 1; 1350 1351 pci_read_config_dword(oct->pci_dev, 0, &dev_id); 1352 pci_read_config_dword(oct->pci_dev, 8, &rev_id); 1353 oct->rev_id = rev_id & 0xff; 1354 1355 switch (dev_id) { 1356 case OCTEON_CN68XX_PCIID: 1357 oct->chip_id = OCTEON_CN68XX; 1358 ret = lio_setup_cn68xx_octeon_device(oct); 1359 break; 1360 1361 case OCTEON_CN66XX_PCIID: 1362 oct->chip_id = OCTEON_CN66XX; 1363 ret = lio_setup_cn66xx_octeon_device(oct); 1364 break; 1365 1366 case OCTEON_CN23XX_PCIID_PF: 1367 oct->chip_id = OCTEON_CN23XX_PF_VID; 1368 ret = setup_cn23xx_octeon_pf_device(oct); 1369 if (ret) 1370 break; 1371 #ifdef CONFIG_PCI_IOV 1372 if (!ret) 1373 pci_sriov_set_totalvfs(oct->pci_dev, 1374 oct->sriov_info.max_vfs); 1375 #endif 1376 break; 1377 1378 default: 1379 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n", 1380 dev_id); 1381 } 1382 1383 return ret; 1384 } 1385 1386 /** 1387 * octeon_pci_os_setup - PCI initialization for each Octeon device. 1388 * @oct: octeon device 1389 */ 1390 static int octeon_pci_os_setup(struct octeon_device *oct) 1391 { 1392 /* setup PCI stuff first */ 1393 if (pci_enable_device(oct->pci_dev)) { 1394 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n"); 1395 return 1; 1396 } 1397 1398 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) { 1399 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n"); 1400 pci_disable_device(oct->pci_dev); 1401 return 1; 1402 } 1403 1404 /* Enable PCI DMA Master. */ 1405 pci_set_master(oct->pci_dev); 1406 1407 return 0; 1408 } 1409 1410 /** 1411 * free_netbuf - Unmap and free network buffer 1412 * @buf: buffer 1413 */ 1414 static void free_netbuf(void *buf) 1415 { 1416 struct sk_buff *skb; 1417 struct octnet_buf_free_info *finfo; 1418 struct lio *lio; 1419 1420 finfo = (struct octnet_buf_free_info *)buf; 1421 skb = finfo->skb; 1422 lio = finfo->lio; 1423 1424 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len, 1425 DMA_TO_DEVICE); 1426 1427 tx_buffer_free(skb); 1428 } 1429 1430 /** 1431 * free_netsgbuf - Unmap and free gather buffer 1432 * @buf: buffer 1433 */ 1434 static void free_netsgbuf(void *buf) 1435 { 1436 struct octnet_buf_free_info *finfo; 1437 struct sk_buff *skb; 1438 struct lio *lio; 1439 struct octnic_gather *g; 1440 int i, frags, iq; 1441 1442 finfo = (struct octnet_buf_free_info *)buf; 1443 skb = finfo->skb; 1444 lio = finfo->lio; 1445 g = finfo->g; 1446 frags = skb_shinfo(skb)->nr_frags; 1447 1448 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1449 g->sg[0].ptr[0], (skb->len - skb->data_len), 1450 DMA_TO_DEVICE); 1451 1452 i = 1; 1453 while (frags--) { 1454 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1455 1456 dma_unmap_page(&lio->oct_dev->pci_dev->dev, 1457 g->sg[(i >> 2)].ptr[(i & 3)], 1458 skb_frag_size(frag), DMA_TO_DEVICE); 1459 i++; 1460 } 1461 1462 iq = skb_iq(lio->oct_dev, skb); 1463 spin_lock(&lio->glist_lock[iq]); 1464 list_add_tail(&g->list, &lio->glist[iq]); 1465 spin_unlock(&lio->glist_lock[iq]); 1466 1467 tx_buffer_free(skb); 1468 } 1469 1470 /** 1471 * free_netsgbuf_with_resp - Unmap and free gather buffer with response 1472 * @buf: buffer 1473 */ 1474 static void free_netsgbuf_with_resp(void *buf) 1475 { 1476 struct octeon_soft_command *sc; 1477 struct octnet_buf_free_info *finfo; 1478 struct sk_buff *skb; 1479 struct lio *lio; 1480 struct octnic_gather *g; 1481 int i, frags, iq; 1482 1483 sc = (struct octeon_soft_command *)buf; 1484 skb = (struct sk_buff *)sc->callback_arg; 1485 finfo = (struct octnet_buf_free_info *)&skb->cb; 1486 1487 lio = finfo->lio; 1488 g = finfo->g; 1489 frags = skb_shinfo(skb)->nr_frags; 1490 1491 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1492 g->sg[0].ptr[0], (skb->len - skb->data_len), 1493 DMA_TO_DEVICE); 1494 1495 i = 1; 1496 while (frags--) { 1497 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1498 1499 dma_unmap_page(&lio->oct_dev->pci_dev->dev, 1500 g->sg[(i >> 2)].ptr[(i & 3)], 1501 skb_frag_size(frag), DMA_TO_DEVICE); 1502 i++; 1503 } 1504 1505 iq = skb_iq(lio->oct_dev, skb); 1506 1507 spin_lock(&lio->glist_lock[iq]); 1508 list_add_tail(&g->list, &lio->glist[iq]); 1509 spin_unlock(&lio->glist_lock[iq]); 1510 1511 /* Don't free the skb yet */ 1512 } 1513 1514 /** 1515 * liquidio_ptp_adjfreq - Adjust ptp frequency 1516 * @ptp: PTP clock info 1517 * @ppb: how much to adjust by, in parts-per-billion 1518 */ 1519 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 1520 { 1521 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1522 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1523 u64 comp, delta; 1524 unsigned long flags; 1525 bool neg_adj = false; 1526 1527 if (ppb < 0) { 1528 neg_adj = true; 1529 ppb = -ppb; 1530 } 1531 1532 /* The hardware adds the clock compensation value to the 1533 * PTP clock on every coprocessor clock cycle, so we 1534 * compute the delta in terms of coprocessor clocks. 1535 */ 1536 delta = (u64)ppb << 32; 1537 do_div(delta, oct->coproc_clock_rate); 1538 1539 spin_lock_irqsave(&lio->ptp_lock, flags); 1540 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP); 1541 if (neg_adj) 1542 comp -= delta; 1543 else 1544 comp += delta; 1545 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1546 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1547 1548 return 0; 1549 } 1550 1551 /** 1552 * liquidio_ptp_adjtime - Adjust ptp time 1553 * @ptp: PTP clock info 1554 * @delta: how much to adjust by, in nanosecs 1555 */ 1556 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 1557 { 1558 unsigned long flags; 1559 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1560 1561 spin_lock_irqsave(&lio->ptp_lock, flags); 1562 lio->ptp_adjust += delta; 1563 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1564 1565 return 0; 1566 } 1567 1568 /** 1569 * liquidio_ptp_gettime - Get hardware clock time, including any adjustment 1570 * @ptp: PTP clock info 1571 * @ts: timespec 1572 */ 1573 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp, 1574 struct timespec64 *ts) 1575 { 1576 u64 ns; 1577 unsigned long flags; 1578 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1579 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1580 1581 spin_lock_irqsave(&lio->ptp_lock, flags); 1582 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI); 1583 ns += lio->ptp_adjust; 1584 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1585 1586 *ts = ns_to_timespec64(ns); 1587 1588 return 0; 1589 } 1590 1591 /** 1592 * liquidio_ptp_settime - Set hardware clock time. Reset adjustment 1593 * @ptp: PTP clock info 1594 * @ts: timespec 1595 */ 1596 static int liquidio_ptp_settime(struct ptp_clock_info *ptp, 1597 const struct timespec64 *ts) 1598 { 1599 u64 ns; 1600 unsigned long flags; 1601 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1602 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1603 1604 ns = timespec64_to_ns(ts); 1605 1606 spin_lock_irqsave(&lio->ptp_lock, flags); 1607 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI); 1608 lio->ptp_adjust = 0; 1609 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1610 1611 return 0; 1612 } 1613 1614 /** 1615 * liquidio_ptp_enable - Check if PTP is enabled 1616 * @ptp: PTP clock info 1617 * @rq: request 1618 * @on: is it on 1619 */ 1620 static int 1621 liquidio_ptp_enable(struct ptp_clock_info __maybe_unused *ptp, 1622 struct ptp_clock_request __maybe_unused *rq, 1623 int __maybe_unused on) 1624 { 1625 return -EOPNOTSUPP; 1626 } 1627 1628 /** 1629 * oct_ptp_open - Open PTP clock source 1630 * @netdev: network device 1631 */ 1632 static void oct_ptp_open(struct net_device *netdev) 1633 { 1634 struct lio *lio = GET_LIO(netdev); 1635 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1636 1637 spin_lock_init(&lio->ptp_lock); 1638 1639 snprintf(lio->ptp_info.name, 16, "%s", netdev->name); 1640 lio->ptp_info.owner = THIS_MODULE; 1641 lio->ptp_info.max_adj = 250000000; 1642 lio->ptp_info.n_alarm = 0; 1643 lio->ptp_info.n_ext_ts = 0; 1644 lio->ptp_info.n_per_out = 0; 1645 lio->ptp_info.pps = 0; 1646 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; 1647 lio->ptp_info.adjtime = liquidio_ptp_adjtime; 1648 lio->ptp_info.gettime64 = liquidio_ptp_gettime; 1649 lio->ptp_info.settime64 = liquidio_ptp_settime; 1650 lio->ptp_info.enable = liquidio_ptp_enable; 1651 1652 lio->ptp_adjust = 0; 1653 1654 lio->ptp_clock = ptp_clock_register(&lio->ptp_info, 1655 &oct->pci_dev->dev); 1656 1657 if (IS_ERR(lio->ptp_clock)) 1658 lio->ptp_clock = NULL; 1659 } 1660 1661 /** 1662 * liquidio_ptp_init - Init PTP clock 1663 * @oct: octeon device 1664 */ 1665 static void liquidio_ptp_init(struct octeon_device *oct) 1666 { 1667 u64 clock_comp, cfg; 1668 1669 clock_comp = (u64)NSEC_PER_SEC << 32; 1670 do_div(clock_comp, oct->coproc_clock_rate); 1671 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1672 1673 /* Enable */ 1674 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG); 1675 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG); 1676 } 1677 1678 /** 1679 * load_firmware - Load firmware to device 1680 * @oct: octeon device 1681 * 1682 * Maps device to firmware filename, requests firmware, and downloads it 1683 */ 1684 static int load_firmware(struct octeon_device *oct) 1685 { 1686 int ret = 0; 1687 const struct firmware *fw; 1688 char fw_name[LIO_MAX_FW_FILENAME_LEN]; 1689 char *tmp_fw_type; 1690 1691 if (fw_type_is_auto()) { 1692 tmp_fw_type = LIO_FW_NAME_TYPE_NIC; 1693 strncpy(fw_type, tmp_fw_type, sizeof(fw_type)); 1694 } else { 1695 tmp_fw_type = fw_type; 1696 } 1697 1698 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME, 1699 octeon_get_conf(oct)->card_name, tmp_fw_type, 1700 LIO_FW_NAME_SUFFIX); 1701 1702 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev); 1703 if (ret) { 1704 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n", 1705 fw_name); 1706 release_firmware(fw); 1707 return ret; 1708 } 1709 1710 ret = octeon_download_firmware(oct, fw->data, fw->size); 1711 1712 release_firmware(fw); 1713 1714 return ret; 1715 } 1716 1717 /** 1718 * octnet_poll_check_txq_status - Poll routine for checking transmit queue status 1719 * @work: work_struct data structure 1720 */ 1721 static void octnet_poll_check_txq_status(struct work_struct *work) 1722 { 1723 struct cavium_wk *wk = (struct cavium_wk *)work; 1724 struct lio *lio = (struct lio *)wk->ctxptr; 1725 1726 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) 1727 return; 1728 1729 check_txq_status(lio); 1730 queue_delayed_work(lio->txq_status_wq.wq, 1731 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1732 } 1733 1734 /** 1735 * setup_tx_poll_fn - Sets up the txq poll check 1736 * @netdev: network device 1737 */ 1738 static inline int setup_tx_poll_fn(struct net_device *netdev) 1739 { 1740 struct lio *lio = GET_LIO(netdev); 1741 struct octeon_device *oct = lio->oct_dev; 1742 1743 lio->txq_status_wq.wq = alloc_workqueue("txq-status", 1744 WQ_MEM_RECLAIM, 0); 1745 if (!lio->txq_status_wq.wq) { 1746 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n"); 1747 return -1; 1748 } 1749 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work, 1750 octnet_poll_check_txq_status); 1751 lio->txq_status_wq.wk.ctxptr = lio; 1752 queue_delayed_work(lio->txq_status_wq.wq, 1753 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1754 return 0; 1755 } 1756 1757 static inline void cleanup_tx_poll_fn(struct net_device *netdev) 1758 { 1759 struct lio *lio = GET_LIO(netdev); 1760 1761 if (lio->txq_status_wq.wq) { 1762 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work); 1763 destroy_workqueue(lio->txq_status_wq.wq); 1764 } 1765 } 1766 1767 /** 1768 * liquidio_open - Net device open for LiquidIO 1769 * @netdev: network device 1770 */ 1771 static int liquidio_open(struct net_device *netdev) 1772 { 1773 struct lio *lio = GET_LIO(netdev); 1774 struct octeon_device *oct = lio->oct_dev; 1775 struct octeon_device_priv *oct_priv = 1776 (struct octeon_device_priv *)oct->priv; 1777 struct napi_struct *napi, *n; 1778 int ret = 0; 1779 1780 if (oct->props[lio->ifidx].napi_enabled == 0) { 1781 tasklet_disable(&oct_priv->droq_tasklet); 1782 1783 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1784 napi_enable(napi); 1785 1786 oct->props[lio->ifidx].napi_enabled = 1; 1787 1788 if (OCTEON_CN23XX_PF(oct)) 1789 oct->droq[0]->ops.poll_mode = 1; 1790 } 1791 1792 if (oct->ptp_enable) 1793 oct_ptp_open(netdev); 1794 1795 ifstate_set(lio, LIO_IFSTATE_RUNNING); 1796 1797 if (OCTEON_CN23XX_PF(oct)) { 1798 if (!oct->msix_on) 1799 if (setup_tx_poll_fn(netdev)) 1800 return -1; 1801 } else { 1802 if (setup_tx_poll_fn(netdev)) 1803 return -1; 1804 } 1805 1806 netif_tx_start_all_queues(netdev); 1807 1808 /* Ready for link status updates */ 1809 lio->intf_open = 1; 1810 1811 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n"); 1812 1813 /* tell Octeon to start forwarding packets to host */ 1814 ret = send_rx_ctrl_cmd(lio, 1); 1815 if (ret) 1816 return ret; 1817 1818 /* start periodical statistics fetch */ 1819 INIT_DELAYED_WORK(&lio->stats_wk.work, lio_fetch_stats); 1820 lio->stats_wk.ctxptr = lio; 1821 schedule_delayed_work(&lio->stats_wk.work, msecs_to_jiffies 1822 (LIQUIDIO_NDEV_STATS_POLL_TIME_MS)); 1823 1824 dev_info(&oct->pci_dev->dev, "%s interface is opened\n", 1825 netdev->name); 1826 1827 return ret; 1828 } 1829 1830 /** 1831 * liquidio_stop - Net device stop for LiquidIO 1832 * @netdev: network device 1833 */ 1834 static int liquidio_stop(struct net_device *netdev) 1835 { 1836 struct lio *lio = GET_LIO(netdev); 1837 struct octeon_device *oct = lio->oct_dev; 1838 struct octeon_device_priv *oct_priv = 1839 (struct octeon_device_priv *)oct->priv; 1840 struct napi_struct *napi, *n; 1841 int ret = 0; 1842 1843 ifstate_reset(lio, LIO_IFSTATE_RUNNING); 1844 1845 /* Stop any link updates */ 1846 lio->intf_open = 0; 1847 1848 stop_txqs(netdev); 1849 1850 /* Inform that netif carrier is down */ 1851 netif_carrier_off(netdev); 1852 netif_tx_disable(netdev); 1853 1854 lio->linfo.link.s.link_up = 0; 1855 lio->link_changes++; 1856 1857 /* Tell Octeon that nic interface is down. */ 1858 ret = send_rx_ctrl_cmd(lio, 0); 1859 if (ret) 1860 return ret; 1861 1862 if (OCTEON_CN23XX_PF(oct)) { 1863 if (!oct->msix_on) 1864 cleanup_tx_poll_fn(netdev); 1865 } else { 1866 cleanup_tx_poll_fn(netdev); 1867 } 1868 1869 cancel_delayed_work_sync(&lio->stats_wk.work); 1870 1871 if (lio->ptp_clock) { 1872 ptp_clock_unregister(lio->ptp_clock); 1873 lio->ptp_clock = NULL; 1874 } 1875 1876 /* Wait for any pending Rx descriptors */ 1877 if (lio_wait_for_clean_oq(oct)) 1878 netif_info(lio, rx_err, lio->netdev, 1879 "Proceeding with stop interface after partial RX desc processing\n"); 1880 1881 if (oct->props[lio->ifidx].napi_enabled == 1) { 1882 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1883 napi_disable(napi); 1884 1885 oct->props[lio->ifidx].napi_enabled = 0; 1886 1887 if (OCTEON_CN23XX_PF(oct)) 1888 oct->droq[0]->ops.poll_mode = 0; 1889 1890 tasklet_enable(&oct_priv->droq_tasklet); 1891 } 1892 1893 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name); 1894 1895 return ret; 1896 } 1897 1898 /** 1899 * get_new_flags - Converts a mask based on net device flags 1900 * @netdev: network device 1901 * 1902 * This routine generates a octnet_ifflags mask from the net device flags 1903 * received from the OS. 1904 */ 1905 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev) 1906 { 1907 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST; 1908 1909 if (netdev->flags & IFF_PROMISC) 1910 f |= OCTNET_IFFLAG_PROMISC; 1911 1912 if (netdev->flags & IFF_ALLMULTI) 1913 f |= OCTNET_IFFLAG_ALLMULTI; 1914 1915 if (netdev->flags & IFF_MULTICAST) { 1916 f |= OCTNET_IFFLAG_MULTICAST; 1917 1918 /* Accept all multicast addresses if there are more than we 1919 * can handle 1920 */ 1921 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR) 1922 f |= OCTNET_IFFLAG_ALLMULTI; 1923 } 1924 1925 if (netdev->flags & IFF_BROADCAST) 1926 f |= OCTNET_IFFLAG_BROADCAST; 1927 1928 return f; 1929 } 1930 1931 /** 1932 * liquidio_set_mcast_list - Net device set_multicast_list 1933 * @netdev: network device 1934 */ 1935 static void liquidio_set_mcast_list(struct net_device *netdev) 1936 { 1937 struct lio *lio = GET_LIO(netdev); 1938 struct octeon_device *oct = lio->oct_dev; 1939 struct octnic_ctrl_pkt nctrl; 1940 struct netdev_hw_addr *ha; 1941 u64 *mc; 1942 int ret; 1943 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR); 1944 1945 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 1946 1947 /* Create a ctrl pkt command to be sent to core app. */ 1948 nctrl.ncmd.u64 = 0; 1949 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST; 1950 nctrl.ncmd.s.param1 = get_new_flags(netdev); 1951 nctrl.ncmd.s.param2 = mc_count; 1952 nctrl.ncmd.s.more = mc_count; 1953 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 1954 nctrl.netpndev = (u64)netdev; 1955 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 1956 1957 /* copy all the addresses into the udd */ 1958 mc = &nctrl.udd[0]; 1959 netdev_for_each_mc_addr(ha, netdev) { 1960 *mc = 0; 1961 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN); 1962 /* no need to swap bytes */ 1963 1964 if (++mc > &nctrl.udd[mc_count]) 1965 break; 1966 } 1967 1968 /* Apparently, any activity in this call from the kernel has to 1969 * be atomic. So we won't wait for response. 1970 */ 1971 1972 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 1973 if (ret) { 1974 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n", 1975 ret); 1976 } 1977 } 1978 1979 /** 1980 * liquidio_set_mac - Net device set_mac_address 1981 * @netdev: network device 1982 * @p: pointer to sockaddr 1983 */ 1984 static int liquidio_set_mac(struct net_device *netdev, void *p) 1985 { 1986 int ret = 0; 1987 struct lio *lio = GET_LIO(netdev); 1988 struct octeon_device *oct = lio->oct_dev; 1989 struct sockaddr *addr = (struct sockaddr *)p; 1990 struct octnic_ctrl_pkt nctrl; 1991 1992 if (!is_valid_ether_addr(addr->sa_data)) 1993 return -EADDRNOTAVAIL; 1994 1995 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 1996 1997 nctrl.ncmd.u64 = 0; 1998 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 1999 nctrl.ncmd.s.param1 = 0; 2000 nctrl.ncmd.s.more = 1; 2001 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2002 nctrl.netpndev = (u64)netdev; 2003 2004 nctrl.udd[0] = 0; 2005 /* The MAC Address is presented in network byte order. */ 2006 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN); 2007 2008 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2009 if (ret < 0) { 2010 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n"); 2011 return -ENOMEM; 2012 } 2013 2014 if (nctrl.sc_status) { 2015 dev_err(&oct->pci_dev->dev, 2016 "%s: MAC Address change failed. sc return=%x\n", 2017 __func__, nctrl.sc_status); 2018 return -EIO; 2019 } 2020 2021 eth_hw_addr_set(netdev, addr->sa_data); 2022 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN); 2023 2024 return 0; 2025 } 2026 2027 static void 2028 liquidio_get_stats64(struct net_device *netdev, 2029 struct rtnl_link_stats64 *lstats) 2030 { 2031 struct lio *lio = GET_LIO(netdev); 2032 struct octeon_device *oct; 2033 u64 pkts = 0, drop = 0, bytes = 0; 2034 struct oct_droq_stats *oq_stats; 2035 struct oct_iq_stats *iq_stats; 2036 int i, iq_no, oq_no; 2037 2038 oct = lio->oct_dev; 2039 2040 if (ifstate_check(lio, LIO_IFSTATE_RESETTING)) 2041 return; 2042 2043 for (i = 0; i < oct->num_iqs; i++) { 2044 iq_no = lio->linfo.txpciq[i].s.q_no; 2045 iq_stats = &oct->instr_queue[iq_no]->stats; 2046 pkts += iq_stats->tx_done; 2047 drop += iq_stats->tx_dropped; 2048 bytes += iq_stats->tx_tot_bytes; 2049 } 2050 2051 lstats->tx_packets = pkts; 2052 lstats->tx_bytes = bytes; 2053 lstats->tx_dropped = drop; 2054 2055 pkts = 0; 2056 drop = 0; 2057 bytes = 0; 2058 2059 for (i = 0; i < oct->num_oqs; i++) { 2060 oq_no = lio->linfo.rxpciq[i].s.q_no; 2061 oq_stats = &oct->droq[oq_no]->stats; 2062 pkts += oq_stats->rx_pkts_received; 2063 drop += (oq_stats->rx_dropped + 2064 oq_stats->dropped_nodispatch + 2065 oq_stats->dropped_toomany + 2066 oq_stats->dropped_nomem); 2067 bytes += oq_stats->rx_bytes_received; 2068 } 2069 2070 lstats->rx_bytes = bytes; 2071 lstats->rx_packets = pkts; 2072 lstats->rx_dropped = drop; 2073 2074 lstats->multicast = oct->link_stats.fromwire.fw_total_mcast; 2075 lstats->collisions = oct->link_stats.fromhost.total_collisions; 2076 2077 /* detailed rx_errors: */ 2078 lstats->rx_length_errors = oct->link_stats.fromwire.l2_err; 2079 /* recved pkt with crc error */ 2080 lstats->rx_crc_errors = oct->link_stats.fromwire.fcs_err; 2081 /* recv'd frame alignment error */ 2082 lstats->rx_frame_errors = oct->link_stats.fromwire.frame_err; 2083 /* recv'r fifo overrun */ 2084 lstats->rx_fifo_errors = oct->link_stats.fromwire.fifo_err; 2085 2086 lstats->rx_errors = lstats->rx_length_errors + lstats->rx_crc_errors + 2087 lstats->rx_frame_errors + lstats->rx_fifo_errors; 2088 2089 /* detailed tx_errors */ 2090 lstats->tx_aborted_errors = oct->link_stats.fromhost.fw_err_pko; 2091 lstats->tx_carrier_errors = oct->link_stats.fromhost.fw_err_link; 2092 lstats->tx_fifo_errors = oct->link_stats.fromhost.fifo_err; 2093 2094 lstats->tx_errors = lstats->tx_aborted_errors + 2095 lstats->tx_carrier_errors + 2096 lstats->tx_fifo_errors; 2097 } 2098 2099 /** 2100 * hwtstamp_ioctl - Handler for SIOCSHWTSTAMP ioctl 2101 * @netdev: network device 2102 * @ifr: interface request 2103 */ 2104 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 2105 { 2106 struct hwtstamp_config conf; 2107 struct lio *lio = GET_LIO(netdev); 2108 2109 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf))) 2110 return -EFAULT; 2111 2112 switch (conf.tx_type) { 2113 case HWTSTAMP_TX_ON: 2114 case HWTSTAMP_TX_OFF: 2115 break; 2116 default: 2117 return -ERANGE; 2118 } 2119 2120 switch (conf.rx_filter) { 2121 case HWTSTAMP_FILTER_NONE: 2122 break; 2123 case HWTSTAMP_FILTER_ALL: 2124 case HWTSTAMP_FILTER_SOME: 2125 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2126 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2127 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2128 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2129 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2130 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2131 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2132 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2133 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2134 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2135 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2136 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2137 case HWTSTAMP_FILTER_NTP_ALL: 2138 conf.rx_filter = HWTSTAMP_FILTER_ALL; 2139 break; 2140 default: 2141 return -ERANGE; 2142 } 2143 2144 if (conf.rx_filter == HWTSTAMP_FILTER_ALL) 2145 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2146 2147 else 2148 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2149 2150 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0; 2151 } 2152 2153 /** 2154 * liquidio_ioctl - ioctl handler 2155 * @netdev: network device 2156 * @ifr: interface request 2157 * @cmd: command 2158 */ 2159 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2160 { 2161 struct lio *lio = GET_LIO(netdev); 2162 2163 switch (cmd) { 2164 case SIOCSHWTSTAMP: 2165 if (lio->oct_dev->ptp_enable) 2166 return hwtstamp_ioctl(netdev, ifr); 2167 fallthrough; 2168 default: 2169 return -EOPNOTSUPP; 2170 } 2171 } 2172 2173 /** 2174 * handle_timestamp - handle a Tx timestamp response 2175 * @oct: octeon device 2176 * @status: response status 2177 * @buf: pointer to skb 2178 */ 2179 static void handle_timestamp(struct octeon_device *oct, 2180 u32 status, 2181 void *buf) 2182 { 2183 struct octnet_buf_free_info *finfo; 2184 struct octeon_soft_command *sc; 2185 struct oct_timestamp_resp *resp; 2186 struct lio *lio; 2187 struct sk_buff *skb = (struct sk_buff *)buf; 2188 2189 finfo = (struct octnet_buf_free_info *)skb->cb; 2190 lio = finfo->lio; 2191 sc = finfo->sc; 2192 oct = lio->oct_dev; 2193 resp = (struct oct_timestamp_resp *)sc->virtrptr; 2194 2195 if (status != OCTEON_REQUEST_DONE) { 2196 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n", 2197 CVM_CAST64(status)); 2198 resp->timestamp = 0; 2199 } 2200 2201 octeon_swap_8B_data(&resp->timestamp, 1); 2202 2203 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) { 2204 struct skb_shared_hwtstamps ts; 2205 u64 ns = resp->timestamp; 2206 2207 netif_info(lio, tx_done, lio->netdev, 2208 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n", 2209 skb, (unsigned long long)ns); 2210 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust); 2211 skb_tstamp_tx(skb, &ts); 2212 } 2213 2214 octeon_free_soft_command(oct, sc); 2215 tx_buffer_free(skb); 2216 } 2217 2218 /** 2219 * send_nic_timestamp_pkt - Send a data packet that will be timestamped 2220 * @oct: octeon device 2221 * @ndata: pointer to network data 2222 * @finfo: pointer to private network data 2223 * @xmit_more: more is coming 2224 */ 2225 static inline int send_nic_timestamp_pkt(struct octeon_device *oct, 2226 struct octnic_data_pkt *ndata, 2227 struct octnet_buf_free_info *finfo, 2228 int xmit_more) 2229 { 2230 int retval; 2231 struct octeon_soft_command *sc; 2232 struct lio *lio; 2233 int ring_doorbell; 2234 u32 len; 2235 2236 lio = finfo->lio; 2237 2238 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd, 2239 sizeof(struct oct_timestamp_resp)); 2240 finfo->sc = sc; 2241 2242 if (!sc) { 2243 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n"); 2244 return IQ_SEND_FAILED; 2245 } 2246 2247 if (ndata->reqtype == REQTYPE_NORESP_NET) 2248 ndata->reqtype = REQTYPE_RESP_NET; 2249 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG) 2250 ndata->reqtype = REQTYPE_RESP_NET_SG; 2251 2252 sc->callback = handle_timestamp; 2253 sc->callback_arg = finfo->skb; 2254 sc->iq_no = ndata->q_no; 2255 2256 if (OCTEON_CN23XX_PF(oct)) 2257 len = (u32)((struct octeon_instr_ih3 *) 2258 (&sc->cmd.cmd3.ih3))->dlengsz; 2259 else 2260 len = (u32)((struct octeon_instr_ih2 *) 2261 (&sc->cmd.cmd2.ih2))->dlengsz; 2262 2263 ring_doorbell = !xmit_more; 2264 2265 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd, 2266 sc, len, ndata->reqtype); 2267 2268 if (retval == IQ_SEND_FAILED) { 2269 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n", 2270 retval); 2271 octeon_free_soft_command(oct, sc); 2272 } else { 2273 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n"); 2274 } 2275 2276 return retval; 2277 } 2278 2279 /** 2280 * liquidio_xmit - Transmit networks packets to the Octeon interface 2281 * @skb: skbuff struct to be passed to network layer. 2282 * @netdev: pointer to network device 2283 * 2284 * Return: whether the packet was transmitted to the device okay or not 2285 * (NETDEV_TX_OK or NETDEV_TX_BUSY) 2286 */ 2287 static netdev_tx_t liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) 2288 { 2289 struct lio *lio; 2290 struct octnet_buf_free_info *finfo; 2291 union octnic_cmd_setup cmdsetup; 2292 struct octnic_data_pkt ndata; 2293 struct octeon_device *oct; 2294 struct oct_iq_stats *stats; 2295 struct octeon_instr_irh *irh; 2296 union tx_info *tx_info; 2297 int status = 0; 2298 int q_idx = 0, iq_no = 0; 2299 int j, xmit_more = 0; 2300 u64 dptr = 0; 2301 u32 tag = 0; 2302 2303 lio = GET_LIO(netdev); 2304 oct = lio->oct_dev; 2305 2306 q_idx = skb_iq(oct, skb); 2307 tag = q_idx; 2308 iq_no = lio->linfo.txpciq[q_idx].s.q_no; 2309 2310 stats = &oct->instr_queue[iq_no]->stats; 2311 2312 /* Check for all conditions in which the current packet cannot be 2313 * transmitted. 2314 */ 2315 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) || 2316 (!lio->linfo.link.s.link_up) || 2317 (skb->len <= 0)) { 2318 netif_info(lio, tx_err, lio->netdev, 2319 "Transmit failed link_status : %d\n", 2320 lio->linfo.link.s.link_up); 2321 goto lio_xmit_failed; 2322 } 2323 2324 /* Use space in skb->cb to store info used to unmap and 2325 * free the buffers. 2326 */ 2327 finfo = (struct octnet_buf_free_info *)skb->cb; 2328 finfo->lio = lio; 2329 finfo->skb = skb; 2330 finfo->sc = NULL; 2331 2332 /* Prepare the attributes for the data to be passed to OSI. */ 2333 memset(&ndata, 0, sizeof(struct octnic_data_pkt)); 2334 2335 ndata.buf = (void *)finfo; 2336 2337 ndata.q_no = iq_no; 2338 2339 if (octnet_iq_is_full(oct, ndata.q_no)) { 2340 /* defer sending if queue is full */ 2341 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", 2342 ndata.q_no); 2343 stats->tx_iq_busy++; 2344 return NETDEV_TX_BUSY; 2345 } 2346 2347 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n", 2348 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no); 2349 */ 2350 2351 ndata.datasize = skb->len; 2352 2353 cmdsetup.u64 = 0; 2354 cmdsetup.s.iq_no = iq_no; 2355 2356 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2357 if (skb->encapsulation) { 2358 cmdsetup.s.tnl_csum = 1; 2359 stats->tx_vxlan++; 2360 } else { 2361 cmdsetup.s.transport_csum = 1; 2362 } 2363 } 2364 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { 2365 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2366 cmdsetup.s.timestamp = 1; 2367 } 2368 2369 if (skb_shinfo(skb)->nr_frags == 0) { 2370 cmdsetup.s.u.datasize = skb->len; 2371 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2372 2373 /* Offload checksum calculation for TCP/UDP packets */ 2374 dptr = dma_map_single(&oct->pci_dev->dev, 2375 skb->data, 2376 skb->len, 2377 DMA_TO_DEVICE); 2378 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { 2379 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n", 2380 __func__); 2381 stats->tx_dmamap_fail++; 2382 return NETDEV_TX_BUSY; 2383 } 2384 2385 if (OCTEON_CN23XX_PF(oct)) 2386 ndata.cmd.cmd3.dptr = dptr; 2387 else 2388 ndata.cmd.cmd2.dptr = dptr; 2389 finfo->dptr = dptr; 2390 ndata.reqtype = REQTYPE_NORESP_NET; 2391 2392 } else { 2393 int i, frags; 2394 skb_frag_t *frag; 2395 struct octnic_gather *g; 2396 2397 spin_lock(&lio->glist_lock[q_idx]); 2398 g = (struct octnic_gather *) 2399 lio_list_delete_head(&lio->glist[q_idx]); 2400 spin_unlock(&lio->glist_lock[q_idx]); 2401 2402 if (!g) { 2403 netif_info(lio, tx_err, lio->netdev, 2404 "Transmit scatter gather: glist null!\n"); 2405 goto lio_xmit_failed; 2406 } 2407 2408 cmdsetup.s.gather = 1; 2409 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1); 2410 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2411 2412 memset(g->sg, 0, g->sg_size); 2413 2414 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev, 2415 skb->data, 2416 (skb->len - skb->data_len), 2417 DMA_TO_DEVICE); 2418 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) { 2419 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n", 2420 __func__); 2421 stats->tx_dmamap_fail++; 2422 return NETDEV_TX_BUSY; 2423 } 2424 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0); 2425 2426 frags = skb_shinfo(skb)->nr_frags; 2427 i = 1; 2428 while (frags--) { 2429 frag = &skb_shinfo(skb)->frags[i - 1]; 2430 2431 g->sg[(i >> 2)].ptr[(i & 3)] = 2432 skb_frag_dma_map(&oct->pci_dev->dev, 2433 frag, 0, skb_frag_size(frag), 2434 DMA_TO_DEVICE); 2435 2436 if (dma_mapping_error(&oct->pci_dev->dev, 2437 g->sg[i >> 2].ptr[i & 3])) { 2438 dma_unmap_single(&oct->pci_dev->dev, 2439 g->sg[0].ptr[0], 2440 skb->len - skb->data_len, 2441 DMA_TO_DEVICE); 2442 for (j = 1; j < i; j++) { 2443 frag = &skb_shinfo(skb)->frags[j - 1]; 2444 dma_unmap_page(&oct->pci_dev->dev, 2445 g->sg[j >> 2].ptr[j & 3], 2446 skb_frag_size(frag), 2447 DMA_TO_DEVICE); 2448 } 2449 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n", 2450 __func__); 2451 return NETDEV_TX_BUSY; 2452 } 2453 2454 add_sg_size(&g->sg[(i >> 2)], skb_frag_size(frag), 2455 (i & 3)); 2456 i++; 2457 } 2458 2459 dptr = g->sg_dma_ptr; 2460 2461 if (OCTEON_CN23XX_PF(oct)) 2462 ndata.cmd.cmd3.dptr = dptr; 2463 else 2464 ndata.cmd.cmd2.dptr = dptr; 2465 finfo->dptr = dptr; 2466 finfo->g = g; 2467 2468 ndata.reqtype = REQTYPE_NORESP_NET_SG; 2469 } 2470 2471 if (OCTEON_CN23XX_PF(oct)) { 2472 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh; 2473 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0]; 2474 } else { 2475 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh; 2476 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0]; 2477 } 2478 2479 if (skb_shinfo(skb)->gso_size) { 2480 tx_info->s.gso_size = skb_shinfo(skb)->gso_size; 2481 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs; 2482 stats->tx_gso++; 2483 } 2484 2485 /* HW insert VLAN tag */ 2486 if (skb_vlan_tag_present(skb)) { 2487 irh->priority = skb_vlan_tag_get(skb) >> 13; 2488 irh->vlan = skb_vlan_tag_get(skb) & 0xfff; 2489 } 2490 2491 xmit_more = netdev_xmit_more(); 2492 2493 if (unlikely(cmdsetup.s.timestamp)) 2494 status = send_nic_timestamp_pkt(oct, &ndata, finfo, xmit_more); 2495 else 2496 status = octnet_send_nic_data_pkt(oct, &ndata, xmit_more); 2497 if (status == IQ_SEND_FAILED) 2498 goto lio_xmit_failed; 2499 2500 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n"); 2501 2502 if (status == IQ_SEND_STOP) 2503 netif_stop_subqueue(netdev, q_idx); 2504 2505 netif_trans_update(netdev); 2506 2507 if (tx_info->s.gso_segs) 2508 stats->tx_done += tx_info->s.gso_segs; 2509 else 2510 stats->tx_done++; 2511 stats->tx_tot_bytes += ndata.datasize; 2512 2513 return NETDEV_TX_OK; 2514 2515 lio_xmit_failed: 2516 stats->tx_dropped++; 2517 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n", 2518 iq_no, stats->tx_dropped); 2519 if (dptr) 2520 dma_unmap_single(&oct->pci_dev->dev, dptr, 2521 ndata.datasize, DMA_TO_DEVICE); 2522 2523 octeon_ring_doorbell_locked(oct, iq_no); 2524 2525 tx_buffer_free(skb); 2526 return NETDEV_TX_OK; 2527 } 2528 2529 /** 2530 * liquidio_tx_timeout - Network device Tx timeout 2531 * @netdev: pointer to network device 2532 * @txqueue: index of the hung transmit queue 2533 */ 2534 static void liquidio_tx_timeout(struct net_device *netdev, unsigned int txqueue) 2535 { 2536 struct lio *lio; 2537 2538 lio = GET_LIO(netdev); 2539 2540 netif_info(lio, tx_err, lio->netdev, 2541 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n", 2542 netdev->stats.tx_dropped); 2543 netif_trans_update(netdev); 2544 wake_txqs(netdev); 2545 } 2546 2547 static int liquidio_vlan_rx_add_vid(struct net_device *netdev, 2548 __be16 proto __attribute__((unused)), 2549 u16 vid) 2550 { 2551 struct lio *lio = GET_LIO(netdev); 2552 struct octeon_device *oct = lio->oct_dev; 2553 struct octnic_ctrl_pkt nctrl; 2554 int ret = 0; 2555 2556 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2557 2558 nctrl.ncmd.u64 = 0; 2559 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2560 nctrl.ncmd.s.param1 = vid; 2561 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2562 nctrl.netpndev = (u64)netdev; 2563 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2564 2565 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2566 if (ret) { 2567 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", 2568 ret); 2569 if (ret > 0) 2570 ret = -EIO; 2571 } 2572 2573 return ret; 2574 } 2575 2576 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev, 2577 __be16 proto __attribute__((unused)), 2578 u16 vid) 2579 { 2580 struct lio *lio = GET_LIO(netdev); 2581 struct octeon_device *oct = lio->oct_dev; 2582 struct octnic_ctrl_pkt nctrl; 2583 int ret = 0; 2584 2585 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2586 2587 nctrl.ncmd.u64 = 0; 2588 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2589 nctrl.ncmd.s.param1 = vid; 2590 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2591 nctrl.netpndev = (u64)netdev; 2592 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2593 2594 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2595 if (ret) { 2596 dev_err(&oct->pci_dev->dev, "Del VLAN filter failed in core (ret: 0x%x)\n", 2597 ret); 2598 if (ret > 0) 2599 ret = -EIO; 2600 } 2601 return ret; 2602 } 2603 2604 /** 2605 * liquidio_set_rxcsum_command - Sending command to enable/disable RX checksum offload 2606 * @netdev: pointer to network device 2607 * @command: OCTNET_CMD_TNL_RX_CSUM_CTL 2608 * @rx_cmd: OCTNET_CMD_RXCSUM_ENABLE/OCTNET_CMD_RXCSUM_DISABLE 2609 * Returns: SUCCESS or FAILURE 2610 */ 2611 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command, 2612 u8 rx_cmd) 2613 { 2614 struct lio *lio = GET_LIO(netdev); 2615 struct octeon_device *oct = lio->oct_dev; 2616 struct octnic_ctrl_pkt nctrl; 2617 int ret = 0; 2618 2619 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2620 2621 nctrl.ncmd.u64 = 0; 2622 nctrl.ncmd.s.cmd = command; 2623 nctrl.ncmd.s.param1 = rx_cmd; 2624 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2625 nctrl.netpndev = (u64)netdev; 2626 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2627 2628 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2629 if (ret) { 2630 dev_err(&oct->pci_dev->dev, 2631 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n", 2632 ret); 2633 if (ret > 0) 2634 ret = -EIO; 2635 } 2636 return ret; 2637 } 2638 2639 /** 2640 * liquidio_vxlan_port_command - Sending command to add/delete VxLAN UDP port to firmware 2641 * @netdev: pointer to network device 2642 * @command: OCTNET_CMD_VXLAN_PORT_CONFIG 2643 * @vxlan_port: VxLAN port to be added or deleted 2644 * @vxlan_cmd_bit: OCTNET_CMD_VXLAN_PORT_ADD, 2645 * OCTNET_CMD_VXLAN_PORT_DEL 2646 * Return: SUCCESS or FAILURE 2647 */ 2648 static int liquidio_vxlan_port_command(struct net_device *netdev, int command, 2649 u16 vxlan_port, u8 vxlan_cmd_bit) 2650 { 2651 struct lio *lio = GET_LIO(netdev); 2652 struct octeon_device *oct = lio->oct_dev; 2653 struct octnic_ctrl_pkt nctrl; 2654 int ret = 0; 2655 2656 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2657 2658 nctrl.ncmd.u64 = 0; 2659 nctrl.ncmd.s.cmd = command; 2660 nctrl.ncmd.s.more = vxlan_cmd_bit; 2661 nctrl.ncmd.s.param1 = vxlan_port; 2662 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2663 nctrl.netpndev = (u64)netdev; 2664 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2665 2666 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2667 if (ret) { 2668 dev_err(&oct->pci_dev->dev, 2669 "VxLAN port add/delete failed in core (ret:0x%x)\n", 2670 ret); 2671 if (ret > 0) 2672 ret = -EIO; 2673 } 2674 return ret; 2675 } 2676 2677 static int liquidio_udp_tunnel_set_port(struct net_device *netdev, 2678 unsigned int table, unsigned int entry, 2679 struct udp_tunnel_info *ti) 2680 { 2681 return liquidio_vxlan_port_command(netdev, 2682 OCTNET_CMD_VXLAN_PORT_CONFIG, 2683 htons(ti->port), 2684 OCTNET_CMD_VXLAN_PORT_ADD); 2685 } 2686 2687 static int liquidio_udp_tunnel_unset_port(struct net_device *netdev, 2688 unsigned int table, 2689 unsigned int entry, 2690 struct udp_tunnel_info *ti) 2691 { 2692 return liquidio_vxlan_port_command(netdev, 2693 OCTNET_CMD_VXLAN_PORT_CONFIG, 2694 htons(ti->port), 2695 OCTNET_CMD_VXLAN_PORT_DEL); 2696 } 2697 2698 static const struct udp_tunnel_nic_info liquidio_udp_tunnels = { 2699 .set_port = liquidio_udp_tunnel_set_port, 2700 .unset_port = liquidio_udp_tunnel_unset_port, 2701 .tables = { 2702 { .n_entries = 1024, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 2703 }, 2704 }; 2705 2706 /** 2707 * liquidio_fix_features - Net device fix features 2708 * @netdev: pointer to network device 2709 * @request: features requested 2710 * Return: updated features list 2711 */ 2712 static netdev_features_t liquidio_fix_features(struct net_device *netdev, 2713 netdev_features_t request) 2714 { 2715 struct lio *lio = netdev_priv(netdev); 2716 2717 if ((request & NETIF_F_RXCSUM) && 2718 !(lio->dev_capability & NETIF_F_RXCSUM)) 2719 request &= ~NETIF_F_RXCSUM; 2720 2721 if ((request & NETIF_F_HW_CSUM) && 2722 !(lio->dev_capability & NETIF_F_HW_CSUM)) 2723 request &= ~NETIF_F_HW_CSUM; 2724 2725 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO)) 2726 request &= ~NETIF_F_TSO; 2727 2728 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6)) 2729 request &= ~NETIF_F_TSO6; 2730 2731 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO)) 2732 request &= ~NETIF_F_LRO; 2733 2734 /*Disable LRO if RXCSUM is off */ 2735 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) && 2736 (lio->dev_capability & NETIF_F_LRO)) 2737 request &= ~NETIF_F_LRO; 2738 2739 if ((request & NETIF_F_HW_VLAN_CTAG_FILTER) && 2740 !(lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER)) 2741 request &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 2742 2743 return request; 2744 } 2745 2746 /** 2747 * liquidio_set_features - Net device set features 2748 * @netdev: pointer to network device 2749 * @features: features to enable/disable 2750 */ 2751 static int liquidio_set_features(struct net_device *netdev, 2752 netdev_features_t features) 2753 { 2754 struct lio *lio = netdev_priv(netdev); 2755 2756 if ((features & NETIF_F_LRO) && 2757 (lio->dev_capability & NETIF_F_LRO) && 2758 !(netdev->features & NETIF_F_LRO)) 2759 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 2760 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2761 else if (!(features & NETIF_F_LRO) && 2762 (lio->dev_capability & NETIF_F_LRO) && 2763 (netdev->features & NETIF_F_LRO)) 2764 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE, 2765 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2766 2767 /* Sending command to firmware to enable/disable RX checksum 2768 * offload settings using ethtool 2769 */ 2770 if (!(netdev->features & NETIF_F_RXCSUM) && 2771 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2772 (features & NETIF_F_RXCSUM)) 2773 liquidio_set_rxcsum_command(netdev, 2774 OCTNET_CMD_TNL_RX_CSUM_CTL, 2775 OCTNET_CMD_RXCSUM_ENABLE); 2776 else if ((netdev->features & NETIF_F_RXCSUM) && 2777 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2778 !(features & NETIF_F_RXCSUM)) 2779 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 2780 OCTNET_CMD_RXCSUM_DISABLE); 2781 2782 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2783 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2784 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2785 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2786 OCTNET_CMD_VLAN_FILTER_ENABLE); 2787 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2788 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2789 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2790 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2791 OCTNET_CMD_VLAN_FILTER_DISABLE); 2792 2793 return 0; 2794 } 2795 2796 static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx, 2797 u8 *mac, bool is_admin_assigned) 2798 { 2799 struct lio *lio = GET_LIO(netdev); 2800 struct octeon_device *oct = lio->oct_dev; 2801 struct octnic_ctrl_pkt nctrl; 2802 int ret = 0; 2803 2804 if (!is_valid_ether_addr(mac)) 2805 return -EINVAL; 2806 2807 if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs) 2808 return -EINVAL; 2809 2810 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2811 2812 nctrl.ncmd.u64 = 0; 2813 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2814 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 2815 nctrl.ncmd.s.param1 = vfidx + 1; 2816 nctrl.ncmd.s.more = 1; 2817 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2818 nctrl.netpndev = (u64)netdev; 2819 if (is_admin_assigned) { 2820 nctrl.ncmd.s.param2 = true; 2821 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2822 } 2823 2824 nctrl.udd[0] = 0; 2825 /* The MAC Address is presented in network byte order. */ 2826 ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac); 2827 2828 oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0]; 2829 2830 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2831 if (ret > 0) 2832 ret = -EIO; 2833 2834 return ret; 2835 } 2836 2837 static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac) 2838 { 2839 struct lio *lio = GET_LIO(netdev); 2840 struct octeon_device *oct = lio->oct_dev; 2841 int retval; 2842 2843 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2844 return -EINVAL; 2845 2846 retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true); 2847 if (!retval) 2848 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac); 2849 2850 return retval; 2851 } 2852 2853 static int liquidio_set_vf_spoofchk(struct net_device *netdev, int vfidx, 2854 bool enable) 2855 { 2856 struct lio *lio = GET_LIO(netdev); 2857 struct octeon_device *oct = lio->oct_dev; 2858 struct octnic_ctrl_pkt nctrl; 2859 int retval; 2860 2861 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SPOOFCHK_CAP)) { 2862 netif_info(lio, drv, lio->netdev, 2863 "firmware does not support spoofchk\n"); 2864 return -EOPNOTSUPP; 2865 } 2866 2867 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 2868 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 2869 return -EINVAL; 2870 } 2871 2872 if (enable) { 2873 if (oct->sriov_info.vf_spoofchk[vfidx]) 2874 return 0; 2875 } else { 2876 /* Clear */ 2877 if (!oct->sriov_info.vf_spoofchk[vfidx]) 2878 return 0; 2879 } 2880 2881 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2882 nctrl.ncmd.s.cmdgroup = OCTNET_CMD_GROUP1; 2883 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_SPOOFCHK; 2884 nctrl.ncmd.s.param1 = 2885 vfidx + 1; /* vfidx is 0 based, 2886 * but vf_num (param1) is 1 based 2887 */ 2888 nctrl.ncmd.s.param2 = enable; 2889 nctrl.ncmd.s.more = 0; 2890 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2891 nctrl.cb_fn = NULL; 2892 2893 retval = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2894 2895 if (retval) { 2896 netif_info(lio, drv, lio->netdev, 2897 "Failed to set VF %d spoofchk %s\n", vfidx, 2898 enable ? "on" : "off"); 2899 return -1; 2900 } 2901 2902 oct->sriov_info.vf_spoofchk[vfidx] = enable; 2903 netif_info(lio, drv, lio->netdev, "VF %u spoofchk is %s\n", vfidx, 2904 enable ? "on" : "off"); 2905 2906 return 0; 2907 } 2908 2909 static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx, 2910 u16 vlan, u8 qos, __be16 vlan_proto) 2911 { 2912 struct lio *lio = GET_LIO(netdev); 2913 struct octeon_device *oct = lio->oct_dev; 2914 struct octnic_ctrl_pkt nctrl; 2915 u16 vlantci; 2916 int ret = 0; 2917 2918 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2919 return -EINVAL; 2920 2921 if (vlan_proto != htons(ETH_P_8021Q)) 2922 return -EPROTONOSUPPORT; 2923 2924 if (vlan >= VLAN_N_VID || qos > 7) 2925 return -EINVAL; 2926 2927 if (vlan) 2928 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT; 2929 else 2930 vlantci = 0; 2931 2932 if (oct->sriov_info.vf_vlantci[vfidx] == vlantci) 2933 return 0; 2934 2935 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2936 2937 if (vlan) 2938 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2939 else 2940 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2941 2942 nctrl.ncmd.s.param1 = vlantci; 2943 nctrl.ncmd.s.param2 = 2944 vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */ 2945 nctrl.ncmd.s.more = 0; 2946 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2947 nctrl.cb_fn = NULL; 2948 2949 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2950 if (ret) { 2951 if (ret > 0) 2952 ret = -EIO; 2953 return ret; 2954 } 2955 2956 oct->sriov_info.vf_vlantci[vfidx] = vlantci; 2957 2958 return ret; 2959 } 2960 2961 static int liquidio_get_vf_config(struct net_device *netdev, int vfidx, 2962 struct ifla_vf_info *ivi) 2963 { 2964 struct lio *lio = GET_LIO(netdev); 2965 struct octeon_device *oct = lio->oct_dev; 2966 u8 *macaddr; 2967 2968 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2969 return -EINVAL; 2970 2971 memset(ivi, 0, sizeof(struct ifla_vf_info)); 2972 2973 ivi->vf = vfidx; 2974 macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx]; 2975 ether_addr_copy(&ivi->mac[0], macaddr); 2976 ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK; 2977 ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT; 2978 if (oct->sriov_info.trusted_vf.active && 2979 oct->sriov_info.trusted_vf.id == vfidx) 2980 ivi->trusted = true; 2981 else 2982 ivi->trusted = false; 2983 ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx]; 2984 ivi->spoofchk = oct->sriov_info.vf_spoofchk[vfidx]; 2985 ivi->max_tx_rate = lio->linfo.link.s.speed; 2986 ivi->min_tx_rate = 0; 2987 2988 return 0; 2989 } 2990 2991 static int liquidio_send_vf_trust_cmd(struct lio *lio, int vfidx, bool trusted) 2992 { 2993 struct octeon_device *oct = lio->oct_dev; 2994 struct octeon_soft_command *sc; 2995 int retval; 2996 2997 sc = octeon_alloc_soft_command(oct, 0, 16, 0); 2998 if (!sc) 2999 return -ENOMEM; 3000 3001 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 3002 3003 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3004 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 3005 OPCODE_NIC_SET_TRUSTED_VF, 0, vfidx + 1, 3006 trusted); 3007 3008 init_completion(&sc->complete); 3009 sc->sc_status = OCTEON_REQUEST_PENDING; 3010 3011 retval = octeon_send_soft_command(oct, sc); 3012 if (retval == IQ_SEND_FAILED) { 3013 octeon_free_soft_command(oct, sc); 3014 retval = -1; 3015 } else { 3016 /* Wait for response or timeout */ 3017 retval = wait_for_sc_completion_timeout(oct, sc, 0); 3018 if (retval) 3019 return (retval); 3020 3021 WRITE_ONCE(sc->caller_is_done, true); 3022 } 3023 3024 return retval; 3025 } 3026 3027 static int liquidio_set_vf_trust(struct net_device *netdev, int vfidx, 3028 bool setting) 3029 { 3030 struct lio *lio = GET_LIO(netdev); 3031 struct octeon_device *oct = lio->oct_dev; 3032 3033 if (strcmp(oct->fw_info.liquidio_firmware_version, "1.7.1") < 0) { 3034 /* trusted vf is not supported by firmware older than 1.7.1 */ 3035 return -EOPNOTSUPP; 3036 } 3037 3038 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 3039 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 3040 return -EINVAL; 3041 } 3042 3043 if (setting) { 3044 /* Set */ 3045 3046 if (oct->sriov_info.trusted_vf.active && 3047 oct->sriov_info.trusted_vf.id == vfidx) 3048 return 0; 3049 3050 if (oct->sriov_info.trusted_vf.active) { 3051 netif_info(lio, drv, lio->netdev, "More than one trusted VF is not allowed\n"); 3052 return -EPERM; 3053 } 3054 } else { 3055 /* Clear */ 3056 3057 if (!oct->sriov_info.trusted_vf.active) 3058 return 0; 3059 } 3060 3061 if (!liquidio_send_vf_trust_cmd(lio, vfidx, setting)) { 3062 if (setting) { 3063 oct->sriov_info.trusted_vf.id = vfidx; 3064 oct->sriov_info.trusted_vf.active = true; 3065 } else { 3066 oct->sriov_info.trusted_vf.active = false; 3067 } 3068 3069 netif_info(lio, drv, lio->netdev, "VF %u is %strusted\n", vfidx, 3070 setting ? "" : "not "); 3071 } else { 3072 netif_info(lio, drv, lio->netdev, "Failed to set VF trusted\n"); 3073 return -1; 3074 } 3075 3076 return 0; 3077 } 3078 3079 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 3080 int linkstate) 3081 { 3082 struct lio *lio = GET_LIO(netdev); 3083 struct octeon_device *oct = lio->oct_dev; 3084 struct octnic_ctrl_pkt nctrl; 3085 int ret = 0; 3086 3087 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3088 return -EINVAL; 3089 3090 if (oct->sriov_info.vf_linkstate[vfidx] == linkstate) 3091 return 0; 3092 3093 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 3094 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE; 3095 nctrl.ncmd.s.param1 = 3096 vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3097 nctrl.ncmd.s.param2 = linkstate; 3098 nctrl.ncmd.s.more = 0; 3099 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 3100 nctrl.cb_fn = NULL; 3101 3102 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 3103 3104 if (!ret) 3105 oct->sriov_info.vf_linkstate[vfidx] = linkstate; 3106 else if (ret > 0) 3107 ret = -EIO; 3108 3109 return ret; 3110 } 3111 3112 static int 3113 liquidio_eswitch_mode_get(struct devlink *devlink, u16 *mode) 3114 { 3115 struct lio_devlink_priv *priv; 3116 struct octeon_device *oct; 3117 3118 priv = devlink_priv(devlink); 3119 oct = priv->oct; 3120 3121 *mode = oct->eswitch_mode; 3122 3123 return 0; 3124 } 3125 3126 static int 3127 liquidio_eswitch_mode_set(struct devlink *devlink, u16 mode, 3128 struct netlink_ext_ack *extack) 3129 { 3130 struct lio_devlink_priv *priv; 3131 struct octeon_device *oct; 3132 int ret = 0; 3133 3134 priv = devlink_priv(devlink); 3135 oct = priv->oct; 3136 3137 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP)) 3138 return -EINVAL; 3139 3140 if (oct->eswitch_mode == mode) 3141 return 0; 3142 3143 switch (mode) { 3144 case DEVLINK_ESWITCH_MODE_SWITCHDEV: 3145 oct->eswitch_mode = mode; 3146 ret = lio_vf_rep_create(oct); 3147 break; 3148 3149 case DEVLINK_ESWITCH_MODE_LEGACY: 3150 lio_vf_rep_destroy(oct); 3151 oct->eswitch_mode = mode; 3152 break; 3153 3154 default: 3155 ret = -EINVAL; 3156 } 3157 3158 return ret; 3159 } 3160 3161 static const struct devlink_ops liquidio_devlink_ops = { 3162 .eswitch_mode_get = liquidio_eswitch_mode_get, 3163 .eswitch_mode_set = liquidio_eswitch_mode_set, 3164 }; 3165 3166 static int 3167 liquidio_get_port_parent_id(struct net_device *dev, 3168 struct netdev_phys_item_id *ppid) 3169 { 3170 struct lio *lio = GET_LIO(dev); 3171 struct octeon_device *oct = lio->oct_dev; 3172 3173 if (oct->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) 3174 return -EOPNOTSUPP; 3175 3176 ppid->id_len = ETH_ALEN; 3177 ether_addr_copy(ppid->id, (void *)&lio->linfo.hw_addr + 2); 3178 3179 return 0; 3180 } 3181 3182 static int liquidio_get_vf_stats(struct net_device *netdev, int vfidx, 3183 struct ifla_vf_stats *vf_stats) 3184 { 3185 struct lio *lio = GET_LIO(netdev); 3186 struct octeon_device *oct = lio->oct_dev; 3187 struct oct_vf_stats stats; 3188 int ret; 3189 3190 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3191 return -EINVAL; 3192 3193 memset(&stats, 0, sizeof(struct oct_vf_stats)); 3194 ret = cn23xx_get_vf_stats(oct, vfidx, &stats); 3195 if (!ret) { 3196 vf_stats->rx_packets = stats.rx_packets; 3197 vf_stats->tx_packets = stats.tx_packets; 3198 vf_stats->rx_bytes = stats.rx_bytes; 3199 vf_stats->tx_bytes = stats.tx_bytes; 3200 vf_stats->broadcast = stats.broadcast; 3201 vf_stats->multicast = stats.multicast; 3202 } 3203 3204 return ret; 3205 } 3206 3207 static const struct net_device_ops lionetdevops = { 3208 .ndo_open = liquidio_open, 3209 .ndo_stop = liquidio_stop, 3210 .ndo_start_xmit = liquidio_xmit, 3211 .ndo_get_stats64 = liquidio_get_stats64, 3212 .ndo_set_mac_address = liquidio_set_mac, 3213 .ndo_set_rx_mode = liquidio_set_mcast_list, 3214 .ndo_tx_timeout = liquidio_tx_timeout, 3215 3216 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid, 3217 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid, 3218 .ndo_change_mtu = liquidio_change_mtu, 3219 .ndo_eth_ioctl = liquidio_ioctl, 3220 .ndo_fix_features = liquidio_fix_features, 3221 .ndo_set_features = liquidio_set_features, 3222 .ndo_set_vf_mac = liquidio_set_vf_mac, 3223 .ndo_set_vf_vlan = liquidio_set_vf_vlan, 3224 .ndo_get_vf_config = liquidio_get_vf_config, 3225 .ndo_set_vf_spoofchk = liquidio_set_vf_spoofchk, 3226 .ndo_set_vf_trust = liquidio_set_vf_trust, 3227 .ndo_set_vf_link_state = liquidio_set_vf_link_state, 3228 .ndo_get_vf_stats = liquidio_get_vf_stats, 3229 .ndo_get_port_parent_id = liquidio_get_port_parent_id, 3230 }; 3231 3232 /** 3233 * liquidio_init - Entry point for the liquidio module 3234 */ 3235 static int __init liquidio_init(void) 3236 { 3237 int i; 3238 struct handshake *hs; 3239 3240 init_completion(&first_stage); 3241 3242 octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT); 3243 3244 if (liquidio_init_pci()) 3245 return -EINVAL; 3246 3247 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000)); 3248 3249 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3250 hs = &handshake[i]; 3251 if (hs->pci_dev) { 3252 wait_for_completion(&hs->init); 3253 if (!hs->init_ok) { 3254 /* init handshake failed */ 3255 dev_err(&hs->pci_dev->dev, 3256 "Failed to init device\n"); 3257 liquidio_deinit_pci(); 3258 return -EIO; 3259 } 3260 } 3261 } 3262 3263 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3264 hs = &handshake[i]; 3265 if (hs->pci_dev) { 3266 wait_for_completion_timeout(&hs->started, 3267 msecs_to_jiffies(30000)); 3268 if (!hs->started_ok) { 3269 /* starter handshake failed */ 3270 dev_err(&hs->pci_dev->dev, 3271 "Firmware failed to start\n"); 3272 liquidio_deinit_pci(); 3273 return -EIO; 3274 } 3275 } 3276 } 3277 3278 return 0; 3279 } 3280 3281 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf) 3282 { 3283 struct octeon_device *oct = (struct octeon_device *)buf; 3284 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3285 int gmxport = 0; 3286 union oct_link_status *ls; 3287 int i; 3288 3289 if (recv_pkt->buffer_size[0] != (sizeof(*ls) + OCT_DROQ_INFO_SIZE)) { 3290 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n", 3291 recv_pkt->buffer_size[0], 3292 recv_pkt->rh.r_nic_info.gmxport); 3293 goto nic_info_err; 3294 } 3295 3296 gmxport = recv_pkt->rh.r_nic_info.gmxport; 3297 ls = (union oct_link_status *)(get_rbd(recv_pkt->buffer_ptr[0]) + 3298 OCT_DROQ_INFO_SIZE); 3299 3300 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3); 3301 for (i = 0; i < oct->ifcount; i++) { 3302 if (oct->props[i].gmxport == gmxport) { 3303 update_link_status(oct->props[i].netdev, ls); 3304 break; 3305 } 3306 } 3307 3308 nic_info_err: 3309 for (i = 0; i < recv_pkt->buffer_count; i++) 3310 recv_buffer_free(recv_pkt->buffer_ptr[i]); 3311 octeon_free_recv_info(recv_info); 3312 return 0; 3313 } 3314 3315 /** 3316 * setup_nic_devices - Setup network interfaces 3317 * @octeon_dev: octeon device 3318 * 3319 * Called during init time for each device. It assumes the NIC 3320 * is already up and running. The link information for each 3321 * interface is passed in link_info. 3322 */ 3323 static int setup_nic_devices(struct octeon_device *octeon_dev) 3324 { 3325 struct lio *lio = NULL; 3326 struct net_device *netdev; 3327 u8 mac[6], i, j, *fw_ver, *micro_ver; 3328 unsigned long micro; 3329 u32 cur_ver; 3330 struct octeon_soft_command *sc; 3331 struct liquidio_if_cfg_resp *resp; 3332 struct octdev_props *props; 3333 int retval, num_iqueues, num_oqueues; 3334 int max_num_queues = 0; 3335 union oct_nic_if_cfg if_cfg; 3336 unsigned int base_queue; 3337 unsigned int gmx_port_id; 3338 u32 resp_size, data_size; 3339 u32 ifidx_or_pfnum; 3340 struct lio_version *vdata; 3341 struct devlink *devlink; 3342 struct lio_devlink_priv *lio_devlink; 3343 3344 /* This is to handle link status changes */ 3345 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 3346 OPCODE_NIC_INFO, 3347 lio_nic_info, octeon_dev); 3348 3349 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions. 3350 * They are handled directly. 3351 */ 3352 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET, 3353 free_netbuf); 3354 3355 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG, 3356 free_netsgbuf); 3357 3358 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG, 3359 free_netsgbuf_with_resp); 3360 3361 for (i = 0; i < octeon_dev->ifcount; i++) { 3362 resp_size = sizeof(struct liquidio_if_cfg_resp); 3363 data_size = sizeof(struct lio_version); 3364 sc = (struct octeon_soft_command *) 3365 octeon_alloc_soft_command(octeon_dev, data_size, 3366 resp_size, 0); 3367 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; 3368 vdata = (struct lio_version *)sc->virtdptr; 3369 3370 *((u64 *)vdata) = 0; 3371 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION); 3372 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION); 3373 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION); 3374 3375 if (OCTEON_CN23XX_PF(octeon_dev)) { 3376 num_iqueues = octeon_dev->sriov_info.num_pf_rings; 3377 num_oqueues = octeon_dev->sriov_info.num_pf_rings; 3378 base_queue = octeon_dev->sriov_info.pf_srn; 3379 3380 gmx_port_id = octeon_dev->pf_num; 3381 ifidx_or_pfnum = octeon_dev->pf_num; 3382 } else { 3383 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF( 3384 octeon_get_conf(octeon_dev), i); 3385 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF( 3386 octeon_get_conf(octeon_dev), i); 3387 base_queue = CFG_GET_BASE_QUE_NIC_IF( 3388 octeon_get_conf(octeon_dev), i); 3389 gmx_port_id = CFG_GET_GMXID_NIC_IF( 3390 octeon_get_conf(octeon_dev), i); 3391 ifidx_or_pfnum = i; 3392 } 3393 3394 dev_dbg(&octeon_dev->pci_dev->dev, 3395 "requesting config for interface %d, iqs %d, oqs %d\n", 3396 ifidx_or_pfnum, num_iqueues, num_oqueues); 3397 3398 if_cfg.u64 = 0; 3399 if_cfg.s.num_iqueues = num_iqueues; 3400 if_cfg.s.num_oqueues = num_oqueues; 3401 if_cfg.s.base_queue = base_queue; 3402 if_cfg.s.gmx_port_id = gmx_port_id; 3403 3404 sc->iq_no = 0; 3405 3406 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC, 3407 OPCODE_NIC_IF_CFG, 0, 3408 if_cfg.u64, 0); 3409 3410 init_completion(&sc->complete); 3411 sc->sc_status = OCTEON_REQUEST_PENDING; 3412 3413 retval = octeon_send_soft_command(octeon_dev, sc); 3414 if (retval == IQ_SEND_FAILED) { 3415 dev_err(&octeon_dev->pci_dev->dev, 3416 "iq/oq config failed status: %x\n", 3417 retval); 3418 /* Soft instr is freed by driver in case of failure. */ 3419 octeon_free_soft_command(octeon_dev, sc); 3420 return(-EIO); 3421 } 3422 3423 /* Sleep on a wait queue till the cond flag indicates that the 3424 * response arrived or timed-out. 3425 */ 3426 retval = wait_for_sc_completion_timeout(octeon_dev, sc, 0); 3427 if (retval) 3428 return retval; 3429 3430 retval = resp->status; 3431 if (retval) { 3432 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n"); 3433 WRITE_ONCE(sc->caller_is_done, true); 3434 goto setup_nic_dev_done; 3435 } 3436 snprintf(octeon_dev->fw_info.liquidio_firmware_version, 3437 32, "%s", 3438 resp->cfg_info.liquidio_firmware_version); 3439 3440 /* Verify f/w version (in case of 'auto' loading from flash) */ 3441 fw_ver = octeon_dev->fw_info.liquidio_firmware_version; 3442 if (memcmp(LIQUIDIO_BASE_VERSION, 3443 fw_ver, 3444 strlen(LIQUIDIO_BASE_VERSION))) { 3445 dev_err(&octeon_dev->pci_dev->dev, 3446 "Unmatched firmware version. Expected %s.x, got %s.\n", 3447 LIQUIDIO_BASE_VERSION, fw_ver); 3448 WRITE_ONCE(sc->caller_is_done, true); 3449 goto setup_nic_dev_done; 3450 } else if (atomic_read(octeon_dev->adapter_fw_state) == 3451 FW_IS_PRELOADED) { 3452 dev_info(&octeon_dev->pci_dev->dev, 3453 "Using auto-loaded firmware version %s.\n", 3454 fw_ver); 3455 } 3456 3457 /* extract micro version field; point past '<maj>.<min>.' */ 3458 micro_ver = fw_ver + strlen(LIQUIDIO_BASE_VERSION) + 1; 3459 if (kstrtoul(micro_ver, 10, µ) != 0) 3460 micro = 0; 3461 octeon_dev->fw_info.ver.maj = LIQUIDIO_BASE_MAJOR_VERSION; 3462 octeon_dev->fw_info.ver.min = LIQUIDIO_BASE_MINOR_VERSION; 3463 octeon_dev->fw_info.ver.rev = micro; 3464 3465 octeon_swap_8B_data((u64 *)(&resp->cfg_info), 3466 (sizeof(struct liquidio_if_cfg_info)) >> 3); 3467 3468 num_iqueues = hweight64(resp->cfg_info.iqmask); 3469 num_oqueues = hweight64(resp->cfg_info.oqmask); 3470 3471 if (!(num_iqueues) || !(num_oqueues)) { 3472 dev_err(&octeon_dev->pci_dev->dev, 3473 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n", 3474 resp->cfg_info.iqmask, 3475 resp->cfg_info.oqmask); 3476 WRITE_ONCE(sc->caller_is_done, true); 3477 goto setup_nic_dev_done; 3478 } 3479 3480 if (OCTEON_CN6XXX(octeon_dev)) { 3481 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3482 cn6xxx)); 3483 } else if (OCTEON_CN23XX_PF(octeon_dev)) { 3484 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3485 cn23xx_pf)); 3486 } 3487 3488 dev_dbg(&octeon_dev->pci_dev->dev, 3489 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d max_num_queues: %d\n", 3490 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask, 3491 num_iqueues, num_oqueues, max_num_queues); 3492 netdev = alloc_etherdev_mq(LIO_SIZE, max_num_queues); 3493 3494 if (!netdev) { 3495 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n"); 3496 WRITE_ONCE(sc->caller_is_done, true); 3497 goto setup_nic_dev_done; 3498 } 3499 3500 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev); 3501 3502 /* Associate the routines that will handle different 3503 * netdev tasks. 3504 */ 3505 netdev->netdev_ops = &lionetdevops; 3506 3507 retval = netif_set_real_num_rx_queues(netdev, num_oqueues); 3508 if (retval) { 3509 dev_err(&octeon_dev->pci_dev->dev, 3510 "setting real number rx failed\n"); 3511 WRITE_ONCE(sc->caller_is_done, true); 3512 goto setup_nic_dev_free; 3513 } 3514 3515 retval = netif_set_real_num_tx_queues(netdev, num_iqueues); 3516 if (retval) { 3517 dev_err(&octeon_dev->pci_dev->dev, 3518 "setting real number tx failed\n"); 3519 WRITE_ONCE(sc->caller_is_done, true); 3520 goto setup_nic_dev_free; 3521 } 3522 3523 lio = GET_LIO(netdev); 3524 3525 memset(lio, 0, sizeof(struct lio)); 3526 3527 lio->ifidx = ifidx_or_pfnum; 3528 3529 props = &octeon_dev->props[i]; 3530 props->gmxport = resp->cfg_info.linfo.gmxport; 3531 props->netdev = netdev; 3532 3533 lio->linfo.num_rxpciq = num_oqueues; 3534 lio->linfo.num_txpciq = num_iqueues; 3535 for (j = 0; j < num_oqueues; j++) { 3536 lio->linfo.rxpciq[j].u64 = 3537 resp->cfg_info.linfo.rxpciq[j].u64; 3538 } 3539 for (j = 0; j < num_iqueues; j++) { 3540 lio->linfo.txpciq[j].u64 = 3541 resp->cfg_info.linfo.txpciq[j].u64; 3542 } 3543 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr; 3544 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport; 3545 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64; 3546 3547 WRITE_ONCE(sc->caller_is_done, true); 3548 3549 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3550 3551 if (OCTEON_CN23XX_PF(octeon_dev) || 3552 OCTEON_CN6XXX(octeon_dev)) { 3553 lio->dev_capability = NETIF_F_HIGHDMA 3554 | NETIF_F_IP_CSUM 3555 | NETIF_F_IPV6_CSUM 3556 | NETIF_F_SG | NETIF_F_RXCSUM 3557 | NETIF_F_GRO 3558 | NETIF_F_TSO | NETIF_F_TSO6 3559 | NETIF_F_LRO; 3560 } 3561 netif_set_tso_max_size(netdev, OCTNIC_GSO_MAX_SIZE); 3562 3563 /* Copy of transmit encapsulation capabilities: 3564 * TSO, TSO6, Checksums for this device 3565 */ 3566 lio->enc_dev_capability = NETIF_F_IP_CSUM 3567 | NETIF_F_IPV6_CSUM 3568 | NETIF_F_GSO_UDP_TUNNEL 3569 | NETIF_F_HW_CSUM | NETIF_F_SG 3570 | NETIF_F_RXCSUM 3571 | NETIF_F_TSO | NETIF_F_TSO6 3572 | NETIF_F_LRO; 3573 3574 netdev->hw_enc_features = (lio->enc_dev_capability & 3575 ~NETIF_F_LRO); 3576 3577 netdev->udp_tunnel_nic_info = &liquidio_udp_tunnels; 3578 3579 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL; 3580 3581 netdev->vlan_features = lio->dev_capability; 3582 /* Add any unchangeable hw features */ 3583 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER | 3584 NETIF_F_HW_VLAN_CTAG_RX | 3585 NETIF_F_HW_VLAN_CTAG_TX; 3586 3587 netdev->features = (lio->dev_capability & ~NETIF_F_LRO); 3588 3589 netdev->hw_features = lio->dev_capability; 3590 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/ 3591 netdev->hw_features = netdev->hw_features & 3592 ~NETIF_F_HW_VLAN_CTAG_RX; 3593 3594 /* MTU range: 68 - 16000 */ 3595 netdev->min_mtu = LIO_MIN_MTU_SIZE; 3596 netdev->max_mtu = LIO_MAX_MTU_SIZE; 3597 3598 /* Point to the properties for octeon device to which this 3599 * interface belongs. 3600 */ 3601 lio->oct_dev = octeon_dev; 3602 lio->octprops = props; 3603 lio->netdev = netdev; 3604 3605 dev_dbg(&octeon_dev->pci_dev->dev, 3606 "if%d gmx: %d hw_addr: 0x%llx\n", i, 3607 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr)); 3608 3609 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) { 3610 u8 vfmac[ETH_ALEN]; 3611 3612 eth_random_addr(vfmac); 3613 if (__liquidio_set_vf_mac(netdev, j, vfmac, false)) { 3614 dev_err(&octeon_dev->pci_dev->dev, 3615 "Error setting VF%d MAC address\n", 3616 j); 3617 goto setup_nic_dev_free; 3618 } 3619 } 3620 3621 /* 64-bit swap required on LE machines */ 3622 octeon_swap_8B_data(&lio->linfo.hw_addr, 1); 3623 for (j = 0; j < 6; j++) 3624 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j)); 3625 3626 /* Copy MAC Address to OS network device structure */ 3627 3628 eth_hw_addr_set(netdev, mac); 3629 3630 /* By default all interfaces on a single Octeon uses the same 3631 * tx and rx queues 3632 */ 3633 lio->txq = lio->linfo.txpciq[0].s.q_no; 3634 lio->rxq = lio->linfo.rxpciq[0].s.q_no; 3635 if (liquidio_setup_io_queues(octeon_dev, i, 3636 lio->linfo.num_txpciq, 3637 lio->linfo.num_rxpciq)) { 3638 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n"); 3639 goto setup_nic_dev_free; 3640 } 3641 3642 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS); 3643 3644 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq); 3645 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq); 3646 3647 if (lio_setup_glists(octeon_dev, lio, num_iqueues)) { 3648 dev_err(&octeon_dev->pci_dev->dev, 3649 "Gather list allocation failed\n"); 3650 goto setup_nic_dev_free; 3651 } 3652 3653 /* Register ethtool support */ 3654 liquidio_set_ethtool_ops(netdev); 3655 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID) 3656 octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT; 3657 else 3658 octeon_dev->priv_flags = 0x0; 3659 3660 if (netdev->features & NETIF_F_LRO) 3661 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 3662 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 3663 3664 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 3665 OCTNET_CMD_VLAN_FILTER_ENABLE); 3666 3667 if ((debug != -1) && (debug & NETIF_MSG_HW)) 3668 liquidio_set_feature(netdev, 3669 OCTNET_CMD_VERBOSE_ENABLE, 0); 3670 3671 if (setup_link_status_change_wq(netdev)) 3672 goto setup_nic_dev_free; 3673 3674 if ((octeon_dev->fw_info.app_cap_flags & 3675 LIQUIDIO_TIME_SYNC_CAP) && 3676 setup_sync_octeon_time_wq(netdev)) 3677 goto setup_nic_dev_free; 3678 3679 if (setup_rx_oom_poll_fn(netdev)) 3680 goto setup_nic_dev_free; 3681 3682 /* Register the network device with the OS */ 3683 if (register_netdev(netdev)) { 3684 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n"); 3685 goto setup_nic_dev_free; 3686 } 3687 3688 dev_dbg(&octeon_dev->pci_dev->dev, 3689 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n", 3690 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); 3691 netif_carrier_off(netdev); 3692 lio->link_changes++; 3693 3694 ifstate_set(lio, LIO_IFSTATE_REGISTERED); 3695 3696 /* Sending command to firmware to enable Rx checksum offload 3697 * by default at the time of setup of Liquidio driver for 3698 * this device 3699 */ 3700 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 3701 OCTNET_CMD_RXCSUM_ENABLE); 3702 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL, 3703 OCTNET_CMD_TXCSUM_ENABLE); 3704 3705 dev_dbg(&octeon_dev->pci_dev->dev, 3706 "NIC ifidx:%d Setup successful\n", i); 3707 3708 if (octeon_dev->subsystem_id == 3709 OCTEON_CN2350_25GB_SUBSYS_ID || 3710 octeon_dev->subsystem_id == 3711 OCTEON_CN2360_25GB_SUBSYS_ID) { 3712 cur_ver = OCT_FW_VER(octeon_dev->fw_info.ver.maj, 3713 octeon_dev->fw_info.ver.min, 3714 octeon_dev->fw_info.ver.rev); 3715 3716 /* speed control unsupported in f/w older than 1.7.2 */ 3717 if (cur_ver < OCT_FW_VER(1, 7, 2)) { 3718 dev_info(&octeon_dev->pci_dev->dev, 3719 "speed setting not supported by f/w."); 3720 octeon_dev->speed_setting = 25; 3721 octeon_dev->no_speed_setting = 1; 3722 } else { 3723 liquidio_get_speed(lio); 3724 } 3725 3726 if (octeon_dev->speed_setting == 0) { 3727 octeon_dev->speed_setting = 25; 3728 octeon_dev->no_speed_setting = 1; 3729 } 3730 } else { 3731 octeon_dev->no_speed_setting = 1; 3732 octeon_dev->speed_setting = 10; 3733 } 3734 octeon_dev->speed_boot = octeon_dev->speed_setting; 3735 3736 /* don't read FEC setting if unsupported by f/w (see above) */ 3737 if (octeon_dev->speed_boot == 25 && 3738 !octeon_dev->no_speed_setting) { 3739 liquidio_get_fec(lio); 3740 octeon_dev->props[lio->ifidx].fec_boot = 3741 octeon_dev->props[lio->ifidx].fec; 3742 } 3743 } 3744 3745 device_lock(&octeon_dev->pci_dev->dev); 3746 devlink = devlink_alloc(&liquidio_devlink_ops, 3747 sizeof(struct lio_devlink_priv), 3748 &octeon_dev->pci_dev->dev); 3749 if (!devlink) { 3750 device_unlock(&octeon_dev->pci_dev->dev); 3751 dev_err(&octeon_dev->pci_dev->dev, "devlink alloc failed\n"); 3752 goto setup_nic_dev_free; 3753 } 3754 3755 lio_devlink = devlink_priv(devlink); 3756 lio_devlink->oct = octeon_dev; 3757 3758 octeon_dev->devlink = devlink; 3759 octeon_dev->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY; 3760 devlink_register(devlink); 3761 device_unlock(&octeon_dev->pci_dev->dev); 3762 3763 return 0; 3764 3765 setup_nic_dev_free: 3766 3767 while (i--) { 3768 dev_err(&octeon_dev->pci_dev->dev, 3769 "NIC ifidx:%d Setup failed\n", i); 3770 liquidio_destroy_nic_device(octeon_dev, i); 3771 } 3772 3773 setup_nic_dev_done: 3774 3775 return -ENODEV; 3776 } 3777 3778 #ifdef CONFIG_PCI_IOV 3779 static int octeon_enable_sriov(struct octeon_device *oct) 3780 { 3781 unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced; 3782 struct pci_dev *vfdev; 3783 int err; 3784 u32 u; 3785 3786 if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) { 3787 err = pci_enable_sriov(oct->pci_dev, 3788 oct->sriov_info.num_vfs_alloced); 3789 if (err) { 3790 dev_err(&oct->pci_dev->dev, 3791 "OCTEON: Failed to enable PCI sriov: %d\n", 3792 err); 3793 oct->sriov_info.num_vfs_alloced = 0; 3794 return err; 3795 } 3796 oct->sriov_info.sriov_enabled = 1; 3797 3798 /* init lookup table that maps DPI ring number to VF pci_dev 3799 * struct pointer 3800 */ 3801 u = 0; 3802 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3803 OCTEON_CN23XX_VF_VID, NULL); 3804 while (vfdev) { 3805 if (vfdev->is_virtfn && 3806 (vfdev->physfn == oct->pci_dev)) { 3807 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = 3808 vfdev; 3809 u += oct->sriov_info.rings_per_vf; 3810 } 3811 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3812 OCTEON_CN23XX_VF_VID, vfdev); 3813 } 3814 } 3815 3816 return num_vfs_alloced; 3817 } 3818 3819 static int lio_pci_sriov_disable(struct octeon_device *oct) 3820 { 3821 int u; 3822 3823 if (pci_vfs_assigned(oct->pci_dev)) { 3824 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n"); 3825 return -EPERM; 3826 } 3827 3828 pci_disable_sriov(oct->pci_dev); 3829 3830 u = 0; 3831 while (u < MAX_POSSIBLE_VFS) { 3832 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL; 3833 u += oct->sriov_info.rings_per_vf; 3834 } 3835 3836 oct->sriov_info.num_vfs_alloced = 0; 3837 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n", 3838 oct->pf_num); 3839 3840 return 0; 3841 } 3842 3843 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs) 3844 { 3845 struct octeon_device *oct = pci_get_drvdata(dev); 3846 int ret = 0; 3847 3848 if ((num_vfs == oct->sriov_info.num_vfs_alloced) && 3849 (oct->sriov_info.sriov_enabled)) { 3850 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n", 3851 oct->pf_num, num_vfs); 3852 return 0; 3853 } 3854 3855 if (!num_vfs) { 3856 lio_vf_rep_destroy(oct); 3857 ret = lio_pci_sriov_disable(oct); 3858 } else if (num_vfs > oct->sriov_info.max_vfs) { 3859 dev_err(&oct->pci_dev->dev, 3860 "OCTEON: Max allowed VFs:%d user requested:%d", 3861 oct->sriov_info.max_vfs, num_vfs); 3862 ret = -EPERM; 3863 } else { 3864 oct->sriov_info.num_vfs_alloced = num_vfs; 3865 ret = octeon_enable_sriov(oct); 3866 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n", 3867 oct->pf_num, num_vfs); 3868 ret = lio_vf_rep_create(oct); 3869 if (ret) 3870 dev_info(&oct->pci_dev->dev, 3871 "vf representor create failed"); 3872 } 3873 3874 return ret; 3875 } 3876 #endif 3877 3878 /** 3879 * liquidio_init_nic_module - initialize the NIC 3880 * @oct: octeon device 3881 * 3882 * This initialization routine is called once the Octeon device application is 3883 * up and running 3884 */ 3885 static int liquidio_init_nic_module(struct octeon_device *oct) 3886 { 3887 int i, retval = 0; 3888 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct)); 3889 3890 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n"); 3891 3892 /* only default iq and oq were initialized 3893 * initialize the rest as well 3894 */ 3895 /* run port_config command for each port */ 3896 oct->ifcount = num_nic_ports; 3897 3898 memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports); 3899 3900 for (i = 0; i < MAX_OCTEON_LINKS; i++) 3901 oct->props[i].gmxport = -1; 3902 3903 retval = setup_nic_devices(oct); 3904 if (retval) { 3905 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n"); 3906 goto octnet_init_failure; 3907 } 3908 3909 /* Call vf_rep_modinit if the firmware is switchdev capable 3910 * and do it from the first liquidio function probed. 3911 */ 3912 if (!oct->octeon_id && 3913 oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) { 3914 retval = lio_vf_rep_modinit(); 3915 if (retval) { 3916 liquidio_stop_nic_module(oct); 3917 goto octnet_init_failure; 3918 } 3919 } 3920 3921 liquidio_ptp_init(oct); 3922 3923 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n"); 3924 3925 return retval; 3926 3927 octnet_init_failure: 3928 3929 oct->ifcount = 0; 3930 3931 return retval; 3932 } 3933 3934 /** 3935 * nic_starter - finish init 3936 * @work: work struct work_struct 3937 * 3938 * starter callback that invokes the remaining initialization work after the NIC is up and running. 3939 */ 3940 static void nic_starter(struct work_struct *work) 3941 { 3942 struct octeon_device *oct; 3943 struct cavium_wk *wk = (struct cavium_wk *)work; 3944 3945 oct = (struct octeon_device *)wk->ctxptr; 3946 3947 if (atomic_read(&oct->status) == OCT_DEV_RUNNING) 3948 return; 3949 3950 /* If the status of the device is CORE_OK, the core 3951 * application has reported its application type. Call 3952 * any registered handlers now and move to the RUNNING 3953 * state. 3954 */ 3955 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) { 3956 schedule_delayed_work(&oct->nic_poll_work.work, 3957 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 3958 return; 3959 } 3960 3961 atomic_set(&oct->status, OCT_DEV_RUNNING); 3962 3963 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) { 3964 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n"); 3965 3966 if (liquidio_init_nic_module(oct)) 3967 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n"); 3968 else 3969 handshake[oct->octeon_id].started_ok = 1; 3970 } else { 3971 dev_err(&oct->pci_dev->dev, 3972 "Unexpected application running on NIC (%d). Check firmware.\n", 3973 oct->app_mode); 3974 } 3975 3976 complete(&handshake[oct->octeon_id].started); 3977 } 3978 3979 static int 3980 octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf) 3981 { 3982 struct octeon_device *oct = (struct octeon_device *)buf; 3983 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3984 int i, notice, vf_idx; 3985 bool cores_crashed; 3986 u64 *data, vf_num; 3987 3988 notice = recv_pkt->rh.r.ossp; 3989 data = (u64 *)(get_rbd(recv_pkt->buffer_ptr[0]) + OCT_DROQ_INFO_SIZE); 3990 3991 /* the first 64-bit word of data is the vf_num */ 3992 vf_num = data[0]; 3993 octeon_swap_8B_data(&vf_num, 1); 3994 vf_idx = (int)vf_num - 1; 3995 3996 cores_crashed = READ_ONCE(oct->cores_crashed); 3997 3998 if (notice == VF_DRV_LOADED) { 3999 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) { 4000 oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx); 4001 dev_info(&oct->pci_dev->dev, 4002 "driver for VF%d was loaded\n", vf_idx); 4003 if (!cores_crashed) 4004 try_module_get(THIS_MODULE); 4005 } 4006 } else if (notice == VF_DRV_REMOVED) { 4007 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) { 4008 oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx); 4009 dev_info(&oct->pci_dev->dev, 4010 "driver for VF%d was removed\n", vf_idx); 4011 if (!cores_crashed) 4012 module_put(THIS_MODULE); 4013 } 4014 } else if (notice == VF_DRV_MACADDR_CHANGED) { 4015 u8 *b = (u8 *)&data[1]; 4016 4017 oct->sriov_info.vf_macaddr[vf_idx] = data[1]; 4018 dev_info(&oct->pci_dev->dev, 4019 "VF driver changed VF%d's MAC address to %pM\n", 4020 vf_idx, b + 2); 4021 } 4022 4023 for (i = 0; i < recv_pkt->buffer_count; i++) 4024 recv_buffer_free(recv_pkt->buffer_ptr[i]); 4025 octeon_free_recv_info(recv_info); 4026 4027 return 0; 4028 } 4029 4030 /** 4031 * octeon_device_init - Device initialization for each Octeon device that is probed 4032 * @octeon_dev: octeon device 4033 */ 4034 static int octeon_device_init(struct octeon_device *octeon_dev) 4035 { 4036 int j, ret; 4037 char bootcmd[] = "\n"; 4038 char *dbg_enb = NULL; 4039 enum lio_fw_state fw_state; 4040 struct octeon_device_priv *oct_priv = 4041 (struct octeon_device_priv *)octeon_dev->priv; 4042 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE); 4043 4044 /* Enable access to the octeon device and make its DMA capability 4045 * known to the OS. 4046 */ 4047 if (octeon_pci_os_setup(octeon_dev)) 4048 return 1; 4049 4050 atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE); 4051 4052 /* Identify the Octeon type and map the BAR address space. */ 4053 if (octeon_chip_specific_setup(octeon_dev)) { 4054 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n"); 4055 return 1; 4056 } 4057 4058 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE); 4059 4060 /* Only add a reference after setting status 'OCT_DEV_PCI_MAP_DONE', 4061 * since that is what is required for the reference to be removed 4062 * during de-initialization (see 'octeon_destroy_resources'). 4063 */ 4064 octeon_register_device(octeon_dev, octeon_dev->pci_dev->bus->number, 4065 PCI_SLOT(octeon_dev->pci_dev->devfn), 4066 PCI_FUNC(octeon_dev->pci_dev->devfn), 4067 true); 4068 4069 octeon_dev->app_mode = CVM_DRV_INVALID_APP; 4070 4071 /* CN23XX supports preloaded firmware if the following is true: 4072 * 4073 * The adapter indicates that firmware is currently running AND 4074 * 'fw_type' is 'auto'. 4075 * 4076 * (default state is NEEDS_TO_BE_LOADED, override it if appropriate). 4077 */ 4078 if (OCTEON_CN23XX_PF(octeon_dev) && 4079 cn23xx_fw_loaded(octeon_dev) && fw_type_is_auto()) { 4080 atomic_cmpxchg(octeon_dev->adapter_fw_state, 4081 FW_NEEDS_TO_BE_LOADED, FW_IS_PRELOADED); 4082 } 4083 4084 /* If loading firmware, only first device of adapter needs to do so. */ 4085 fw_state = atomic_cmpxchg(octeon_dev->adapter_fw_state, 4086 FW_NEEDS_TO_BE_LOADED, 4087 FW_IS_BEING_LOADED); 4088 4089 /* Here, [local variable] 'fw_state' is set to one of: 4090 * 4091 * FW_IS_PRELOADED: No firmware is to be loaded (see above) 4092 * FW_NEEDS_TO_BE_LOADED: The driver's first instance will load 4093 * firmware to the adapter. 4094 * FW_IS_BEING_LOADED: The driver's second instance will not load 4095 * firmware to the adapter. 4096 */ 4097 4098 /* Prior to f/w load, perform a soft reset of the Octeon device; 4099 * if error resetting, return w/error. 4100 */ 4101 if (fw_state == FW_NEEDS_TO_BE_LOADED) 4102 if (octeon_dev->fn_list.soft_reset(octeon_dev)) 4103 return 1; 4104 4105 /* Initialize the dispatch mechanism used to push packets arriving on 4106 * Octeon Output queues. 4107 */ 4108 if (octeon_init_dispatch_list(octeon_dev)) 4109 return 1; 4110 4111 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4112 OPCODE_NIC_CORE_DRV_ACTIVE, 4113 octeon_core_drv_init, 4114 octeon_dev); 4115 4116 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4117 OPCODE_NIC_VF_DRV_NOTICE, 4118 octeon_recv_vf_drv_notice, octeon_dev); 4119 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter); 4120 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev; 4121 schedule_delayed_work(&octeon_dev->nic_poll_work.work, 4122 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 4123 4124 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE); 4125 4126 if (octeon_set_io_queues_off(octeon_dev)) { 4127 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n"); 4128 return 1; 4129 } 4130 4131 if (OCTEON_CN23XX_PF(octeon_dev)) { 4132 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4133 if (ret) { 4134 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n"); 4135 return ret; 4136 } 4137 } 4138 4139 /* Initialize soft command buffer pool 4140 */ 4141 if (octeon_setup_sc_buffer_pool(octeon_dev)) { 4142 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n"); 4143 return 1; 4144 } 4145 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE); 4146 4147 /* Setup the data structures that manage this Octeon's Input queues. */ 4148 if (octeon_setup_instr_queues(octeon_dev)) { 4149 dev_err(&octeon_dev->pci_dev->dev, 4150 "instruction queue initialization failed\n"); 4151 return 1; 4152 } 4153 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE); 4154 4155 /* Initialize lists to manage the requests of different types that 4156 * arrive from user & kernel applications for this octeon device. 4157 */ 4158 if (octeon_setup_response_list(octeon_dev)) { 4159 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n"); 4160 return 1; 4161 } 4162 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE); 4163 4164 if (octeon_setup_output_queues(octeon_dev)) { 4165 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n"); 4166 return 1; 4167 } 4168 4169 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE); 4170 4171 if (OCTEON_CN23XX_PF(octeon_dev)) { 4172 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) { 4173 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n"); 4174 return 1; 4175 } 4176 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE); 4177 4178 if (octeon_allocate_ioq_vector 4179 (octeon_dev, 4180 octeon_dev->sriov_info.num_pf_rings)) { 4181 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n"); 4182 return 1; 4183 } 4184 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE); 4185 4186 } else { 4187 /* The input and output queue registers were setup earlier (the 4188 * queues were not enabled). Any additional registers 4189 * that need to be programmed should be done now. 4190 */ 4191 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4192 if (ret) { 4193 dev_err(&octeon_dev->pci_dev->dev, 4194 "Failed to configure device registers\n"); 4195 return ret; 4196 } 4197 } 4198 4199 /* Initialize the tasklet that handles output queue packet processing.*/ 4200 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n"); 4201 tasklet_setup(&oct_priv->droq_tasklet, octeon_droq_bh); 4202 4203 /* Setup the interrupt handler and record the INT SUM register address 4204 */ 4205 if (octeon_setup_interrupt(octeon_dev, 4206 octeon_dev->sriov_info.num_pf_rings)) 4207 return 1; 4208 4209 /* Enable Octeon device interrupts */ 4210 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR); 4211 4212 atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE); 4213 4214 /* Send Credit for Octeon Output queues. Credits are always sent BEFORE 4215 * the output queue is enabled. 4216 * This ensures that we'll receive the f/w CORE DRV_ACTIVE message in 4217 * case we've configured CN23XX_SLI_GBL_CONTROL[NOPTR_D] = 0. 4218 * Otherwise, it is possible that the DRV_ACTIVE message will be sent 4219 * before any credits have been issued, causing the ring to be reset 4220 * (and the f/w appear to never have started). 4221 */ 4222 for (j = 0; j < octeon_dev->num_oqs; j++) 4223 writel(octeon_dev->droq[j]->max_count, 4224 octeon_dev->droq[j]->pkts_credit_reg); 4225 4226 /* Enable the input and output queues for this Octeon device */ 4227 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev); 4228 if (ret) { 4229 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues"); 4230 return ret; 4231 } 4232 4233 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE); 4234 4235 if (fw_state == FW_NEEDS_TO_BE_LOADED) { 4236 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n"); 4237 if (!ddr_timeout) { 4238 dev_info(&octeon_dev->pci_dev->dev, 4239 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n"); 4240 } 4241 4242 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS); 4243 4244 /* Wait for the octeon to initialize DDR after the soft-reset.*/ 4245 while (!ddr_timeout) { 4246 set_current_state(TASK_INTERRUPTIBLE); 4247 if (schedule_timeout(HZ / 10)) { 4248 /* user probably pressed Control-C */ 4249 return 1; 4250 } 4251 } 4252 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout); 4253 if (ret) { 4254 dev_err(&octeon_dev->pci_dev->dev, 4255 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n", 4256 ret); 4257 return 1; 4258 } 4259 4260 if (octeon_wait_for_bootloader(octeon_dev, 1000)) { 4261 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n"); 4262 return 1; 4263 } 4264 4265 /* Divert uboot to take commands from host instead. */ 4266 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50); 4267 4268 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n"); 4269 ret = octeon_init_consoles(octeon_dev); 4270 if (ret) { 4271 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n"); 4272 return 1; 4273 } 4274 /* If console debug enabled, specify empty string to use default 4275 * enablement ELSE specify NULL string for 'disabled'. 4276 */ 4277 dbg_enb = octeon_console_debug_enabled(0) ? "" : NULL; 4278 ret = octeon_add_console(octeon_dev, 0, dbg_enb); 4279 if (ret) { 4280 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n"); 4281 return 1; 4282 } else if (octeon_console_debug_enabled(0)) { 4283 /* If console was added AND we're logging console output 4284 * then set our console print function. 4285 */ 4286 octeon_dev->console[0].print = octeon_dbg_console_print; 4287 } 4288 4289 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE); 4290 4291 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n"); 4292 ret = load_firmware(octeon_dev); 4293 if (ret) { 4294 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n"); 4295 return 1; 4296 } 4297 4298 atomic_set(octeon_dev->adapter_fw_state, FW_HAS_BEEN_LOADED); 4299 } 4300 4301 handshake[octeon_dev->octeon_id].init_ok = 1; 4302 complete(&handshake[octeon_dev->octeon_id].init); 4303 4304 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK); 4305 oct_priv->dev = octeon_dev; 4306 4307 return 0; 4308 } 4309 4310 /** 4311 * octeon_dbg_console_print - Debug console print function 4312 * @oct: octeon device 4313 * @console_num: console number 4314 * @prefix: first portion of line to display 4315 * @suffix: second portion of line to display 4316 * 4317 * The OCTEON debug console outputs entire lines (excluding '\n'). 4318 * Normally, the line will be passed in the 'prefix' parameter. 4319 * However, due to buffering, it is possible for a line to be split into two 4320 * parts, in which case they will be passed as the 'prefix' parameter and 4321 * 'suffix' parameter. 4322 */ 4323 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 4324 char *prefix, char *suffix) 4325 { 4326 if (prefix && suffix) 4327 dev_info(&oct->pci_dev->dev, "%u: %s%s\n", console_num, prefix, 4328 suffix); 4329 else if (prefix) 4330 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, prefix); 4331 else if (suffix) 4332 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, suffix); 4333 4334 return 0; 4335 } 4336 4337 /** 4338 * liquidio_exit - Exits the module 4339 */ 4340 static void __exit liquidio_exit(void) 4341 { 4342 liquidio_deinit_pci(); 4343 4344 pr_info("LiquidIO network module is now unloaded\n"); 4345 } 4346 4347 module_init(liquidio_init); 4348 module_exit(liquidio_exit); 4349