1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2018 Chelsio Communications, Inc. */
3 
4 #ifndef __CHCR_IPSEC_H__
5 #define __CHCR_IPSEC_H__
6 
7 #include <crypto/algapi.h>
8 #include "t4_hw.h"
9 #include "cxgb4.h"
10 #include "t4_msg.h"
11 #include "cxgb4_uld.h"
12 
13 #include "chcr_core.h"
14 #include "chcr_algo.h"
15 #include "chcr_crypto.h"
16 
17 #define CHIPSEC_DRV_MODULE_NAME "ch_ipsec"
18 #define CHIPSEC_DRV_VERSION "1.0.0.0-ko"
19 #define CHIPSEC_DRV_DESC "Chelsio T6 Crypto Ipsec offload Driver"
20 
21 struct ipsec_uld_ctx {
22 	struct list_head entry;
23 	struct cxgb4_lld_info lldi;
24 };
25 
26 struct chcr_ipsec_req {
27 	struct ulp_txpkt ulptx;
28 	struct ulptx_idata sc_imm;
29 	struct cpl_tx_sec_pdu sec_cpl;
30 	struct _key_ctx key_ctx;
31 };
32 
33 struct chcr_ipsec_wr {
34 	struct fw_ulptx_wr wreq;
35 	struct chcr_ipsec_req req;
36 };
37 
38 #define ESN_IV_INSERT_OFFSET 12
39 struct chcr_ipsec_aadiv {
40 	__be32 spi;
41 	u8 seq_no[8];
42 	u8 iv[8];
43 };
44 
45 struct ipsec_sa_entry {
46 	int hmac_ctrl;
47 	u16 esn;
48 	u16 resv;
49 	unsigned int enckey_len;
50 	unsigned int kctx_len;
51 	unsigned int authsize;
52 	__be32 key_ctx_hdr;
53 	char salt[MAX_SALT];
54 	char key[2 * AES_MAX_KEY_SIZE];
55 };
56 
57 #endif /* __CHCR_IPSEC_H__ */
58 
59