1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell Octeon EP (EndPoint) Ethernet Driver
3  *
4  * Copyright (C) 2020 Marvell.
5  *
6  */
7 
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/netdevice.h>
12 #include <linux/etherdevice.h>
13 #include <linux/rtnetlink.h>
14 #include <linux/vmalloc.h>
15 
16 #include "octep_config.h"
17 #include "octep_main.h"
18 #include "octep_ctrl_net.h"
19 
20 #define OCTEP_INTR_POLL_TIME_MSECS    100
21 struct workqueue_struct *octep_wq;
22 
23 /* Supported Devices */
24 static const struct pci_device_id octep_pci_id_tbl[] = {
25 	{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN93_PF)},
26 	{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF95N_PF)},
27 	{0, },
28 };
29 MODULE_DEVICE_TABLE(pci, octep_pci_id_tbl);
30 
31 MODULE_AUTHOR("Veerasenareddy Burru <vburru@marvell.com>");
32 MODULE_DESCRIPTION(OCTEP_DRV_STRING);
33 MODULE_LICENSE("GPL");
34 
35 /**
36  * octep_alloc_ioq_vectors() - Allocate Tx/Rx Queue interrupt info.
37  *
38  * @oct: Octeon device private data structure.
39  *
40  * Allocate resources to hold per Tx/Rx queue interrupt info.
41  * This is the information passed to interrupt handler, from which napi poll
42  * is scheduled and includes quick access to private data of Tx/Rx queue
43  * corresponding to the interrupt being handled.
44  *
45  * Return: 0, on successful allocation of resources for all queue interrupts.
46  *         -1, if failed to allocate any resource.
47  */
48 static int octep_alloc_ioq_vectors(struct octep_device *oct)
49 {
50 	int i;
51 	struct octep_ioq_vector *ioq_vector;
52 
53 	for (i = 0; i < oct->num_oqs; i++) {
54 		oct->ioq_vector[i] = vzalloc(sizeof(*oct->ioq_vector[i]));
55 		if (!oct->ioq_vector[i])
56 			goto free_ioq_vector;
57 
58 		ioq_vector = oct->ioq_vector[i];
59 		ioq_vector->iq = oct->iq[i];
60 		ioq_vector->oq = oct->oq[i];
61 		ioq_vector->octep_dev = oct;
62 	}
63 
64 	dev_info(&oct->pdev->dev, "Allocated %d IOQ vectors\n", oct->num_oqs);
65 	return 0;
66 
67 free_ioq_vector:
68 	while (i) {
69 		i--;
70 		vfree(oct->ioq_vector[i]);
71 		oct->ioq_vector[i] = NULL;
72 	}
73 	return -1;
74 }
75 
76 /**
77  * octep_free_ioq_vectors() - Free Tx/Rx Queue interrupt vector info.
78  *
79  * @oct: Octeon device private data structure.
80  */
81 static void octep_free_ioq_vectors(struct octep_device *oct)
82 {
83 	int i;
84 
85 	for (i = 0; i < oct->num_oqs; i++) {
86 		if (oct->ioq_vector[i]) {
87 			vfree(oct->ioq_vector[i]);
88 			oct->ioq_vector[i] = NULL;
89 		}
90 	}
91 	netdev_info(oct->netdev, "Freed IOQ Vectors\n");
92 }
93 
94 /**
95  * octep_enable_msix_range() - enable MSI-x interrupts.
96  *
97  * @oct: Octeon device private data structure.
98  *
99  * Allocate and enable all MSI-x interrupts (queue and non-queue interrupts)
100  * for the Octeon device.
101  *
102  * Return: 0, on successfully enabling all MSI-x interrupts.
103  *         -1, if failed to enable any MSI-x interrupt.
104  */
105 static int octep_enable_msix_range(struct octep_device *oct)
106 {
107 	int num_msix, msix_allocated;
108 	int i;
109 
110 	/* Generic interrupts apart from input/output queues */
111 	num_msix = oct->num_oqs + CFG_GET_NON_IOQ_MSIX(oct->conf);
112 	oct->msix_entries = kcalloc(num_msix,
113 				    sizeof(struct msix_entry), GFP_KERNEL);
114 	if (!oct->msix_entries)
115 		goto msix_alloc_err;
116 
117 	for (i = 0; i < num_msix; i++)
118 		oct->msix_entries[i].entry = i;
119 
120 	msix_allocated = pci_enable_msix_range(oct->pdev, oct->msix_entries,
121 					       num_msix, num_msix);
122 	if (msix_allocated != num_msix) {
123 		dev_err(&oct->pdev->dev,
124 			"Failed to enable %d msix irqs; got only %d\n",
125 			num_msix, msix_allocated);
126 		goto enable_msix_err;
127 	}
128 	oct->num_irqs = msix_allocated;
129 	dev_info(&oct->pdev->dev, "MSI-X enabled successfully\n");
130 
131 	return 0;
132 
133 enable_msix_err:
134 	if (msix_allocated > 0)
135 		pci_disable_msix(oct->pdev);
136 	kfree(oct->msix_entries);
137 	oct->msix_entries = NULL;
138 msix_alloc_err:
139 	return -1;
140 }
141 
142 /**
143  * octep_disable_msix() - disable MSI-x interrupts.
144  *
145  * @oct: Octeon device private data structure.
146  *
147  * Disable MSI-x on the Octeon device.
148  */
149 static void octep_disable_msix(struct octep_device *oct)
150 {
151 	pci_disable_msix(oct->pdev);
152 	kfree(oct->msix_entries);
153 	oct->msix_entries = NULL;
154 	dev_info(&oct->pdev->dev, "Disabled MSI-X\n");
155 }
156 
157 /**
158  * octep_oei_intr_handler() - common handler for output endpoint interrupts.
159  *
160  * @irq: Interrupt number.
161  * @data: interrupt data.
162  *
163  * this is common handler for all output endpoint interrupts.
164  */
165 static irqreturn_t octep_oei_intr_handler(int irq, void *data)
166 {
167 	struct octep_device *oct = data;
168 
169 	return oct->hw_ops.oei_intr_handler(oct);
170 }
171 
172 /**
173  * octep_ire_intr_handler() - common handler for input ring error interrupts.
174  *
175  * @irq: Interrupt number.
176  * @data: interrupt data.
177  *
178  * this is common handler for input ring error interrupts.
179  */
180 static irqreturn_t octep_ire_intr_handler(int irq, void *data)
181 {
182 	struct octep_device *oct = data;
183 
184 	return oct->hw_ops.ire_intr_handler(oct);
185 }
186 
187 /**
188  * octep_ore_intr_handler() - common handler for output ring error interrupts.
189  *
190  * @irq: Interrupt number.
191  * @data: interrupt data.
192  *
193  * this is common handler for output ring error interrupts.
194  */
195 static irqreturn_t octep_ore_intr_handler(int irq, void *data)
196 {
197 	struct octep_device *oct = data;
198 
199 	return oct->hw_ops.ore_intr_handler(oct);
200 }
201 
202 /**
203  * octep_vfire_intr_handler() - common handler for vf input ring error interrupts.
204  *
205  * @irq: Interrupt number.
206  * @data: interrupt data.
207  *
208  * this is common handler for vf input ring error interrupts.
209  */
210 static irqreturn_t octep_vfire_intr_handler(int irq, void *data)
211 {
212 	struct octep_device *oct = data;
213 
214 	return oct->hw_ops.vfire_intr_handler(oct);
215 }
216 
217 /**
218  * octep_vfore_intr_handler() - common handler for vf output ring error interrupts.
219  *
220  * @irq: Interrupt number.
221  * @data: interrupt data.
222  *
223  * this is common handler for vf output ring error interrupts.
224  */
225 static irqreturn_t octep_vfore_intr_handler(int irq, void *data)
226 {
227 	struct octep_device *oct = data;
228 
229 	return oct->hw_ops.vfore_intr_handler(oct);
230 }
231 
232 /**
233  * octep_dma_intr_handler() - common handler for dpi dma related interrupts.
234  *
235  * @irq: Interrupt number.
236  * @data: interrupt data.
237  *
238  * this is common handler for dpi dma related interrupts.
239  */
240 static irqreturn_t octep_dma_intr_handler(int irq, void *data)
241 {
242 	struct octep_device *oct = data;
243 
244 	return oct->hw_ops.dma_intr_handler(oct);
245 }
246 
247 /**
248  * octep_dma_vf_intr_handler() - common handler for dpi dma transaction error interrupts for VFs.
249  *
250  * @irq: Interrupt number.
251  * @data: interrupt data.
252  *
253  * this is common handler for dpi dma transaction error interrupts for VFs.
254  */
255 static irqreturn_t octep_dma_vf_intr_handler(int irq, void *data)
256 {
257 	struct octep_device *oct = data;
258 
259 	return oct->hw_ops.dma_vf_intr_handler(oct);
260 }
261 
262 /**
263  * octep_pp_vf_intr_handler() - common handler for pp transaction error interrupts for VFs.
264  *
265  * @irq: Interrupt number.
266  * @data: interrupt data.
267  *
268  * this is common handler for pp transaction error interrupts for VFs.
269  */
270 static irqreturn_t octep_pp_vf_intr_handler(int irq, void *data)
271 {
272 	struct octep_device *oct = data;
273 
274 	return oct->hw_ops.pp_vf_intr_handler(oct);
275 }
276 
277 /**
278  * octep_misc_intr_handler() - common handler for mac related interrupts.
279  *
280  * @irq: Interrupt number.
281  * @data: interrupt data.
282  *
283  * this is common handler for mac related interrupts.
284  */
285 static irqreturn_t octep_misc_intr_handler(int irq, void *data)
286 {
287 	struct octep_device *oct = data;
288 
289 	return oct->hw_ops.misc_intr_handler(oct);
290 }
291 
292 /**
293  * octep_rsvd_intr_handler() - common handler for reserved interrupts (future use).
294  *
295  * @irq: Interrupt number.
296  * @data: interrupt data.
297  *
298  * this is common handler for all reserved interrupts.
299  */
300 static irqreturn_t octep_rsvd_intr_handler(int irq, void *data)
301 {
302 	struct octep_device *oct = data;
303 
304 	return oct->hw_ops.rsvd_intr_handler(oct);
305 }
306 
307 /**
308  * octep_ioq_intr_handler() - handler for all Tx/Rx queue interrupts.
309  *
310  * @irq: Interrupt number.
311  * @data: interrupt data contains pointers to Tx/Rx queue private data
312  *         and correspong NAPI context.
313  *
314  * this is common handler for all non-queue (generic) interrupts.
315  */
316 static irqreturn_t octep_ioq_intr_handler(int irq, void *data)
317 {
318 	struct octep_ioq_vector *ioq_vector = data;
319 	struct octep_device *oct = ioq_vector->octep_dev;
320 
321 	return oct->hw_ops.ioq_intr_handler(ioq_vector);
322 }
323 
324 /**
325  * octep_request_irqs() - Register interrupt handlers.
326  *
327  * @oct: Octeon device private data structure.
328  *
329  * Register handlers for all queue and non-queue interrupts.
330  *
331  * Return: 0, on successful registration of all interrupt handlers.
332  *         -1, on any error.
333  */
334 static int octep_request_irqs(struct octep_device *oct)
335 {
336 	struct net_device *netdev = oct->netdev;
337 	struct octep_ioq_vector *ioq_vector;
338 	struct msix_entry *msix_entry;
339 	char **non_ioq_msix_names;
340 	int num_non_ioq_msix;
341 	int ret, i, j;
342 
343 	num_non_ioq_msix = CFG_GET_NON_IOQ_MSIX(oct->conf);
344 	non_ioq_msix_names = CFG_GET_NON_IOQ_MSIX_NAMES(oct->conf);
345 
346 	oct->non_ioq_irq_names = kcalloc(num_non_ioq_msix,
347 					 OCTEP_MSIX_NAME_SIZE, GFP_KERNEL);
348 	if (!oct->non_ioq_irq_names)
349 		goto alloc_err;
350 
351 	/* First few MSI-X interrupts are non-queue interrupts */
352 	for (i = 0; i < num_non_ioq_msix; i++) {
353 		char *irq_name;
354 
355 		irq_name = &oct->non_ioq_irq_names[i * OCTEP_MSIX_NAME_SIZE];
356 		msix_entry = &oct->msix_entries[i];
357 
358 		snprintf(irq_name, OCTEP_MSIX_NAME_SIZE,
359 			 "%s-%s", netdev->name, non_ioq_msix_names[i]);
360 		if (!strncmp(non_ioq_msix_names[i], "epf_oei_rint",
361 			     strlen("epf_oei_rint"))) {
362 			ret = request_irq(msix_entry->vector,
363 					  octep_oei_intr_handler, 0,
364 					  irq_name, oct);
365 		} else if (!strncmp(non_ioq_msix_names[i], "epf_ire_rint",
366 			   strlen("epf_ire_rint"))) {
367 			ret = request_irq(msix_entry->vector,
368 					  octep_ire_intr_handler, 0,
369 					  irq_name, oct);
370 		} else if (!strncmp(non_ioq_msix_names[i], "epf_ore_rint",
371 			   strlen("epf_ore_rint"))) {
372 			ret = request_irq(msix_entry->vector,
373 					  octep_ore_intr_handler, 0,
374 					  irq_name, oct);
375 		} else if (!strncmp(non_ioq_msix_names[i], "epf_vfire_rint",
376 			   strlen("epf_vfire_rint"))) {
377 			ret = request_irq(msix_entry->vector,
378 					  octep_vfire_intr_handler, 0,
379 					  irq_name, oct);
380 		} else if (!strncmp(non_ioq_msix_names[i], "epf_vfore_rint",
381 			   strlen("epf_vfore_rint"))) {
382 			ret = request_irq(msix_entry->vector,
383 					  octep_vfore_intr_handler, 0,
384 					  irq_name, oct);
385 		} else if (!strncmp(non_ioq_msix_names[i], "epf_dma_rint",
386 			   strlen("epf_dma_rint"))) {
387 			ret = request_irq(msix_entry->vector,
388 					  octep_dma_intr_handler, 0,
389 					  irq_name, oct);
390 		} else if (!strncmp(non_ioq_msix_names[i], "epf_dma_vf_rint",
391 			   strlen("epf_dma_vf_rint"))) {
392 			ret = request_irq(msix_entry->vector,
393 					  octep_dma_vf_intr_handler, 0,
394 					  irq_name, oct);
395 		} else if (!strncmp(non_ioq_msix_names[i], "epf_pp_vf_rint",
396 			   strlen("epf_pp_vf_rint"))) {
397 			ret = request_irq(msix_entry->vector,
398 					  octep_pp_vf_intr_handler, 0,
399 					  irq_name, oct);
400 		} else if (!strncmp(non_ioq_msix_names[i], "epf_misc_rint",
401 			   strlen("epf_misc_rint"))) {
402 			ret = request_irq(msix_entry->vector,
403 					  octep_misc_intr_handler, 0,
404 					  irq_name, oct);
405 		} else {
406 			ret = request_irq(msix_entry->vector,
407 					  octep_rsvd_intr_handler, 0,
408 					  irq_name, oct);
409 		}
410 
411 		if (ret) {
412 			netdev_err(netdev,
413 				   "request_irq failed for %s; err=%d",
414 				   irq_name, ret);
415 			goto non_ioq_irq_err;
416 		}
417 	}
418 
419 	/* Request IRQs for Tx/Rx queues */
420 	for (j = 0; j < oct->num_oqs; j++) {
421 		ioq_vector = oct->ioq_vector[j];
422 		msix_entry = &oct->msix_entries[j + num_non_ioq_msix];
423 
424 		snprintf(ioq_vector->name, sizeof(ioq_vector->name),
425 			 "%s-q%d", netdev->name, j);
426 		ret = request_irq(msix_entry->vector,
427 				  octep_ioq_intr_handler, 0,
428 				  ioq_vector->name, ioq_vector);
429 		if (ret) {
430 			netdev_err(netdev,
431 				   "request_irq failed for Q-%d; err=%d",
432 				   j, ret);
433 			goto ioq_irq_err;
434 		}
435 
436 		cpumask_set_cpu(j % num_online_cpus(),
437 				&ioq_vector->affinity_mask);
438 		irq_set_affinity_hint(msix_entry->vector,
439 				      &ioq_vector->affinity_mask);
440 	}
441 
442 	return 0;
443 ioq_irq_err:
444 	while (j) {
445 		--j;
446 		ioq_vector = oct->ioq_vector[j];
447 		msix_entry = &oct->msix_entries[j + num_non_ioq_msix];
448 
449 		irq_set_affinity_hint(msix_entry->vector, NULL);
450 		free_irq(msix_entry->vector, ioq_vector);
451 	}
452 non_ioq_irq_err:
453 	while (i) {
454 		--i;
455 		free_irq(oct->msix_entries[i].vector, oct);
456 	}
457 	kfree(oct->non_ioq_irq_names);
458 	oct->non_ioq_irq_names = NULL;
459 alloc_err:
460 	return -1;
461 }
462 
463 /**
464  * octep_free_irqs() - free all registered interrupts.
465  *
466  * @oct: Octeon device private data structure.
467  *
468  * Free all queue and non-queue interrupts of the Octeon device.
469  */
470 static void octep_free_irqs(struct octep_device *oct)
471 {
472 	int i;
473 
474 	/* First few MSI-X interrupts are non queue interrupts; free them */
475 	for (i = 0; i < CFG_GET_NON_IOQ_MSIX(oct->conf); i++)
476 		free_irq(oct->msix_entries[i].vector, oct);
477 	kfree(oct->non_ioq_irq_names);
478 
479 	/* Free IRQs for Input/Output (Tx/Rx) queues */
480 	for (i = CFG_GET_NON_IOQ_MSIX(oct->conf); i < oct->num_irqs; i++) {
481 		irq_set_affinity_hint(oct->msix_entries[i].vector, NULL);
482 		free_irq(oct->msix_entries[i].vector,
483 			 oct->ioq_vector[i - CFG_GET_NON_IOQ_MSIX(oct->conf)]);
484 	}
485 	netdev_info(oct->netdev, "IRQs freed\n");
486 }
487 
488 /**
489  * octep_setup_irqs() - setup interrupts for the Octeon device.
490  *
491  * @oct: Octeon device private data structure.
492  *
493  * Allocate data structures to hold per interrupt information, allocate/enable
494  * MSI-x interrupt and register interrupt handlers.
495  *
496  * Return: 0, on successful allocation and registration of all interrupts.
497  *         -1, on any error.
498  */
499 static int octep_setup_irqs(struct octep_device *oct)
500 {
501 	if (octep_alloc_ioq_vectors(oct))
502 		goto ioq_vector_err;
503 
504 	if (octep_enable_msix_range(oct))
505 		goto enable_msix_err;
506 
507 	if (octep_request_irqs(oct))
508 		goto request_irq_err;
509 
510 	return 0;
511 
512 request_irq_err:
513 	octep_disable_msix(oct);
514 enable_msix_err:
515 	octep_free_ioq_vectors(oct);
516 ioq_vector_err:
517 	return -1;
518 }
519 
520 /**
521  * octep_clean_irqs() - free all interrupts and its resources.
522  *
523  * @oct: Octeon device private data structure.
524  */
525 static void octep_clean_irqs(struct octep_device *oct)
526 {
527 	octep_free_irqs(oct);
528 	octep_disable_msix(oct);
529 	octep_free_ioq_vectors(oct);
530 }
531 
532 /**
533  * octep_enable_ioq_irq() - Enable MSI-x interrupt of a Tx/Rx queue.
534  *
535  * @iq: Octeon Tx queue data structure.
536  * @oq: Octeon Rx queue data structure.
537  */
538 static void octep_enable_ioq_irq(struct octep_iq *iq, struct octep_oq *oq)
539 {
540 	u32 pkts_pend = oq->pkts_pending;
541 
542 	netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no);
543 	if (iq->pkts_processed) {
544 		writel(iq->pkts_processed, iq->inst_cnt_reg);
545 		iq->pkt_in_done -= iq->pkts_processed;
546 		iq->pkts_processed = 0;
547 	}
548 	if (oq->last_pkt_count - pkts_pend) {
549 		writel(oq->last_pkt_count - pkts_pend, oq->pkts_sent_reg);
550 		oq->last_pkt_count = pkts_pend;
551 	}
552 
553 	/* Flush the previous wrties before writing to RESEND bit */
554 	wmb();
555 	writeq(1UL << OCTEP_OQ_INTR_RESEND_BIT, oq->pkts_sent_reg);
556 	writeq(1UL << OCTEP_IQ_INTR_RESEND_BIT, iq->inst_cnt_reg);
557 }
558 
559 /**
560  * octep_napi_poll() - NAPI poll function for Tx/Rx.
561  *
562  * @napi: pointer to napi context.
563  * @budget: max number of packets to be processed in single invocation.
564  */
565 static int octep_napi_poll(struct napi_struct *napi, int budget)
566 {
567 	struct octep_ioq_vector *ioq_vector =
568 		container_of(napi, struct octep_ioq_vector, napi);
569 	u32 tx_pending, rx_done;
570 
571 	tx_pending = octep_iq_process_completions(ioq_vector->iq, budget);
572 	rx_done = octep_oq_process_rx(ioq_vector->oq, budget);
573 
574 	/* need more polling if tx completion processing is still pending or
575 	 * processed at least 'budget' number of rx packets.
576 	 */
577 	if (tx_pending || rx_done >= budget)
578 		return budget;
579 
580 	napi_complete(napi);
581 	octep_enable_ioq_irq(ioq_vector->iq, ioq_vector->oq);
582 	return rx_done;
583 }
584 
585 /**
586  * octep_napi_add() - Add NAPI poll for all Tx/Rx queues.
587  *
588  * @oct: Octeon device private data structure.
589  */
590 static void octep_napi_add(struct octep_device *oct)
591 {
592 	int i;
593 
594 	for (i = 0; i < oct->num_oqs; i++) {
595 		netdev_dbg(oct->netdev, "Adding NAPI on Q-%d\n", i);
596 		netif_napi_add(oct->netdev, &oct->ioq_vector[i]->napi,
597 			       octep_napi_poll);
598 		oct->oq[i]->napi = &oct->ioq_vector[i]->napi;
599 	}
600 }
601 
602 /**
603  * octep_napi_delete() - delete NAPI poll callback for all Tx/Rx queues.
604  *
605  * @oct: Octeon device private data structure.
606  */
607 static void octep_napi_delete(struct octep_device *oct)
608 {
609 	int i;
610 
611 	for (i = 0; i < oct->num_oqs; i++) {
612 		netdev_dbg(oct->netdev, "Deleting NAPI on Q-%d\n", i);
613 		netif_napi_del(&oct->ioq_vector[i]->napi);
614 		oct->oq[i]->napi = NULL;
615 	}
616 }
617 
618 /**
619  * octep_napi_enable() - enable NAPI for all Tx/Rx queues.
620  *
621  * @oct: Octeon device private data structure.
622  */
623 static void octep_napi_enable(struct octep_device *oct)
624 {
625 	int i;
626 
627 	for (i = 0; i < oct->num_oqs; i++) {
628 		netdev_dbg(oct->netdev, "Enabling NAPI on Q-%d\n", i);
629 		napi_enable(&oct->ioq_vector[i]->napi);
630 	}
631 }
632 
633 /**
634  * octep_napi_disable() - disable NAPI for all Tx/Rx queues.
635  *
636  * @oct: Octeon device private data structure.
637  */
638 static void octep_napi_disable(struct octep_device *oct)
639 {
640 	int i;
641 
642 	for (i = 0; i < oct->num_oqs; i++) {
643 		netdev_dbg(oct->netdev, "Disabling NAPI on Q-%d\n", i);
644 		napi_disable(&oct->ioq_vector[i]->napi);
645 	}
646 }
647 
648 static void octep_link_up(struct net_device *netdev)
649 {
650 	netif_carrier_on(netdev);
651 	netif_tx_start_all_queues(netdev);
652 }
653 
654 /**
655  * octep_open() - start the octeon network device.
656  *
657  * @netdev: pointer to kernel network device.
658  *
659  * setup Tx/Rx queues, interrupts and enable hardware operation of Tx/Rx queues
660  * and interrupts..
661  *
662  * Return: 0, on successfully setting up device and bring it up.
663  *         -1, on any error.
664  */
665 static int octep_open(struct net_device *netdev)
666 {
667 	struct octep_device *oct = netdev_priv(netdev);
668 	int err, ret;
669 
670 	netdev_info(netdev, "Starting netdev ...\n");
671 	netif_carrier_off(netdev);
672 
673 	oct->hw_ops.reset_io_queues(oct);
674 
675 	if (octep_setup_iqs(oct))
676 		goto setup_iq_err;
677 	if (octep_setup_oqs(oct))
678 		goto setup_oq_err;
679 	if (octep_setup_irqs(oct))
680 		goto setup_irq_err;
681 
682 	err = netif_set_real_num_tx_queues(netdev, oct->num_oqs);
683 	if (err)
684 		goto set_queues_err;
685 	err = netif_set_real_num_rx_queues(netdev, oct->num_iqs);
686 	if (err)
687 		goto set_queues_err;
688 
689 	octep_napi_add(oct);
690 	octep_napi_enable(oct);
691 
692 	oct->link_info.admin_up = 1;
693 	octep_ctrl_net_set_rx_state(oct, OCTEP_CTRL_NET_INVALID_VFID, true,
694 				    false);
695 	octep_ctrl_net_set_link_status(oct, OCTEP_CTRL_NET_INVALID_VFID, true,
696 				       false);
697 	oct->poll_non_ioq_intr = false;
698 
699 	/* Enable the input and output queues for this Octeon device */
700 	oct->hw_ops.enable_io_queues(oct);
701 
702 	/* Enable Octeon device interrupts */
703 	oct->hw_ops.enable_interrupts(oct);
704 
705 	octep_oq_dbell_init(oct);
706 
707 	ret = octep_ctrl_net_get_link_status(oct, OCTEP_CTRL_NET_INVALID_VFID);
708 	if (ret > 0)
709 		octep_link_up(netdev);
710 
711 	return 0;
712 
713 set_queues_err:
714 	octep_clean_irqs(oct);
715 setup_irq_err:
716 	octep_free_oqs(oct);
717 setup_oq_err:
718 	octep_free_iqs(oct);
719 setup_iq_err:
720 	return -1;
721 }
722 
723 /**
724  * octep_stop() - stop the octeon network device.
725  *
726  * @netdev: pointer to kernel network device.
727  *
728  * stop the device Tx/Rx operations, bring down the link and
729  * free up all resources allocated for Tx/Rx queues and interrupts.
730  */
731 static int octep_stop(struct net_device *netdev)
732 {
733 	struct octep_device *oct = netdev_priv(netdev);
734 
735 	netdev_info(netdev, "Stopping the device ...\n");
736 
737 	octep_ctrl_net_set_link_status(oct, OCTEP_CTRL_NET_INVALID_VFID, false,
738 				       false);
739 	octep_ctrl_net_set_rx_state(oct, OCTEP_CTRL_NET_INVALID_VFID, false,
740 				    false);
741 
742 	/* Stop Tx from stack */
743 	netif_tx_stop_all_queues(netdev);
744 	netif_carrier_off(netdev);
745 	netif_tx_disable(netdev);
746 
747 	oct->link_info.admin_up = 0;
748 	oct->link_info.oper_up = 0;
749 
750 	oct->hw_ops.disable_interrupts(oct);
751 	octep_napi_disable(oct);
752 	octep_napi_delete(oct);
753 
754 	octep_clean_irqs(oct);
755 	octep_clean_iqs(oct);
756 
757 	oct->hw_ops.disable_io_queues(oct);
758 	oct->hw_ops.reset_io_queues(oct);
759 	octep_free_oqs(oct);
760 	octep_free_iqs(oct);
761 
762 	oct->poll_non_ioq_intr = true;
763 	queue_delayed_work(octep_wq, &oct->intr_poll_task,
764 			   msecs_to_jiffies(OCTEP_INTR_POLL_TIME_MSECS));
765 
766 	netdev_info(netdev, "Device stopped !!\n");
767 	return 0;
768 }
769 
770 /**
771  * octep_iq_full_check() - check if a Tx queue is full.
772  *
773  * @iq: Octeon Tx queue data structure.
774  *
775  * Return: 0, if the Tx queue is not full.
776  *         1, if the Tx queue is full.
777  */
778 static inline int octep_iq_full_check(struct octep_iq *iq)
779 {
780 	if (likely((iq->max_count - atomic_read(&iq->instr_pending)) >=
781 		   OCTEP_WAKE_QUEUE_THRESHOLD))
782 		return 0;
783 
784 	/* Stop the queue if unable to send */
785 	netif_stop_subqueue(iq->netdev, iq->q_no);
786 
787 	/* check again and restart the queue, in case NAPI has just freed
788 	 * enough Tx ring entries.
789 	 */
790 	if (unlikely((iq->max_count - atomic_read(&iq->instr_pending)) >=
791 		     OCTEP_WAKE_QUEUE_THRESHOLD)) {
792 		netif_start_subqueue(iq->netdev, iq->q_no);
793 		iq->stats.restart_cnt++;
794 		return 0;
795 	}
796 
797 	return 1;
798 }
799 
800 /**
801  * octep_start_xmit() - Enqueue packet to Octoen hardware Tx Queue.
802  *
803  * @skb: packet skbuff pointer.
804  * @netdev: kernel network device.
805  *
806  * Return: NETDEV_TX_BUSY, if Tx Queue is full.
807  *         NETDEV_TX_OK, if successfully enqueued to hardware Tx queue.
808  */
809 static netdev_tx_t octep_start_xmit(struct sk_buff *skb,
810 				    struct net_device *netdev)
811 {
812 	struct octep_device *oct = netdev_priv(netdev);
813 	struct octep_tx_sglist_desc *sglist;
814 	struct octep_tx_buffer *tx_buffer;
815 	struct octep_tx_desc_hw *hw_desc;
816 	struct skb_shared_info *shinfo;
817 	struct octep_instr_hdr *ih;
818 	struct octep_iq *iq;
819 	skb_frag_t *frag;
820 	u16 nr_frags, si;
821 	u16 q_no, wi;
822 
823 	q_no = skb_get_queue_mapping(skb);
824 	if (q_no >= oct->num_iqs) {
825 		netdev_err(netdev, "Invalid Tx skb->queue_mapping=%d\n", q_no);
826 		q_no = q_no % oct->num_iqs;
827 	}
828 
829 	iq = oct->iq[q_no];
830 	if (octep_iq_full_check(iq)) {
831 		iq->stats.tx_busy++;
832 		return NETDEV_TX_BUSY;
833 	}
834 
835 	shinfo = skb_shinfo(skb);
836 	nr_frags = shinfo->nr_frags;
837 
838 	wi = iq->host_write_index;
839 	hw_desc = &iq->desc_ring[wi];
840 	hw_desc->ih64 = 0;
841 
842 	tx_buffer = iq->buff_info + wi;
843 	tx_buffer->skb = skb;
844 
845 	ih = &hw_desc->ih;
846 	ih->tlen = skb->len;
847 	ih->pkind = oct->pkind;
848 
849 	if (!nr_frags) {
850 		tx_buffer->gather = 0;
851 		tx_buffer->dma = dma_map_single(iq->dev, skb->data,
852 						skb->len, DMA_TO_DEVICE);
853 		if (dma_mapping_error(iq->dev, tx_buffer->dma))
854 			goto dma_map_err;
855 		hw_desc->dptr = tx_buffer->dma;
856 	} else {
857 		/* Scatter/Gather */
858 		dma_addr_t dma;
859 		u16 len;
860 
861 		sglist = tx_buffer->sglist;
862 
863 		ih->gsz = nr_frags + 1;
864 		ih->gather = 1;
865 		tx_buffer->gather = 1;
866 
867 		len = skb_headlen(skb);
868 		dma = dma_map_single(iq->dev, skb->data, len, DMA_TO_DEVICE);
869 		if (dma_mapping_error(iq->dev, dma))
870 			goto dma_map_err;
871 
872 		dma_sync_single_for_cpu(iq->dev, tx_buffer->sglist_dma,
873 					OCTEP_SGLIST_SIZE_PER_PKT,
874 					DMA_TO_DEVICE);
875 		memset(sglist, 0, OCTEP_SGLIST_SIZE_PER_PKT);
876 		sglist[0].len[3] = len;
877 		sglist[0].dma_ptr[0] = dma;
878 
879 		si = 1; /* entry 0 is main skb, mapped above */
880 		frag = &shinfo->frags[0];
881 		while (nr_frags--) {
882 			len = skb_frag_size(frag);
883 			dma = skb_frag_dma_map(iq->dev, frag, 0,
884 					       len, DMA_TO_DEVICE);
885 			if (dma_mapping_error(iq->dev, dma))
886 				goto dma_map_sg_err;
887 
888 			sglist[si >> 2].len[3 - (si & 3)] = len;
889 			sglist[si >> 2].dma_ptr[si & 3] = dma;
890 
891 			frag++;
892 			si++;
893 		}
894 		dma_sync_single_for_device(iq->dev, tx_buffer->sglist_dma,
895 					   OCTEP_SGLIST_SIZE_PER_PKT,
896 					   DMA_TO_DEVICE);
897 
898 		hw_desc->dptr = tx_buffer->sglist_dma;
899 	}
900 
901 	netdev_tx_sent_queue(iq->netdev_q, skb->len);
902 	skb_tx_timestamp(skb);
903 	atomic_inc(&iq->instr_pending);
904 	wi++;
905 	if (wi == iq->max_count)
906 		wi = 0;
907 	iq->host_write_index = wi;
908 	/* Flush the hw descriptor before writing to doorbell */
909 	wmb();
910 
911 	/* Ring Doorbell to notify the NIC there is a new packet */
912 	writel(1, iq->doorbell_reg);
913 	iq->stats.instr_posted++;
914 	return NETDEV_TX_OK;
915 
916 dma_map_sg_err:
917 	if (si > 0) {
918 		dma_unmap_single(iq->dev, sglist[0].dma_ptr[0],
919 				 sglist[0].len[3], DMA_TO_DEVICE);
920 		sglist[0].len[3] = 0;
921 	}
922 	while (si > 1) {
923 		dma_unmap_page(iq->dev, sglist[si >> 2].dma_ptr[si & 3],
924 			       sglist[si >> 2].len[3 - (si & 3)], DMA_TO_DEVICE);
925 		sglist[si >> 2].len[3 - (si & 3)] = 0;
926 		si--;
927 	}
928 	tx_buffer->gather = 0;
929 dma_map_err:
930 	dev_kfree_skb_any(skb);
931 	return NETDEV_TX_OK;
932 }
933 
934 /**
935  * octep_get_stats64() - Get Octeon network device statistics.
936  *
937  * @netdev: kernel network device.
938  * @stats: pointer to stats structure to be filled in.
939  */
940 static void octep_get_stats64(struct net_device *netdev,
941 			      struct rtnl_link_stats64 *stats)
942 {
943 	u64 tx_packets, tx_bytes, rx_packets, rx_bytes;
944 	struct octep_device *oct = netdev_priv(netdev);
945 	int q;
946 
947 	if (netif_running(netdev))
948 		octep_ctrl_net_get_if_stats(oct,
949 					    OCTEP_CTRL_NET_INVALID_VFID,
950 					    &oct->iface_rx_stats,
951 					    &oct->iface_tx_stats);
952 
953 	tx_packets = 0;
954 	tx_bytes = 0;
955 	rx_packets = 0;
956 	rx_bytes = 0;
957 	for (q = 0; q < oct->num_oqs; q++) {
958 		struct octep_iq *iq = oct->iq[q];
959 		struct octep_oq *oq = oct->oq[q];
960 
961 		tx_packets += iq->stats.instr_completed;
962 		tx_bytes += iq->stats.bytes_sent;
963 		rx_packets += oq->stats.packets;
964 		rx_bytes += oq->stats.bytes;
965 	}
966 	stats->tx_packets = tx_packets;
967 	stats->tx_bytes = tx_bytes;
968 	stats->rx_packets = rx_packets;
969 	stats->rx_bytes = rx_bytes;
970 	stats->multicast = oct->iface_rx_stats.mcast_pkts;
971 	stats->rx_errors = oct->iface_rx_stats.err_pkts;
972 	stats->collisions = oct->iface_tx_stats.xscol;
973 	stats->tx_fifo_errors = oct->iface_tx_stats.undflw;
974 }
975 
976 /**
977  * octep_tx_timeout_task - work queue task to Handle Tx queue timeout.
978  *
979  * @work: pointer to Tx queue timeout work_struct
980  *
981  * Stop and start the device so that it frees up all queue resources
982  * and restarts the queues, that potentially clears a Tx queue timeout
983  * condition.
984  **/
985 static void octep_tx_timeout_task(struct work_struct *work)
986 {
987 	struct octep_device *oct = container_of(work, struct octep_device,
988 						tx_timeout_task);
989 	struct net_device *netdev = oct->netdev;
990 
991 	rtnl_lock();
992 	if (netif_running(netdev)) {
993 		octep_stop(netdev);
994 		octep_open(netdev);
995 	}
996 	rtnl_unlock();
997 }
998 
999 /**
1000  * octep_tx_timeout() - Handle Tx Queue timeout.
1001  *
1002  * @netdev: pointer to kernel network device.
1003  * @txqueue: Timed out Tx queue number.
1004  *
1005  * Schedule a work to handle Tx queue timeout.
1006  */
1007 static void octep_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1008 {
1009 	struct octep_device *oct = netdev_priv(netdev);
1010 
1011 	queue_work(octep_wq, &oct->tx_timeout_task);
1012 }
1013 
1014 static int octep_set_mac(struct net_device *netdev, void *p)
1015 {
1016 	struct octep_device *oct = netdev_priv(netdev);
1017 	struct sockaddr *addr = (struct sockaddr *)p;
1018 	int err;
1019 
1020 	if (!is_valid_ether_addr(addr->sa_data))
1021 		return -EADDRNOTAVAIL;
1022 
1023 	err = octep_ctrl_net_set_mac_addr(oct, OCTEP_CTRL_NET_INVALID_VFID,
1024 					  addr->sa_data, true);
1025 	if (err)
1026 		return err;
1027 
1028 	memcpy(oct->mac_addr, addr->sa_data, ETH_ALEN);
1029 	eth_hw_addr_set(netdev, addr->sa_data);
1030 
1031 	return 0;
1032 }
1033 
1034 static int octep_change_mtu(struct net_device *netdev, int new_mtu)
1035 {
1036 	struct octep_device *oct = netdev_priv(netdev);
1037 	struct octep_iface_link_info *link_info;
1038 	int err = 0;
1039 
1040 	link_info = &oct->link_info;
1041 	if (link_info->mtu == new_mtu)
1042 		return 0;
1043 
1044 	err = octep_ctrl_net_set_mtu(oct, OCTEP_CTRL_NET_INVALID_VFID, new_mtu,
1045 				     true);
1046 	if (!err) {
1047 		oct->link_info.mtu = new_mtu;
1048 		netdev->mtu = new_mtu;
1049 	}
1050 
1051 	return err;
1052 }
1053 
1054 static const struct net_device_ops octep_netdev_ops = {
1055 	.ndo_open                = octep_open,
1056 	.ndo_stop                = octep_stop,
1057 	.ndo_start_xmit          = octep_start_xmit,
1058 	.ndo_get_stats64         = octep_get_stats64,
1059 	.ndo_tx_timeout          = octep_tx_timeout,
1060 	.ndo_set_mac_address     = octep_set_mac,
1061 	.ndo_change_mtu          = octep_change_mtu,
1062 };
1063 
1064 /**
1065  * octep_intr_poll_task - work queue task to process non-ioq interrupts.
1066  *
1067  * @work: pointer to mbox work_struct
1068  *
1069  * Process non-ioq interrupts to handle control mailbox, pfvf mailbox.
1070  **/
1071 static void octep_intr_poll_task(struct work_struct *work)
1072 {
1073 	struct octep_device *oct = container_of(work, struct octep_device,
1074 						intr_poll_task.work);
1075 
1076 	if (!oct->poll_non_ioq_intr) {
1077 		dev_info(&oct->pdev->dev, "Interrupt poll task stopped.\n");
1078 		return;
1079 	}
1080 
1081 	oct->hw_ops.poll_non_ioq_interrupts(oct);
1082 	queue_delayed_work(octep_wq, &oct->intr_poll_task,
1083 			   msecs_to_jiffies(OCTEP_INTR_POLL_TIME_MSECS));
1084 }
1085 
1086 /**
1087  * octep_hb_timeout_task - work queue task to check firmware heartbeat.
1088  *
1089  * @work: pointer to hb work_struct
1090  *
1091  * Check for heartbeat miss count. Uninitialize oct device if miss count
1092  * exceeds configured max heartbeat miss count.
1093  *
1094  **/
1095 static void octep_hb_timeout_task(struct work_struct *work)
1096 {
1097 	struct octep_device *oct = container_of(work, struct octep_device,
1098 						hb_task.work);
1099 
1100 	int miss_cnt;
1101 
1102 	miss_cnt = atomic_inc_return(&oct->hb_miss_cnt);
1103 	if (miss_cnt < oct->conf->fw_info.hb_miss_count) {
1104 		queue_delayed_work(octep_wq, &oct->hb_task,
1105 				   msecs_to_jiffies(oct->conf->fw_info.hb_interval));
1106 		return;
1107 	}
1108 
1109 	dev_err(&oct->pdev->dev, "Missed %u heartbeats. Uninitializing\n",
1110 		miss_cnt);
1111 	rtnl_lock();
1112 	if (netif_running(oct->netdev))
1113 		octep_stop(oct->netdev);
1114 	rtnl_unlock();
1115 }
1116 
1117 /**
1118  * octep_ctrl_mbox_task - work queue task to handle ctrl mbox messages.
1119  *
1120  * @work: pointer to ctrl mbox work_struct
1121  *
1122  * Poll ctrl mbox message queue and handle control messages from firmware.
1123  **/
1124 static void octep_ctrl_mbox_task(struct work_struct *work)
1125 {
1126 	struct octep_device *oct = container_of(work, struct octep_device,
1127 						ctrl_mbox_task);
1128 
1129 	octep_ctrl_net_recv_fw_messages(oct);
1130 }
1131 
1132 static const char *octep_devid_to_str(struct octep_device *oct)
1133 {
1134 	switch (oct->chip_id) {
1135 	case OCTEP_PCI_DEVICE_ID_CN93_PF:
1136 		return "CN93XX";
1137 	case OCTEP_PCI_DEVICE_ID_CNF95N_PF:
1138 		return "CNF95N";
1139 	default:
1140 		return "Unsupported";
1141 	}
1142 }
1143 
1144 /**
1145  * octep_device_setup() - Setup Octeon Device.
1146  *
1147  * @oct: Octeon device private data structure.
1148  *
1149  * Setup Octeon device hardware operations, configuration, etc ...
1150  */
1151 int octep_device_setup(struct octep_device *oct)
1152 {
1153 	struct pci_dev *pdev = oct->pdev;
1154 	int i, ret;
1155 
1156 	/* allocate memory for oct->conf */
1157 	oct->conf = kzalloc(sizeof(*oct->conf), GFP_KERNEL);
1158 	if (!oct->conf)
1159 		return -ENOMEM;
1160 
1161 	/* Map BAR regions */
1162 	for (i = 0; i < OCTEP_MMIO_REGIONS; i++) {
1163 		oct->mmio[i].hw_addr =
1164 			ioremap(pci_resource_start(oct->pdev, i * 2),
1165 				pci_resource_len(oct->pdev, i * 2));
1166 		if (!oct->mmio[i].hw_addr)
1167 			goto unmap_prev;
1168 
1169 		oct->mmio[i].mapped = 1;
1170 	}
1171 
1172 	oct->chip_id = pdev->device;
1173 	oct->rev_id = pdev->revision;
1174 	dev_info(&pdev->dev, "chip_id = 0x%x\n", pdev->device);
1175 
1176 	switch (oct->chip_id) {
1177 	case OCTEP_PCI_DEVICE_ID_CN93_PF:
1178 	case OCTEP_PCI_DEVICE_ID_CNF95N_PF:
1179 		dev_info(&pdev->dev, "Setting up OCTEON %s PF PASS%d.%d\n",
1180 			 octep_devid_to_str(oct), OCTEP_MAJOR_REV(oct),
1181 			 OCTEP_MINOR_REV(oct));
1182 		octep_device_setup_cn93_pf(oct);
1183 		break;
1184 	default:
1185 		dev_err(&pdev->dev,
1186 			"%s: unsupported device\n", __func__);
1187 		goto unsupported_dev;
1188 	}
1189 
1190 	oct->pkind = CFG_GET_IQ_PKIND(oct->conf);
1191 
1192 	ret = octep_ctrl_net_init(oct);
1193 	if (ret)
1194 		return ret;
1195 
1196 	atomic_set(&oct->hb_miss_cnt, 0);
1197 	INIT_DELAYED_WORK(&oct->hb_task, octep_hb_timeout_task);
1198 
1199 	return 0;
1200 
1201 unsupported_dev:
1202 	i = OCTEP_MMIO_REGIONS;
1203 unmap_prev:
1204 	while (i--)
1205 		iounmap(oct->mmio[i].hw_addr);
1206 
1207 	kfree(oct->conf);
1208 	return -1;
1209 }
1210 
1211 /**
1212  * octep_device_cleanup() - Cleanup Octeon Device.
1213  *
1214  * @oct: Octeon device private data structure.
1215  *
1216  * Cleanup Octeon device allocated resources.
1217  */
1218 static void octep_device_cleanup(struct octep_device *oct)
1219 {
1220 	int i;
1221 
1222 	oct->poll_non_ioq_intr = false;
1223 	cancel_delayed_work_sync(&oct->intr_poll_task);
1224 	cancel_work_sync(&oct->ctrl_mbox_task);
1225 
1226 	dev_info(&oct->pdev->dev, "Cleaning up Octeon Device ...\n");
1227 
1228 	for (i = 0; i < OCTEP_MAX_VF; i++) {
1229 		vfree(oct->mbox[i]);
1230 		oct->mbox[i] = NULL;
1231 	}
1232 
1233 	octep_ctrl_net_uninit(oct);
1234 	cancel_delayed_work_sync(&oct->hb_task);
1235 
1236 	oct->hw_ops.soft_reset(oct);
1237 	for (i = 0; i < OCTEP_MMIO_REGIONS; i++) {
1238 		if (oct->mmio[i].mapped)
1239 			iounmap(oct->mmio[i].hw_addr);
1240 	}
1241 
1242 	kfree(oct->conf);
1243 	oct->conf = NULL;
1244 }
1245 
1246 static bool get_fw_ready_status(struct pci_dev *pdev)
1247 {
1248 	u32 pos = 0;
1249 	u16 vsec_id;
1250 	u8 status;
1251 
1252 	while ((pos = pci_find_next_ext_capability(pdev, pos,
1253 						   PCI_EXT_CAP_ID_VNDR))) {
1254 		pci_read_config_word(pdev, pos + 4, &vsec_id);
1255 #define FW_STATUS_VSEC_ID  0xA3
1256 		if (vsec_id != FW_STATUS_VSEC_ID)
1257 			continue;
1258 
1259 		pci_read_config_byte(pdev, (pos + 8), &status);
1260 		dev_info(&pdev->dev, "Firmware ready status = %u\n", status);
1261 		return status;
1262 	}
1263 	return false;
1264 }
1265 
1266 /**
1267  * octep_probe() - Octeon PCI device probe handler.
1268  *
1269  * @pdev: PCI device structure.
1270  * @ent: entry in Octeon PCI device ID table.
1271  *
1272  * Initializes and enables the Octeon PCI device for network operations.
1273  * Initializes Octeon private data structure and registers a network device.
1274  */
1275 static int octep_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1276 {
1277 	struct octep_device *octep_dev = NULL;
1278 	struct net_device *netdev;
1279 	int err;
1280 
1281 	err = pci_enable_device(pdev);
1282 	if (err) {
1283 		dev_err(&pdev->dev, "Failed to enable PCI device\n");
1284 		return  err;
1285 	}
1286 
1287 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1288 	if (err) {
1289 		dev_err(&pdev->dev, "Failed to set DMA mask !!\n");
1290 		goto err_dma_mask;
1291 	}
1292 
1293 	err = pci_request_mem_regions(pdev, OCTEP_DRV_NAME);
1294 	if (err) {
1295 		dev_err(&pdev->dev, "Failed to map PCI memory regions\n");
1296 		goto err_pci_regions;
1297 	}
1298 
1299 	pci_set_master(pdev);
1300 
1301 	if (!get_fw_ready_status(pdev)) {
1302 		dev_notice(&pdev->dev, "Firmware not ready; defer probe.\n");
1303 		err = -EPROBE_DEFER;
1304 		goto err_alloc_netdev;
1305 	}
1306 
1307 	netdev = alloc_etherdev_mq(sizeof(struct octep_device),
1308 				   OCTEP_MAX_QUEUES);
1309 	if (!netdev) {
1310 		dev_err(&pdev->dev, "Failed to allocate netdev\n");
1311 		err = -ENOMEM;
1312 		goto err_alloc_netdev;
1313 	}
1314 	SET_NETDEV_DEV(netdev, &pdev->dev);
1315 
1316 	octep_dev = netdev_priv(netdev);
1317 	octep_dev->netdev = netdev;
1318 	octep_dev->pdev = pdev;
1319 	octep_dev->dev = &pdev->dev;
1320 	pci_set_drvdata(pdev, octep_dev);
1321 
1322 	err = octep_device_setup(octep_dev);
1323 	if (err) {
1324 		dev_err(&pdev->dev, "Device setup failed\n");
1325 		goto err_octep_config;
1326 	}
1327 
1328 	octep_ctrl_net_get_info(octep_dev, OCTEP_CTRL_NET_INVALID_VFID,
1329 				&octep_dev->conf->fw_info);
1330 	dev_info(&octep_dev->pdev->dev, "Heartbeat interval %u msecs Heartbeat miss count %u\n",
1331 		 octep_dev->conf->fw_info.hb_interval,
1332 		 octep_dev->conf->fw_info.hb_miss_count);
1333 	queue_delayed_work(octep_wq, &octep_dev->hb_task,
1334 			   msecs_to_jiffies(octep_dev->conf->fw_info.hb_interval));
1335 
1336 	INIT_WORK(&octep_dev->tx_timeout_task, octep_tx_timeout_task);
1337 	INIT_WORK(&octep_dev->ctrl_mbox_task, octep_ctrl_mbox_task);
1338 	INIT_DELAYED_WORK(&octep_dev->intr_poll_task, octep_intr_poll_task);
1339 	octep_dev->poll_non_ioq_intr = true;
1340 	queue_delayed_work(octep_wq, &octep_dev->intr_poll_task,
1341 			   msecs_to_jiffies(OCTEP_INTR_POLL_TIME_MSECS));
1342 
1343 	netdev->netdev_ops = &octep_netdev_ops;
1344 	octep_set_ethtool_ops(netdev);
1345 	netif_carrier_off(netdev);
1346 
1347 	netdev->hw_features = NETIF_F_SG;
1348 	netdev->features |= netdev->hw_features;
1349 	netdev->min_mtu = OCTEP_MIN_MTU;
1350 	netdev->max_mtu = OCTEP_MAX_MTU;
1351 	netdev->mtu = OCTEP_DEFAULT_MTU;
1352 
1353 	err = octep_ctrl_net_get_mac_addr(octep_dev, OCTEP_CTRL_NET_INVALID_VFID,
1354 					  octep_dev->mac_addr);
1355 	if (err) {
1356 		dev_err(&pdev->dev, "Failed to get mac address\n");
1357 		goto register_dev_err;
1358 	}
1359 	eth_hw_addr_set(netdev, octep_dev->mac_addr);
1360 
1361 	err = register_netdev(netdev);
1362 	if (err) {
1363 		dev_err(&pdev->dev, "Failed to register netdev\n");
1364 		goto register_dev_err;
1365 	}
1366 	dev_info(&pdev->dev, "Device probe successful\n");
1367 	return 0;
1368 
1369 register_dev_err:
1370 	octep_device_cleanup(octep_dev);
1371 err_octep_config:
1372 	free_netdev(netdev);
1373 err_alloc_netdev:
1374 	pci_release_mem_regions(pdev);
1375 err_pci_regions:
1376 err_dma_mask:
1377 	pci_disable_device(pdev);
1378 	return err;
1379 }
1380 
1381 /**
1382  * octep_remove() - Remove Octeon PCI device from driver control.
1383  *
1384  * @pdev: PCI device structure of the Octeon device.
1385  *
1386  * Cleanup all resources allocated for the Octeon device.
1387  * Unregister from network device and disable the PCI device.
1388  */
1389 static void octep_remove(struct pci_dev *pdev)
1390 {
1391 	struct octep_device *oct = pci_get_drvdata(pdev);
1392 	struct net_device *netdev;
1393 
1394 	if (!oct)
1395 		return;
1396 
1397 	netdev = oct->netdev;
1398 	if (netdev->reg_state == NETREG_REGISTERED)
1399 		unregister_netdev(netdev);
1400 
1401 	cancel_work_sync(&oct->tx_timeout_task);
1402 	octep_device_cleanup(oct);
1403 	pci_release_mem_regions(pdev);
1404 	free_netdev(netdev);
1405 	pci_disable_device(pdev);
1406 }
1407 
1408 static struct pci_driver octep_driver = {
1409 	.name = OCTEP_DRV_NAME,
1410 	.id_table = octep_pci_id_tbl,
1411 	.probe = octep_probe,
1412 	.remove = octep_remove,
1413 };
1414 
1415 /**
1416  * octep_init_module() - Module initialiation.
1417  *
1418  * create common resource for the driver and register PCI driver.
1419  */
1420 static int __init octep_init_module(void)
1421 {
1422 	int ret;
1423 
1424 	pr_info("%s: Loading %s ...\n", OCTEP_DRV_NAME, OCTEP_DRV_STRING);
1425 
1426 	/* work queue for all deferred tasks */
1427 	octep_wq = create_singlethread_workqueue(OCTEP_DRV_NAME);
1428 	if (!octep_wq) {
1429 		pr_err("%s: Failed to create common workqueue\n",
1430 		       OCTEP_DRV_NAME);
1431 		return -ENOMEM;
1432 	}
1433 
1434 	ret = pci_register_driver(&octep_driver);
1435 	if (ret < 0) {
1436 		pr_err("%s: Failed to register PCI driver; err=%d\n",
1437 		       OCTEP_DRV_NAME, ret);
1438 		destroy_workqueue(octep_wq);
1439 		return ret;
1440 	}
1441 
1442 	pr_info("%s: Loaded successfully !\n", OCTEP_DRV_NAME);
1443 
1444 	return ret;
1445 }
1446 
1447 /**
1448  * octep_exit_module() - Module exit routine.
1449  *
1450  * unregister the driver with PCI subsystem and cleanup common resources.
1451  */
1452 static void __exit octep_exit_module(void)
1453 {
1454 	pr_info("%s: Unloading ...\n", OCTEP_DRV_NAME);
1455 
1456 	pci_unregister_driver(&octep_driver);
1457 	destroy_workqueue(octep_wq);
1458 
1459 	pr_info("%s: Unloading complete\n", OCTEP_DRV_NAME);
1460 }
1461 
1462 module_init(octep_init_module);
1463 module_exit(octep_exit_module);
1464