1 // SPDX-License-Identifier: GPL-2.0 2 /* Marvell RVU Ethernet driver 3 * 4 * Copyright (C) 2020 Marvell. 5 * 6 */ 7 8 #include <linux/pci.h> 9 #include <linux/ethtool.h> 10 #include <linux/stddef.h> 11 #include <linux/etherdevice.h> 12 #include <linux/log2.h> 13 #include <linux/net_tstamp.h> 14 #include <linux/linkmode.h> 15 16 #include "otx2_common.h" 17 #include "otx2_ptp.h" 18 19 #define DRV_NAME "rvu-nicpf" 20 #define DRV_VF_NAME "rvu-nicvf" 21 22 struct otx2_stat { 23 char name[ETH_GSTRING_LEN]; 24 unsigned int index; 25 }; 26 27 /* HW device stats */ 28 #define OTX2_DEV_STAT(stat) { \ 29 .name = #stat, \ 30 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \ 31 } 32 33 enum link_mode { 34 OTX2_MODE_SUPPORTED, 35 OTX2_MODE_ADVERTISED 36 }; 37 38 static const struct otx2_stat otx2_dev_stats[] = { 39 OTX2_DEV_STAT(rx_ucast_frames), 40 OTX2_DEV_STAT(rx_bcast_frames), 41 OTX2_DEV_STAT(rx_mcast_frames), 42 43 OTX2_DEV_STAT(tx_ucast_frames), 44 OTX2_DEV_STAT(tx_bcast_frames), 45 OTX2_DEV_STAT(tx_mcast_frames), 46 }; 47 48 /* Driver level stats */ 49 #define OTX2_DRV_STAT(stat) { \ 50 .name = #stat, \ 51 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \ 52 } 53 54 static const struct otx2_stat otx2_drv_stats[] = { 55 OTX2_DRV_STAT(rx_fcs_errs), 56 OTX2_DRV_STAT(rx_oversize_errs), 57 OTX2_DRV_STAT(rx_undersize_errs), 58 OTX2_DRV_STAT(rx_csum_errs), 59 OTX2_DRV_STAT(rx_len_errs), 60 OTX2_DRV_STAT(rx_other_errs), 61 }; 62 63 static const struct otx2_stat otx2_queue_stats[] = { 64 { "bytes", 0 }, 65 { "frames", 1 }, 66 }; 67 68 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats); 69 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats); 70 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats); 71 72 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf); 73 74 static void otx2_get_drvinfo(struct net_device *netdev, 75 struct ethtool_drvinfo *info) 76 { 77 struct otx2_nic *pfvf = netdev_priv(netdev); 78 79 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 80 strlcpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info)); 81 } 82 83 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset) 84 { 85 int start_qidx = qset * pfvf->hw.rx_queues; 86 int qidx, stats; 87 88 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 89 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 90 sprintf(*data, "rxq%d: %s", qidx + start_qidx, 91 otx2_queue_stats[stats].name); 92 *data += ETH_GSTRING_LEN; 93 } 94 } 95 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 96 for (stats = 0; stats < otx2_n_queue_stats; stats++) { 97 sprintf(*data, "txq%d: %s", qidx + start_qidx, 98 otx2_queue_stats[stats].name); 99 *data += ETH_GSTRING_LEN; 100 } 101 } 102 } 103 104 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data) 105 { 106 struct otx2_nic *pfvf = netdev_priv(netdev); 107 int stats; 108 109 if (sset != ETH_SS_STATS) 110 return; 111 112 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 113 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 114 data += ETH_GSTRING_LEN; 115 } 116 117 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 118 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 119 data += ETH_GSTRING_LEN; 120 } 121 122 otx2_get_qset_strings(pfvf, &data, 0); 123 124 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) { 125 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) { 126 sprintf(data, "cgx_rxstat%d: ", stats); 127 data += ETH_GSTRING_LEN; 128 } 129 130 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) { 131 sprintf(data, "cgx_txstat%d: ", stats); 132 data += ETH_GSTRING_LEN; 133 } 134 } 135 136 strcpy(data, "reset_count"); 137 data += ETH_GSTRING_LEN; 138 sprintf(data, "Fec Corrected Errors: "); 139 data += ETH_GSTRING_LEN; 140 sprintf(data, "Fec Uncorrected Errors: "); 141 data += ETH_GSTRING_LEN; 142 } 143 144 static void otx2_get_qset_stats(struct otx2_nic *pfvf, 145 struct ethtool_stats *stats, u64 **data) 146 { 147 int stat, qidx; 148 149 if (!pfvf) 150 return; 151 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) { 152 if (!otx2_update_rq_stats(pfvf, qidx)) { 153 for (stat = 0; stat < otx2_n_queue_stats; stat++) 154 *((*data)++) = 0; 155 continue; 156 } 157 for (stat = 0; stat < otx2_n_queue_stats; stat++) 158 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats) 159 [otx2_queue_stats[stat].index]; 160 } 161 162 for (qidx = 0; qidx < pfvf->hw.tx_queues; qidx++) { 163 if (!otx2_update_sq_stats(pfvf, qidx)) { 164 for (stat = 0; stat < otx2_n_queue_stats; stat++) 165 *((*data)++) = 0; 166 continue; 167 } 168 for (stat = 0; stat < otx2_n_queue_stats; stat++) 169 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats) 170 [otx2_queue_stats[stat].index]; 171 } 172 } 173 174 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf) 175 { 176 struct msg_req *req; 177 int rc = -ENOMEM; 178 179 mutex_lock(&pfvf->mbox.lock); 180 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox); 181 if (!req) 182 goto end; 183 184 if (!otx2_sync_mbox_msg(&pfvf->mbox)) 185 rc = 0; 186 end: 187 mutex_unlock(&pfvf->mbox.lock); 188 return rc; 189 } 190 191 /* Get device and per queue statistics */ 192 static void otx2_get_ethtool_stats(struct net_device *netdev, 193 struct ethtool_stats *stats, u64 *data) 194 { 195 struct otx2_nic *pfvf = netdev_priv(netdev); 196 u64 fec_corr_blks, fec_uncorr_blks; 197 struct cgx_fw_data *rsp; 198 int stat; 199 200 otx2_get_dev_stats(pfvf); 201 for (stat = 0; stat < otx2_n_dev_stats; stat++) 202 *(data++) = ((u64 *)&pfvf->hw.dev_stats) 203 [otx2_dev_stats[stat].index]; 204 205 for (stat = 0; stat < otx2_n_drv_stats; stat++) 206 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats) 207 [otx2_drv_stats[stat].index]); 208 209 otx2_get_qset_stats(pfvf, stats, &data); 210 211 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) { 212 otx2_update_lmac_stats(pfvf); 213 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++) 214 *(data++) = pfvf->hw.cgx_rx_stats[stat]; 215 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++) 216 *(data++) = pfvf->hw.cgx_tx_stats[stat]; 217 } 218 219 *(data++) = pfvf->reset_count; 220 221 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks; 222 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks; 223 224 rsp = otx2_get_fwdata(pfvf); 225 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats && 226 !otx2_get_phy_fec_stats(pfvf)) { 227 /* Fetch fwdata again because it's been recently populated with 228 * latest PHY FEC stats. 229 */ 230 rsp = otx2_get_fwdata(pfvf); 231 if (!IS_ERR(rsp)) { 232 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats; 233 234 if (pfvf->linfo.fec == OTX2_FEC_BASER) { 235 fec_corr_blks = p->brfec_corr_blks; 236 fec_uncorr_blks = p->brfec_uncorr_blks; 237 } else { 238 fec_corr_blks = p->rsfec_corr_cws; 239 fec_uncorr_blks = p->rsfec_uncorr_cws; 240 } 241 } 242 } 243 244 *(data++) = fec_corr_blks; 245 *(data++) = fec_uncorr_blks; 246 } 247 248 static int otx2_get_sset_count(struct net_device *netdev, int sset) 249 { 250 struct otx2_nic *pfvf = netdev_priv(netdev); 251 int qstats_count, mac_stats = 0; 252 253 if (sset != ETH_SS_STATS) 254 return -EINVAL; 255 256 qstats_count = otx2_n_queue_stats * 257 (pfvf->hw.rx_queues + pfvf->hw.tx_queues); 258 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) 259 mac_stats = CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT; 260 otx2_update_lmac_fec_stats(pfvf); 261 262 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 263 mac_stats + OTX2_FEC_STATS_CNT + 1; 264 } 265 266 /* Get no of queues device supports and current queue count */ 267 static void otx2_get_channels(struct net_device *dev, 268 struct ethtool_channels *channel) 269 { 270 struct otx2_nic *pfvf = netdev_priv(dev); 271 272 channel->max_rx = pfvf->hw.max_queues; 273 channel->max_tx = pfvf->hw.max_queues; 274 275 channel->rx_count = pfvf->hw.rx_queues; 276 channel->tx_count = pfvf->hw.tx_queues; 277 } 278 279 /* Set no of Tx, Rx queues to be used */ 280 static int otx2_set_channels(struct net_device *dev, 281 struct ethtool_channels *channel) 282 { 283 struct otx2_nic *pfvf = netdev_priv(dev); 284 bool if_up = netif_running(dev); 285 int err = 0; 286 287 if (!channel->rx_count || !channel->tx_count) 288 return -EINVAL; 289 290 if (bitmap_weight(&pfvf->rq_bmap, pfvf->hw.rx_queues) > 1) { 291 netdev_err(dev, 292 "Receive queues are in use by TC police action\n"); 293 return -EINVAL; 294 } 295 296 if (if_up) 297 dev->netdev_ops->ndo_stop(dev); 298 299 err = otx2_set_real_num_queues(dev, channel->tx_count, 300 channel->rx_count); 301 if (err) 302 return err; 303 304 pfvf->hw.rx_queues = channel->rx_count; 305 pfvf->hw.tx_queues = channel->tx_count; 306 pfvf->qset.cq_cnt = pfvf->hw.tx_queues + pfvf->hw.rx_queues; 307 308 if (if_up) 309 err = dev->netdev_ops->ndo_open(dev); 310 311 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", 312 pfvf->hw.tx_queues, pfvf->hw.rx_queues); 313 314 return err; 315 } 316 317 static void otx2_get_pauseparam(struct net_device *netdev, 318 struct ethtool_pauseparam *pause) 319 { 320 struct otx2_nic *pfvf = netdev_priv(netdev); 321 struct cgx_pause_frm_cfg *req, *rsp; 322 323 if (is_otx2_lbkvf(pfvf->pdev)) 324 return; 325 326 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox); 327 if (!req) 328 return; 329 330 if (!otx2_sync_mbox_msg(&pfvf->mbox)) { 331 rsp = (struct cgx_pause_frm_cfg *) 332 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 333 pause->rx_pause = rsp->rx_pause; 334 pause->tx_pause = rsp->tx_pause; 335 } 336 } 337 338 static int otx2_set_pauseparam(struct net_device *netdev, 339 struct ethtool_pauseparam *pause) 340 { 341 struct otx2_nic *pfvf = netdev_priv(netdev); 342 343 if (pause->autoneg) 344 return -EOPNOTSUPP; 345 346 if (is_otx2_lbkvf(pfvf->pdev)) 347 return -EOPNOTSUPP; 348 349 if (pause->rx_pause) 350 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED; 351 else 352 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; 353 354 if (pause->tx_pause) 355 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED; 356 else 357 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; 358 359 return otx2_config_pause_frm(pfvf); 360 } 361 362 static void otx2_get_ringparam(struct net_device *netdev, 363 struct ethtool_ringparam *ring, 364 struct kernel_ethtool_ringparam *kernel_ring, 365 struct netlink_ext_ack *extack) 366 { 367 struct otx2_nic *pfvf = netdev_priv(netdev); 368 struct otx2_qset *qs = &pfvf->qset; 369 370 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX); 371 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256); 372 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX); 373 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K); 374 kernel_ring->rx_buf_len = pfvf->hw.rbuf_len; 375 kernel_ring->cqe_size = pfvf->hw.xqe_size; 376 } 377 378 static int otx2_set_ringparam(struct net_device *netdev, 379 struct ethtool_ringparam *ring, 380 struct kernel_ethtool_ringparam *kernel_ring, 381 struct netlink_ext_ack *extack) 382 { 383 struct otx2_nic *pfvf = netdev_priv(netdev); 384 u32 rx_buf_len = kernel_ring->rx_buf_len; 385 u32 old_rx_buf_len = pfvf->hw.rbuf_len; 386 u32 xqe_size = kernel_ring->cqe_size; 387 bool if_up = netif_running(netdev); 388 struct otx2_qset *qs = &pfvf->qset; 389 u32 rx_count, tx_count; 390 391 if (ring->rx_mini_pending || ring->rx_jumbo_pending) 392 return -EINVAL; 393 394 /* Hardware supports max size of 32k for a receive buffer 395 * and 1536 is typical ethernet frame size. 396 */ 397 if (rx_buf_len && (rx_buf_len < 1536 || rx_buf_len > 32768)) { 398 netdev_err(netdev, 399 "Receive buffer range is 1536 - 32768"); 400 return -EINVAL; 401 } 402 403 if (xqe_size != 128 && xqe_size != 512) { 404 netdev_err(netdev, 405 "Completion event size must be 128 or 512"); 406 return -EINVAL; 407 } 408 409 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */ 410 rx_count = ring->rx_pending; 411 /* On some silicon variants a skid or reserved CQEs are 412 * needed to avoid CQ overflow. 413 */ 414 if (rx_count < pfvf->hw.rq_skid) 415 rx_count = pfvf->hw.rq_skid; 416 rx_count = Q_COUNT(Q_SIZE(rx_count, 3)); 417 418 /* Due pipelining impact minimum 2000 unused SQ CQE's 419 * need to be maintained to avoid CQ overflow, hence the 420 * minimum 4K size. 421 */ 422 tx_count = clamp_t(u32, ring->tx_pending, 423 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX)); 424 tx_count = Q_COUNT(Q_SIZE(tx_count, 3)); 425 426 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt && 427 rx_buf_len == old_rx_buf_len && xqe_size == pfvf->hw.xqe_size) 428 return 0; 429 430 if (if_up) 431 netdev->netdev_ops->ndo_stop(netdev); 432 433 /* Assigned to the nearest possible exponent. */ 434 qs->sqe_cnt = tx_count; 435 qs->rqe_cnt = rx_count; 436 437 pfvf->hw.rbuf_len = rx_buf_len; 438 pfvf->hw.xqe_size = xqe_size; 439 440 if (if_up) 441 return netdev->netdev_ops->ndo_open(netdev); 442 443 return 0; 444 } 445 446 static int otx2_get_coalesce(struct net_device *netdev, 447 struct ethtool_coalesce *cmd, 448 struct kernel_ethtool_coalesce *kernel_coal, 449 struct netlink_ext_ack *extack) 450 { 451 struct otx2_nic *pfvf = netdev_priv(netdev); 452 struct otx2_hw *hw = &pfvf->hw; 453 454 cmd->rx_coalesce_usecs = hw->cq_time_wait; 455 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait; 456 cmd->tx_coalesce_usecs = hw->cq_time_wait; 457 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait; 458 459 return 0; 460 } 461 462 static int otx2_set_coalesce(struct net_device *netdev, 463 struct ethtool_coalesce *ec, 464 struct kernel_ethtool_coalesce *kernel_coal, 465 struct netlink_ext_ack *extack) 466 { 467 struct otx2_nic *pfvf = netdev_priv(netdev); 468 struct otx2_hw *hw = &pfvf->hw; 469 int qidx; 470 471 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames) 472 return 0; 473 474 /* 'cq_time_wait' is 8bit and is in multiple of 100ns, 475 * so clamp the user given value to the range of 1 to 25usec. 476 */ 477 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs, 478 1, CQ_TIMER_THRESH_MAX); 479 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs, 480 1, CQ_TIMER_THRESH_MAX); 481 482 /* Rx and Tx are mapped to same CQ, check which one 483 * is changed, if both then choose the min. 484 */ 485 if (hw->cq_time_wait == ec->rx_coalesce_usecs) 486 hw->cq_time_wait = ec->tx_coalesce_usecs; 487 else if (hw->cq_time_wait == ec->tx_coalesce_usecs) 488 hw->cq_time_wait = ec->rx_coalesce_usecs; 489 else 490 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs, 491 ec->tx_coalesce_usecs); 492 493 /* Max ecount_wait supported is 16bit, 494 * so clamp the user given value to the range of 1 to 64k. 495 */ 496 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames, 497 1, U16_MAX); 498 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames, 499 1, U16_MAX); 500 501 /* Rx and Tx are mapped to same CQ, check which one 502 * is changed, if both then choose the min. 503 */ 504 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames) 505 hw->cq_ecount_wait = ec->tx_max_coalesced_frames; 506 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames) 507 hw->cq_ecount_wait = ec->rx_max_coalesced_frames; 508 else 509 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames, 510 ec->tx_max_coalesced_frames); 511 512 if (netif_running(netdev)) { 513 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++) 514 otx2_config_irq_coalescing(pfvf, qidx); 515 } 516 517 return 0; 518 } 519 520 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf, 521 struct ethtool_rxnfc *nfc) 522 { 523 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 524 525 if (!(rss->flowkey_cfg & 526 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6))) 527 return 0; 528 529 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 530 nfc->data = RXH_IP_SRC | RXH_IP_DST; 531 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN) 532 nfc->data |= RXH_VLAN; 533 534 switch (nfc->flow_type) { 535 case TCP_V4_FLOW: 536 case TCP_V6_FLOW: 537 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP) 538 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 539 break; 540 case UDP_V4_FLOW: 541 case UDP_V6_FLOW: 542 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP) 543 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 544 break; 545 case SCTP_V4_FLOW: 546 case SCTP_V6_FLOW: 547 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP) 548 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 549 break; 550 case AH_ESP_V4_FLOW: 551 case AH_ESP_V6_FLOW: 552 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP) 553 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 554 break; 555 case AH_V4_FLOW: 556 case ESP_V4_FLOW: 557 case IPV4_FLOW: 558 break; 559 case AH_V6_FLOW: 560 case ESP_V6_FLOW: 561 case IPV6_FLOW: 562 break; 563 default: 564 return -EINVAL; 565 } 566 567 return 0; 568 } 569 570 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf, 571 struct ethtool_rxnfc *nfc) 572 { 573 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 574 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3; 575 u32 rss_cfg = rss->flowkey_cfg; 576 577 if (!rss->enable) { 578 netdev_err(pfvf->netdev, 579 "RSS is disabled, cannot change settings\n"); 580 return -EIO; 581 } 582 583 /* Mimimum is IPv4 and IPv6, SIP/DIP */ 584 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST)) 585 return -EINVAL; 586 587 if (nfc->data & RXH_VLAN) 588 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN; 589 else 590 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN; 591 592 switch (nfc->flow_type) { 593 case TCP_V4_FLOW: 594 case TCP_V6_FLOW: 595 /* Different config for v4 and v6 is not supported. 596 * Both of them have to be either 4-tuple or 2-tuple. 597 */ 598 switch (nfc->data & rxh_l4) { 599 case 0: 600 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP; 601 break; 602 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 603 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP; 604 break; 605 default: 606 return -EINVAL; 607 } 608 break; 609 case UDP_V4_FLOW: 610 case UDP_V6_FLOW: 611 switch (nfc->data & rxh_l4) { 612 case 0: 613 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP; 614 break; 615 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 616 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP; 617 break; 618 default: 619 return -EINVAL; 620 } 621 break; 622 case SCTP_V4_FLOW: 623 case SCTP_V6_FLOW: 624 switch (nfc->data & rxh_l4) { 625 case 0: 626 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP; 627 break; 628 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 629 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 630 break; 631 default: 632 return -EINVAL; 633 } 634 break; 635 case AH_ESP_V4_FLOW: 636 case AH_ESP_V6_FLOW: 637 switch (nfc->data & rxh_l4) { 638 case 0: 639 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP | 640 NIX_FLOW_KEY_TYPE_AH); 641 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN | 642 NIX_FLOW_KEY_TYPE_IPV4_PROTO; 643 break; 644 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 645 /* If VLAN hashing is also requested for ESP then do not 646 * allow because of hardware 40 bytes flow key limit. 647 */ 648 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) { 649 netdev_err(pfvf->netdev, 650 "RSS hash of ESP or AH with VLAN is not supported\n"); 651 return -EOPNOTSUPP; 652 } 653 654 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH; 655 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes) 656 * and ESP SPI+sequence(8 bytes) uses hardware maximum 657 * limit of 40 byte flow key. 658 */ 659 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO; 660 break; 661 default: 662 return -EINVAL; 663 } 664 break; 665 case IPV4_FLOW: 666 case IPV6_FLOW: 667 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6; 668 break; 669 default: 670 return -EINVAL; 671 } 672 673 rss->flowkey_cfg = rss_cfg; 674 otx2_set_flowkey_cfg(pfvf); 675 return 0; 676 } 677 678 static int otx2_get_rxnfc(struct net_device *dev, 679 struct ethtool_rxnfc *nfc, u32 *rules) 680 { 681 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 682 struct otx2_nic *pfvf = netdev_priv(dev); 683 int ret = -EOPNOTSUPP; 684 685 switch (nfc->cmd) { 686 case ETHTOOL_GRXRINGS: 687 nfc->data = pfvf->hw.rx_queues; 688 ret = 0; 689 break; 690 case ETHTOOL_GRXCLSRLCNT: 691 if (netif_running(dev) && ntuple) { 692 nfc->rule_cnt = pfvf->flow_cfg->nr_flows; 693 ret = 0; 694 } 695 break; 696 case ETHTOOL_GRXCLSRULE: 697 if (netif_running(dev) && ntuple) 698 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location); 699 break; 700 case ETHTOOL_GRXCLSRLALL: 701 if (netif_running(dev) && ntuple) 702 ret = otx2_get_all_flows(pfvf, nfc, rules); 703 break; 704 case ETHTOOL_GRXFH: 705 return otx2_get_rss_hash_opts(pfvf, nfc); 706 default: 707 break; 708 } 709 return ret; 710 } 711 712 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc) 713 { 714 bool ntuple = !!(dev->features & NETIF_F_NTUPLE); 715 struct otx2_nic *pfvf = netdev_priv(dev); 716 int ret = -EOPNOTSUPP; 717 718 switch (nfc->cmd) { 719 case ETHTOOL_SRXFH: 720 ret = otx2_set_rss_hash_opts(pfvf, nfc); 721 break; 722 case ETHTOOL_SRXCLSRLINS: 723 if (netif_running(dev) && ntuple) 724 ret = otx2_add_flow(pfvf, nfc); 725 break; 726 case ETHTOOL_SRXCLSRLDEL: 727 if (netif_running(dev) && ntuple) 728 ret = otx2_remove_flow(pfvf, nfc->fs.location); 729 break; 730 default: 731 break; 732 } 733 734 return ret; 735 } 736 737 static u32 otx2_get_rxfh_key_size(struct net_device *netdev) 738 { 739 struct otx2_nic *pfvf = netdev_priv(netdev); 740 struct otx2_rss_info *rss; 741 742 rss = &pfvf->hw.rss_info; 743 744 return sizeof(rss->key); 745 } 746 747 static u32 otx2_get_rxfh_indir_size(struct net_device *dev) 748 { 749 return MAX_RSS_INDIR_TBL_SIZE; 750 } 751 752 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id) 753 { 754 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 755 756 otx2_rss_ctx_flow_del(pfvf, ctx_id); 757 kfree(rss->rss_ctx[ctx_id]); 758 rss->rss_ctx[ctx_id] = NULL; 759 760 return 0; 761 } 762 763 static int otx2_rss_ctx_create(struct otx2_nic *pfvf, 764 u32 *rss_context) 765 { 766 struct otx2_rss_info *rss = &pfvf->hw.rss_info; 767 u8 ctx; 768 769 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) { 770 if (!rss->rss_ctx[ctx]) 771 break; 772 } 773 if (ctx == MAX_RSS_GROUPS) 774 return -EINVAL; 775 776 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL); 777 if (!rss->rss_ctx[ctx]) 778 return -ENOMEM; 779 *rss_context = ctx; 780 781 return 0; 782 } 783 784 /* RSS context configuration */ 785 static int otx2_set_rxfh_context(struct net_device *dev, const u32 *indir, 786 const u8 *hkey, const u8 hfunc, 787 u32 *rss_context, bool delete) 788 { 789 struct otx2_nic *pfvf = netdev_priv(dev); 790 struct otx2_rss_ctx *rss_ctx; 791 struct otx2_rss_info *rss; 792 int ret, idx; 793 794 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 795 return -EOPNOTSUPP; 796 797 if (*rss_context != ETH_RXFH_CONTEXT_ALLOC && 798 *rss_context >= MAX_RSS_GROUPS) 799 return -EINVAL; 800 801 rss = &pfvf->hw.rss_info; 802 803 if (!rss->enable) { 804 netdev_err(dev, "RSS is disabled, cannot change settings\n"); 805 return -EIO; 806 } 807 808 if (hkey) { 809 memcpy(rss->key, hkey, sizeof(rss->key)); 810 otx2_set_rss_key(pfvf); 811 } 812 if (delete) 813 return otx2_rss_ctx_delete(pfvf, *rss_context); 814 815 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) { 816 ret = otx2_rss_ctx_create(pfvf, rss_context); 817 if (ret) 818 return ret; 819 } 820 if (indir) { 821 rss_ctx = rss->rss_ctx[*rss_context]; 822 for (idx = 0; idx < rss->rss_size; idx++) 823 rss_ctx->ind_tbl[idx] = indir[idx]; 824 } 825 otx2_set_rss_table(pfvf, *rss_context); 826 827 return 0; 828 } 829 830 static int otx2_get_rxfh_context(struct net_device *dev, u32 *indir, 831 u8 *hkey, u8 *hfunc, u32 rss_context) 832 { 833 struct otx2_nic *pfvf = netdev_priv(dev); 834 struct otx2_rss_ctx *rss_ctx; 835 struct otx2_rss_info *rss; 836 int idx, rx_queues; 837 838 rss = &pfvf->hw.rss_info; 839 840 if (hfunc) 841 *hfunc = ETH_RSS_HASH_TOP; 842 843 if (!indir) 844 return 0; 845 846 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) { 847 rx_queues = pfvf->hw.rx_queues; 848 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++) 849 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues); 850 return 0; 851 } 852 if (rss_context >= MAX_RSS_GROUPS) 853 return -ENOENT; 854 855 rss_ctx = rss->rss_ctx[rss_context]; 856 if (!rss_ctx) 857 return -ENOENT; 858 859 if (indir) { 860 for (idx = 0; idx < rss->rss_size; idx++) 861 indir[idx] = rss_ctx->ind_tbl[idx]; 862 } 863 if (hkey) 864 memcpy(hkey, rss->key, sizeof(rss->key)); 865 866 return 0; 867 } 868 869 /* Get RSS configuration */ 870 static int otx2_get_rxfh(struct net_device *dev, u32 *indir, 871 u8 *hkey, u8 *hfunc) 872 { 873 return otx2_get_rxfh_context(dev, indir, hkey, hfunc, 874 DEFAULT_RSS_CONTEXT_GROUP); 875 } 876 877 /* Configure RSS table and hash key */ 878 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir, 879 const u8 *hkey, const u8 hfunc) 880 { 881 882 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP; 883 884 return otx2_set_rxfh_context(dev, indir, hkey, hfunc, &rss_context, 0); 885 } 886 887 static u32 otx2_get_msglevel(struct net_device *netdev) 888 { 889 struct otx2_nic *pfvf = netdev_priv(netdev); 890 891 return pfvf->msg_enable; 892 } 893 894 static void otx2_set_msglevel(struct net_device *netdev, u32 val) 895 { 896 struct otx2_nic *pfvf = netdev_priv(netdev); 897 898 pfvf->msg_enable = val; 899 } 900 901 static u32 otx2_get_link(struct net_device *netdev) 902 { 903 struct otx2_nic *pfvf = netdev_priv(netdev); 904 905 /* LBK link is internal and always UP */ 906 if (is_otx2_lbkvf(pfvf->pdev)) 907 return 1; 908 return pfvf->linfo.link_up; 909 } 910 911 static int otx2_get_ts_info(struct net_device *netdev, 912 struct ethtool_ts_info *info) 913 { 914 struct otx2_nic *pfvf = netdev_priv(netdev); 915 916 if (!pfvf->ptp) 917 return ethtool_op_get_ts_info(netdev, info); 918 919 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 920 SOF_TIMESTAMPING_RX_SOFTWARE | 921 SOF_TIMESTAMPING_SOFTWARE | 922 SOF_TIMESTAMPING_TX_HARDWARE | 923 SOF_TIMESTAMPING_RX_HARDWARE | 924 SOF_TIMESTAMPING_RAW_HARDWARE; 925 926 info->phc_index = otx2_ptp_clock_index(pfvf); 927 928 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 929 930 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 931 (1 << HWTSTAMP_FILTER_ALL); 932 933 return 0; 934 } 935 936 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf) 937 { 938 struct cgx_fw_data *rsp = NULL; 939 struct msg_req *req; 940 int err = 0; 941 942 mutex_lock(&pfvf->mbox.lock); 943 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox); 944 if (!req) { 945 mutex_unlock(&pfvf->mbox.lock); 946 return ERR_PTR(-ENOMEM); 947 } 948 949 err = otx2_sync_mbox_msg(&pfvf->mbox); 950 if (!err) { 951 rsp = (struct cgx_fw_data *) 952 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); 953 } else { 954 rsp = ERR_PTR(err); 955 } 956 957 mutex_unlock(&pfvf->mbox.lock); 958 return rsp; 959 } 960 961 static int otx2_get_fecparam(struct net_device *netdev, 962 struct ethtool_fecparam *fecparam) 963 { 964 struct otx2_nic *pfvf = netdev_priv(netdev); 965 struct cgx_fw_data *rsp; 966 const int fec[] = { 967 ETHTOOL_FEC_OFF, 968 ETHTOOL_FEC_BASER, 969 ETHTOOL_FEC_RS, 970 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS}; 971 #define FEC_MAX_INDEX 4 972 if (pfvf->linfo.fec < FEC_MAX_INDEX) 973 fecparam->active_fec = fec[pfvf->linfo.fec]; 974 975 rsp = otx2_get_fwdata(pfvf); 976 if (IS_ERR(rsp)) 977 return PTR_ERR(rsp); 978 979 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) { 980 if (!rsp->fwdata.supported_fec) 981 fecparam->fec = ETHTOOL_FEC_NONE; 982 else 983 fecparam->fec = fec[rsp->fwdata.supported_fec]; 984 } 985 return 0; 986 } 987 988 static int otx2_set_fecparam(struct net_device *netdev, 989 struct ethtool_fecparam *fecparam) 990 { 991 struct otx2_nic *pfvf = netdev_priv(netdev); 992 struct mbox *mbox = &pfvf->mbox; 993 struct fec_mode *req, *rsp; 994 int err = 0, fec = 0; 995 996 switch (fecparam->fec) { 997 /* Firmware does not support AUTO mode consider it as FEC_OFF */ 998 case ETHTOOL_FEC_OFF: 999 case ETHTOOL_FEC_AUTO: 1000 fec = OTX2_FEC_OFF; 1001 break; 1002 case ETHTOOL_FEC_RS: 1003 fec = OTX2_FEC_RS; 1004 break; 1005 case ETHTOOL_FEC_BASER: 1006 fec = OTX2_FEC_BASER; 1007 break; 1008 default: 1009 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d", 1010 fecparam->fec); 1011 return -EINVAL; 1012 } 1013 1014 if (fec == pfvf->linfo.fec) 1015 return 0; 1016 1017 mutex_lock(&mbox->lock); 1018 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox); 1019 if (!req) { 1020 err = -ENOMEM; 1021 goto end; 1022 } 1023 req->fec = fec; 1024 err = otx2_sync_mbox_msg(&pfvf->mbox); 1025 if (err) 1026 goto end; 1027 1028 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox, 1029 0, &req->hdr); 1030 if (rsp->fec >= 0) 1031 pfvf->linfo.fec = rsp->fec; 1032 else 1033 err = rsp->fec; 1034 end: 1035 mutex_unlock(&mbox->lock); 1036 return err; 1037 } 1038 1039 static void otx2_get_fec_info(u64 index, int req_mode, 1040 struct ethtool_link_ksettings *link_ksettings) 1041 { 1042 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, }; 1043 1044 switch (index) { 1045 case OTX2_FEC_NONE: 1046 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, 1047 otx2_fec_modes); 1048 break; 1049 case OTX2_FEC_BASER: 1050 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1051 otx2_fec_modes); 1052 break; 1053 case OTX2_FEC_RS: 1054 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1055 otx2_fec_modes); 1056 break; 1057 case OTX2_FEC_BASER | OTX2_FEC_RS: 1058 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, 1059 otx2_fec_modes); 1060 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, 1061 otx2_fec_modes); 1062 break; 1063 } 1064 1065 /* Add fec modes to existing modes */ 1066 if (req_mode == OTX2_MODE_ADVERTISED) 1067 linkmode_or(link_ksettings->link_modes.advertising, 1068 link_ksettings->link_modes.advertising, 1069 otx2_fec_modes); 1070 else 1071 linkmode_or(link_ksettings->link_modes.supported, 1072 link_ksettings->link_modes.supported, 1073 otx2_fec_modes); 1074 } 1075 1076 static void otx2_get_link_mode_info(u64 link_mode_bmap, 1077 bool req_mode, 1078 struct ethtool_link_ksettings 1079 *link_ksettings) 1080 { 1081 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, }; 1082 const int otx2_sgmii_features[6] = { 1083 ETHTOOL_LINK_MODE_10baseT_Half_BIT, 1084 ETHTOOL_LINK_MODE_10baseT_Full_BIT, 1085 ETHTOOL_LINK_MODE_100baseT_Half_BIT, 1086 ETHTOOL_LINK_MODE_100baseT_Full_BIT, 1087 ETHTOOL_LINK_MODE_1000baseT_Half_BIT, 1088 ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 1089 }; 1090 /* CGX link modes to Ethtool link mode mapping */ 1091 const int cgx_link_mode[27] = { 1092 0, /* SGMII Mode */ 1093 ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 1094 ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 1095 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, 1096 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, 1097 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 1098 0, 1099 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 1100 0, 1101 0, 1102 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 1103 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 1104 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 1105 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 1106 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 1107 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 1108 0, 1109 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, 1110 0, 1111 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 1112 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, 1113 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, 1114 0, 1115 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 1116 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 1117 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 1118 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 1119 }; 1120 u8 bit; 1121 1122 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, 27) { 1123 /* SGMII mode is set */ 1124 if (bit == 0) 1125 linkmode_set_bit_array(otx2_sgmii_features, 1126 ARRAY_SIZE(otx2_sgmii_features), 1127 otx2_link_modes); 1128 else 1129 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes); 1130 } 1131 1132 if (req_mode == OTX2_MODE_ADVERTISED) 1133 linkmode_copy(link_ksettings->link_modes.advertising, 1134 otx2_link_modes); 1135 else 1136 linkmode_copy(link_ksettings->link_modes.supported, 1137 otx2_link_modes); 1138 } 1139 1140 static int otx2_get_link_ksettings(struct net_device *netdev, 1141 struct ethtool_link_ksettings *cmd) 1142 { 1143 struct otx2_nic *pfvf = netdev_priv(netdev); 1144 struct cgx_fw_data *rsp = NULL; 1145 1146 cmd->base.duplex = pfvf->linfo.full_duplex; 1147 cmd->base.speed = pfvf->linfo.speed; 1148 cmd->base.autoneg = pfvf->linfo.an; 1149 1150 rsp = otx2_get_fwdata(pfvf); 1151 if (IS_ERR(rsp)) 1152 return PTR_ERR(rsp); 1153 1154 if (rsp->fwdata.supported_an) 1155 ethtool_link_ksettings_add_link_mode(cmd, 1156 supported, 1157 Autoneg); 1158 1159 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes, 1160 OTX2_MODE_ADVERTISED, cmd); 1161 otx2_get_fec_info(rsp->fwdata.advertised_fec, 1162 OTX2_MODE_ADVERTISED, cmd); 1163 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes, 1164 OTX2_MODE_SUPPORTED, cmd); 1165 otx2_get_fec_info(rsp->fwdata.supported_fec, 1166 OTX2_MODE_SUPPORTED, cmd); 1167 return 0; 1168 } 1169 1170 static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd, 1171 u64 *mode) 1172 { 1173 u32 bit_pos; 1174 1175 /* Firmware does not support requesting multiple advertised modes 1176 * return first set bit 1177 */ 1178 bit_pos = find_first_bit(cmd->link_modes.advertising, 1179 __ETHTOOL_LINK_MODE_MASK_NBITS); 1180 if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS) 1181 *mode = bit_pos; 1182 } 1183 1184 static int otx2_set_link_ksettings(struct net_device *netdev, 1185 const struct ethtool_link_ksettings *cmd) 1186 { 1187 struct otx2_nic *pf = netdev_priv(netdev); 1188 struct ethtool_link_ksettings cur_ks; 1189 struct cgx_set_link_mode_req *req; 1190 struct mbox *mbox = &pf->mbox; 1191 int err = 0; 1192 1193 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings)); 1194 1195 if (!ethtool_validate_speed(cmd->base.speed) || 1196 !ethtool_validate_duplex(cmd->base.duplex)) 1197 return -EINVAL; 1198 1199 if (cmd->base.autoneg != AUTONEG_ENABLE && 1200 cmd->base.autoneg != AUTONEG_DISABLE) 1201 return -EINVAL; 1202 1203 otx2_get_link_ksettings(netdev, &cur_ks); 1204 1205 /* Check requested modes against supported modes by hardware */ 1206 if (!linkmode_subset(cmd->link_modes.advertising, 1207 cur_ks.link_modes.supported)) 1208 return -EINVAL; 1209 1210 mutex_lock(&mbox->lock); 1211 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox); 1212 if (!req) { 1213 err = -ENOMEM; 1214 goto end; 1215 } 1216 1217 req->args.speed = cmd->base.speed; 1218 /* firmware expects 1 for half duplex and 0 for full duplex 1219 * hence inverting 1220 */ 1221 req->args.duplex = cmd->base.duplex ^ 0x1; 1222 req->args.an = cmd->base.autoneg; 1223 otx2_get_advertised_mode(cmd, &req->args.mode); 1224 1225 err = otx2_sync_mbox_msg(&pf->mbox); 1226 end: 1227 mutex_unlock(&mbox->lock); 1228 return err; 1229 } 1230 1231 static const struct ethtool_ops otx2_ethtool_ops = { 1232 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1233 ETHTOOL_COALESCE_MAX_FRAMES, 1234 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN | 1235 ETHTOOL_RING_USE_CQE_SIZE, 1236 .get_link = otx2_get_link, 1237 .get_drvinfo = otx2_get_drvinfo, 1238 .get_strings = otx2_get_strings, 1239 .get_ethtool_stats = otx2_get_ethtool_stats, 1240 .get_sset_count = otx2_get_sset_count, 1241 .set_channels = otx2_set_channels, 1242 .get_channels = otx2_get_channels, 1243 .get_ringparam = otx2_get_ringparam, 1244 .set_ringparam = otx2_set_ringparam, 1245 .get_coalesce = otx2_get_coalesce, 1246 .set_coalesce = otx2_set_coalesce, 1247 .get_rxnfc = otx2_get_rxnfc, 1248 .set_rxnfc = otx2_set_rxnfc, 1249 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1250 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1251 .get_rxfh = otx2_get_rxfh, 1252 .set_rxfh = otx2_set_rxfh, 1253 .get_rxfh_context = otx2_get_rxfh_context, 1254 .set_rxfh_context = otx2_set_rxfh_context, 1255 .get_msglevel = otx2_get_msglevel, 1256 .set_msglevel = otx2_set_msglevel, 1257 .get_pauseparam = otx2_get_pauseparam, 1258 .set_pauseparam = otx2_set_pauseparam, 1259 .get_ts_info = otx2_get_ts_info, 1260 .get_fecparam = otx2_get_fecparam, 1261 .set_fecparam = otx2_set_fecparam, 1262 .get_link_ksettings = otx2_get_link_ksettings, 1263 .set_link_ksettings = otx2_set_link_ksettings, 1264 }; 1265 1266 void otx2_set_ethtool_ops(struct net_device *netdev) 1267 { 1268 netdev->ethtool_ops = &otx2_ethtool_ops; 1269 } 1270 1271 /* VF's ethtool APIs */ 1272 static void otx2vf_get_drvinfo(struct net_device *netdev, 1273 struct ethtool_drvinfo *info) 1274 { 1275 struct otx2_nic *vf = netdev_priv(netdev); 1276 1277 strlcpy(info->driver, DRV_VF_NAME, sizeof(info->driver)); 1278 strlcpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info)); 1279 } 1280 1281 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data) 1282 { 1283 struct otx2_nic *vf = netdev_priv(netdev); 1284 int stats; 1285 1286 if (sset != ETH_SS_STATS) 1287 return; 1288 1289 for (stats = 0; stats < otx2_n_dev_stats; stats++) { 1290 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN); 1291 data += ETH_GSTRING_LEN; 1292 } 1293 1294 for (stats = 0; stats < otx2_n_drv_stats; stats++) { 1295 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN); 1296 data += ETH_GSTRING_LEN; 1297 } 1298 1299 otx2_get_qset_strings(vf, &data, 0); 1300 1301 strcpy(data, "reset_count"); 1302 data += ETH_GSTRING_LEN; 1303 } 1304 1305 static void otx2vf_get_ethtool_stats(struct net_device *netdev, 1306 struct ethtool_stats *stats, u64 *data) 1307 { 1308 struct otx2_nic *vf = netdev_priv(netdev); 1309 int stat; 1310 1311 otx2_get_dev_stats(vf); 1312 for (stat = 0; stat < otx2_n_dev_stats; stat++) 1313 *(data++) = ((u64 *)&vf->hw.dev_stats) 1314 [otx2_dev_stats[stat].index]; 1315 1316 for (stat = 0; stat < otx2_n_drv_stats; stat++) 1317 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats) 1318 [otx2_drv_stats[stat].index]); 1319 1320 otx2_get_qset_stats(vf, stats, &data); 1321 *(data++) = vf->reset_count; 1322 } 1323 1324 static int otx2vf_get_sset_count(struct net_device *netdev, int sset) 1325 { 1326 struct otx2_nic *vf = netdev_priv(netdev); 1327 int qstats_count; 1328 1329 if (sset != ETH_SS_STATS) 1330 return -EINVAL; 1331 1332 qstats_count = otx2_n_queue_stats * 1333 (vf->hw.rx_queues + vf->hw.tx_queues); 1334 1335 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1; 1336 } 1337 1338 static int otx2vf_get_link_ksettings(struct net_device *netdev, 1339 struct ethtool_link_ksettings *cmd) 1340 { 1341 struct otx2_nic *pfvf = netdev_priv(netdev); 1342 1343 if (is_otx2_lbkvf(pfvf->pdev)) { 1344 cmd->base.duplex = DUPLEX_FULL; 1345 cmd->base.speed = SPEED_100000; 1346 } else { 1347 return otx2_get_link_ksettings(netdev, cmd); 1348 } 1349 return 0; 1350 } 1351 1352 static const struct ethtool_ops otx2vf_ethtool_ops = { 1353 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1354 ETHTOOL_COALESCE_MAX_FRAMES, 1355 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN | 1356 ETHTOOL_RING_USE_CQE_SIZE, 1357 .get_link = otx2_get_link, 1358 .get_drvinfo = otx2vf_get_drvinfo, 1359 .get_strings = otx2vf_get_strings, 1360 .get_ethtool_stats = otx2vf_get_ethtool_stats, 1361 .get_sset_count = otx2vf_get_sset_count, 1362 .set_channels = otx2_set_channels, 1363 .get_channels = otx2_get_channels, 1364 .get_rxnfc = otx2_get_rxnfc, 1365 .set_rxnfc = otx2_set_rxnfc, 1366 .get_rxfh_key_size = otx2_get_rxfh_key_size, 1367 .get_rxfh_indir_size = otx2_get_rxfh_indir_size, 1368 .get_rxfh = otx2_get_rxfh, 1369 .set_rxfh = otx2_set_rxfh, 1370 .get_rxfh_context = otx2_get_rxfh_context, 1371 .set_rxfh_context = otx2_set_rxfh_context, 1372 .get_ringparam = otx2_get_ringparam, 1373 .set_ringparam = otx2_set_ringparam, 1374 .get_coalesce = otx2_get_coalesce, 1375 .set_coalesce = otx2_set_coalesce, 1376 .get_msglevel = otx2_get_msglevel, 1377 .set_msglevel = otx2_set_msglevel, 1378 .get_pauseparam = otx2_get_pauseparam, 1379 .set_pauseparam = otx2_set_pauseparam, 1380 .get_link_ksettings = otx2vf_get_link_ksettings, 1381 .get_ts_info = otx2_get_ts_info, 1382 }; 1383 1384 void otx2vf_set_ethtool_ops(struct net_device *netdev) 1385 { 1386 netdev->ethtool_ops = &otx2vf_ethtool_ops; 1387 } 1388 EXPORT_SYMBOL(otx2vf_set_ethtool_ops); 1389