1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2019 Mellanox Technologies. */
3 
4 #ifndef __MLX5_EN_PARAMS_H__
5 #define __MLX5_EN_PARAMS_H__
6 
7 #include "en.h"
8 
9 struct mlx5e_xsk_param {
10 	u16 headroom;
11 	u16 chunk_size;
12 	bool unaligned;
13 };
14 
15 struct mlx5e_cq_param {
16 	u32                        cqc[MLX5_ST_SZ_DW(cqc)];
17 	struct mlx5_wq_param       wq;
18 	u16                        eq_ix;
19 	u8                         cq_period_mode;
20 };
21 
22 struct mlx5e_rq_param {
23 	struct mlx5e_cq_param      cqp;
24 	u32                        rqc[MLX5_ST_SZ_DW(rqc)];
25 	struct mlx5_wq_param       wq;
26 	struct mlx5e_rq_frags_info frags_info;
27 };
28 
29 struct mlx5e_sq_param {
30 	struct mlx5e_cq_param      cqp;
31 	u32                        sqc[MLX5_ST_SZ_DW(sqc)];
32 	struct mlx5_wq_param       wq;
33 	bool                       is_mpw;
34 	bool                       is_tls;
35 	bool                       is_xdp_mb;
36 	u16                        stop_room;
37 };
38 
39 struct mlx5e_channel_param {
40 	struct mlx5e_rq_param      rq;
41 	struct mlx5e_sq_param      txq_sq;
42 	struct mlx5e_sq_param      xdp_sq;
43 	struct mlx5e_sq_param      icosq;
44 	struct mlx5e_sq_param      async_icosq;
45 };
46 
47 struct mlx5e_create_sq_param {
48 	struct mlx5_wq_ctrl        *wq_ctrl;
49 	u32                         cqn;
50 	u32                         ts_cqe_to_dest_cqn;
51 	u32                         tisn;
52 	u8                          tis_lst_sz;
53 	u8                          min_inline_mode;
54 };
55 
56 /* Striding RQ dynamic parameters */
57 
58 u8 mlx5e_mpwrq_page_shift(struct mlx5_core_dev *mdev, struct mlx5e_xsk_param *xsk);
59 enum mlx5e_mpwrq_umr_mode
60 mlx5e_mpwrq_umr_mode(struct mlx5_core_dev *mdev, struct mlx5e_xsk_param *xsk);
61 u8 mlx5e_mpwrq_umr_entry_size(enum mlx5e_mpwrq_umr_mode mode);
62 u8 mlx5e_mpwrq_log_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,
63 			  enum mlx5e_mpwrq_umr_mode umr_mode);
64 u8 mlx5e_mpwrq_pages_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,
65 			     enum mlx5e_mpwrq_umr_mode umr_mode);
66 u16 mlx5e_mpwrq_umr_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,
67 			   enum mlx5e_mpwrq_umr_mode umr_mode);
68 u8 mlx5e_mpwrq_umr_wqebbs(struct mlx5_core_dev *mdev, u8 page_shift,
69 			  enum mlx5e_mpwrq_umr_mode umr_mode);
70 u8 mlx5e_mpwrq_mtts_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,
71 			    enum mlx5e_mpwrq_umr_mode umr_mode);
72 u32 mlx5e_mpwrq_max_num_entries(struct mlx5_core_dev *mdev,
73 				enum mlx5e_mpwrq_umr_mode umr_mode);
74 u8 mlx5e_mpwrq_max_log_rq_pkts(struct mlx5_core_dev *mdev, u8 page_shift,
75 			       enum mlx5e_mpwrq_umr_mode umr_mode);
76 
77 /* Parameter calculations */
78 
79 void mlx5e_reset_tx_moderation(struct mlx5e_params *params, u8 cq_period_mode);
80 void mlx5e_reset_rx_moderation(struct mlx5e_params *params, u8 cq_period_mode);
81 void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode);
82 void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode);
83 
84 bool slow_pci_heuristic(struct mlx5_core_dev *mdev);
85 int mlx5e_mpwrq_validate_regular(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
86 int mlx5e_mpwrq_validate_xsk(struct mlx5_core_dev *mdev, struct mlx5e_params *params,
87 			     struct mlx5e_xsk_param *xsk);
88 void mlx5e_build_rq_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
89 void mlx5e_set_rq_type(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
90 void mlx5e_init_rq_type_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
91 
92 u16 mlx5e_get_linear_rq_headroom(struct mlx5e_params *params,
93 				 struct mlx5e_xsk_param *xsk);
94 bool mlx5e_rx_is_linear_skb(struct mlx5_core_dev *mdev,
95 			    struct mlx5e_params *params,
96 			    struct mlx5e_xsk_param *xsk);
97 bool mlx5e_rx_mpwqe_is_linear_skb(struct mlx5_core_dev *mdev,
98 				  struct mlx5e_params *params,
99 				  struct mlx5e_xsk_param *xsk);
100 u8 mlx5e_mpwqe_get_log_rq_size(struct mlx5_core_dev *mdev,
101 			       struct mlx5e_params *params,
102 			       struct mlx5e_xsk_param *xsk);
103 u8 mlx5e_shampo_get_log_hd_entry_size(struct mlx5_core_dev *mdev,
104 				      struct mlx5e_params *params);
105 u8 mlx5e_shampo_get_log_rsrv_size(struct mlx5_core_dev *mdev,
106 				  struct mlx5e_params *params);
107 u8 mlx5e_shampo_get_log_pkt_per_rsrv(struct mlx5_core_dev *mdev,
108 				     struct mlx5e_params *params);
109 u32 mlx5e_shampo_hd_per_wqe(struct mlx5_core_dev *mdev,
110 			    struct mlx5e_params *params,
111 			    struct mlx5e_rq_param *rq_param);
112 u32 mlx5e_shampo_hd_per_wq(struct mlx5_core_dev *mdev,
113 			   struct mlx5e_params *params,
114 			   struct mlx5e_rq_param *rq_param);
115 u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev,
116 				   struct mlx5e_params *params,
117 				   struct mlx5e_xsk_param *xsk);
118 u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev,
119 				   struct mlx5e_params *params,
120 				   struct mlx5e_xsk_param *xsk);
121 u8 mlx5e_mpwqe_get_min_wqe_bulk(unsigned int wq_sz);
122 u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev,
123 			  struct mlx5e_params *params,
124 			  struct mlx5e_xsk_param *xsk);
125 
126 /* Build queue parameters */
127 
128 void mlx5e_build_create_cq_param(struct mlx5e_create_cq_param *ccp, struct mlx5e_channel *c);
129 int mlx5e_build_rq_param(struct mlx5_core_dev *mdev,
130 			 struct mlx5e_params *params,
131 			 struct mlx5e_xsk_param *xsk,
132 			 u16 q_counter,
133 			 struct mlx5e_rq_param *param);
134 void mlx5e_build_drop_rq_param(struct mlx5_core_dev *mdev,
135 			       u16 q_counter,
136 			       struct mlx5e_rq_param *param);
137 void mlx5e_build_sq_param_common(struct mlx5_core_dev *mdev,
138 				 struct mlx5e_sq_param *param);
139 void mlx5e_build_sq_param(struct mlx5_core_dev *mdev,
140 			  struct mlx5e_params *params,
141 			  struct mlx5e_sq_param *param);
142 void mlx5e_build_tx_cq_param(struct mlx5_core_dev *mdev,
143 			     struct mlx5e_params *params,
144 			     struct mlx5e_cq_param *param);
145 void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,
146 			     struct mlx5e_params *params,
147 			     struct mlx5e_xsk_param *xsk,
148 			     struct mlx5e_sq_param *param);
149 int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,
150 			      struct mlx5e_params *params,
151 			      u16 q_counter,
152 			      struct mlx5e_channel_param *cparam);
153 
154 u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
155 int mlx5e_validate_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
156 bool mlx5e_verify_params_rx_mpwqe_strides(struct mlx5_core_dev *mdev,
157 					  struct mlx5e_params *params,
158 					  struct mlx5e_xsk_param *xsk);
159 
160 static inline void mlx5e_params_print_info(struct mlx5_core_dev *mdev,
161 					   struct mlx5e_params *params)
162 {
163 	mlx5_core_info(mdev, "MLX5E: StrdRq(%d) RqSz(%ld) StrdSz(%ld) RxCqeCmprss(%d %s)\n",
164 		       params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ,
165 		       params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ ?
166 		       BIT(mlx5e_mpwqe_get_log_rq_size(mdev, params, NULL)) :
167 		       BIT(params->log_rq_mtu_frames),
168 		       BIT(mlx5e_mpwqe_get_log_stride_size(mdev, params, NULL)),
169 		       MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS),
170 		       MLX5_CAP_GEN(mdev, enhanced_cqe_compression) ?
171 				       "enhanced" : "basic");
172 };
173 
174 #endif /* __MLX5_EN_PARAMS_H__ */
175