1 /* 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/kernel.h> 34 #include <linux/random.h> 35 #include <linux/vmalloc.h> 36 #include <linux/hardirq.h> 37 #include <linux/mlx5/driver.h> 38 #include <linux/kern_levels.h> 39 #include "mlx5_core.h" 40 #include "lib/eq.h" 41 #include "lib/mlx5.h" 42 #include "lib/events.h" 43 #include "lib/pci_vsc.h" 44 #include "lib/tout.h" 45 #include "diag/fw_tracer.h" 46 #include "diag/reporter_vnic.h" 47 48 enum { 49 MAX_MISSES = 3, 50 }; 51 52 enum { 53 MLX5_DROP_HEALTH_WORK, 54 }; 55 56 enum { 57 MLX5_SENSOR_NO_ERR = 0, 58 MLX5_SENSOR_PCI_COMM_ERR = 1, 59 MLX5_SENSOR_PCI_ERR = 2, 60 MLX5_SENSOR_NIC_DISABLED = 3, 61 MLX5_SENSOR_NIC_SW_RESET = 4, 62 MLX5_SENSOR_FW_SYND_RFR = 5, 63 }; 64 65 enum { 66 MLX5_SEVERITY_MASK = 0x7, 67 MLX5_SEVERITY_VALID_MASK = 0x8, 68 }; 69 70 u8 mlx5_get_nic_state(struct mlx5_core_dev *dev) 71 { 72 return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7; 73 } 74 75 void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state) 76 { 77 u32 cur_cmdq_addr_l_sz; 78 79 cur_cmdq_addr_l_sz = ioread32be(&dev->iseg->cmdq_addr_l_sz); 80 iowrite32be((cur_cmdq_addr_l_sz & 0xFFFFF000) | 81 state << MLX5_NIC_IFC_OFFSET, 82 &dev->iseg->cmdq_addr_l_sz); 83 } 84 85 static bool sensor_pci_not_working(struct mlx5_core_dev *dev) 86 { 87 struct mlx5_core_health *health = &dev->priv.health; 88 struct health_buffer __iomem *h = health->health; 89 90 /* Offline PCI reads return 0xffffffff */ 91 return (ioread32be(&h->fw_ver) == 0xffffffff); 92 } 93 94 static int mlx5_health_get_rfr(u8 rfr_severity) 95 { 96 return rfr_severity >> MLX5_RFR_BIT_OFFSET; 97 } 98 99 static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev) 100 { 101 struct mlx5_core_health *health = &dev->priv.health; 102 struct health_buffer __iomem *h = health->health; 103 u8 synd = ioread8(&h->synd); 104 u8 rfr; 105 106 rfr = mlx5_health_get_rfr(ioread8(&h->rfr_severity)); 107 108 if (rfr && synd) 109 mlx5_core_dbg(dev, "FW requests reset, synd: %d\n", synd); 110 return rfr && synd; 111 } 112 113 u32 mlx5_health_check_fatal_sensors(struct mlx5_core_dev *dev) 114 { 115 if (sensor_pci_not_working(dev)) 116 return MLX5_SENSOR_PCI_COMM_ERR; 117 if (pci_channel_offline(dev->pdev)) 118 return MLX5_SENSOR_PCI_ERR; 119 if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED) 120 return MLX5_SENSOR_NIC_DISABLED; 121 if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_SW_RESET) 122 return MLX5_SENSOR_NIC_SW_RESET; 123 if (sensor_fw_synd_rfr(dev)) 124 return MLX5_SENSOR_FW_SYND_RFR; 125 126 return MLX5_SENSOR_NO_ERR; 127 } 128 129 static int lock_sem_sw_reset(struct mlx5_core_dev *dev, bool lock) 130 { 131 enum mlx5_vsc_state state; 132 int ret; 133 134 if (!mlx5_core_is_pf(dev)) 135 return -EBUSY; 136 137 /* Try to lock GW access, this stage doesn't return 138 * EBUSY because locked GW does not mean that other PF 139 * already started the reset. 140 */ 141 ret = mlx5_vsc_gw_lock(dev); 142 if (ret == -EBUSY) 143 return -EINVAL; 144 if (ret) 145 return ret; 146 147 state = lock ? MLX5_VSC_LOCK : MLX5_VSC_UNLOCK; 148 /* At this stage, if the return status == EBUSY, then we know 149 * for sure that another PF started the reset, so don't allow 150 * another reset. 151 */ 152 ret = mlx5_vsc_sem_set_space(dev, MLX5_SEMAPHORE_SW_RESET, state); 153 if (ret) 154 mlx5_core_warn(dev, "Failed to lock SW reset semaphore\n"); 155 156 /* Unlock GW access */ 157 mlx5_vsc_gw_unlock(dev); 158 159 return ret; 160 } 161 162 static bool reset_fw_if_needed(struct mlx5_core_dev *dev) 163 { 164 bool supported = (ioread32be(&dev->iseg->initializing) >> 165 MLX5_FW_RESET_SUPPORTED_OFFSET) & 1; 166 u32 fatal_error; 167 168 if (!supported) 169 return false; 170 171 /* The reset only needs to be issued by one PF. The health buffer is 172 * shared between all functions, and will be cleared during a reset. 173 * Check again to avoid a redundant 2nd reset. If the fatal errors was 174 * PCI related a reset won't help. 175 */ 176 fatal_error = mlx5_health_check_fatal_sensors(dev); 177 if (fatal_error == MLX5_SENSOR_PCI_COMM_ERR || 178 fatal_error == MLX5_SENSOR_NIC_DISABLED || 179 fatal_error == MLX5_SENSOR_NIC_SW_RESET) { 180 mlx5_core_warn(dev, "Not issuing FW reset. Either it's already done or won't help."); 181 return false; 182 } 183 184 mlx5_core_warn(dev, "Issuing FW Reset\n"); 185 /* Write the NIC interface field to initiate the reset, the command 186 * interface address also resides here, don't overwrite it. 187 */ 188 mlx5_set_nic_state(dev, MLX5_NIC_IFC_SW_RESET); 189 190 return true; 191 } 192 193 static void enter_error_state(struct mlx5_core_dev *dev, bool force) 194 { 195 if (mlx5_health_check_fatal_sensors(dev) || force) { /* protected state setting */ 196 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 197 mlx5_cmd_flush(dev); 198 } 199 200 mlx5_notifier_call_chain(dev->priv.events, MLX5_DEV_EVENT_SYS_ERROR, (void *)1); 201 } 202 203 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) 204 { 205 bool err_detected = false; 206 207 /* Mark the device as fatal in order to abort FW commands */ 208 if ((mlx5_health_check_fatal_sensors(dev) || force) && 209 dev->state == MLX5_DEVICE_STATE_UP) { 210 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 211 err_detected = true; 212 } 213 mutex_lock(&dev->intf_state_mutex); 214 if (!err_detected && dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) 215 goto unlock;/* a previous error is still being handled */ 216 217 enter_error_state(dev, force); 218 unlock: 219 mutex_unlock(&dev->intf_state_mutex); 220 } 221 222 void mlx5_error_sw_reset(struct mlx5_core_dev *dev) 223 { 224 unsigned long end, delay_ms = mlx5_tout_ms(dev, PCI_TOGGLE); 225 int lock = -EBUSY; 226 227 mutex_lock(&dev->intf_state_mutex); 228 if (dev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) 229 goto unlock; 230 231 mlx5_core_err(dev, "start\n"); 232 233 if (mlx5_health_check_fatal_sensors(dev) == MLX5_SENSOR_FW_SYND_RFR) { 234 /* Get cr-dump and reset FW semaphore */ 235 lock = lock_sem_sw_reset(dev, true); 236 237 if (lock == -EBUSY) { 238 delay_ms = mlx5_tout_ms(dev, FULL_CRDUMP); 239 goto recover_from_sw_reset; 240 } 241 /* Execute SW reset */ 242 reset_fw_if_needed(dev); 243 } 244 245 recover_from_sw_reset: 246 /* Recover from SW reset */ 247 end = jiffies + msecs_to_jiffies(delay_ms); 248 do { 249 if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED) 250 break; 251 252 msleep(20); 253 } while (!time_after(jiffies, end)); 254 255 if (mlx5_get_nic_state(dev) != MLX5_NIC_IFC_DISABLED) { 256 dev_err(&dev->pdev->dev, "NIC IFC still %d after %lums.\n", 257 mlx5_get_nic_state(dev), delay_ms); 258 } 259 260 /* Release FW semaphore if you are the lock owner */ 261 if (!lock) 262 lock_sem_sw_reset(dev, false); 263 264 mlx5_core_err(dev, "end\n"); 265 266 unlock: 267 mutex_unlock(&dev->intf_state_mutex); 268 } 269 270 static void mlx5_handle_bad_state(struct mlx5_core_dev *dev) 271 { 272 u8 nic_interface = mlx5_get_nic_state(dev); 273 274 switch (nic_interface) { 275 case MLX5_NIC_IFC_FULL: 276 mlx5_core_warn(dev, "Expected to see disabled NIC but it is full driver\n"); 277 break; 278 279 case MLX5_NIC_IFC_DISABLED: 280 mlx5_core_warn(dev, "starting teardown\n"); 281 break; 282 283 case MLX5_NIC_IFC_NO_DRAM_NIC: 284 mlx5_core_warn(dev, "Expected to see disabled NIC but it is no dram nic\n"); 285 break; 286 287 case MLX5_NIC_IFC_SW_RESET: 288 /* The IFC mode field is 3 bits, so it will read 0x7 in 2 cases: 289 * 1. PCI has been disabled (ie. PCI-AER, PF driver unloaded 290 * and this is a VF), this is not recoverable by SW reset. 291 * Logging of this is handled elsewhere. 292 * 2. FW reset has been issued by another function, driver can 293 * be reloaded to recover after the mode switches to 294 * MLX5_NIC_IFC_DISABLED. 295 */ 296 if (dev->priv.health.fatal_error != MLX5_SENSOR_PCI_COMM_ERR) 297 mlx5_core_warn(dev, "NIC SW reset in progress\n"); 298 break; 299 300 default: 301 mlx5_core_warn(dev, "Expected to see disabled NIC but it is has invalid value %d\n", 302 nic_interface); 303 } 304 305 mlx5_disable_device(dev); 306 } 307 308 int mlx5_health_wait_pci_up(struct mlx5_core_dev *dev) 309 { 310 unsigned long end; 311 312 end = jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, FW_RESET)); 313 while (sensor_pci_not_working(dev)) { 314 if (time_after(jiffies, end)) 315 return -ETIMEDOUT; 316 if (test_bit(MLX5_BREAK_FW_WAIT, &dev->intf_state)) { 317 mlx5_core_warn(dev, "device is being removed, stop waiting for PCI\n"); 318 return -ENODEV; 319 } 320 msleep(100); 321 } 322 return 0; 323 } 324 325 static int mlx5_health_try_recover(struct mlx5_core_dev *dev) 326 { 327 mlx5_core_warn(dev, "handling bad device here\n"); 328 mlx5_handle_bad_state(dev); 329 if (mlx5_health_wait_pci_up(dev)) { 330 mlx5_core_err(dev, "health recovery flow aborted, PCI reads still not working\n"); 331 return -EIO; 332 } 333 mlx5_core_err(dev, "starting health recovery flow\n"); 334 if (mlx5_recover_device(dev) || mlx5_health_check_fatal_sensors(dev)) { 335 mlx5_core_err(dev, "health recovery failed\n"); 336 return -EIO; 337 } 338 339 mlx5_core_info(dev, "health recovery succeeded\n"); 340 return 0; 341 } 342 343 static const char *hsynd_str(u8 synd) 344 { 345 switch (synd) { 346 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR: 347 return "firmware internal error"; 348 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC: 349 return "irisc not responding"; 350 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR: 351 return "unrecoverable hardware error"; 352 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR: 353 return "firmware CRC error"; 354 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR: 355 return "ICM fetch PCI error"; 356 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR: 357 return "HW fatal error\n"; 358 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN: 359 return "async EQ buffer overrun"; 360 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR: 361 return "EQ error"; 362 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV: 363 return "Invalid EQ referenced"; 364 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR: 365 return "FFSER error"; 366 case MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR: 367 return "High temperature"; 368 default: 369 return "unrecognized error"; 370 } 371 } 372 373 static const char *mlx5_loglevel_str(int level) 374 { 375 switch (level) { 376 case LOGLEVEL_EMERG: 377 return "EMERGENCY"; 378 case LOGLEVEL_ALERT: 379 return "ALERT"; 380 case LOGLEVEL_CRIT: 381 return "CRITICAL"; 382 case LOGLEVEL_ERR: 383 return "ERROR"; 384 case LOGLEVEL_WARNING: 385 return "WARNING"; 386 case LOGLEVEL_NOTICE: 387 return "NOTICE"; 388 case LOGLEVEL_INFO: 389 return "INFO"; 390 case LOGLEVEL_DEBUG: 391 return "DEBUG"; 392 } 393 return "Unknown log level"; 394 } 395 396 static int mlx5_health_get_severity(u8 rfr_severity) 397 { 398 return rfr_severity & MLX5_SEVERITY_VALID_MASK ? 399 rfr_severity & MLX5_SEVERITY_MASK : LOGLEVEL_ERR; 400 } 401 402 static void print_health_info(struct mlx5_core_dev *dev) 403 { 404 struct mlx5_core_health *health = &dev->priv.health; 405 struct health_buffer __iomem *h = health->health; 406 u8 rfr_severity; 407 int severity; 408 int i; 409 410 /* If the syndrome is 0, the device is OK and no need to print buffer */ 411 if (!ioread8(&h->synd)) 412 return; 413 414 if (ioread32be(&h->fw_ver) == 0xFFFFFFFF) { 415 mlx5_log(dev, LOGLEVEL_ERR, "PCI slot is unavailable\n"); 416 return; 417 } 418 419 rfr_severity = ioread8(&h->rfr_severity); 420 severity = mlx5_health_get_severity(rfr_severity); 421 mlx5_log(dev, severity, "Health issue observed, %s, severity(%d) %s:\n", 422 hsynd_str(ioread8(&h->synd)), severity, mlx5_loglevel_str(severity)); 423 424 for (i = 0; i < ARRAY_SIZE(h->assert_var); i++) 425 mlx5_log(dev, severity, "assert_var[%d] 0x%08x\n", i, 426 ioread32be(h->assert_var + i)); 427 428 mlx5_log(dev, severity, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr)); 429 mlx5_log(dev, severity, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra)); 430 mlx5_log(dev, severity, "fw_ver %d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), 431 fw_rev_sub(dev)); 432 mlx5_log(dev, severity, "time %u\n", ioread32be(&h->time)); 433 mlx5_log(dev, severity, "hw_id 0x%08x\n", ioread32be(&h->hw_id)); 434 mlx5_log(dev, severity, "rfr %d\n", mlx5_health_get_rfr(rfr_severity)); 435 mlx5_log(dev, severity, "severity %d (%s)\n", severity, mlx5_loglevel_str(severity)); 436 mlx5_log(dev, severity, "irisc_index %d\n", ioread8(&h->irisc_index)); 437 mlx5_log(dev, severity, "synd 0x%x: %s\n", ioread8(&h->synd), 438 hsynd_str(ioread8(&h->synd))); 439 mlx5_log(dev, severity, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd)); 440 mlx5_log(dev, severity, "raw fw_ver 0x%08x\n", ioread32be(&h->fw_ver)); 441 } 442 443 static int 444 mlx5_fw_reporter_diagnose(struct devlink_health_reporter *reporter, 445 struct devlink_fmsg *fmsg, 446 struct netlink_ext_ack *extack) 447 { 448 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter); 449 struct mlx5_core_health *health = &dev->priv.health; 450 struct health_buffer __iomem *h = health->health; 451 u8 synd; 452 int err; 453 454 synd = ioread8(&h->synd); 455 err = devlink_fmsg_u8_pair_put(fmsg, "Syndrome", synd); 456 if (err || !synd) 457 return err; 458 return devlink_fmsg_string_pair_put(fmsg, "Description", hsynd_str(synd)); 459 } 460 461 struct mlx5_fw_reporter_ctx { 462 u8 err_synd; 463 int miss_counter; 464 }; 465 466 static int 467 mlx5_fw_reporter_ctx_pairs_put(struct devlink_fmsg *fmsg, 468 struct mlx5_fw_reporter_ctx *fw_reporter_ctx) 469 { 470 int err; 471 472 err = devlink_fmsg_u8_pair_put(fmsg, "syndrome", 473 fw_reporter_ctx->err_synd); 474 if (err) 475 return err; 476 err = devlink_fmsg_u32_pair_put(fmsg, "fw_miss_counter", 477 fw_reporter_ctx->miss_counter); 478 if (err) 479 return err; 480 return 0; 481 } 482 483 static int 484 mlx5_fw_reporter_heath_buffer_data_put(struct mlx5_core_dev *dev, 485 struct devlink_fmsg *fmsg) 486 { 487 struct mlx5_core_health *health = &dev->priv.health; 488 struct health_buffer __iomem *h = health->health; 489 u8 rfr_severity; 490 int err; 491 int i; 492 493 if (!ioread8(&h->synd)) 494 return 0; 495 496 err = devlink_fmsg_pair_nest_start(fmsg, "health buffer"); 497 if (err) 498 return err; 499 err = devlink_fmsg_obj_nest_start(fmsg); 500 if (err) 501 return err; 502 err = devlink_fmsg_arr_pair_nest_start(fmsg, "assert_var"); 503 if (err) 504 return err; 505 506 for (i = 0; i < ARRAY_SIZE(h->assert_var); i++) { 507 err = devlink_fmsg_u32_put(fmsg, ioread32be(h->assert_var + i)); 508 if (err) 509 return err; 510 } 511 err = devlink_fmsg_arr_pair_nest_end(fmsg); 512 if (err) 513 return err; 514 err = devlink_fmsg_u32_pair_put(fmsg, "assert_exit_ptr", 515 ioread32be(&h->assert_exit_ptr)); 516 if (err) 517 return err; 518 err = devlink_fmsg_u32_pair_put(fmsg, "assert_callra", 519 ioread32be(&h->assert_callra)); 520 if (err) 521 return err; 522 err = devlink_fmsg_u32_pair_put(fmsg, "time", ioread32be(&h->time)); 523 if (err) 524 return err; 525 err = devlink_fmsg_u32_pair_put(fmsg, "hw_id", ioread32be(&h->hw_id)); 526 if (err) 527 return err; 528 rfr_severity = ioread8(&h->rfr_severity); 529 err = devlink_fmsg_u8_pair_put(fmsg, "rfr", mlx5_health_get_rfr(rfr_severity)); 530 if (err) 531 return err; 532 err = devlink_fmsg_u8_pair_put(fmsg, "severity", mlx5_health_get_severity(rfr_severity)); 533 if (err) 534 return err; 535 err = devlink_fmsg_u8_pair_put(fmsg, "irisc_index", 536 ioread8(&h->irisc_index)); 537 if (err) 538 return err; 539 err = devlink_fmsg_u8_pair_put(fmsg, "synd", ioread8(&h->synd)); 540 if (err) 541 return err; 542 err = devlink_fmsg_u32_pair_put(fmsg, "ext_synd", 543 ioread16be(&h->ext_synd)); 544 if (err) 545 return err; 546 err = devlink_fmsg_u32_pair_put(fmsg, "raw_fw_ver", 547 ioread32be(&h->fw_ver)); 548 if (err) 549 return err; 550 err = devlink_fmsg_obj_nest_end(fmsg); 551 if (err) 552 return err; 553 return devlink_fmsg_pair_nest_end(fmsg); 554 } 555 556 static int 557 mlx5_fw_reporter_dump(struct devlink_health_reporter *reporter, 558 struct devlink_fmsg *fmsg, void *priv_ctx, 559 struct netlink_ext_ack *extack) 560 { 561 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter); 562 int err; 563 564 err = mlx5_fw_tracer_trigger_core_dump_general(dev); 565 if (err) 566 return err; 567 568 if (priv_ctx) { 569 struct mlx5_fw_reporter_ctx *fw_reporter_ctx = priv_ctx; 570 571 err = mlx5_fw_reporter_ctx_pairs_put(fmsg, fw_reporter_ctx); 572 if (err) 573 return err; 574 } 575 576 err = mlx5_fw_reporter_heath_buffer_data_put(dev, fmsg); 577 if (err) 578 return err; 579 return mlx5_fw_tracer_get_saved_traces_objects(dev->tracer, fmsg); 580 } 581 582 static void mlx5_fw_reporter_err_work(struct work_struct *work) 583 { 584 struct mlx5_fw_reporter_ctx fw_reporter_ctx; 585 struct mlx5_core_health *health; 586 587 health = container_of(work, struct mlx5_core_health, report_work); 588 589 if (IS_ERR_OR_NULL(health->fw_reporter)) 590 return; 591 592 fw_reporter_ctx.err_synd = health->synd; 593 fw_reporter_ctx.miss_counter = health->miss_counter; 594 if (fw_reporter_ctx.err_synd) { 595 devlink_health_report(health->fw_reporter, 596 "FW syndrome reported", &fw_reporter_ctx); 597 return; 598 } 599 if (fw_reporter_ctx.miss_counter) 600 devlink_health_report(health->fw_reporter, 601 "FW miss counter reported", 602 &fw_reporter_ctx); 603 } 604 605 static const struct devlink_health_reporter_ops mlx5_fw_reporter_ops = { 606 .name = "fw", 607 .diagnose = mlx5_fw_reporter_diagnose, 608 .dump = mlx5_fw_reporter_dump, 609 }; 610 611 static int 612 mlx5_fw_fatal_reporter_recover(struct devlink_health_reporter *reporter, 613 void *priv_ctx, 614 struct netlink_ext_ack *extack) 615 { 616 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter); 617 618 return mlx5_health_try_recover(dev); 619 } 620 621 static int 622 mlx5_fw_fatal_reporter_dump(struct devlink_health_reporter *reporter, 623 struct devlink_fmsg *fmsg, void *priv_ctx, 624 struct netlink_ext_ack *extack) 625 { 626 struct mlx5_core_dev *dev = devlink_health_reporter_priv(reporter); 627 u32 crdump_size = dev->priv.health.crdump_size; 628 u32 *cr_data; 629 int err; 630 631 if (!mlx5_core_is_pf(dev)) 632 return -EPERM; 633 634 cr_data = kvmalloc(crdump_size, GFP_KERNEL); 635 if (!cr_data) 636 return -ENOMEM; 637 err = mlx5_crdump_collect(dev, cr_data); 638 if (err) 639 goto free_data; 640 641 if (priv_ctx) { 642 struct mlx5_fw_reporter_ctx *fw_reporter_ctx = priv_ctx; 643 644 err = mlx5_fw_reporter_ctx_pairs_put(fmsg, fw_reporter_ctx); 645 if (err) 646 goto free_data; 647 } 648 649 err = devlink_fmsg_binary_pair_put(fmsg, "crdump_data", cr_data, crdump_size); 650 651 free_data: 652 kvfree(cr_data); 653 return err; 654 } 655 656 static void mlx5_fw_fatal_reporter_err_work(struct work_struct *work) 657 { 658 struct mlx5_fw_reporter_ctx fw_reporter_ctx; 659 struct mlx5_core_health *health; 660 struct mlx5_core_dev *dev; 661 struct devlink *devlink; 662 struct mlx5_priv *priv; 663 664 health = container_of(work, struct mlx5_core_health, fatal_report_work); 665 priv = container_of(health, struct mlx5_priv, health); 666 dev = container_of(priv, struct mlx5_core_dev, priv); 667 devlink = priv_to_devlink(dev); 668 669 mutex_lock(&dev->intf_state_mutex); 670 if (test_bit(MLX5_DROP_HEALTH_WORK, &health->flags)) { 671 mlx5_core_err(dev, "health works are not permitted at this stage\n"); 672 mutex_unlock(&dev->intf_state_mutex); 673 return; 674 } 675 mutex_unlock(&dev->intf_state_mutex); 676 enter_error_state(dev, false); 677 if (IS_ERR_OR_NULL(health->fw_fatal_reporter)) { 678 devl_lock(devlink); 679 if (mlx5_health_try_recover(dev)) 680 mlx5_core_err(dev, "health recovery failed\n"); 681 devl_unlock(devlink); 682 return; 683 } 684 fw_reporter_ctx.err_synd = health->synd; 685 fw_reporter_ctx.miss_counter = health->miss_counter; 686 if (devlink_health_report(health->fw_fatal_reporter, 687 "FW fatal error reported", &fw_reporter_ctx) == -ECANCELED) { 688 /* If recovery wasn't performed, due to grace period, 689 * unload the driver. This ensures that the driver 690 * closes all its resources and it is not subjected to 691 * requests from the kernel. 692 */ 693 mlx5_core_err(dev, "Driver is in error state. Unloading\n"); 694 mlx5_unload_one(dev, false); 695 } 696 } 697 698 static const struct devlink_health_reporter_ops mlx5_fw_fatal_reporter_ops = { 699 .name = "fw_fatal", 700 .recover = mlx5_fw_fatal_reporter_recover, 701 .dump = mlx5_fw_fatal_reporter_dump, 702 }; 703 704 #define MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD 180000 705 #define MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD 60000 706 #define MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD 30000 707 #define MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD 708 709 void mlx5_fw_reporters_create(struct mlx5_core_dev *dev) 710 { 711 struct mlx5_core_health *health = &dev->priv.health; 712 struct devlink *devlink = priv_to_devlink(dev); 713 u64 grace_period; 714 715 if (mlx5_core_is_ecpf(dev)) { 716 grace_period = MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD; 717 } else if (mlx5_core_is_pf(dev)) { 718 grace_period = MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD; 719 } else { 720 /* VF or SF */ 721 grace_period = MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD; 722 } 723 724 health->fw_reporter = 725 devl_health_reporter_create(devlink, &mlx5_fw_reporter_ops, 726 0, dev); 727 if (IS_ERR(health->fw_reporter)) 728 mlx5_core_warn(dev, "Failed to create fw reporter, err = %ld\n", 729 PTR_ERR(health->fw_reporter)); 730 731 health->fw_fatal_reporter = 732 devl_health_reporter_create(devlink, 733 &mlx5_fw_fatal_reporter_ops, 734 grace_period, 735 dev); 736 if (IS_ERR(health->fw_fatal_reporter)) 737 mlx5_core_warn(dev, "Failed to create fw fatal reporter, err = %ld\n", 738 PTR_ERR(health->fw_fatal_reporter)); 739 } 740 741 static void mlx5_fw_reporters_destroy(struct mlx5_core_dev *dev) 742 { 743 struct mlx5_core_health *health = &dev->priv.health; 744 745 if (!IS_ERR_OR_NULL(health->fw_reporter)) 746 devlink_health_reporter_destroy(health->fw_reporter); 747 748 if (!IS_ERR_OR_NULL(health->fw_fatal_reporter)) 749 devlink_health_reporter_destroy(health->fw_fatal_reporter); 750 } 751 752 static unsigned long get_next_poll_jiffies(struct mlx5_core_dev *dev) 753 { 754 unsigned long next; 755 756 get_random_bytes(&next, sizeof(next)); 757 next %= HZ; 758 next += jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, HEALTH_POLL_INTERVAL)); 759 760 return next; 761 } 762 763 void mlx5_trigger_health_work(struct mlx5_core_dev *dev) 764 { 765 struct mlx5_core_health *health = &dev->priv.health; 766 767 if (!mlx5_dev_is_lightweight(dev)) 768 queue_work(health->wq, &health->fatal_report_work); 769 } 770 771 #define MLX5_MSEC_PER_HOUR (MSEC_PER_SEC * 60 * 60) 772 static void mlx5_health_log_ts_update(struct work_struct *work) 773 { 774 struct delayed_work *dwork = to_delayed_work(work); 775 u32 out[MLX5_ST_SZ_DW(mrtc_reg)] = {}; 776 u32 in[MLX5_ST_SZ_DW(mrtc_reg)] = {}; 777 struct mlx5_core_health *health; 778 struct mlx5_core_dev *dev; 779 struct mlx5_priv *priv; 780 u64 now_us; 781 782 health = container_of(dwork, struct mlx5_core_health, update_fw_log_ts_work); 783 priv = container_of(health, struct mlx5_priv, health); 784 dev = container_of(priv, struct mlx5_core_dev, priv); 785 786 now_us = ktime_to_us(ktime_get_real()); 787 788 MLX5_SET(mrtc_reg, in, time_h, now_us >> 32); 789 MLX5_SET(mrtc_reg, in, time_l, now_us & 0xFFFFFFFF); 790 mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out), MLX5_REG_MRTC, 0, 1); 791 792 queue_delayed_work(health->wq, &health->update_fw_log_ts_work, 793 msecs_to_jiffies(MLX5_MSEC_PER_HOUR)); 794 } 795 796 static void poll_health(struct timer_list *t) 797 { 798 struct mlx5_core_dev *dev = from_timer(dev, t, priv.health.timer); 799 struct mlx5_core_health *health = &dev->priv.health; 800 struct health_buffer __iomem *h = health->health; 801 u32 fatal_error; 802 u8 prev_synd; 803 u32 count; 804 805 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) 806 goto out; 807 808 fatal_error = mlx5_health_check_fatal_sensors(dev); 809 810 if (fatal_error && !health->fatal_error) { 811 mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error); 812 dev->priv.health.fatal_error = fatal_error; 813 print_health_info(dev); 814 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 815 mlx5_trigger_health_work(dev); 816 return; 817 } 818 819 count = ioread32be(health->health_counter); 820 if (count == health->prev) 821 ++health->miss_counter; 822 else 823 health->miss_counter = 0; 824 825 health->prev = count; 826 if (health->miss_counter == MAX_MISSES) { 827 mlx5_core_err(dev, "device's health compromised - reached miss count\n"); 828 print_health_info(dev); 829 queue_work(health->wq, &health->report_work); 830 } 831 832 prev_synd = health->synd; 833 health->synd = ioread8(&h->synd); 834 if (health->synd && health->synd != prev_synd) 835 queue_work(health->wq, &health->report_work); 836 837 out: 838 mod_timer(&health->timer, get_next_poll_jiffies(dev)); 839 } 840 841 void mlx5_start_health_poll(struct mlx5_core_dev *dev) 842 { 843 u64 poll_interval_ms = mlx5_tout_ms(dev, HEALTH_POLL_INTERVAL); 844 struct mlx5_core_health *health = &dev->priv.health; 845 846 timer_setup(&health->timer, poll_health, 0); 847 health->fatal_error = MLX5_SENSOR_NO_ERR; 848 clear_bit(MLX5_DROP_HEALTH_WORK, &health->flags); 849 health->health = &dev->iseg->health; 850 health->health_counter = &dev->iseg->health_counter; 851 852 health->timer.expires = jiffies + msecs_to_jiffies(poll_interval_ms); 853 add_timer(&health->timer); 854 } 855 856 void mlx5_stop_health_poll(struct mlx5_core_dev *dev, bool disable_health) 857 { 858 struct mlx5_core_health *health = &dev->priv.health; 859 860 if (disable_health) 861 set_bit(MLX5_DROP_HEALTH_WORK, &health->flags); 862 863 del_timer_sync(&health->timer); 864 } 865 866 void mlx5_start_health_fw_log_up(struct mlx5_core_dev *dev) 867 { 868 struct mlx5_core_health *health = &dev->priv.health; 869 870 if (mlx5_core_is_pf(dev) && MLX5_CAP_MCAM_REG(dev, mrtc)) 871 queue_delayed_work(health->wq, &health->update_fw_log_ts_work, 0); 872 } 873 874 void mlx5_drain_health_wq(struct mlx5_core_dev *dev) 875 { 876 struct mlx5_core_health *health = &dev->priv.health; 877 878 set_bit(MLX5_DROP_HEALTH_WORK, &health->flags); 879 cancel_delayed_work_sync(&health->update_fw_log_ts_work); 880 cancel_work_sync(&health->report_work); 881 cancel_work_sync(&health->fatal_report_work); 882 } 883 884 void mlx5_health_cleanup(struct mlx5_core_dev *dev) 885 { 886 struct mlx5_core_health *health = &dev->priv.health; 887 888 cancel_delayed_work_sync(&health->update_fw_log_ts_work); 889 destroy_workqueue(health->wq); 890 mlx5_reporter_vnic_destroy(dev); 891 mlx5_fw_reporters_destroy(dev); 892 } 893 894 int mlx5_health_init(struct mlx5_core_dev *dev) 895 { 896 struct devlink *devlink = priv_to_devlink(dev); 897 struct mlx5_core_health *health; 898 char *name; 899 900 if (!mlx5_dev_is_lightweight(dev)) { 901 devl_lock(devlink); 902 mlx5_fw_reporters_create(dev); 903 devl_unlock(devlink); 904 } 905 mlx5_reporter_vnic_create(dev); 906 907 health = &dev->priv.health; 908 name = kmalloc(64, GFP_KERNEL); 909 if (!name) 910 goto out_err; 911 912 strcpy(name, "mlx5_health"); 913 strcat(name, dev_name(dev->device)); 914 health->wq = create_singlethread_workqueue(name); 915 kfree(name); 916 if (!health->wq) 917 goto out_err; 918 INIT_WORK(&health->fatal_report_work, mlx5_fw_fatal_reporter_err_work); 919 INIT_WORK(&health->report_work, mlx5_fw_reporter_err_work); 920 INIT_DELAYED_WORK(&health->update_fw_log_ts_work, mlx5_health_log_ts_update); 921 922 return 0; 923 924 out_err: 925 mlx5_reporter_vnic_destroy(dev); 926 mlx5_fw_reporters_destroy(dev); 927 return -ENOMEM; 928 } 929