1 // SPDX-License-Identifier: GPL-2.0+
2 
3 #include <linux/module.h>
4 #include <linux/if_bridge.h>
5 #include <linux/if_vlan.h>
6 #include <linux/iopoll.h>
7 #include <linux/ip.h>
8 #include <linux/of_platform.h>
9 #include <linux/of_net.h>
10 #include <linux/packing.h>
11 #include <linux/phy/phy.h>
12 #include <linux/reset.h>
13 #include <net/addrconf.h>
14 
15 #include "lan966x_main.h"
16 
17 #define XTR_EOF_0			0x00000080U
18 #define XTR_EOF_1			0x01000080U
19 #define XTR_EOF_2			0x02000080U
20 #define XTR_EOF_3			0x03000080U
21 #define XTR_PRUNED			0x04000080U
22 #define XTR_ABORT			0x05000080U
23 #define XTR_ESCAPE			0x06000080U
24 #define XTR_NOT_READY			0x07000080U
25 #define XTR_VALID_BYTES(x)		(4 - (((x) >> 24) & 3))
26 
27 #define READL_SLEEP_US			10
28 #define READL_TIMEOUT_US		100000000
29 
30 #define IO_RANGES 2
31 
32 static const struct of_device_id lan966x_match[] = {
33 	{ .compatible = "microchip,lan966x-switch" },
34 	{ }
35 };
36 MODULE_DEVICE_TABLE(of, lan966x_match);
37 
38 struct lan966x_main_io_resource {
39 	enum lan966x_target id;
40 	phys_addr_t offset;
41 	int range;
42 };
43 
44 static const struct lan966x_main_io_resource lan966x_main_iomap[] =  {
45 	{ TARGET_CPU,                   0xc0000, 0 }, /* 0xe00c0000 */
46 	{ TARGET_ORG,                         0, 1 }, /* 0xe2000000 */
47 	{ TARGET_GCB,                    0x4000, 1 }, /* 0xe2004000 */
48 	{ TARGET_QS,                     0x8000, 1 }, /* 0xe2008000 */
49 	{ TARGET_PTP,                    0xc000, 1 }, /* 0xe200c000 */
50 	{ TARGET_CHIP_TOP,              0x10000, 1 }, /* 0xe2010000 */
51 	{ TARGET_REW,                   0x14000, 1 }, /* 0xe2014000 */
52 	{ TARGET_SYS,                   0x28000, 1 }, /* 0xe2028000 */
53 	{ TARGET_DEV,                   0x34000, 1 }, /* 0xe2034000 */
54 	{ TARGET_DEV +  1,              0x38000, 1 }, /* 0xe2038000 */
55 	{ TARGET_DEV +  2,              0x3c000, 1 }, /* 0xe203c000 */
56 	{ TARGET_DEV +  3,              0x40000, 1 }, /* 0xe2040000 */
57 	{ TARGET_DEV +  4,              0x44000, 1 }, /* 0xe2044000 */
58 	{ TARGET_DEV +  5,              0x48000, 1 }, /* 0xe2048000 */
59 	{ TARGET_DEV +  6,              0x4c000, 1 }, /* 0xe204c000 */
60 	{ TARGET_DEV +  7,              0x50000, 1 }, /* 0xe2050000 */
61 	{ TARGET_QSYS,                 0x100000, 1 }, /* 0xe2100000 */
62 	{ TARGET_AFI,                  0x120000, 1 }, /* 0xe2120000 */
63 	{ TARGET_ANA,                  0x140000, 1 }, /* 0xe2140000 */
64 };
65 
66 static int lan966x_create_targets(struct platform_device *pdev,
67 				  struct lan966x *lan966x)
68 {
69 	struct resource *iores[IO_RANGES];
70 	void __iomem *begin[IO_RANGES];
71 	int idx;
72 
73 	/* Initially map the entire range and after that update each target to
74 	 * point inside the region at the correct offset. It is possible that
75 	 * other devices access the same region so don't add any checks about
76 	 * this.
77 	 */
78 	for (idx = 0; idx < IO_RANGES; idx++) {
79 		iores[idx] = platform_get_resource(pdev, IORESOURCE_MEM,
80 						   idx);
81 		if (!iores[idx]) {
82 			dev_err(&pdev->dev, "Invalid resource\n");
83 			return -EINVAL;
84 		}
85 
86 		begin[idx] = devm_ioremap(&pdev->dev,
87 					  iores[idx]->start,
88 					  resource_size(iores[idx]));
89 		if (!begin[idx]) {
90 			dev_err(&pdev->dev, "Unable to get registers: %s\n",
91 				iores[idx]->name);
92 			return -ENOMEM;
93 		}
94 	}
95 
96 	for (idx = 0; idx < ARRAY_SIZE(lan966x_main_iomap); idx++) {
97 		const struct lan966x_main_io_resource *iomap =
98 			&lan966x_main_iomap[idx];
99 
100 		lan966x->regs[iomap->id] = begin[iomap->range] + iomap->offset;
101 	}
102 
103 	return 0;
104 }
105 
106 static bool lan966x_port_unique_address(struct net_device *dev)
107 {
108 	struct lan966x_port *port = netdev_priv(dev);
109 	struct lan966x *lan966x = port->lan966x;
110 	int p;
111 
112 	for (p = 0; p < lan966x->num_phys_ports; ++p) {
113 		port = lan966x->ports[p];
114 		if (!port || port->dev == dev)
115 			continue;
116 
117 		if (ether_addr_equal(dev->dev_addr, port->dev->dev_addr))
118 			return false;
119 	}
120 
121 	return true;
122 }
123 
124 static int lan966x_port_set_mac_address(struct net_device *dev, void *p)
125 {
126 	struct lan966x_port *port = netdev_priv(dev);
127 	struct lan966x *lan966x = port->lan966x;
128 	const struct sockaddr *addr = p;
129 	int ret;
130 
131 	if (ether_addr_equal(addr->sa_data, dev->dev_addr))
132 		return 0;
133 
134 	/* Learn the new net device MAC address in the mac table. */
135 	ret = lan966x_mac_cpu_learn(lan966x, addr->sa_data, HOST_PVID);
136 	if (ret)
137 		return ret;
138 
139 	/* If there is another port with the same address as the dev, then don't
140 	 * delete it from the MAC table
141 	 */
142 	if (!lan966x_port_unique_address(dev))
143 		goto out;
144 
145 	/* Then forget the previous one. */
146 	ret = lan966x_mac_cpu_forget(lan966x, dev->dev_addr, HOST_PVID);
147 	if (ret)
148 		return ret;
149 
150 out:
151 	eth_hw_addr_set(dev, addr->sa_data);
152 	return ret;
153 }
154 
155 static int lan966x_port_get_phys_port_name(struct net_device *dev,
156 					   char *buf, size_t len)
157 {
158 	struct lan966x_port *port = netdev_priv(dev);
159 	int ret;
160 
161 	ret = snprintf(buf, len, "p%d", port->chip_port);
162 	if (ret >= len)
163 		return -EINVAL;
164 
165 	return 0;
166 }
167 
168 static int lan966x_port_open(struct net_device *dev)
169 {
170 	struct lan966x_port *port = netdev_priv(dev);
171 	struct lan966x *lan966x = port->lan966x;
172 	int err;
173 
174 	/* Enable receiving frames on the port, and activate auto-learning of
175 	 * MAC addresses.
176 	 */
177 	lan_rmw(ANA_PORT_CFG_LEARNAUTO_SET(1) |
178 		ANA_PORT_CFG_RECV_ENA_SET(1) |
179 		ANA_PORT_CFG_PORTID_VAL_SET(port->chip_port),
180 		ANA_PORT_CFG_LEARNAUTO |
181 		ANA_PORT_CFG_RECV_ENA |
182 		ANA_PORT_CFG_PORTID_VAL,
183 		lan966x, ANA_PORT_CFG(port->chip_port));
184 
185 	err = phylink_fwnode_phy_connect(port->phylink, port->fwnode, 0);
186 	if (err) {
187 		netdev_err(dev, "Could not attach to PHY\n");
188 		return err;
189 	}
190 
191 	phylink_start(port->phylink);
192 
193 	return 0;
194 }
195 
196 static int lan966x_port_stop(struct net_device *dev)
197 {
198 	struct lan966x_port *port = netdev_priv(dev);
199 
200 	lan966x_port_config_down(port);
201 	phylink_stop(port->phylink);
202 	phylink_disconnect_phy(port->phylink);
203 
204 	return 0;
205 }
206 
207 static int lan966x_port_inj_status(struct lan966x *lan966x)
208 {
209 	return lan_rd(lan966x, QS_INJ_STATUS);
210 }
211 
212 static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp)
213 {
214 	u32 val;
215 
216 	if (lan_rd(lan966x, QS_INJ_STATUS) & QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp)))
217 		return 0;
218 
219 	return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
220 					 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
221 					 READL_SLEEP_US, READL_TIMEOUT_US);
222 }
223 
224 static int lan966x_port_ifh_xmit(struct sk_buff *skb,
225 				 __be32 *ifh,
226 				 struct net_device *dev)
227 {
228 	struct lan966x_port *port = netdev_priv(dev);
229 	struct lan966x *lan966x = port->lan966x;
230 	u32 i, count, last;
231 	u8 grp = 0;
232 	u32 val;
233 	int err;
234 
235 	val = lan_rd(lan966x, QS_INJ_STATUS);
236 	if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp)) ||
237 	    (QS_INJ_STATUS_WMARK_REACHED_GET(val) & BIT(grp)))
238 		goto err;
239 
240 	/* Write start of frame */
241 	lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |
242 	       QS_INJ_CTRL_SOF_SET(1),
243 	       lan966x, QS_INJ_CTRL(grp));
244 
245 	/* Write IFH header */
246 	for (i = 0; i < IFH_LEN; ++i) {
247 		/* Wait until the fifo is ready */
248 		err = lan966x_port_inj_ready(lan966x, grp);
249 		if (err)
250 			goto err;
251 
252 		lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp));
253 	}
254 
255 	/* Write frame */
256 	count = DIV_ROUND_UP(skb->len, 4);
257 	last = skb->len % 4;
258 	for (i = 0; i < count; ++i) {
259 		/* Wait until the fifo is ready */
260 		err = lan966x_port_inj_ready(lan966x, grp);
261 		if (err)
262 			goto err;
263 
264 		lan_wr(((u32 *)skb->data)[i], lan966x, QS_INJ_WR(grp));
265 	}
266 
267 	/* Add padding */
268 	while (i < (LAN966X_BUFFER_MIN_SZ / 4)) {
269 		/* Wait until the fifo is ready */
270 		err = lan966x_port_inj_ready(lan966x, grp);
271 		if (err)
272 			goto err;
273 
274 		lan_wr(0, lan966x, QS_INJ_WR(grp));
275 		++i;
276 	}
277 
278 	/* Inidcate EOF and valid bytes in the last word */
279 	lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |
280 	       QS_INJ_CTRL_VLD_BYTES_SET(skb->len < LAN966X_BUFFER_MIN_SZ ?
281 				     0 : last) |
282 	       QS_INJ_CTRL_EOF_SET(1),
283 	       lan966x, QS_INJ_CTRL(grp));
284 
285 	/* Add dummy CRC */
286 	lan_wr(0, lan966x, QS_INJ_WR(grp));
287 	skb_tx_timestamp(skb);
288 
289 	dev->stats.tx_packets++;
290 	dev->stats.tx_bytes += skb->len;
291 
292 	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
293 	    LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
294 		return NETDEV_TX_OK;
295 
296 	dev_consume_skb_any(skb);
297 	return NETDEV_TX_OK;
298 
299 err:
300 	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
301 	    LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
302 		lan966x_ptp_txtstamp_release(port, skb);
303 
304 	return NETDEV_TX_BUSY;
305 }
306 
307 static void lan966x_ifh_set_bypass(void *ifh, u64 bypass)
308 {
309 	packing(ifh, &bypass, IFH_POS_BYPASS + IFH_WID_BYPASS - 1,
310 		IFH_POS_BYPASS, IFH_LEN * 4, PACK, 0);
311 }
312 
313 static void lan966x_ifh_set_port(void *ifh, u64 bypass)
314 {
315 	packing(ifh, &bypass, IFH_POS_DSTS + IFH_WID_DSTS - 1,
316 		IFH_POS_DSTS, IFH_LEN * 4, PACK, 0);
317 }
318 
319 static void lan966x_ifh_set_qos_class(void *ifh, u64 bypass)
320 {
321 	packing(ifh, &bypass, IFH_POS_QOS_CLASS + IFH_WID_QOS_CLASS - 1,
322 		IFH_POS_QOS_CLASS, IFH_LEN * 4, PACK, 0);
323 }
324 
325 static void lan966x_ifh_set_ipv(void *ifh, u64 bypass)
326 {
327 	packing(ifh, &bypass, IFH_POS_IPV + IFH_WID_IPV - 1,
328 		IFH_POS_IPV, IFH_LEN * 4, PACK, 0);
329 }
330 
331 static void lan966x_ifh_set_vid(void *ifh, u64 vid)
332 {
333 	packing(ifh, &vid, IFH_POS_TCI + IFH_WID_TCI - 1,
334 		IFH_POS_TCI, IFH_LEN * 4, PACK, 0);
335 }
336 
337 static void lan966x_ifh_set_rew_op(void *ifh, u64 rew_op)
338 {
339 	packing(ifh, &rew_op, IFH_POS_REW_CMD + IFH_WID_REW_CMD - 1,
340 		IFH_POS_REW_CMD, IFH_LEN * 4, PACK, 0);
341 }
342 
343 static void lan966x_ifh_set_timestamp(void *ifh, u64 timestamp)
344 {
345 	packing(ifh, &timestamp, IFH_POS_TIMESTAMP + IFH_WID_TIMESTAMP - 1,
346 		IFH_POS_TIMESTAMP, IFH_LEN * 4, PACK, 0);
347 }
348 
349 static int lan966x_port_xmit(struct sk_buff *skb, struct net_device *dev)
350 {
351 	struct lan966x_port *port = netdev_priv(dev);
352 	struct lan966x *lan966x = port->lan966x;
353 	__be32 ifh[IFH_LEN];
354 	int err;
355 
356 	memset(ifh, 0x0, sizeof(__be32) * IFH_LEN);
357 
358 	lan966x_ifh_set_bypass(ifh, 1);
359 	lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port));
360 	lan966x_ifh_set_qos_class(ifh, skb->priority >= 7 ? 0x7 : skb->priority);
361 	lan966x_ifh_set_ipv(ifh, skb->priority >= 7 ? 0x7 : skb->priority);
362 	lan966x_ifh_set_vid(ifh, skb_vlan_tag_get(skb));
363 
364 	if (port->lan966x->ptp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
365 		err = lan966x_ptp_txtstamp_request(port, skb);
366 		if (err)
367 			return err;
368 
369 		lan966x_ifh_set_rew_op(ifh, LAN966X_SKB_CB(skb)->rew_op);
370 		lan966x_ifh_set_timestamp(ifh, LAN966X_SKB_CB(skb)->ts_id);
371 	}
372 
373 	spin_lock(&lan966x->tx_lock);
374 	err = lan966x_port_ifh_xmit(skb, ifh, dev);
375 	spin_unlock(&lan966x->tx_lock);
376 
377 	return err;
378 }
379 
380 static int lan966x_port_change_mtu(struct net_device *dev, int new_mtu)
381 {
382 	struct lan966x_port *port = netdev_priv(dev);
383 	struct lan966x *lan966x = port->lan966x;
384 
385 	lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(new_mtu),
386 	       lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port));
387 	dev->mtu = new_mtu;
388 
389 	return 0;
390 }
391 
392 static int lan966x_mc_unsync(struct net_device *dev, const unsigned char *addr)
393 {
394 	struct lan966x_port *port = netdev_priv(dev);
395 	struct lan966x *lan966x = port->lan966x;
396 
397 	return lan966x_mac_forget(lan966x, addr, HOST_PVID, ENTRYTYPE_LOCKED);
398 }
399 
400 static int lan966x_mc_sync(struct net_device *dev, const unsigned char *addr)
401 {
402 	struct lan966x_port *port = netdev_priv(dev);
403 	struct lan966x *lan966x = port->lan966x;
404 
405 	return lan966x_mac_cpu_learn(lan966x, addr, HOST_PVID);
406 }
407 
408 static void lan966x_port_set_rx_mode(struct net_device *dev)
409 {
410 	__dev_mc_sync(dev, lan966x_mc_sync, lan966x_mc_unsync);
411 }
412 
413 static int lan966x_port_get_parent_id(struct net_device *dev,
414 				      struct netdev_phys_item_id *ppid)
415 {
416 	struct lan966x_port *port = netdev_priv(dev);
417 	struct lan966x *lan966x = port->lan966x;
418 
419 	ppid->id_len = sizeof(lan966x->base_mac);
420 	memcpy(&ppid->id, &lan966x->base_mac, ppid->id_len);
421 
422 	return 0;
423 }
424 
425 static int lan966x_port_ioctl(struct net_device *dev, struct ifreq *ifr,
426 			      int cmd)
427 {
428 	struct lan966x_port *port = netdev_priv(dev);
429 
430 	if (!phy_has_hwtstamp(dev->phydev) && port->lan966x->ptp) {
431 		switch (cmd) {
432 		case SIOCSHWTSTAMP:
433 			return lan966x_ptp_hwtstamp_set(port, ifr);
434 		case SIOCGHWTSTAMP:
435 			return lan966x_ptp_hwtstamp_get(port, ifr);
436 		}
437 	}
438 
439 	if (!dev->phydev)
440 		return -ENODEV;
441 
442 	return phy_mii_ioctl(dev->phydev, ifr, cmd);
443 }
444 
445 static const struct net_device_ops lan966x_port_netdev_ops = {
446 	.ndo_open			= lan966x_port_open,
447 	.ndo_stop			= lan966x_port_stop,
448 	.ndo_start_xmit			= lan966x_port_xmit,
449 	.ndo_change_mtu			= lan966x_port_change_mtu,
450 	.ndo_set_rx_mode		= lan966x_port_set_rx_mode,
451 	.ndo_get_phys_port_name		= lan966x_port_get_phys_port_name,
452 	.ndo_get_stats64		= lan966x_stats_get,
453 	.ndo_set_mac_address		= lan966x_port_set_mac_address,
454 	.ndo_get_port_parent_id		= lan966x_port_get_parent_id,
455 	.ndo_eth_ioctl			= lan966x_port_ioctl,
456 };
457 
458 bool lan966x_netdevice_check(const struct net_device *dev)
459 {
460 	return dev->netdev_ops == &lan966x_port_netdev_ops;
461 }
462 
463 static bool lan966x_hw_offload(struct lan966x *lan966x, u32 port,
464 			       struct sk_buff *skb)
465 {
466 	u32 val;
467 
468 	/* The IGMP and MLD frames are not forward by the HW if
469 	 * multicast snooping is enabled, therefor don't mark as
470 	 * offload to allow the SW to forward the frames accordingly.
471 	 */
472 	val = lan_rd(lan966x, ANA_CPU_FWD_CFG(port));
473 	if (!(val & (ANA_CPU_FWD_CFG_IGMP_REDIR_ENA |
474 		     ANA_CPU_FWD_CFG_MLD_REDIR_ENA)))
475 		return true;
476 
477 	if (eth_type_vlan(skb->protocol)) {
478 		skb = skb_vlan_untag(skb);
479 		if (unlikely(!skb))
480 			return false;
481 	}
482 
483 	if (skb->protocol == htons(ETH_P_IP) &&
484 	    ip_hdr(skb)->protocol == IPPROTO_IGMP)
485 		return false;
486 
487 	if (IS_ENABLED(CONFIG_IPV6) &&
488 	    skb->protocol == htons(ETH_P_IPV6) &&
489 	    ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr) &&
490 	    !ipv6_mc_check_mld(skb))
491 		return false;
492 
493 	return true;
494 }
495 
496 static int lan966x_port_xtr_status(struct lan966x *lan966x, u8 grp)
497 {
498 	return lan_rd(lan966x, QS_XTR_RD(grp));
499 }
500 
501 static int lan966x_port_xtr_ready(struct lan966x *lan966x, u8 grp)
502 {
503 	u32 val;
504 
505 	return read_poll_timeout(lan966x_port_xtr_status, val,
506 				 val != XTR_NOT_READY,
507 				 READL_SLEEP_US, READL_TIMEOUT_US, false,
508 				 lan966x, grp);
509 }
510 
511 static int lan966x_rx_frame_word(struct lan966x *lan966x, u8 grp, u32 *rval)
512 {
513 	u32 bytes_valid;
514 	u32 val;
515 	int err;
516 
517 	val = lan_rd(lan966x, QS_XTR_RD(grp));
518 	if (val == XTR_NOT_READY) {
519 		err = lan966x_port_xtr_ready(lan966x, grp);
520 		if (err)
521 			return -EIO;
522 	}
523 
524 	switch (val) {
525 	case XTR_ABORT:
526 		return -EIO;
527 	case XTR_EOF_0:
528 	case XTR_EOF_1:
529 	case XTR_EOF_2:
530 	case XTR_EOF_3:
531 	case XTR_PRUNED:
532 		bytes_valid = XTR_VALID_BYTES(val);
533 		val = lan_rd(lan966x, QS_XTR_RD(grp));
534 		if (val == XTR_ESCAPE)
535 			*rval = lan_rd(lan966x, QS_XTR_RD(grp));
536 		else
537 			*rval = val;
538 
539 		return bytes_valid;
540 	case XTR_ESCAPE:
541 		*rval = lan_rd(lan966x, QS_XTR_RD(grp));
542 
543 		return 4;
544 	default:
545 		*rval = val;
546 
547 		return 4;
548 	}
549 }
550 
551 static void lan966x_ifh_get_src_port(void *ifh, u64 *src_port)
552 {
553 	packing(ifh, src_port, IFH_POS_SRCPORT + IFH_WID_SRCPORT - 1,
554 		IFH_POS_SRCPORT, IFH_LEN * 4, UNPACK, 0);
555 }
556 
557 static void lan966x_ifh_get_len(void *ifh, u64 *len)
558 {
559 	packing(ifh, len, IFH_POS_LEN + IFH_WID_LEN - 1,
560 		IFH_POS_LEN, IFH_LEN * 4, UNPACK, 0);
561 }
562 
563 static void lan966x_ifh_get_timestamp(void *ifh, u64 *timestamp)
564 {
565 	packing(ifh, timestamp, IFH_POS_TIMESTAMP + IFH_WID_TIMESTAMP - 1,
566 		IFH_POS_TIMESTAMP, IFH_LEN * 4, UNPACK, 0);
567 }
568 
569 static irqreturn_t lan966x_xtr_irq_handler(int irq, void *args)
570 {
571 	struct lan966x *lan966x = args;
572 	int i, grp = 0, err = 0;
573 
574 	if (!(lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp)))
575 		return IRQ_NONE;
576 
577 	do {
578 		u64 src_port, len, timestamp;
579 		struct net_device *dev;
580 		struct sk_buff *skb;
581 		int sz = 0, buf_len;
582 		u32 ifh[IFH_LEN];
583 		u32 *buf;
584 		u32 val;
585 
586 		for (i = 0; i < IFH_LEN; i++) {
587 			err = lan966x_rx_frame_word(lan966x, grp, &ifh[i]);
588 			if (err != 4)
589 				goto recover;
590 		}
591 
592 		err = 0;
593 
594 		lan966x_ifh_get_src_port(ifh, &src_port);
595 		lan966x_ifh_get_len(ifh, &len);
596 		lan966x_ifh_get_timestamp(ifh, &timestamp);
597 
598 		WARN_ON(src_port >= lan966x->num_phys_ports);
599 
600 		dev = lan966x->ports[src_port]->dev;
601 		skb = netdev_alloc_skb(dev, len);
602 		if (unlikely(!skb)) {
603 			netdev_err(dev, "Unable to allocate sk_buff\n");
604 			err = -ENOMEM;
605 			break;
606 		}
607 		buf_len = len - ETH_FCS_LEN;
608 		buf = (u32 *)skb_put(skb, buf_len);
609 
610 		len = 0;
611 		do {
612 			sz = lan966x_rx_frame_word(lan966x, grp, &val);
613 			if (sz < 0) {
614 				kfree_skb(skb);
615 				goto recover;
616 			}
617 
618 			*buf++ = val;
619 			len += sz;
620 		} while (len < buf_len);
621 
622 		/* Read the FCS */
623 		sz = lan966x_rx_frame_word(lan966x, grp, &val);
624 		if (sz < 0) {
625 			kfree_skb(skb);
626 			goto recover;
627 		}
628 
629 		/* Update the statistics if part of the FCS was read before */
630 		len -= ETH_FCS_LEN - sz;
631 
632 		if (unlikely(dev->features & NETIF_F_RXFCS)) {
633 			buf = (u32 *)skb_put(skb, ETH_FCS_LEN);
634 			*buf = val;
635 		}
636 
637 		lan966x_ptp_rxtstamp(lan966x, skb, timestamp);
638 		skb->protocol = eth_type_trans(skb, dev);
639 
640 		if (lan966x->bridge_mask & BIT(src_port)) {
641 			skb->offload_fwd_mark = 1;
642 
643 			skb_reset_network_header(skb);
644 			if (!lan966x_hw_offload(lan966x, src_port, skb))
645 				skb->offload_fwd_mark = 0;
646 		}
647 
648 		if (!skb_defer_rx_timestamp(skb))
649 			netif_rx(skb);
650 
651 		dev->stats.rx_bytes += len;
652 		dev->stats.rx_packets++;
653 
654 recover:
655 		if (sz < 0 || err)
656 			lan_rd(lan966x, QS_XTR_RD(grp));
657 
658 	} while (lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp));
659 
660 	return IRQ_HANDLED;
661 }
662 
663 static irqreturn_t lan966x_ana_irq_handler(int irq, void *args)
664 {
665 	struct lan966x *lan966x = args;
666 
667 	return lan966x_mac_irq_handler(lan966x);
668 }
669 
670 static void lan966x_cleanup_ports(struct lan966x *lan966x)
671 {
672 	struct lan966x_port *port;
673 	int p;
674 
675 	for (p = 0; p < lan966x->num_phys_ports; p++) {
676 		port = lan966x->ports[p];
677 		if (!port)
678 			continue;
679 
680 		if (port->dev)
681 			unregister_netdev(port->dev);
682 
683 		if (port->phylink) {
684 			rtnl_lock();
685 			lan966x_port_stop(port->dev);
686 			rtnl_unlock();
687 			phylink_destroy(port->phylink);
688 			port->phylink = NULL;
689 		}
690 
691 		if (port->fwnode)
692 			fwnode_handle_put(port->fwnode);
693 	}
694 
695 	disable_irq(lan966x->xtr_irq);
696 	lan966x->xtr_irq = -ENXIO;
697 
698 	if (lan966x->ana_irq) {
699 		disable_irq(lan966x->ana_irq);
700 		lan966x->ana_irq = -ENXIO;
701 	}
702 
703 	if (lan966x->ptp_irq)
704 		devm_free_irq(lan966x->dev, lan966x->ptp_irq, lan966x);
705 }
706 
707 static int lan966x_probe_port(struct lan966x *lan966x, u32 p,
708 			      phy_interface_t phy_mode,
709 			      struct fwnode_handle *portnp)
710 {
711 	struct lan966x_port *port;
712 	struct phylink *phylink;
713 	struct net_device *dev;
714 	int err;
715 
716 	if (p >= lan966x->num_phys_ports)
717 		return -EINVAL;
718 
719 	dev = devm_alloc_etherdev_mqs(lan966x->dev,
720 				      sizeof(struct lan966x_port), 8, 1);
721 	if (!dev)
722 		return -ENOMEM;
723 
724 	SET_NETDEV_DEV(dev, lan966x->dev);
725 	port = netdev_priv(dev);
726 	port->dev = dev;
727 	port->lan966x = lan966x;
728 	port->chip_port = p;
729 	lan966x->ports[p] = port;
730 
731 	dev->max_mtu = ETH_MAX_MTU;
732 
733 	dev->netdev_ops = &lan966x_port_netdev_ops;
734 	dev->ethtool_ops = &lan966x_ethtool_ops;
735 	dev->features |= NETIF_F_HW_VLAN_CTAG_TX |
736 			 NETIF_F_HW_VLAN_STAG_TX;
737 	dev->needed_headroom = IFH_LEN * sizeof(u32);
738 
739 	eth_hw_addr_gen(dev, lan966x->base_mac, p + 1);
740 
741 	lan966x_mac_learn(lan966x, PGID_CPU, dev->dev_addr, HOST_PVID,
742 			  ENTRYTYPE_LOCKED);
743 
744 	port->phylink_config.dev = &port->dev->dev;
745 	port->phylink_config.type = PHYLINK_NETDEV;
746 	port->phylink_pcs.poll = true;
747 	port->phylink_pcs.ops = &lan966x_phylink_pcs_ops;
748 
749 	port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
750 		MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
751 
752 	__set_bit(PHY_INTERFACE_MODE_MII,
753 		  port->phylink_config.supported_interfaces);
754 	__set_bit(PHY_INTERFACE_MODE_GMII,
755 		  port->phylink_config.supported_interfaces);
756 	__set_bit(PHY_INTERFACE_MODE_SGMII,
757 		  port->phylink_config.supported_interfaces);
758 	__set_bit(PHY_INTERFACE_MODE_QSGMII,
759 		  port->phylink_config.supported_interfaces);
760 	__set_bit(PHY_INTERFACE_MODE_1000BASEX,
761 		  port->phylink_config.supported_interfaces);
762 	__set_bit(PHY_INTERFACE_MODE_2500BASEX,
763 		  port->phylink_config.supported_interfaces);
764 
765 	phylink = phylink_create(&port->phylink_config,
766 				 portnp,
767 				 phy_mode,
768 				 &lan966x_phylink_mac_ops);
769 	if (IS_ERR(phylink)) {
770 		port->dev = NULL;
771 		return PTR_ERR(phylink);
772 	}
773 
774 	port->phylink = phylink;
775 
776 	err = register_netdev(dev);
777 	if (err) {
778 		dev_err(lan966x->dev, "register_netdev failed\n");
779 		return err;
780 	}
781 
782 	lan966x_vlan_port_set_vlan_aware(port, 0);
783 	lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);
784 	lan966x_vlan_port_apply(port);
785 
786 	return 0;
787 }
788 
789 static void lan966x_init(struct lan966x *lan966x)
790 {
791 	u32 p, i;
792 
793 	/* MAC table initialization */
794 	lan966x_mac_init(lan966x);
795 
796 	lan966x_vlan_init(lan966x);
797 
798 	/* Flush queues */
799 	lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) |
800 	       GENMASK(1, 0),
801 	       lan966x, QS_XTR_FLUSH);
802 
803 	/* Allow to drain */
804 	mdelay(1);
805 
806 	/* All Queues normal */
807 	lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) &
808 	       ~(GENMASK(1, 0)),
809 	       lan966x, QS_XTR_FLUSH);
810 
811 	/* Set MAC age time to default value, the entry is aged after
812 	 * 2 * AGE_PERIOD
813 	 */
814 	lan_wr(ANA_AUTOAGE_AGE_PERIOD_SET(BR_DEFAULT_AGEING_TIME / 2 / HZ),
815 	       lan966x, ANA_AUTOAGE);
816 
817 	/* Disable learning for frames discarded by VLAN ingress filtering */
818 	lan_rmw(ANA_ADVLEARN_VLAN_CHK_SET(1),
819 		ANA_ADVLEARN_VLAN_CHK,
820 		lan966x, ANA_ADVLEARN);
821 
822 	/* Setup frame ageing - "2 sec" - The unit is 6.5 us on lan966x */
823 	lan_wr(SYS_FRM_AGING_AGE_TX_ENA_SET(1) |
824 	       (20000000 / 65),
825 	       lan966x,  SYS_FRM_AGING);
826 
827 	/* Map the 8 CPU extraction queues to CPU port */
828 	lan_wr(0, lan966x, QSYS_CPU_GROUP_MAP);
829 
830 	/* Do byte-swap and expect status after last data word
831 	 * Extraction: Mode: manual extraction) | Byte_swap
832 	 */
833 	lan_wr(QS_XTR_GRP_CFG_MODE_SET(1) |
834 	       QS_XTR_GRP_CFG_BYTE_SWAP_SET(1),
835 	       lan966x, QS_XTR_GRP_CFG(0));
836 
837 	/* Injection: Mode: manual injection | Byte_swap */
838 	lan_wr(QS_INJ_GRP_CFG_MODE_SET(1) |
839 	       QS_INJ_GRP_CFG_BYTE_SWAP_SET(1),
840 	       lan966x, QS_INJ_GRP_CFG(0));
841 
842 	lan_rmw(QS_INJ_CTRL_GAP_SIZE_SET(0),
843 		QS_INJ_CTRL_GAP_SIZE,
844 		lan966x, QS_INJ_CTRL(0));
845 
846 	/* Enable IFH insertion/parsing on CPU ports */
847 	lan_wr(SYS_PORT_MODE_INCL_INJ_HDR_SET(1) |
848 	       SYS_PORT_MODE_INCL_XTR_HDR_SET(1),
849 	       lan966x, SYS_PORT_MODE(CPU_PORT));
850 
851 	/* Setup flooding PGIDs */
852 	lan_wr(ANA_FLOODING_IPMC_FLD_MC4_DATA_SET(PGID_MCIPV4) |
853 	       ANA_FLOODING_IPMC_FLD_MC4_CTRL_SET(PGID_MC) |
854 	       ANA_FLOODING_IPMC_FLD_MC6_DATA_SET(PGID_MCIPV6) |
855 	       ANA_FLOODING_IPMC_FLD_MC6_CTRL_SET(PGID_MC),
856 	       lan966x, ANA_FLOODING_IPMC);
857 
858 	/* There are 8 priorities */
859 	for (i = 0; i < 8; ++i)
860 		lan_rmw(ANA_FLOODING_FLD_MULTICAST_SET(PGID_MC) |
861 			ANA_FLOODING_FLD_UNICAST_SET(PGID_UC) |
862 			ANA_FLOODING_FLD_BROADCAST_SET(PGID_BC),
863 			ANA_FLOODING_FLD_MULTICAST |
864 			ANA_FLOODING_FLD_UNICAST |
865 			ANA_FLOODING_FLD_BROADCAST,
866 			lan966x, ANA_FLOODING(i));
867 
868 	for (i = 0; i < PGID_ENTRIES; ++i)
869 		/* Set all the entries to obey VLAN_VLAN */
870 		lan_rmw(ANA_PGID_CFG_OBEY_VLAN_SET(1),
871 			ANA_PGID_CFG_OBEY_VLAN,
872 			lan966x, ANA_PGID_CFG(i));
873 
874 	for (p = 0; p < lan966x->num_phys_ports; p++) {
875 		/* Disable bridging by default */
876 		lan_rmw(ANA_PGID_PGID_SET(0x0),
877 			ANA_PGID_PGID,
878 			lan966x, ANA_PGID(p + PGID_SRC));
879 
880 		/* Do not forward BPDU frames to the front ports and copy them
881 		 * to CPU
882 		 */
883 		lan_wr(0xffff, lan966x, ANA_CPU_FWD_BPDU_CFG(p));
884 	}
885 
886 	/* Set source buffer size for each priority and each port to 1500 bytes */
887 	for (i = 0; i <= QSYS_Q_RSRV; ++i) {
888 		lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(i));
889 		lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(512 + i));
890 	}
891 
892 	/* Enable switching to/from cpu port */
893 	lan_wr(QSYS_SW_PORT_MODE_PORT_ENA_SET(1) |
894 	       QSYS_SW_PORT_MODE_SCH_NEXT_CFG_SET(1) |
895 	       QSYS_SW_PORT_MODE_INGRESS_DROP_MODE_SET(1),
896 	       lan966x,  QSYS_SW_PORT_MODE(CPU_PORT));
897 
898 	/* Configure and enable the CPU port */
899 	lan_rmw(ANA_PGID_PGID_SET(0),
900 		ANA_PGID_PGID,
901 		lan966x, ANA_PGID(CPU_PORT));
902 	lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT)),
903 		ANA_PGID_PGID,
904 		lan966x, ANA_PGID(PGID_CPU));
905 
906 	/* Multicast to all other ports */
907 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
908 		ANA_PGID_PGID,
909 		lan966x, ANA_PGID(PGID_MC));
910 
911 	/* This will be controlled by mrouter ports */
912 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
913 		ANA_PGID_PGID,
914 		lan966x, ANA_PGID(PGID_MCIPV4));
915 
916 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
917 		ANA_PGID_PGID,
918 		lan966x, ANA_PGID(PGID_MCIPV6));
919 
920 	/* Unicast to all other ports */
921 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
922 		ANA_PGID_PGID,
923 		lan966x, ANA_PGID(PGID_UC));
924 
925 	/* Broadcast to the CPU port and to other ports */
926 	lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT) | GENMASK(lan966x->num_phys_ports - 1, 0)),
927 		ANA_PGID_PGID,
928 		lan966x, ANA_PGID(PGID_BC));
929 
930 	lan_wr(REW_PORT_CFG_NO_REWRITE_SET(1),
931 	       lan966x, REW_PORT_CFG(CPU_PORT));
932 
933 	lan_rmw(ANA_ANAINTR_INTR_ENA_SET(1),
934 		ANA_ANAINTR_INTR_ENA,
935 		lan966x, ANA_ANAINTR);
936 
937 	spin_lock_init(&lan966x->tx_lock);
938 }
939 
940 static int lan966x_ram_init(struct lan966x *lan966x)
941 {
942 	return lan_rd(lan966x, SYS_RAM_INIT);
943 }
944 
945 static int lan966x_reset_switch(struct lan966x *lan966x)
946 {
947 	struct reset_control *switch_reset, *phy_reset;
948 	int val = 0;
949 	int ret;
950 
951 	switch_reset = devm_reset_control_get_shared(lan966x->dev, "switch");
952 	if (IS_ERR(switch_reset))
953 		return dev_err_probe(lan966x->dev, PTR_ERR(switch_reset),
954 				     "Could not obtain switch reset");
955 
956 	phy_reset = devm_reset_control_get_shared(lan966x->dev, "phy");
957 	if (IS_ERR(phy_reset))
958 		return dev_err_probe(lan966x->dev, PTR_ERR(phy_reset),
959 				     "Could not obtain phy reset\n");
960 
961 	reset_control_reset(switch_reset);
962 	reset_control_reset(phy_reset);
963 
964 	lan_wr(SYS_RESET_CFG_CORE_ENA_SET(0), lan966x, SYS_RESET_CFG);
965 	lan_wr(SYS_RAM_INIT_RAM_INIT_SET(1), lan966x, SYS_RAM_INIT);
966 	ret = readx_poll_timeout(lan966x_ram_init, lan966x,
967 				 val, (val & BIT(1)) == 0, READL_SLEEP_US,
968 				 READL_TIMEOUT_US);
969 	if (ret)
970 		return ret;
971 
972 	lan_wr(SYS_RESET_CFG_CORE_ENA_SET(1), lan966x, SYS_RESET_CFG);
973 
974 	return 0;
975 }
976 
977 static int lan966x_probe(struct platform_device *pdev)
978 {
979 	struct fwnode_handle *ports, *portnp;
980 	struct lan966x *lan966x;
981 	u8 mac_addr[ETH_ALEN];
982 	int err, i;
983 
984 	lan966x = devm_kzalloc(&pdev->dev, sizeof(*lan966x), GFP_KERNEL);
985 	if (!lan966x)
986 		return -ENOMEM;
987 
988 	platform_set_drvdata(pdev, lan966x);
989 	lan966x->dev = &pdev->dev;
990 
991 	if (!device_get_mac_address(&pdev->dev, mac_addr)) {
992 		ether_addr_copy(lan966x->base_mac, mac_addr);
993 	} else {
994 		pr_info("MAC addr was not set, use random MAC\n");
995 		eth_random_addr(lan966x->base_mac);
996 		lan966x->base_mac[5] &= 0xf0;
997 	}
998 
999 	ports = device_get_named_child_node(&pdev->dev, "ethernet-ports");
1000 	if (!ports)
1001 		return dev_err_probe(&pdev->dev, -ENODEV,
1002 				     "no ethernet-ports child found\n");
1003 
1004 	err = lan966x_create_targets(pdev, lan966x);
1005 	if (err)
1006 		return dev_err_probe(&pdev->dev, err,
1007 				     "Failed to create targets");
1008 
1009 	err = lan966x_reset_switch(lan966x);
1010 	if (err)
1011 		return dev_err_probe(&pdev->dev, err, "Reset failed");
1012 
1013 	i = 0;
1014 	fwnode_for_each_available_child_node(ports, portnp)
1015 		++i;
1016 
1017 	lan966x->num_phys_ports = i;
1018 	lan966x->ports = devm_kcalloc(&pdev->dev, lan966x->num_phys_ports,
1019 				      sizeof(struct lan966x_port *),
1020 				      GFP_KERNEL);
1021 	if (!lan966x->ports)
1022 		return -ENOMEM;
1023 
1024 	/* There QS system has 32KB of memory */
1025 	lan966x->shared_queue_sz = LAN966X_BUFFER_MEMORY;
1026 
1027 	/* set irq */
1028 	lan966x->xtr_irq = platform_get_irq_byname(pdev, "xtr");
1029 	if (lan966x->xtr_irq <= 0)
1030 		return -EINVAL;
1031 
1032 	err = devm_request_threaded_irq(&pdev->dev, lan966x->xtr_irq, NULL,
1033 					lan966x_xtr_irq_handler, IRQF_ONESHOT,
1034 					"frame extraction", lan966x);
1035 	if (err) {
1036 		pr_err("Unable to use xtr irq");
1037 		return -ENODEV;
1038 	}
1039 
1040 	lan966x->ana_irq = platform_get_irq_byname(pdev, "ana");
1041 	if (lan966x->ana_irq) {
1042 		err = devm_request_threaded_irq(&pdev->dev, lan966x->ana_irq, NULL,
1043 						lan966x_ana_irq_handler, IRQF_ONESHOT,
1044 						"ana irq", lan966x);
1045 		if (err)
1046 			return dev_err_probe(&pdev->dev, err, "Unable to use ana irq");
1047 	}
1048 
1049 	lan966x->ptp_irq = platform_get_irq_byname(pdev, "ptp");
1050 	if (lan966x->ptp_irq > 0) {
1051 		err = devm_request_threaded_irq(&pdev->dev, lan966x->ptp_irq, NULL,
1052 						lan966x_ptp_irq_handler, IRQF_ONESHOT,
1053 						"ptp irq", lan966x);
1054 		if (err)
1055 			return dev_err_probe(&pdev->dev, err, "Unable to use ptp irq");
1056 
1057 		lan966x->ptp = 1;
1058 	}
1059 
1060 	/* init switch */
1061 	lan966x_init(lan966x);
1062 	lan966x_stats_init(lan966x);
1063 
1064 	/* go over the child nodes */
1065 	fwnode_for_each_available_child_node(ports, portnp) {
1066 		phy_interface_t phy_mode;
1067 		struct phy *serdes;
1068 		u32 p;
1069 
1070 		if (fwnode_property_read_u32(portnp, "reg", &p))
1071 			continue;
1072 
1073 		phy_mode = fwnode_get_phy_mode(portnp);
1074 		err = lan966x_probe_port(lan966x, p, phy_mode, portnp);
1075 		if (err)
1076 			goto cleanup_ports;
1077 
1078 		/* Read needed configuration */
1079 		lan966x->ports[p]->config.portmode = phy_mode;
1080 		lan966x->ports[p]->fwnode = fwnode_handle_get(portnp);
1081 
1082 		serdes = devm_of_phy_get(lan966x->dev, to_of_node(portnp), NULL);
1083 		if (!IS_ERR(serdes))
1084 			lan966x->ports[p]->serdes = serdes;
1085 
1086 		lan966x_port_init(lan966x->ports[p]);
1087 	}
1088 
1089 	lan966x_mdb_init(lan966x);
1090 	err = lan966x_fdb_init(lan966x);
1091 	if (err)
1092 		goto cleanup_ports;
1093 
1094 	err = lan966x_ptp_init(lan966x);
1095 	if (err)
1096 		goto cleanup_fdb;
1097 
1098 	return 0;
1099 
1100 cleanup_fdb:
1101 	lan966x_fdb_deinit(lan966x);
1102 
1103 cleanup_ports:
1104 	fwnode_handle_put(portnp);
1105 
1106 	lan966x_cleanup_ports(lan966x);
1107 
1108 	cancel_delayed_work_sync(&lan966x->stats_work);
1109 	destroy_workqueue(lan966x->stats_queue);
1110 	mutex_destroy(&lan966x->stats_lock);
1111 
1112 	return err;
1113 }
1114 
1115 static int lan966x_remove(struct platform_device *pdev)
1116 {
1117 	struct lan966x *lan966x = platform_get_drvdata(pdev);
1118 
1119 	lan966x_cleanup_ports(lan966x);
1120 
1121 	cancel_delayed_work_sync(&lan966x->stats_work);
1122 	destroy_workqueue(lan966x->stats_queue);
1123 	mutex_destroy(&lan966x->stats_lock);
1124 
1125 	lan966x_mac_purge_entries(lan966x);
1126 	lan966x_mdb_deinit(lan966x);
1127 	lan966x_fdb_deinit(lan966x);
1128 	lan966x_ptp_deinit(lan966x);
1129 
1130 	return 0;
1131 }
1132 
1133 static struct platform_driver lan966x_driver = {
1134 	.probe = lan966x_probe,
1135 	.remove = lan966x_remove,
1136 	.driver = {
1137 		.name = "lan966x-switch",
1138 		.of_match_table = lan966x_match,
1139 	},
1140 };
1141 
1142 static int __init lan966x_switch_driver_init(void)
1143 {
1144 	int ret;
1145 
1146 	lan966x_register_notifier_blocks();
1147 
1148 	ret = platform_driver_register(&lan966x_driver);
1149 	if (ret)
1150 		goto err;
1151 
1152 	return 0;
1153 
1154 err:
1155 	lan966x_unregister_notifier_blocks();
1156 	return ret;
1157 }
1158 
1159 static void __exit lan966x_switch_driver_exit(void)
1160 {
1161 	platform_driver_unregister(&lan966x_driver);
1162 	lan966x_unregister_notifier_blocks();
1163 }
1164 
1165 module_init(lan966x_switch_driver_init);
1166 module_exit(lan966x_switch_driver_exit);
1167 
1168 MODULE_DESCRIPTION("Microchip LAN966X switch driver");
1169 MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>");
1170 MODULE_LICENSE("Dual MIT/GPL");
1171