1 /* QLogic qede NIC Driver
2  * Copyright (c) 2015-2017  QLogic Corporation
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and /or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #include <linux/version.h>
33 #include <linux/types.h>
34 #include <linux/netdevice.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/string.h>
38 #include <linux/pci.h>
39 #include <linux/capability.h>
40 #include <linux/vmalloc.h>
41 #include "qede.h"
42 #include "qede_ptp.h"
43 
44 #define QEDE_RQSTAT_OFFSET(stat_name) \
45 	 (offsetof(struct qede_rx_queue, stat_name))
46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
47 #define QEDE_RQSTAT(stat_name) \
48 	 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
49 
50 #define QEDE_SELFTEST_POLL_COUNT 100
51 
52 static const struct {
53 	u64 offset;
54 	char string[ETH_GSTRING_LEN];
55 } qede_rqstats_arr[] = {
56 	QEDE_RQSTAT(rcv_pkts),
57 	QEDE_RQSTAT(rx_hw_errors),
58 	QEDE_RQSTAT(rx_alloc_errors),
59 	QEDE_RQSTAT(rx_ip_frags),
60 	QEDE_RQSTAT(xdp_no_pass),
61 };
62 
63 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
64 #define QEDE_TQSTAT_OFFSET(stat_name) \
65 	(offsetof(struct qede_tx_queue, stat_name))
66 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
67 #define QEDE_TQSTAT(stat_name) \
68 	{QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
69 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
70 static const struct {
71 	u64 offset;
72 	char string[ETH_GSTRING_LEN];
73 } qede_tqstats_arr[] = {
74 	QEDE_TQSTAT(xmit_pkts),
75 	QEDE_TQSTAT(stopped_cnt),
76 	QEDE_TQSTAT(tx_mem_alloc_err),
77 };
78 
79 #define QEDE_STAT_OFFSET(stat_name, type, base) \
80 	(offsetof(type, stat_name) + (base))
81 #define QEDE_STAT_STRING(stat_name)	(#stat_name)
82 #define _QEDE_STAT(stat_name, type, base, attr) \
83 	{QEDE_STAT_OFFSET(stat_name, type, base), \
84 	 QEDE_STAT_STRING(stat_name), \
85 	 attr}
86 #define QEDE_STAT(stat_name) \
87 	_QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
88 #define QEDE_PF_STAT(stat_name) \
89 	_QEDE_STAT(stat_name, struct qede_stats_common, 0, \
90 		   BIT(QEDE_STAT_PF_ONLY))
91 #define QEDE_PF_BB_STAT(stat_name) \
92 	_QEDE_STAT(stat_name, struct qede_stats_bb, \
93 		   offsetof(struct qede_stats, bb), \
94 		   BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
95 #define QEDE_PF_AH_STAT(stat_name) \
96 	_QEDE_STAT(stat_name, struct qede_stats_ah, \
97 		   offsetof(struct qede_stats, ah), \
98 		   BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
99 static const struct {
100 	u64 offset;
101 	char string[ETH_GSTRING_LEN];
102 	unsigned long attr;
103 #define QEDE_STAT_PF_ONLY	0
104 #define QEDE_STAT_BB_ONLY	1
105 #define QEDE_STAT_AH_ONLY	2
106 } qede_stats_arr[] = {
107 	QEDE_STAT(rx_ucast_bytes),
108 	QEDE_STAT(rx_mcast_bytes),
109 	QEDE_STAT(rx_bcast_bytes),
110 	QEDE_STAT(rx_ucast_pkts),
111 	QEDE_STAT(rx_mcast_pkts),
112 	QEDE_STAT(rx_bcast_pkts),
113 
114 	QEDE_STAT(tx_ucast_bytes),
115 	QEDE_STAT(tx_mcast_bytes),
116 	QEDE_STAT(tx_bcast_bytes),
117 	QEDE_STAT(tx_ucast_pkts),
118 	QEDE_STAT(tx_mcast_pkts),
119 	QEDE_STAT(tx_bcast_pkts),
120 
121 	QEDE_PF_STAT(rx_64_byte_packets),
122 	QEDE_PF_STAT(rx_65_to_127_byte_packets),
123 	QEDE_PF_STAT(rx_128_to_255_byte_packets),
124 	QEDE_PF_STAT(rx_256_to_511_byte_packets),
125 	QEDE_PF_STAT(rx_512_to_1023_byte_packets),
126 	QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
127 	QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
128 	QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
129 	QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
130 	QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
131 	QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
132 	QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
133 	QEDE_PF_STAT(tx_64_byte_packets),
134 	QEDE_PF_STAT(tx_65_to_127_byte_packets),
135 	QEDE_PF_STAT(tx_128_to_255_byte_packets),
136 	QEDE_PF_STAT(tx_256_to_511_byte_packets),
137 	QEDE_PF_STAT(tx_512_to_1023_byte_packets),
138 	QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
139 	QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
140 	QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
141 	QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
142 	QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
143 	QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
144 	QEDE_PF_STAT(rx_mac_crtl_frames),
145 	QEDE_PF_STAT(tx_mac_ctrl_frames),
146 	QEDE_PF_STAT(rx_pause_frames),
147 	QEDE_PF_STAT(tx_pause_frames),
148 	QEDE_PF_STAT(rx_pfc_frames),
149 	QEDE_PF_STAT(tx_pfc_frames),
150 
151 	QEDE_PF_STAT(rx_crc_errors),
152 	QEDE_PF_STAT(rx_align_errors),
153 	QEDE_PF_STAT(rx_carrier_errors),
154 	QEDE_PF_STAT(rx_oversize_packets),
155 	QEDE_PF_STAT(rx_jabbers),
156 	QEDE_PF_STAT(rx_undersize_packets),
157 	QEDE_PF_STAT(rx_fragments),
158 	QEDE_PF_BB_STAT(tx_lpi_entry_count),
159 	QEDE_PF_BB_STAT(tx_total_collisions),
160 	QEDE_PF_STAT(brb_truncates),
161 	QEDE_PF_STAT(brb_discards),
162 	QEDE_STAT(no_buff_discards),
163 	QEDE_PF_STAT(mftag_filter_discards),
164 	QEDE_PF_STAT(mac_filter_discards),
165 	QEDE_PF_STAT(gft_filter_drop),
166 	QEDE_STAT(tx_err_drop_pkts),
167 	QEDE_STAT(ttl0_discard),
168 	QEDE_STAT(packet_too_big_discard),
169 
170 	QEDE_STAT(coalesced_pkts),
171 	QEDE_STAT(coalesced_events),
172 	QEDE_STAT(coalesced_aborts_num),
173 	QEDE_STAT(non_coalesced_pkts),
174 	QEDE_STAT(coalesced_bytes),
175 
176 	QEDE_STAT(link_change_count),
177 };
178 
179 #define QEDE_NUM_STATS	ARRAY_SIZE(qede_stats_arr)
180 #define QEDE_STAT_IS_PF_ONLY(i) \
181 	test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
182 #define QEDE_STAT_IS_BB_ONLY(i) \
183 	test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
184 #define QEDE_STAT_IS_AH_ONLY(i) \
185 	test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
186 
187 enum {
188 	QEDE_PRI_FLAG_CMT,
189 	QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */
190 	QEDE_PRI_FLAG_LEN,
191 };
192 
193 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
194 	"Coupled-Function",
195 	"SmartAN capable",
196 };
197 
198 enum qede_ethtool_tests {
199 	QEDE_ETHTOOL_INT_LOOPBACK,
200 	QEDE_ETHTOOL_INTERRUPT_TEST,
201 	QEDE_ETHTOOL_MEMORY_TEST,
202 	QEDE_ETHTOOL_REGISTER_TEST,
203 	QEDE_ETHTOOL_CLOCK_TEST,
204 	QEDE_ETHTOOL_NVRAM_TEST,
205 	QEDE_ETHTOOL_TEST_MAX
206 };
207 
208 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
209 	"Internal loopback (offline)",
210 	"Interrupt (online)\t",
211 	"Memory (online)\t\t",
212 	"Register (online)\t",
213 	"Clock (online)\t\t",
214 	"Nvram (online)\t\t",
215 };
216 
217 static void qede_get_strings_stats_txq(struct qede_dev *edev,
218 				       struct qede_tx_queue *txq, u8 **buf)
219 {
220 	int i;
221 
222 	for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
223 		if (txq->is_xdp)
224 			sprintf(*buf, "%d [XDP]: %s",
225 				QEDE_TXQ_XDP_TO_IDX(edev, txq),
226 				qede_tqstats_arr[i].string);
227 		else
228 			sprintf(*buf, "%d_%d: %s", txq->index, txq->cos,
229 				qede_tqstats_arr[i].string);
230 		*buf += ETH_GSTRING_LEN;
231 	}
232 }
233 
234 static void qede_get_strings_stats_rxq(struct qede_dev *edev,
235 				       struct qede_rx_queue *rxq, u8 **buf)
236 {
237 	int i;
238 
239 	for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
240 		sprintf(*buf, "%d: %s", rxq->rxq_id,
241 			qede_rqstats_arr[i].string);
242 		*buf += ETH_GSTRING_LEN;
243 	}
244 }
245 
246 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
247 {
248 	return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
249 	       (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
250 	       (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
251 }
252 
253 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
254 {
255 	struct qede_fastpath *fp;
256 	int i;
257 
258 	/* Account for queue statistics */
259 	for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
260 		fp = &edev->fp_array[i];
261 
262 		if (fp->type & QEDE_FASTPATH_RX)
263 			qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
264 
265 		if (fp->type & QEDE_FASTPATH_XDP)
266 			qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
267 
268 		if (fp->type & QEDE_FASTPATH_TX) {
269 			int cos;
270 
271 			for_each_cos_in_txq(edev, cos)
272 				qede_get_strings_stats_txq(edev,
273 							   &fp->txq[cos], &buf);
274 		}
275 	}
276 
277 	/* Account for non-queue statistics */
278 	for (i = 0; i < QEDE_NUM_STATS; i++) {
279 		if (qede_is_irrelevant_stat(edev, i))
280 			continue;
281 		strcpy(buf, qede_stats_arr[i].string);
282 		buf += ETH_GSTRING_LEN;
283 	}
284 }
285 
286 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
287 {
288 	struct qede_dev *edev = netdev_priv(dev);
289 
290 	switch (stringset) {
291 	case ETH_SS_STATS:
292 		qede_get_strings_stats(edev, buf);
293 		break;
294 	case ETH_SS_PRIV_FLAGS:
295 		memcpy(buf, qede_private_arr,
296 		       ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
297 		break;
298 	case ETH_SS_TEST:
299 		memcpy(buf, qede_tests_str_arr,
300 		       ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
301 		break;
302 	default:
303 		DP_VERBOSE(edev, QED_MSG_DEBUG,
304 			   "Unsupported stringset 0x%08x\n", stringset);
305 	}
306 }
307 
308 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
309 {
310 	int i;
311 
312 	for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
313 		**buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
314 		(*buf)++;
315 	}
316 }
317 
318 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
319 {
320 	int i;
321 
322 	for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
323 		**buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
324 		(*buf)++;
325 	}
326 }
327 
328 static void qede_get_ethtool_stats(struct net_device *dev,
329 				   struct ethtool_stats *stats, u64 *buf)
330 {
331 	struct qede_dev *edev = netdev_priv(dev);
332 	struct qede_fastpath *fp;
333 	int i;
334 
335 	qede_fill_by_demand_stats(edev);
336 
337 	/* Need to protect the access to the fastpath array */
338 	__qede_lock(edev);
339 
340 	for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
341 		fp = &edev->fp_array[i];
342 
343 		if (fp->type & QEDE_FASTPATH_RX)
344 			qede_get_ethtool_stats_rxq(fp->rxq, &buf);
345 
346 		if (fp->type & QEDE_FASTPATH_XDP)
347 			qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
348 
349 		if (fp->type & QEDE_FASTPATH_TX) {
350 			int cos;
351 
352 			for_each_cos_in_txq(edev, cos)
353 				qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
354 		}
355 	}
356 
357 	for (i = 0; i < QEDE_NUM_STATS; i++) {
358 		if (qede_is_irrelevant_stat(edev, i))
359 			continue;
360 		*buf = *((u64 *)(((void *)&edev->stats) +
361 				 qede_stats_arr[i].offset));
362 
363 		buf++;
364 	}
365 
366 	__qede_unlock(edev);
367 }
368 
369 static int qede_get_sset_count(struct net_device *dev, int stringset)
370 {
371 	struct qede_dev *edev = netdev_priv(dev);
372 	int num_stats = QEDE_NUM_STATS, i;
373 
374 	switch (stringset) {
375 	case ETH_SS_STATS:
376 		for (i = 0; i < QEDE_NUM_STATS; i++)
377 			if (qede_is_irrelevant_stat(edev, i))
378 				num_stats--;
379 
380 		/* Account for the Regular Tx statistics */
381 		num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
382 				edev->dev_info.num_tc;
383 
384 		/* Account for the Regular Rx statistics */
385 		num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
386 
387 		/* Account for XDP statistics [if needed] */
388 		if (edev->xdp_prog)
389 			num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
390 		return num_stats;
391 
392 	case ETH_SS_PRIV_FLAGS:
393 		return QEDE_PRI_FLAG_LEN;
394 	case ETH_SS_TEST:
395 		if (!IS_VF(edev))
396 			return QEDE_ETHTOOL_TEST_MAX;
397 		else
398 			return 0;
399 	default:
400 		DP_VERBOSE(edev, QED_MSG_DEBUG,
401 			   "Unsupported stringset 0x%08x\n", stringset);
402 		return -EINVAL;
403 	}
404 }
405 
406 static u32 qede_get_priv_flags(struct net_device *dev)
407 {
408 	struct qede_dev *edev = netdev_priv(dev);
409 	u32 flags = 0;
410 
411 	if (edev->dev_info.common.num_hwfns > 1)
412 		flags |= BIT(QEDE_PRI_FLAG_CMT);
413 
414 	if (edev->dev_info.common.smart_an)
415 		flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
416 
417 	return flags;
418 }
419 
420 struct qede_link_mode_mapping {
421 	u32 qed_link_mode;
422 	u32 ethtool_link_mode;
423 };
424 
425 static const struct qede_link_mode_mapping qed_lm_map[] = {
426 	{QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
427 	{QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
428 	{QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
429 	{QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
430 	{QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT},
431 	{QED_LM_2500baseX_Full_BIT, ETHTOOL_LINK_MODE_2500baseX_Full_BIT},
432 	{QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT},
433 	{QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT},
434 	{QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT},
435 	{QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
436 	{QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
437 	{QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT},
438 	{QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT},
439 	{QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT},
440 	{QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT},
441 	{QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT},
442 	{QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
443 	{QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT},
444 	{QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
445 	{QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT},
446 	{QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT},
447 	{QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
448 	{QED_LM_100000baseKR4_Full_BIT,
449 		ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
450 	{QED_LM_100000baseSR4_Full_BIT,
451 		ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT},
452 	{QED_LM_100000baseCR4_Full_BIT,
453 		ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT},
454 	{QED_LM_100000baseLR4_ER4_Full_BIT,
455 		ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT},
456 	{QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT},
457 	{QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT},
458 	{QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT},
459 	{QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT},
460 	{QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT},
461 	{QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT},
462 };
463 
464 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name)	\
465 {								\
466 	int i;							\
467 								\
468 	for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) {		\
469 		if ((caps) & (qed_lm_map[i].qed_link_mode))	\
470 			__set_bit(qed_lm_map[i].ethtool_link_mode,\
471 				  lk_ksettings->link_modes.name); \
472 	}							\
473 }
474 
475 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name)	\
476 {								\
477 	int i;							\
478 								\
479 	for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) {		\
480 		if (test_bit(qed_lm_map[i].ethtool_link_mode,	\
481 			     lk_ksettings->link_modes.name))	\
482 			caps |= qed_lm_map[i].qed_link_mode;	\
483 	}							\
484 }
485 
486 static int qede_get_link_ksettings(struct net_device *dev,
487 				   struct ethtool_link_ksettings *cmd)
488 {
489 	struct ethtool_link_settings *base = &cmd->base;
490 	struct qede_dev *edev = netdev_priv(dev);
491 	struct qed_link_output current_link;
492 
493 	__qede_lock(edev);
494 
495 	memset(&current_link, 0, sizeof(current_link));
496 	edev->ops->common->get_link(edev->cdev, &current_link);
497 
498 	ethtool_link_ksettings_zero_link_mode(cmd, supported);
499 	QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
500 
501 	ethtool_link_ksettings_zero_link_mode(cmd, advertising);
502 	QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
503 
504 	ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
505 	QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
506 
507 	if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
508 		base->speed = current_link.speed;
509 		base->duplex = current_link.duplex;
510 	} else {
511 		base->speed = SPEED_UNKNOWN;
512 		base->duplex = DUPLEX_UNKNOWN;
513 	}
514 
515 	__qede_unlock(edev);
516 
517 	base->port = current_link.port;
518 	base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
519 			AUTONEG_DISABLE;
520 
521 	return 0;
522 }
523 
524 static int qede_set_link_ksettings(struct net_device *dev,
525 				   const struct ethtool_link_ksettings *cmd)
526 {
527 	const struct ethtool_link_settings *base = &cmd->base;
528 	struct qede_dev *edev = netdev_priv(dev);
529 	struct qed_link_output current_link;
530 	struct qed_link_params params;
531 	u32 sup_caps;
532 
533 	if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
534 		DP_INFO(edev, "Link settings are not allowed to be changed\n");
535 		return -EOPNOTSUPP;
536 	}
537 	memset(&current_link, 0, sizeof(current_link));
538 	memset(&params, 0, sizeof(params));
539 	edev->ops->common->get_link(edev->cdev, &current_link);
540 
541 	params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
542 	params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
543 	if (base->autoneg == AUTONEG_ENABLE) {
544 		if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
545 			DP_INFO(edev, "Auto negotiation is not supported\n");
546 			return -EOPNOTSUPP;
547 		}
548 
549 		params.autoneg = true;
550 		params.forced_speed = 0;
551 		QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
552 	} else {		/* forced speed */
553 		params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
554 		params.autoneg = false;
555 		params.forced_speed = base->speed;
556 		switch (base->speed) {
557 		case SPEED_1000:
558 			sup_caps = QED_LM_1000baseT_Full_BIT |
559 					QED_LM_1000baseKX_Full_BIT |
560 					QED_LM_1000baseX_Full_BIT;
561 			if (!(current_link.supported_caps & sup_caps)) {
562 				DP_INFO(edev, "1G speed not supported\n");
563 				return -EINVAL;
564 			}
565 			params.adv_speeds = current_link.supported_caps &
566 						sup_caps;
567 			break;
568 		case SPEED_10000:
569 			sup_caps = QED_LM_10000baseT_Full_BIT |
570 					QED_LM_10000baseKR_Full_BIT |
571 					QED_LM_10000baseKX4_Full_BIT |
572 					QED_LM_10000baseR_FEC_BIT |
573 					QED_LM_10000baseCR_Full_BIT |
574 					QED_LM_10000baseSR_Full_BIT |
575 					QED_LM_10000baseLR_Full_BIT |
576 					QED_LM_10000baseLRM_Full_BIT;
577 			if (!(current_link.supported_caps & sup_caps)) {
578 				DP_INFO(edev, "10G speed not supported\n");
579 				return -EINVAL;
580 			}
581 			params.adv_speeds = current_link.supported_caps &
582 						sup_caps;
583 			break;
584 		case SPEED_20000:
585 			if (!(current_link.supported_caps &
586 			    QED_LM_20000baseKR2_Full_BIT)) {
587 				DP_INFO(edev, "20G speed not supported\n");
588 				return -EINVAL;
589 			}
590 			params.adv_speeds = QED_LM_20000baseKR2_Full_BIT;
591 			break;
592 		case SPEED_25000:
593 			sup_caps = QED_LM_25000baseKR_Full_BIT |
594 					QED_LM_25000baseCR_Full_BIT |
595 					QED_LM_25000baseSR_Full_BIT;
596 			if (!(current_link.supported_caps & sup_caps)) {
597 				DP_INFO(edev, "25G speed not supported\n");
598 				return -EINVAL;
599 			}
600 			params.adv_speeds = current_link.supported_caps &
601 						sup_caps;
602 			break;
603 		case SPEED_40000:
604 			sup_caps = QED_LM_40000baseLR4_Full_BIT |
605 					QED_LM_40000baseKR4_Full_BIT |
606 					QED_LM_40000baseCR4_Full_BIT |
607 					QED_LM_40000baseSR4_Full_BIT;
608 			if (!(current_link.supported_caps & sup_caps)) {
609 				DP_INFO(edev, "40G speed not supported\n");
610 				return -EINVAL;
611 			}
612 			params.adv_speeds = current_link.supported_caps &
613 						sup_caps;
614 			break;
615 		case SPEED_50000:
616 			sup_caps = QED_LM_50000baseKR2_Full_BIT |
617 					QED_LM_50000baseCR2_Full_BIT |
618 					QED_LM_50000baseSR2_Full_BIT;
619 			if (!(current_link.supported_caps & sup_caps)) {
620 				DP_INFO(edev, "50G speed not supported\n");
621 				return -EINVAL;
622 			}
623 			params.adv_speeds = current_link.supported_caps &
624 						sup_caps;
625 			break;
626 		case SPEED_100000:
627 			sup_caps = QED_LM_100000baseKR4_Full_BIT |
628 					QED_LM_100000baseSR4_Full_BIT |
629 					QED_LM_100000baseCR4_Full_BIT |
630 					QED_LM_100000baseLR4_ER4_Full_BIT;
631 			if (!(current_link.supported_caps & sup_caps)) {
632 				DP_INFO(edev, "100G speed not supported\n");
633 				return -EINVAL;
634 			}
635 			params.adv_speeds = current_link.supported_caps &
636 						sup_caps;
637 			break;
638 		default:
639 			DP_INFO(edev, "Unsupported speed %u\n", base->speed);
640 			return -EINVAL;
641 		}
642 	}
643 
644 	params.link_up = true;
645 	edev->ops->common->set_link(edev->cdev, &params);
646 
647 	return 0;
648 }
649 
650 static void qede_get_drvinfo(struct net_device *ndev,
651 			     struct ethtool_drvinfo *info)
652 {
653 	char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
654 	struct qede_dev *edev = netdev_priv(ndev);
655 	char mbi[ETHTOOL_FWVERS_LEN];
656 
657 	strlcpy(info->driver, "qede", sizeof(info->driver));
658 
659 	snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
660 		 edev->dev_info.common.fw_major,
661 		 edev->dev_info.common.fw_minor,
662 		 edev->dev_info.common.fw_rev,
663 		 edev->dev_info.common.fw_eng);
664 
665 	snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
666 		 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
667 		 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
668 		 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
669 		 edev->dev_info.common.mfw_rev & 0xFF);
670 
671 	if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm]  ")) <
672 	    sizeof(info->version))
673 		snprintf(info->version, sizeof(info->version),
674 			 "%s [storm %s]", DRV_MODULE_VERSION, storm);
675 	else
676 		snprintf(info->version, sizeof(info->version),
677 			 "%s %s", DRV_MODULE_VERSION, storm);
678 
679 	if (edev->dev_info.common.mbi_version) {
680 		snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
681 			 (edev->dev_info.common.mbi_version &
682 			  QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
683 			 (edev->dev_info.common.mbi_version &
684 			  QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
685 			 (edev->dev_info.common.mbi_version &
686 			  QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
687 		snprintf(info->fw_version, sizeof(info->fw_version),
688 			 "mbi %s [mfw %s]", mbi, mfw);
689 	} else {
690 		snprintf(info->fw_version, sizeof(info->fw_version),
691 			 "mfw %s", mfw);
692 	}
693 
694 	strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
695 }
696 
697 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
698 {
699 	struct qede_dev *edev = netdev_priv(ndev);
700 
701 	if (edev->dev_info.common.wol_support) {
702 		wol->supported = WAKE_MAGIC;
703 		wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
704 	}
705 }
706 
707 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
708 {
709 	struct qede_dev *edev = netdev_priv(ndev);
710 	bool wol_requested;
711 	int rc;
712 
713 	if (wol->wolopts & ~WAKE_MAGIC) {
714 		DP_INFO(edev,
715 			"Can't support WoL options other than magic-packet\n");
716 		return -EINVAL;
717 	}
718 
719 	wol_requested = !!(wol->wolopts & WAKE_MAGIC);
720 	if (wol_requested == edev->wol_enabled)
721 		return 0;
722 
723 	/* Need to actually change configuration */
724 	if (!edev->dev_info.common.wol_support) {
725 		DP_INFO(edev, "Device doesn't support WoL\n");
726 		return -EINVAL;
727 	}
728 
729 	rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
730 	if (!rc)
731 		edev->wol_enabled = wol_requested;
732 
733 	return rc;
734 }
735 
736 static u32 qede_get_msglevel(struct net_device *ndev)
737 {
738 	struct qede_dev *edev = netdev_priv(ndev);
739 
740 	return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
741 }
742 
743 static void qede_set_msglevel(struct net_device *ndev, u32 level)
744 {
745 	struct qede_dev *edev = netdev_priv(ndev);
746 	u32 dp_module = 0;
747 	u8 dp_level = 0;
748 
749 	qede_config_debug(level, &dp_module, &dp_level);
750 
751 	edev->dp_level = dp_level;
752 	edev->dp_module = dp_module;
753 	edev->ops->common->update_msglvl(edev->cdev,
754 					 dp_module, dp_level);
755 }
756 
757 static int qede_nway_reset(struct net_device *dev)
758 {
759 	struct qede_dev *edev = netdev_priv(dev);
760 	struct qed_link_output current_link;
761 	struct qed_link_params link_params;
762 
763 	if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
764 		DP_INFO(edev, "Link settings are not allowed to be changed\n");
765 		return -EOPNOTSUPP;
766 	}
767 
768 	if (!netif_running(dev))
769 		return 0;
770 
771 	memset(&current_link, 0, sizeof(current_link));
772 	edev->ops->common->get_link(edev->cdev, &current_link);
773 	if (!current_link.link_up)
774 		return 0;
775 
776 	/* Toggle the link */
777 	memset(&link_params, 0, sizeof(link_params));
778 	link_params.link_up = false;
779 	edev->ops->common->set_link(edev->cdev, &link_params);
780 	link_params.link_up = true;
781 	edev->ops->common->set_link(edev->cdev, &link_params);
782 
783 	return 0;
784 }
785 
786 static u32 qede_get_link(struct net_device *dev)
787 {
788 	struct qede_dev *edev = netdev_priv(dev);
789 	struct qed_link_output current_link;
790 
791 	memset(&current_link, 0, sizeof(current_link));
792 	edev->ops->common->get_link(edev->cdev, &current_link);
793 
794 	return current_link.link_up;
795 }
796 
797 static int qede_flash_device(struct net_device *dev,
798 			     struct ethtool_flash *flash)
799 {
800 	struct qede_dev *edev = netdev_priv(dev);
801 
802 	return edev->ops->common->nvm_flash(edev->cdev, flash->data);
803 }
804 
805 static int qede_get_coalesce(struct net_device *dev,
806 			     struct ethtool_coalesce *coal)
807 {
808 	void *rx_handle = NULL, *tx_handle = NULL;
809 	struct qede_dev *edev = netdev_priv(dev);
810 	u16 rx_coal, tx_coal, i, rc = 0;
811 	struct qede_fastpath *fp;
812 
813 	rx_coal = QED_DEFAULT_RX_USECS;
814 	tx_coal = QED_DEFAULT_TX_USECS;
815 
816 	memset(coal, 0, sizeof(struct ethtool_coalesce));
817 
818 	__qede_lock(edev);
819 	if (edev->state == QEDE_STATE_OPEN) {
820 		for_each_queue(i) {
821 			fp = &edev->fp_array[i];
822 
823 			if (fp->type & QEDE_FASTPATH_RX) {
824 				rx_handle = fp->rxq->handle;
825 				break;
826 			}
827 		}
828 
829 		rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
830 		if (rc) {
831 			DP_INFO(edev, "Read Rx coalesce error\n");
832 			goto out;
833 		}
834 
835 		for_each_queue(i) {
836 			struct qede_tx_queue *txq;
837 
838 			fp = &edev->fp_array[i];
839 
840 			/* All TX queues of given fastpath uses same
841 			 * coalescing value, so no need to iterate over
842 			 * all TCs, TC0 txq should suffice.
843 			 */
844 			if (fp->type & QEDE_FASTPATH_TX) {
845 				txq = QEDE_FP_TC0_TXQ(fp);
846 				tx_handle = txq->handle;
847 				break;
848 			}
849 		}
850 
851 		rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
852 		if (rc)
853 			DP_INFO(edev, "Read Tx coalesce error\n");
854 	}
855 
856 out:
857 	__qede_unlock(edev);
858 
859 	coal->rx_coalesce_usecs = rx_coal;
860 	coal->tx_coalesce_usecs = tx_coal;
861 
862 	return rc;
863 }
864 
865 static int qede_set_coalesce(struct net_device *dev,
866 			     struct ethtool_coalesce *coal)
867 {
868 	struct qede_dev *edev = netdev_priv(dev);
869 	struct qede_fastpath *fp;
870 	int i, rc = 0;
871 	u16 rxc, txc;
872 
873 	if (!netif_running(dev)) {
874 		DP_INFO(edev, "Interface is down\n");
875 		return -EINVAL;
876 	}
877 
878 	if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
879 	    coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
880 		DP_INFO(edev,
881 			"Can't support requested %s coalesce value [max supported value %d]\n",
882 			coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
883 			"tx", QED_COALESCE_MAX);
884 		return -EINVAL;
885 	}
886 
887 	rxc = (u16)coal->rx_coalesce_usecs;
888 	txc = (u16)coal->tx_coalesce_usecs;
889 	for_each_queue(i) {
890 		fp = &edev->fp_array[i];
891 
892 		if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
893 			rc = edev->ops->common->set_coalesce(edev->cdev,
894 							     rxc, 0,
895 							     fp->rxq->handle);
896 			if (rc) {
897 				DP_INFO(edev,
898 					"Set RX coalesce error, rc = %d\n", rc);
899 				return rc;
900 			}
901 		}
902 
903 		if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
904 			struct qede_tx_queue *txq;
905 
906 			/* All TX queues of given fastpath uses same
907 			 * coalescing value, so no need to iterate over
908 			 * all TCs, TC0 txq should suffice.
909 			 */
910 			txq = QEDE_FP_TC0_TXQ(fp);
911 
912 			rc = edev->ops->common->set_coalesce(edev->cdev,
913 							     0, txc,
914 							     txq->handle);
915 			if (rc) {
916 				DP_INFO(edev,
917 					"Set TX coalesce error, rc = %d\n", rc);
918 				return rc;
919 			}
920 		}
921 	}
922 
923 	return rc;
924 }
925 
926 static void qede_get_ringparam(struct net_device *dev,
927 			       struct ethtool_ringparam *ering)
928 {
929 	struct qede_dev *edev = netdev_priv(dev);
930 
931 	ering->rx_max_pending = NUM_RX_BDS_MAX;
932 	ering->rx_pending = edev->q_num_rx_buffers;
933 	ering->tx_max_pending = NUM_TX_BDS_MAX;
934 	ering->tx_pending = edev->q_num_tx_buffers;
935 }
936 
937 static int qede_set_ringparam(struct net_device *dev,
938 			      struct ethtool_ringparam *ering)
939 {
940 	struct qede_dev *edev = netdev_priv(dev);
941 
942 	DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
943 		   "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
944 		   ering->rx_pending, ering->tx_pending);
945 
946 	/* Validate legality of configuration */
947 	if (ering->rx_pending > NUM_RX_BDS_MAX ||
948 	    ering->rx_pending < NUM_RX_BDS_MIN ||
949 	    ering->tx_pending > NUM_TX_BDS_MAX ||
950 	    ering->tx_pending < NUM_TX_BDS_MIN) {
951 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
952 			   "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
953 			   NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
954 			   NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
955 		return -EINVAL;
956 	}
957 
958 	/* Change ring size and re-load */
959 	edev->q_num_rx_buffers = ering->rx_pending;
960 	edev->q_num_tx_buffers = ering->tx_pending;
961 
962 	qede_reload(edev, NULL, false);
963 
964 	return 0;
965 }
966 
967 static void qede_get_pauseparam(struct net_device *dev,
968 				struct ethtool_pauseparam *epause)
969 {
970 	struct qede_dev *edev = netdev_priv(dev);
971 	struct qed_link_output current_link;
972 
973 	memset(&current_link, 0, sizeof(current_link));
974 	edev->ops->common->get_link(edev->cdev, &current_link);
975 
976 	if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
977 		epause->autoneg = true;
978 	if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
979 		epause->rx_pause = true;
980 	if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
981 		epause->tx_pause = true;
982 
983 	DP_VERBOSE(edev, QED_MSG_DEBUG,
984 		   "ethtool_pauseparam: cmd %d  autoneg %d  rx_pause %d  tx_pause %d\n",
985 		   epause->cmd, epause->autoneg, epause->rx_pause,
986 		   epause->tx_pause);
987 }
988 
989 static int qede_set_pauseparam(struct net_device *dev,
990 			       struct ethtool_pauseparam *epause)
991 {
992 	struct qede_dev *edev = netdev_priv(dev);
993 	struct qed_link_params params;
994 	struct qed_link_output current_link;
995 
996 	if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
997 		DP_INFO(edev,
998 			"Pause settings are not allowed to be changed\n");
999 		return -EOPNOTSUPP;
1000 	}
1001 
1002 	memset(&current_link, 0, sizeof(current_link));
1003 	edev->ops->common->get_link(edev->cdev, &current_link);
1004 
1005 	memset(&params, 0, sizeof(params));
1006 	params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
1007 	if (epause->autoneg) {
1008 		if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
1009 			DP_INFO(edev, "autoneg not supported\n");
1010 			return -EINVAL;
1011 		}
1012 		params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1013 	}
1014 	if (epause->rx_pause)
1015 		params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1016 	if (epause->tx_pause)
1017 		params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1018 
1019 	params.link_up = true;
1020 	edev->ops->common->set_link(edev->cdev, &params);
1021 
1022 	return 0;
1023 }
1024 
1025 static void qede_get_regs(struct net_device *ndev,
1026 			  struct ethtool_regs *regs, void *buffer)
1027 {
1028 	struct qede_dev *edev = netdev_priv(ndev);
1029 
1030 	regs->version = 0;
1031 	memset(buffer, 0, regs->len);
1032 
1033 	if (edev->ops && edev->ops->common)
1034 		edev->ops->common->dbg_all_data(edev->cdev, buffer);
1035 }
1036 
1037 static int qede_get_regs_len(struct net_device *ndev)
1038 {
1039 	struct qede_dev *edev = netdev_priv(ndev);
1040 
1041 	if (edev->ops && edev->ops->common)
1042 		return edev->ops->common->dbg_all_data_size(edev->cdev);
1043 	else
1044 		return -EINVAL;
1045 }
1046 
1047 static void qede_update_mtu(struct qede_dev *edev,
1048 			    struct qede_reload_args *args)
1049 {
1050 	edev->ndev->mtu = args->u.mtu;
1051 }
1052 
1053 /* Netdevice NDOs */
1054 int qede_change_mtu(struct net_device *ndev, int new_mtu)
1055 {
1056 	struct qede_dev *edev = netdev_priv(ndev);
1057 	struct qede_reload_args args;
1058 
1059 	DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1060 		   "Configuring MTU size of %d\n", new_mtu);
1061 
1062 	if (new_mtu > PAGE_SIZE)
1063 		ndev->features &= ~NETIF_F_GRO_HW;
1064 
1065 	/* Set the mtu field and re-start the interface if needed */
1066 	args.u.mtu = new_mtu;
1067 	args.func = &qede_update_mtu;
1068 	qede_reload(edev, &args, false);
1069 
1070 	edev->ops->common->update_mtu(edev->cdev, new_mtu);
1071 
1072 	return 0;
1073 }
1074 
1075 static void qede_get_channels(struct net_device *dev,
1076 			      struct ethtool_channels *channels)
1077 {
1078 	struct qede_dev *edev = netdev_priv(dev);
1079 
1080 	channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1081 	channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1082 	channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1083 	channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1084 					edev->fp_num_rx;
1085 	channels->tx_count = edev->fp_num_tx;
1086 	channels->rx_count = edev->fp_num_rx;
1087 }
1088 
1089 static int qede_set_channels(struct net_device *dev,
1090 			     struct ethtool_channels *channels)
1091 {
1092 	struct qede_dev *edev = netdev_priv(dev);
1093 	u32 count;
1094 
1095 	DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1096 		   "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1097 		   channels->rx_count, channels->tx_count,
1098 		   channels->other_count, channels->combined_count);
1099 
1100 	count = channels->rx_count + channels->tx_count +
1101 			channels->combined_count;
1102 
1103 	/* We don't support `other' channels */
1104 	if (channels->other_count) {
1105 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1106 			   "command parameters not supported\n");
1107 		return -EINVAL;
1108 	}
1109 
1110 	if (!(channels->combined_count || (channels->rx_count &&
1111 					   channels->tx_count))) {
1112 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1113 			   "need to request at least one transmit and one receive channel\n");
1114 		return -EINVAL;
1115 	}
1116 
1117 	if (count > QEDE_MAX_RSS_CNT(edev)) {
1118 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1119 			   "requested channels = %d max supported channels = %d\n",
1120 			   count, QEDE_MAX_RSS_CNT(edev));
1121 		return -EINVAL;
1122 	}
1123 
1124 	/* Check if there was a change in the active parameters */
1125 	if ((count == QEDE_QUEUE_CNT(edev)) &&
1126 	    (channels->tx_count == edev->fp_num_tx) &&
1127 	    (channels->rx_count == edev->fp_num_rx)) {
1128 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1129 			   "No change in active parameters\n");
1130 		return 0;
1131 	}
1132 
1133 	/* We need the number of queues to be divisible between the hwfns */
1134 	if ((count % edev->dev_info.common.num_hwfns) ||
1135 	    (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1136 	    (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1137 		DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1138 			   "Number of channels must be divisible by %04x\n",
1139 			   edev->dev_info.common.num_hwfns);
1140 		return -EINVAL;
1141 	}
1142 
1143 	/* Set number of queues and reload if necessary */
1144 	edev->req_queues = count;
1145 	edev->req_num_tx = channels->tx_count;
1146 	edev->req_num_rx = channels->rx_count;
1147 	/* Reset the indirection table if rx queue count is updated */
1148 	if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1149 		edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1150 		memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1151 	}
1152 
1153 	qede_reload(edev, NULL, false);
1154 
1155 	return 0;
1156 }
1157 
1158 static int qede_get_ts_info(struct net_device *dev,
1159 			    struct ethtool_ts_info *info)
1160 {
1161 	struct qede_dev *edev = netdev_priv(dev);
1162 
1163 	return qede_ptp_get_ts_info(edev, info);
1164 }
1165 
1166 static int qede_set_phys_id(struct net_device *dev,
1167 			    enum ethtool_phys_id_state state)
1168 {
1169 	struct qede_dev *edev = netdev_priv(dev);
1170 	u8 led_state = 0;
1171 
1172 	switch (state) {
1173 	case ETHTOOL_ID_ACTIVE:
1174 		return 1;	/* cycle on/off once per second */
1175 
1176 	case ETHTOOL_ID_ON:
1177 		led_state = QED_LED_MODE_ON;
1178 		break;
1179 
1180 	case ETHTOOL_ID_OFF:
1181 		led_state = QED_LED_MODE_OFF;
1182 		break;
1183 
1184 	case ETHTOOL_ID_INACTIVE:
1185 		led_state = QED_LED_MODE_RESTORE;
1186 		break;
1187 	}
1188 
1189 	edev->ops->common->set_led(edev->cdev, led_state);
1190 
1191 	return 0;
1192 }
1193 
1194 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1195 {
1196 	info->data = RXH_IP_SRC | RXH_IP_DST;
1197 
1198 	switch (info->flow_type) {
1199 	case TCP_V4_FLOW:
1200 	case TCP_V6_FLOW:
1201 		info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1202 		break;
1203 	case UDP_V4_FLOW:
1204 		if (edev->rss_caps & QED_RSS_IPV4_UDP)
1205 			info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1206 		break;
1207 	case UDP_V6_FLOW:
1208 		if (edev->rss_caps & QED_RSS_IPV6_UDP)
1209 			info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1210 		break;
1211 	case IPV4_FLOW:
1212 	case IPV6_FLOW:
1213 		break;
1214 	default:
1215 		info->data = 0;
1216 		break;
1217 	}
1218 
1219 	return 0;
1220 }
1221 
1222 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1223 			  u32 *rule_locs)
1224 {
1225 	struct qede_dev *edev = netdev_priv(dev);
1226 	int rc = 0;
1227 
1228 	switch (info->cmd) {
1229 	case ETHTOOL_GRXRINGS:
1230 		info->data = QEDE_RSS_COUNT(edev);
1231 		break;
1232 	case ETHTOOL_GRXFH:
1233 		rc = qede_get_rss_flags(edev, info);
1234 		break;
1235 	case ETHTOOL_GRXCLSRLCNT:
1236 		info->rule_cnt = qede_get_arfs_filter_count(edev);
1237 		info->data = QEDE_RFS_MAX_FLTR;
1238 		break;
1239 	case ETHTOOL_GRXCLSRULE:
1240 		rc = qede_get_cls_rule_entry(edev, info);
1241 		break;
1242 	case ETHTOOL_GRXCLSRLALL:
1243 		rc = qede_get_cls_rule_all(edev, info, rule_locs);
1244 		break;
1245 	default:
1246 		DP_ERR(edev, "Command parameters not supported\n");
1247 		rc = -EOPNOTSUPP;
1248 	}
1249 
1250 	return rc;
1251 }
1252 
1253 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1254 {
1255 	struct qed_update_vport_params *vport_update_params;
1256 	u8 set_caps = 0, clr_caps = 0;
1257 	int rc = 0;
1258 
1259 	DP_VERBOSE(edev, QED_MSG_DEBUG,
1260 		   "Set rss flags command parameters: flow type = %d, data = %llu\n",
1261 		   info->flow_type, info->data);
1262 
1263 	switch (info->flow_type) {
1264 	case TCP_V4_FLOW:
1265 	case TCP_V6_FLOW:
1266 		/* For TCP only 4-tuple hash is supported */
1267 		if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1268 				  RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1269 			DP_INFO(edev, "Command parameters not supported\n");
1270 			return -EINVAL;
1271 		}
1272 		return 0;
1273 	case UDP_V4_FLOW:
1274 		/* For UDP either 2-tuple hash or 4-tuple hash is supported */
1275 		if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1276 				   RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1277 			set_caps = QED_RSS_IPV4_UDP;
1278 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1279 				   "UDP 4-tuple enabled\n");
1280 		} else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1281 			clr_caps = QED_RSS_IPV4_UDP;
1282 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1283 				   "UDP 4-tuple disabled\n");
1284 		} else {
1285 			return -EINVAL;
1286 		}
1287 		break;
1288 	case UDP_V6_FLOW:
1289 		/* For UDP either 2-tuple hash or 4-tuple hash is supported */
1290 		if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1291 				   RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1292 			set_caps = QED_RSS_IPV6_UDP;
1293 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1294 				   "UDP 4-tuple enabled\n");
1295 		} else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1296 			clr_caps = QED_RSS_IPV6_UDP;
1297 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1298 				   "UDP 4-tuple disabled\n");
1299 		} else {
1300 			return -EINVAL;
1301 		}
1302 		break;
1303 	case IPV4_FLOW:
1304 	case IPV6_FLOW:
1305 		/* For IP only 2-tuple hash is supported */
1306 		if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1307 			DP_INFO(edev, "Command parameters not supported\n");
1308 			return -EINVAL;
1309 		}
1310 		return 0;
1311 	case SCTP_V4_FLOW:
1312 	case AH_ESP_V4_FLOW:
1313 	case AH_V4_FLOW:
1314 	case ESP_V4_FLOW:
1315 	case SCTP_V6_FLOW:
1316 	case AH_ESP_V6_FLOW:
1317 	case AH_V6_FLOW:
1318 	case ESP_V6_FLOW:
1319 	case IP_USER_FLOW:
1320 	case ETHER_FLOW:
1321 		/* RSS is not supported for these protocols */
1322 		if (info->data) {
1323 			DP_INFO(edev, "Command parameters not supported\n");
1324 			return -EINVAL;
1325 		}
1326 		return 0;
1327 	default:
1328 		return -EINVAL;
1329 	}
1330 
1331 	/* No action is needed if there is no change in the rss capability */
1332 	if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1333 		return 0;
1334 
1335 	/* Update internal configuration */
1336 	edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1337 	edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1338 
1339 	/* Re-configure if possible */
1340 	__qede_lock(edev);
1341 	if (edev->state == QEDE_STATE_OPEN) {
1342 		vport_update_params = vzalloc(sizeof(*vport_update_params));
1343 		if (!vport_update_params) {
1344 			__qede_unlock(edev);
1345 			return -ENOMEM;
1346 		}
1347 		qede_fill_rss_params(edev, &vport_update_params->rss_params,
1348 				     &vport_update_params->update_rss_flg);
1349 		rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1350 		vfree(vport_update_params);
1351 	}
1352 	__qede_unlock(edev);
1353 
1354 	return rc;
1355 }
1356 
1357 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1358 {
1359 	struct qede_dev *edev = netdev_priv(dev);
1360 	int rc;
1361 
1362 	switch (info->cmd) {
1363 	case ETHTOOL_SRXFH:
1364 		rc = qede_set_rss_flags(edev, info);
1365 		break;
1366 	case ETHTOOL_SRXCLSRLINS:
1367 		rc = qede_add_cls_rule(edev, info);
1368 		break;
1369 	case ETHTOOL_SRXCLSRLDEL:
1370 		rc = qede_delete_flow_filter(edev, info->fs.location);
1371 		break;
1372 	default:
1373 		DP_INFO(edev, "Command parameters not supported\n");
1374 		rc = -EOPNOTSUPP;
1375 	}
1376 
1377 	return rc;
1378 }
1379 
1380 static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1381 {
1382 	return QED_RSS_IND_TABLE_SIZE;
1383 }
1384 
1385 static u32 qede_get_rxfh_key_size(struct net_device *dev)
1386 {
1387 	struct qede_dev *edev = netdev_priv(dev);
1388 
1389 	return sizeof(edev->rss_key);
1390 }
1391 
1392 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1393 {
1394 	struct qede_dev *edev = netdev_priv(dev);
1395 	int i;
1396 
1397 	if (hfunc)
1398 		*hfunc = ETH_RSS_HASH_TOP;
1399 
1400 	if (!indir)
1401 		return 0;
1402 
1403 	for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1404 		indir[i] = edev->rss_ind_table[i];
1405 
1406 	if (key)
1407 		memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1408 
1409 	return 0;
1410 }
1411 
1412 static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1413 			 const u8 *key, const u8 hfunc)
1414 {
1415 	struct qed_update_vport_params *vport_update_params;
1416 	struct qede_dev *edev = netdev_priv(dev);
1417 	int i, rc = 0;
1418 
1419 	if (edev->dev_info.common.num_hwfns > 1) {
1420 		DP_INFO(edev,
1421 			"RSS configuration is not supported for 100G devices\n");
1422 		return -EOPNOTSUPP;
1423 	}
1424 
1425 	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1426 		return -EOPNOTSUPP;
1427 
1428 	if (!indir && !key)
1429 		return 0;
1430 
1431 	if (indir) {
1432 		for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1433 			edev->rss_ind_table[i] = indir[i];
1434 		edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1435 	}
1436 
1437 	if (key) {
1438 		memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1439 		edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1440 	}
1441 
1442 	__qede_lock(edev);
1443 	if (edev->state == QEDE_STATE_OPEN) {
1444 		vport_update_params = vzalloc(sizeof(*vport_update_params));
1445 		if (!vport_update_params) {
1446 			__qede_unlock(edev);
1447 			return -ENOMEM;
1448 		}
1449 		qede_fill_rss_params(edev, &vport_update_params->rss_params,
1450 				     &vport_update_params->update_rss_flg);
1451 		rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1452 		vfree(vport_update_params);
1453 	}
1454 	__qede_unlock(edev);
1455 
1456 	return rc;
1457 }
1458 
1459 /* This function enables the interrupt generation and the NAPI on the device */
1460 static void qede_netif_start(struct qede_dev *edev)
1461 {
1462 	int i;
1463 
1464 	if (!netif_running(edev->ndev))
1465 		return;
1466 
1467 	for_each_queue(i) {
1468 		/* Update and reenable interrupts */
1469 		qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1470 		napi_enable(&edev->fp_array[i].napi);
1471 	}
1472 }
1473 
1474 /* This function disables the NAPI and the interrupt generation on the device */
1475 static void qede_netif_stop(struct qede_dev *edev)
1476 {
1477 	int i;
1478 
1479 	for_each_queue(i) {
1480 		napi_disable(&edev->fp_array[i].napi);
1481 		/* Disable interrupts */
1482 		qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1483 	}
1484 }
1485 
1486 static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1487 					  struct sk_buff *skb)
1488 {
1489 	struct qede_tx_queue *txq = NULL;
1490 	struct eth_tx_1st_bd *first_bd;
1491 	dma_addr_t mapping;
1492 	int i, idx;
1493 	u16 val;
1494 
1495 	for_each_queue(i) {
1496 		struct qede_fastpath *fp = &edev->fp_array[i];
1497 
1498 		if (fp->type & QEDE_FASTPATH_TX) {
1499 			txq = QEDE_FP_TC0_TXQ(fp);
1500 			break;
1501 		}
1502 	}
1503 
1504 	if (!txq) {
1505 		DP_NOTICE(edev, "Tx path is not available\n");
1506 		return -1;
1507 	}
1508 
1509 	/* Fill the entry in the SW ring and the BDs in the FW ring */
1510 	idx = txq->sw_tx_prod;
1511 	txq->sw_tx_ring.skbs[idx].skb = skb;
1512 	first_bd = qed_chain_produce(&txq->tx_pbl);
1513 	memset(first_bd, 0, sizeof(*first_bd));
1514 	val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1515 	first_bd->data.bd_flags.bitfields = val;
1516 	val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1517 	val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1518 	first_bd->data.bitfields |= cpu_to_le16(val);
1519 
1520 	/* Map skb linear data for DMA and set in the first BD */
1521 	mapping = dma_map_single(&edev->pdev->dev, skb->data,
1522 				 skb_headlen(skb), DMA_TO_DEVICE);
1523 	if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1524 		DP_NOTICE(edev, "SKB mapping failed\n");
1525 		return -ENOMEM;
1526 	}
1527 	BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1528 
1529 	/* update the first BD with the actual num BDs */
1530 	first_bd->data.nbds = 1;
1531 	txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1532 	/* 'next page' entries are counted in the producer value */
1533 	val = qed_chain_get_prod_idx(&txq->tx_pbl);
1534 	txq->tx_db.data.bd_prod = cpu_to_le16(val);
1535 
1536 	/* wmb makes sure that the BDs data is updated before updating the
1537 	 * producer, otherwise FW may read old data from the BDs.
1538 	 */
1539 	wmb();
1540 	barrier();
1541 	writel(txq->tx_db.raw, txq->doorbell_addr);
1542 
1543 	for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1544 		if (qede_txq_has_work(txq))
1545 			break;
1546 		usleep_range(100, 200);
1547 	}
1548 
1549 	if (!qede_txq_has_work(txq)) {
1550 		DP_NOTICE(edev, "Tx completion didn't happen\n");
1551 		return -1;
1552 	}
1553 
1554 	first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1555 	dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1556 			 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1557 	txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1558 	txq->sw_tx_ring.skbs[idx].skb = NULL;
1559 
1560 	return 0;
1561 }
1562 
1563 static int qede_selftest_receive_traffic(struct qede_dev *edev)
1564 {
1565 	u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
1566 	struct eth_fast_path_rx_reg_cqe *fp_cqe;
1567 	struct qede_rx_queue *rxq = NULL;
1568 	struct sw_rx_data *sw_rx_data;
1569 	union eth_rx_cqe *cqe;
1570 	int i, iter, rc = 0;
1571 	u8 *data_ptr;
1572 
1573 	for_each_queue(i) {
1574 		if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1575 			rxq = edev->fp_array[i].rxq;
1576 			break;
1577 		}
1578 	}
1579 
1580 	if (!rxq) {
1581 		DP_NOTICE(edev, "Rx path is not available\n");
1582 		return -1;
1583 	}
1584 
1585 	/* The packet is expected to receive on rx-queue 0 even though RSS is
1586 	 * enabled. This is because the queue 0 is configured as the default
1587 	 * queue and that the loopback traffic is not IP.
1588 	 */
1589 	for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1590 		if (!qede_has_rx_work(rxq)) {
1591 			usleep_range(100, 200);
1592 			continue;
1593 		}
1594 
1595 		hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1596 		sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1597 
1598 		/* Memory barrier to prevent the CPU from doing speculative
1599 		 * reads of CQE/BD before reading hw_comp_cons. If the CQE is
1600 		 * read before it is written by FW, then FW writes CQE and SB,
1601 		 * and then the CPU reads the hw_comp_cons, it will use an old
1602 		 * CQE.
1603 		 */
1604 		rmb();
1605 
1606 		/* Get the CQE from the completion ring */
1607 		cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1608 
1609 		/* Get the data from the SW ring */
1610 		sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1611 		sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1612 		fp_cqe = &cqe->fast_path_regular;
1613 		len =  le16_to_cpu(fp_cqe->len_on_first_bd);
1614 		data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1615 				  fp_cqe->placement_offset +
1616 				  sw_rx_data->page_offset +
1617 				  rxq->rx_headroom);
1618 		if (ether_addr_equal(data_ptr,  edev->ndev->dev_addr) &&
1619 		    ether_addr_equal(data_ptr + ETH_ALEN,
1620 				     edev->ndev->dev_addr)) {
1621 			for (i = ETH_HLEN; i < len; i++)
1622 				if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1623 					rc = -1;
1624 					break;
1625 				}
1626 
1627 			qede_recycle_rx_bd_ring(rxq, 1);
1628 			qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1629 			break;
1630 		}
1631 
1632 		DP_INFO(edev, "Not the transmitted packet\n");
1633 		qede_recycle_rx_bd_ring(rxq, 1);
1634 		qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1635 	}
1636 
1637 	if (iter == QEDE_SELFTEST_POLL_COUNT) {
1638 		DP_NOTICE(edev, "Failed to receive the traffic\n");
1639 		return -1;
1640 	}
1641 
1642 	qede_update_rx_prod(edev, rxq);
1643 
1644 	return rc;
1645 }
1646 
1647 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1648 {
1649 	struct qed_link_params link_params;
1650 	struct sk_buff *skb = NULL;
1651 	int rc = 0, i;
1652 	u32 pkt_size;
1653 	u8 *packet;
1654 
1655 	if (!netif_running(edev->ndev)) {
1656 		DP_NOTICE(edev, "Interface is down\n");
1657 		return -EINVAL;
1658 	}
1659 
1660 	qede_netif_stop(edev);
1661 
1662 	/* Bring up the link in Loopback mode */
1663 	memset(&link_params, 0, sizeof(link_params));
1664 	link_params.link_up = true;
1665 	link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1666 	link_params.loopback_mode = loopback_mode;
1667 	edev->ops->common->set_link(edev->cdev, &link_params);
1668 
1669 	/* Wait for loopback configuration to apply */
1670 	msleep_interruptible(500);
1671 
1672 	/* Setting max packet size to 1.5K to avoid data being split over
1673 	 * multiple BDs in cases where MTU > PAGE_SIZE.
1674 	 */
1675 	pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1676 		     edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1677 
1678 	skb = netdev_alloc_skb(edev->ndev, pkt_size);
1679 	if (!skb) {
1680 		DP_INFO(edev, "Can't allocate skb\n");
1681 		rc = -ENOMEM;
1682 		goto test_loopback_exit;
1683 	}
1684 	packet = skb_put(skb, pkt_size);
1685 	ether_addr_copy(packet, edev->ndev->dev_addr);
1686 	ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1687 	memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1688 	for (i = ETH_HLEN; i < pkt_size; i++)
1689 		packet[i] = (unsigned char)(i & 0xff);
1690 
1691 	rc = qede_selftest_transmit_traffic(edev, skb);
1692 	if (rc)
1693 		goto test_loopback_exit;
1694 
1695 	rc = qede_selftest_receive_traffic(edev);
1696 	if (rc)
1697 		goto test_loopback_exit;
1698 
1699 	DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1700 
1701 test_loopback_exit:
1702 	dev_kfree_skb(skb);
1703 
1704 	/* Bring up the link in Normal mode */
1705 	memset(&link_params, 0, sizeof(link_params));
1706 	link_params.link_up = true;
1707 	link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1708 	link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1709 	edev->ops->common->set_link(edev->cdev, &link_params);
1710 
1711 	/* Wait for loopback configuration to apply */
1712 	msleep_interruptible(500);
1713 
1714 	qede_netif_start(edev);
1715 
1716 	return rc;
1717 }
1718 
1719 static void qede_self_test(struct net_device *dev,
1720 			   struct ethtool_test *etest, u64 *buf)
1721 {
1722 	struct qede_dev *edev = netdev_priv(dev);
1723 
1724 	DP_VERBOSE(edev, QED_MSG_DEBUG,
1725 		   "Self-test command parameters: offline = %d, external_lb = %d\n",
1726 		   (etest->flags & ETH_TEST_FL_OFFLINE),
1727 		   (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1728 
1729 	memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1730 
1731 	if (etest->flags & ETH_TEST_FL_OFFLINE) {
1732 		if (qede_selftest_run_loopback(edev,
1733 					       QED_LINK_LOOPBACK_INT_PHY)) {
1734 			buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1735 			etest->flags |= ETH_TEST_FL_FAILED;
1736 		}
1737 	}
1738 
1739 	if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1740 		buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1741 		etest->flags |= ETH_TEST_FL_FAILED;
1742 	}
1743 
1744 	if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1745 		buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1746 		etest->flags |= ETH_TEST_FL_FAILED;
1747 	}
1748 
1749 	if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1750 		buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1751 		etest->flags |= ETH_TEST_FL_FAILED;
1752 	}
1753 
1754 	if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1755 		buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1756 		etest->flags |= ETH_TEST_FL_FAILED;
1757 	}
1758 
1759 	if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1760 		buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1761 		etest->flags |= ETH_TEST_FL_FAILED;
1762 	}
1763 }
1764 
1765 static int qede_set_tunable(struct net_device *dev,
1766 			    const struct ethtool_tunable *tuna,
1767 			    const void *data)
1768 {
1769 	struct qede_dev *edev = netdev_priv(dev);
1770 	u32 val;
1771 
1772 	switch (tuna->id) {
1773 	case ETHTOOL_RX_COPYBREAK:
1774 		val = *(u32 *)data;
1775 		if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1776 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1777 				   "Invalid rx copy break value, range is [%u, %u]",
1778 				   QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1779 			return -EINVAL;
1780 		}
1781 
1782 		edev->rx_copybreak = *(u32 *)data;
1783 		break;
1784 	default:
1785 		return -EOPNOTSUPP;
1786 	}
1787 
1788 	return 0;
1789 }
1790 
1791 static int qede_get_tunable(struct net_device *dev,
1792 			    const struct ethtool_tunable *tuna, void *data)
1793 {
1794 	struct qede_dev *edev = netdev_priv(dev);
1795 
1796 	switch (tuna->id) {
1797 	case ETHTOOL_RX_COPYBREAK:
1798 		*(u32 *)data = edev->rx_copybreak;
1799 		break;
1800 	default:
1801 		return -EOPNOTSUPP;
1802 	}
1803 
1804 	return 0;
1805 }
1806 
1807 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1808 {
1809 	struct qede_dev *edev = netdev_priv(dev);
1810 	struct qed_link_output current_link;
1811 
1812 	memset(&current_link, 0, sizeof(current_link));
1813 	edev->ops->common->get_link(edev->cdev, &current_link);
1814 
1815 	if (!current_link.eee_supported) {
1816 		DP_INFO(edev, "EEE is not supported\n");
1817 		return -EOPNOTSUPP;
1818 	}
1819 
1820 	if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1821 		edata->advertised = ADVERTISED_1000baseT_Full;
1822 	if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1823 		edata->advertised |= ADVERTISED_10000baseT_Full;
1824 	if (current_link.sup_caps & QED_EEE_1G_ADV)
1825 		edata->supported = ADVERTISED_1000baseT_Full;
1826 	if (current_link.sup_caps & QED_EEE_10G_ADV)
1827 		edata->supported |= ADVERTISED_10000baseT_Full;
1828 	if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1829 		edata->lp_advertised = ADVERTISED_1000baseT_Full;
1830 	if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1831 		edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1832 
1833 	edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1834 	edata->eee_enabled = current_link.eee.enable;
1835 	edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1836 	edata->eee_active = current_link.eee_active;
1837 
1838 	return 0;
1839 }
1840 
1841 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1842 {
1843 	struct qede_dev *edev = netdev_priv(dev);
1844 	struct qed_link_output current_link;
1845 	struct qed_link_params params;
1846 
1847 	if (!edev->ops->common->can_link_change(edev->cdev)) {
1848 		DP_INFO(edev, "Link settings are not allowed to be changed\n");
1849 		return -EOPNOTSUPP;
1850 	}
1851 
1852 	memset(&current_link, 0, sizeof(current_link));
1853 	edev->ops->common->get_link(edev->cdev, &current_link);
1854 
1855 	if (!current_link.eee_supported) {
1856 		DP_INFO(edev, "EEE is not supported\n");
1857 		return -EOPNOTSUPP;
1858 	}
1859 
1860 	memset(&params, 0, sizeof(params));
1861 	params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1862 
1863 	if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1864 				   ADVERTISED_10000baseT_Full)) ||
1865 	    ((edata->advertised & (ADVERTISED_1000baseT_Full |
1866 				   ADVERTISED_10000baseT_Full)) !=
1867 	     edata->advertised)) {
1868 		DP_VERBOSE(edev, QED_MSG_DEBUG,
1869 			   "Invalid advertised capabilities %d\n",
1870 			   edata->advertised);
1871 		return -EINVAL;
1872 	}
1873 
1874 	if (edata->advertised & ADVERTISED_1000baseT_Full)
1875 		params.eee.adv_caps = QED_EEE_1G_ADV;
1876 	if (edata->advertised & ADVERTISED_10000baseT_Full)
1877 		params.eee.adv_caps |= QED_EEE_10G_ADV;
1878 	params.eee.enable = edata->eee_enabled;
1879 	params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1880 	params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1881 
1882 	params.link_up = true;
1883 	edev->ops->common->set_link(edev->cdev, &params);
1884 
1885 	return 0;
1886 }
1887 
1888 static int qede_get_module_info(struct net_device *dev,
1889 				struct ethtool_modinfo *modinfo)
1890 {
1891 	struct qede_dev *edev = netdev_priv(dev);
1892 	u8 buf[4];
1893 	int rc;
1894 
1895 	/* Read first 4 bytes to find the sfp type */
1896 	rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1897 						   QED_I2C_DEV_ADDR_A0, 0, 4);
1898 	if (rc) {
1899 		DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1900 		return rc;
1901 	}
1902 
1903 	switch (buf[0]) {
1904 	case 0x3: /* SFP, SFP+, SFP-28 */
1905 		modinfo->type = ETH_MODULE_SFF_8472;
1906 		modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1907 		break;
1908 	case 0xc: /* QSFP */
1909 	case 0xd: /* QSFP+ */
1910 		modinfo->type = ETH_MODULE_SFF_8436;
1911 		modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1912 		break;
1913 	case 0x11: /* QSFP-28 */
1914 		modinfo->type = ETH_MODULE_SFF_8636;
1915 		modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1916 		break;
1917 	default:
1918 		DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1919 		return -EINVAL;
1920 	}
1921 
1922 	return 0;
1923 }
1924 
1925 static int qede_get_module_eeprom(struct net_device *dev,
1926 				  struct ethtool_eeprom *ee, u8 *data)
1927 {
1928 	struct qede_dev *edev = netdev_priv(dev);
1929 	u32 start_addr = ee->offset, size = 0;
1930 	u8 *buf = data;
1931 	int rc = 0;
1932 
1933 	/* Read A0 section */
1934 	if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1935 		/* Limit transfer size to the A0 section boundary */
1936 		if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1937 			size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1938 		else
1939 			size = ee->len;
1940 
1941 		rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1942 							   QED_I2C_DEV_ADDR_A0,
1943 							   start_addr, size);
1944 		if (rc) {
1945 			DP_ERR(edev, "Failed reading A0 section  %d\n", rc);
1946 			return rc;
1947 		}
1948 
1949 		buf += size;
1950 		start_addr += size;
1951 	}
1952 
1953 	/* Read A2 section */
1954 	if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
1955 	    start_addr < ETH_MODULE_SFF_8472_LEN) {
1956 		size = ee->len - size;
1957 		/* Limit transfer size to the A2 section boundary */
1958 		if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
1959 			size = ETH_MODULE_SFF_8472_LEN - start_addr;
1960 		start_addr -= ETH_MODULE_SFF_8079_LEN;
1961 		rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1962 							   QED_I2C_DEV_ADDR_A2,
1963 							   start_addr, size);
1964 		if (rc) {
1965 			DP_VERBOSE(edev, QED_MSG_DEBUG,
1966 				   "Failed reading A2 section %d\n", rc);
1967 			return 0;
1968 		}
1969 	}
1970 
1971 	return rc;
1972 }
1973 
1974 static const struct ethtool_ops qede_ethtool_ops = {
1975 	.get_link_ksettings = qede_get_link_ksettings,
1976 	.set_link_ksettings = qede_set_link_ksettings,
1977 	.get_drvinfo = qede_get_drvinfo,
1978 	.get_regs_len = qede_get_regs_len,
1979 	.get_regs = qede_get_regs,
1980 	.get_wol = qede_get_wol,
1981 	.set_wol = qede_set_wol,
1982 	.get_msglevel = qede_get_msglevel,
1983 	.set_msglevel = qede_set_msglevel,
1984 	.nway_reset = qede_nway_reset,
1985 	.get_link = qede_get_link,
1986 	.get_coalesce = qede_get_coalesce,
1987 	.set_coalesce = qede_set_coalesce,
1988 	.get_ringparam = qede_get_ringparam,
1989 	.set_ringparam = qede_set_ringparam,
1990 	.get_pauseparam = qede_get_pauseparam,
1991 	.set_pauseparam = qede_set_pauseparam,
1992 	.get_strings = qede_get_strings,
1993 	.set_phys_id = qede_set_phys_id,
1994 	.get_ethtool_stats = qede_get_ethtool_stats,
1995 	.get_priv_flags = qede_get_priv_flags,
1996 	.get_sset_count = qede_get_sset_count,
1997 	.get_rxnfc = qede_get_rxnfc,
1998 	.set_rxnfc = qede_set_rxnfc,
1999 	.get_rxfh_indir_size = qede_get_rxfh_indir_size,
2000 	.get_rxfh_key_size = qede_get_rxfh_key_size,
2001 	.get_rxfh = qede_get_rxfh,
2002 	.set_rxfh = qede_set_rxfh,
2003 	.get_ts_info = qede_get_ts_info,
2004 	.get_channels = qede_get_channels,
2005 	.set_channels = qede_set_channels,
2006 	.self_test = qede_self_test,
2007 	.get_module_info = qede_get_module_info,
2008 	.get_module_eeprom = qede_get_module_eeprom,
2009 	.get_eee = qede_get_eee,
2010 	.set_eee = qede_set_eee,
2011 
2012 	.get_tunable = qede_get_tunable,
2013 	.set_tunable = qede_set_tunable,
2014 	.flash_device = qede_flash_device,
2015 };
2016 
2017 static const struct ethtool_ops qede_vf_ethtool_ops = {
2018 	.get_link_ksettings = qede_get_link_ksettings,
2019 	.get_drvinfo = qede_get_drvinfo,
2020 	.get_msglevel = qede_get_msglevel,
2021 	.set_msglevel = qede_set_msglevel,
2022 	.get_link = qede_get_link,
2023 	.get_coalesce = qede_get_coalesce,
2024 	.set_coalesce = qede_set_coalesce,
2025 	.get_ringparam = qede_get_ringparam,
2026 	.set_ringparam = qede_set_ringparam,
2027 	.get_strings = qede_get_strings,
2028 	.get_ethtool_stats = qede_get_ethtool_stats,
2029 	.get_priv_flags = qede_get_priv_flags,
2030 	.get_sset_count = qede_get_sset_count,
2031 	.get_rxnfc = qede_get_rxnfc,
2032 	.set_rxnfc = qede_set_rxnfc,
2033 	.get_rxfh_indir_size = qede_get_rxfh_indir_size,
2034 	.get_rxfh_key_size = qede_get_rxfh_key_size,
2035 	.get_rxfh = qede_get_rxfh,
2036 	.set_rxfh = qede_set_rxfh,
2037 	.get_channels = qede_get_channels,
2038 	.set_channels = qede_set_channels,
2039 	.get_tunable = qede_get_tunable,
2040 	.set_tunable = qede_set_tunable,
2041 };
2042 
2043 void qede_set_ethtool_ops(struct net_device *dev)
2044 {
2045 	struct qede_dev *edev = netdev_priv(dev);
2046 
2047 	if (IS_VF(edev))
2048 		dev->ethtool_ops = &qede_vf_ethtool_ops;
2049 	else
2050 		dev->ethtool_ops = &qede_ethtool_ops;
2051 }
2052