1 // SPDX-License-Identifier: GPL-2.0-only
2 /****************************************************************************
3  * Driver for Solarflare network controllers and boards
4  * Copyright 2018 Solarflare Communications Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License version 2 as published
8  * by the Free Software Foundation, incorporated herein by reference.
9  */
10 
11 #include "net_driver.h"
12 #include <linux/filter.h>
13 #include <linux/module.h>
14 #include <linux/netdevice.h>
15 #include <net/gre.h>
16 #include "efx_common.h"
17 #include "efx_channels.h"
18 #include "efx.h"
19 #include "mcdi.h"
20 #include "selftest.h"
21 #include "rx_common.h"
22 #include "tx_common.h"
23 #include "nic.h"
24 #include "mcdi_port_common.h"
25 #include "io.h"
26 #include "mcdi_pcol.h"
27 
28 static unsigned int debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
29 			     NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
30 			     NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
31 			     NETIF_MSG_TX_ERR | NETIF_MSG_HW);
32 module_param(debug, uint, 0);
33 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
34 
35 /* This is the time (in jiffies) between invocations of the hardware
36  * monitor.
37  * On Falcon-based NICs, this will:
38  * - Check the on-board hardware monitor;
39  * - Poll the link state and reconfigure the hardware as necessary.
40  * On Siena-based NICs for power systems with EEH support, this will give EEH a
41  * chance to start.
42  */
43 static unsigned int efx_monitor_interval = 1 * HZ;
44 
45 /* How often and how many times to poll for a reset while waiting for a
46  * BIST that another function started to complete.
47  */
48 #define BIST_WAIT_DELAY_MS	100
49 #define BIST_WAIT_DELAY_COUNT	100
50 
51 /* Default stats update time */
52 #define STATS_PERIOD_MS_DEFAULT 1000
53 
54 static const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
55 static const char *const efx_reset_type_names[] = {
56 	[RESET_TYPE_INVISIBLE]          = "INVISIBLE",
57 	[RESET_TYPE_ALL]                = "ALL",
58 	[RESET_TYPE_RECOVER_OR_ALL]     = "RECOVER_OR_ALL",
59 	[RESET_TYPE_WORLD]              = "WORLD",
60 	[RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
61 	[RESET_TYPE_DATAPATH]           = "DATAPATH",
62 	[RESET_TYPE_MC_BIST]		= "MC_BIST",
63 	[RESET_TYPE_DISABLE]            = "DISABLE",
64 	[RESET_TYPE_TX_WATCHDOG]        = "TX_WATCHDOG",
65 	[RESET_TYPE_INT_ERROR]          = "INT_ERROR",
66 	[RESET_TYPE_DMA_ERROR]          = "DMA_ERROR",
67 	[RESET_TYPE_TX_SKIP]            = "TX_SKIP",
68 	[RESET_TYPE_MC_FAILURE]         = "MC_FAILURE",
69 	[RESET_TYPE_MCDI_TIMEOUT]	= "MCDI_TIMEOUT (FLR)",
70 };
71 
72 #define RESET_TYPE(type) \
73 	STRING_TABLE_LOOKUP(type, efx_reset_type)
74 
75 /* Loopback mode names (see LOOPBACK_MODE()) */
76 const unsigned int efx_siena_loopback_mode_max = LOOPBACK_MAX;
77 const char *const efx_siena_loopback_mode_names[] = {
78 	[LOOPBACK_NONE]		= "NONE",
79 	[LOOPBACK_DATA]		= "DATAPATH",
80 	[LOOPBACK_GMAC]		= "GMAC",
81 	[LOOPBACK_XGMII]	= "XGMII",
82 	[LOOPBACK_XGXS]		= "XGXS",
83 	[LOOPBACK_XAUI]		= "XAUI",
84 	[LOOPBACK_GMII]		= "GMII",
85 	[LOOPBACK_SGMII]	= "SGMII",
86 	[LOOPBACK_XGBR]		= "XGBR",
87 	[LOOPBACK_XFI]		= "XFI",
88 	[LOOPBACK_XAUI_FAR]	= "XAUI_FAR",
89 	[LOOPBACK_GMII_FAR]	= "GMII_FAR",
90 	[LOOPBACK_SGMII_FAR]	= "SGMII_FAR",
91 	[LOOPBACK_XFI_FAR]	= "XFI_FAR",
92 	[LOOPBACK_GPHY]		= "GPHY",
93 	[LOOPBACK_PHYXS]	= "PHYXS",
94 	[LOOPBACK_PCS]		= "PCS",
95 	[LOOPBACK_PMAPMD]	= "PMA/PMD",
96 	[LOOPBACK_XPORT]	= "XPORT",
97 	[LOOPBACK_XGMII_WS]	= "XGMII_WS",
98 	[LOOPBACK_XAUI_WS]	= "XAUI_WS",
99 	[LOOPBACK_XAUI_WS_FAR]  = "XAUI_WS_FAR",
100 	[LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
101 	[LOOPBACK_GMII_WS]	= "GMII_WS",
102 	[LOOPBACK_XFI_WS]	= "XFI_WS",
103 	[LOOPBACK_XFI_WS_FAR]	= "XFI_WS_FAR",
104 	[LOOPBACK_PHYXS_WS]	= "PHYXS_WS",
105 };
106 
107 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
108  * queued onto this work queue. This is not a per-nic work queue, because
109  * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
110  */
111 static struct workqueue_struct *reset_workqueue;
112 
113 int efx_siena_create_reset_workqueue(void)
114 {
115 	reset_workqueue = create_singlethread_workqueue("sfc_siena_reset");
116 	if (!reset_workqueue) {
117 		printk(KERN_ERR "Failed to create reset workqueue\n");
118 		return -ENOMEM;
119 	}
120 
121 	return 0;
122 }
123 
124 void efx_siena_queue_reset_work(struct efx_nic *efx)
125 {
126 	queue_work(reset_workqueue, &efx->reset_work);
127 }
128 
129 void efx_siena_flush_reset_workqueue(struct efx_nic *efx)
130 {
131 	cancel_work_sync(&efx->reset_work);
132 }
133 
134 void efx_siena_destroy_reset_workqueue(void)
135 {
136 	if (reset_workqueue) {
137 		destroy_workqueue(reset_workqueue);
138 		reset_workqueue = NULL;
139 	}
140 }
141 
142 /* We assume that efx->type->reconfigure_mac will always try to sync RX
143  * filters and therefore needs to read-lock the filter table against freeing
144  */
145 void efx_siena_mac_reconfigure(struct efx_nic *efx, bool mtu_only)
146 {
147 	if (efx->type->reconfigure_mac) {
148 		down_read(&efx->filter_sem);
149 		efx->type->reconfigure_mac(efx, mtu_only);
150 		up_read(&efx->filter_sem);
151 	}
152 }
153 
154 /* Asynchronous work item for changing MAC promiscuity and multicast
155  * hash.  Avoid a drain/rx_ingress enable by reconfiguring the current
156  * MAC directly.
157  */
158 static void efx_mac_work(struct work_struct *data)
159 {
160 	struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
161 
162 	mutex_lock(&efx->mac_lock);
163 	if (efx->port_enabled)
164 		efx_siena_mac_reconfigure(efx, false);
165 	mutex_unlock(&efx->mac_lock);
166 }
167 
168 int efx_siena_set_mac_address(struct net_device *net_dev, void *data)
169 {
170 	struct efx_nic *efx = netdev_priv(net_dev);
171 	struct sockaddr *addr = data;
172 	u8 *new_addr = addr->sa_data;
173 	u8 old_addr[6];
174 	int rc;
175 
176 	if (!is_valid_ether_addr(new_addr)) {
177 		netif_err(efx, drv, efx->net_dev,
178 			  "invalid ethernet MAC address requested: %pM\n",
179 			  new_addr);
180 		return -EADDRNOTAVAIL;
181 	}
182 
183 	/* save old address */
184 	ether_addr_copy(old_addr, net_dev->dev_addr);
185 	eth_hw_addr_set(net_dev, new_addr);
186 	if (efx->type->set_mac_address) {
187 		rc = efx->type->set_mac_address(efx);
188 		if (rc) {
189 			eth_hw_addr_set(net_dev, old_addr);
190 			return rc;
191 		}
192 	}
193 
194 	/* Reconfigure the MAC */
195 	mutex_lock(&efx->mac_lock);
196 	efx_siena_mac_reconfigure(efx, false);
197 	mutex_unlock(&efx->mac_lock);
198 
199 	return 0;
200 }
201 
202 /* Context: netif_addr_lock held, BHs disabled. */
203 void efx_siena_set_rx_mode(struct net_device *net_dev)
204 {
205 	struct efx_nic *efx = netdev_priv(net_dev);
206 
207 	if (efx->port_enabled)
208 		queue_work(efx->workqueue, &efx->mac_work);
209 	/* Otherwise efx_start_port() will do this */
210 }
211 
212 int efx_siena_set_features(struct net_device *net_dev, netdev_features_t data)
213 {
214 	struct efx_nic *efx = netdev_priv(net_dev);
215 	int rc;
216 
217 	/* If disabling RX n-tuple filtering, clear existing filters */
218 	if (net_dev->features & ~data & NETIF_F_NTUPLE) {
219 		rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
220 		if (rc)
221 			return rc;
222 	}
223 
224 	/* If Rx VLAN filter is changed, update filters via mac_reconfigure.
225 	 * If rx-fcs is changed, mac_reconfigure updates that too.
226 	 */
227 	if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER |
228 					  NETIF_F_RXFCS)) {
229 		/* efx_siena_set_rx_mode() will schedule MAC work to update filters
230 		 * when a new features are finally set in net_dev.
231 		 */
232 		efx_siena_set_rx_mode(net_dev);
233 	}
234 
235 	return 0;
236 }
237 
238 /* This ensures that the kernel is kept informed (via
239  * netif_carrier_on/off) of the link status, and also maintains the
240  * link status's stop on the port's TX queue.
241  */
242 void efx_siena_link_status_changed(struct efx_nic *efx)
243 {
244 	struct efx_link_state *link_state = &efx->link_state;
245 
246 	/* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
247 	 * that no events are triggered between unregister_netdev() and the
248 	 * driver unloading. A more general condition is that NETDEV_CHANGE
249 	 * can only be generated between NETDEV_UP and NETDEV_DOWN
250 	 */
251 	if (!netif_running(efx->net_dev))
252 		return;
253 
254 	if (link_state->up != netif_carrier_ok(efx->net_dev)) {
255 		efx->n_link_state_changes++;
256 
257 		if (link_state->up)
258 			netif_carrier_on(efx->net_dev);
259 		else
260 			netif_carrier_off(efx->net_dev);
261 	}
262 
263 	/* Status message for kernel log */
264 	if (link_state->up)
265 		netif_info(efx, link, efx->net_dev,
266 			   "link up at %uMbps %s-duplex (MTU %d)\n",
267 			   link_state->speed, link_state->fd ? "full" : "half",
268 			   efx->net_dev->mtu);
269 	else
270 		netif_info(efx, link, efx->net_dev, "link down\n");
271 }
272 
273 unsigned int efx_siena_xdp_max_mtu(struct efx_nic *efx)
274 {
275 	/* The maximum MTU that we can fit in a single page, allowing for
276 	 * framing, overhead and XDP headroom + tailroom.
277 	 */
278 	int overhead = EFX_MAX_FRAME_LEN(0) + sizeof(struct efx_rx_page_state) +
279 		       efx->rx_prefix_size + efx->type->rx_buffer_padding +
280 		       efx->rx_ip_align + EFX_XDP_HEADROOM + EFX_XDP_TAILROOM;
281 
282 	return PAGE_SIZE - overhead;
283 }
284 
285 /* Context: process, rtnl_lock() held. */
286 int efx_siena_change_mtu(struct net_device *net_dev, int new_mtu)
287 {
288 	struct efx_nic *efx = netdev_priv(net_dev);
289 	int rc;
290 
291 	rc = efx_check_disabled(efx);
292 	if (rc)
293 		return rc;
294 
295 	if (rtnl_dereference(efx->xdp_prog) &&
296 	    new_mtu > efx_siena_xdp_max_mtu(efx)) {
297 		netif_err(efx, drv, efx->net_dev,
298 			  "Requested MTU of %d too big for XDP (max: %d)\n",
299 			  new_mtu, efx_siena_xdp_max_mtu(efx));
300 		return -EINVAL;
301 	}
302 
303 	netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
304 
305 	efx_device_detach_sync(efx);
306 	efx_siena_stop_all(efx);
307 
308 	mutex_lock(&efx->mac_lock);
309 	net_dev->mtu = new_mtu;
310 	efx_siena_mac_reconfigure(efx, true);
311 	mutex_unlock(&efx->mac_lock);
312 
313 	efx_siena_start_all(efx);
314 	efx_device_attach_if_not_resetting(efx);
315 	return 0;
316 }
317 
318 /**************************************************************************
319  *
320  * Hardware monitor
321  *
322  **************************************************************************/
323 
324 /* Run periodically off the general workqueue */
325 static void efx_monitor(struct work_struct *data)
326 {
327 	struct efx_nic *efx = container_of(data, struct efx_nic,
328 					   monitor_work.work);
329 
330 	netif_vdbg(efx, timer, efx->net_dev,
331 		   "hardware monitor executing on CPU %d\n",
332 		   raw_smp_processor_id());
333 	BUG_ON(efx->type->monitor == NULL);
334 
335 	/* If the mac_lock is already held then it is likely a port
336 	 * reconfiguration is already in place, which will likely do
337 	 * most of the work of monitor() anyway.
338 	 */
339 	if (mutex_trylock(&efx->mac_lock)) {
340 		if (efx->port_enabled && efx->type->monitor)
341 			efx->type->monitor(efx);
342 		mutex_unlock(&efx->mac_lock);
343 	}
344 
345 	efx_siena_start_monitor(efx);
346 }
347 
348 void efx_siena_start_monitor(struct efx_nic *efx)
349 {
350 	if (efx->type->monitor)
351 		queue_delayed_work(efx->workqueue, &efx->monitor_work,
352 				   efx_monitor_interval);
353 }
354 
355 /**************************************************************************
356  *
357  * Event queue processing
358  *
359  *************************************************************************/
360 
361 /* Channels are shutdown and reinitialised whilst the NIC is running
362  * to propagate configuration changes (mtu, checksum offload), or
363  * to clear hardware error conditions
364  */
365 static void efx_start_datapath(struct efx_nic *efx)
366 {
367 	netdev_features_t old_features = efx->net_dev->features;
368 	bool old_rx_scatter = efx->rx_scatter;
369 	size_t rx_buf_len;
370 
371 	/* Calculate the rx buffer allocation parameters required to
372 	 * support the current MTU, including padding for header
373 	 * alignment and overruns.
374 	 */
375 	efx->rx_dma_len = (efx->rx_prefix_size +
376 			   EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
377 			   efx->type->rx_buffer_padding);
378 	rx_buf_len = (sizeof(struct efx_rx_page_state)   + EFX_XDP_HEADROOM +
379 		      efx->rx_ip_align + efx->rx_dma_len + EFX_XDP_TAILROOM);
380 
381 	if (rx_buf_len <= PAGE_SIZE) {
382 		efx->rx_scatter = efx->type->always_rx_scatter;
383 		efx->rx_buffer_order = 0;
384 	} else if (efx->type->can_rx_scatter) {
385 		BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
386 		BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
387 			     2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
388 				       EFX_RX_BUF_ALIGNMENT) >
389 			     PAGE_SIZE);
390 		efx->rx_scatter = true;
391 		efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
392 		efx->rx_buffer_order = 0;
393 	} else {
394 		efx->rx_scatter = false;
395 		efx->rx_buffer_order = get_order(rx_buf_len);
396 	}
397 
398 	efx_siena_rx_config_page_split(efx);
399 	if (efx->rx_buffer_order)
400 		netif_dbg(efx, drv, efx->net_dev,
401 			  "RX buf len=%u; page order=%u batch=%u\n",
402 			  efx->rx_dma_len, efx->rx_buffer_order,
403 			  efx->rx_pages_per_batch);
404 	else
405 		netif_dbg(efx, drv, efx->net_dev,
406 			  "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
407 			  efx->rx_dma_len, efx->rx_page_buf_step,
408 			  efx->rx_bufs_per_page, efx->rx_pages_per_batch);
409 
410 	/* Restore previously fixed features in hw_features and remove
411 	 * features which are fixed now
412 	 */
413 	efx->net_dev->hw_features |= efx->net_dev->features;
414 	efx->net_dev->hw_features &= ~efx->fixed_features;
415 	efx->net_dev->features |= efx->fixed_features;
416 	if (efx->net_dev->features != old_features)
417 		netdev_features_change(efx->net_dev);
418 
419 	/* RX filters may also have scatter-enabled flags */
420 	if ((efx->rx_scatter != old_rx_scatter) &&
421 	    efx->type->filter_update_rx_scatter)
422 		efx->type->filter_update_rx_scatter(efx);
423 
424 	/* We must keep at least one descriptor in a TX ring empty.
425 	 * We could avoid this when the queue size does not exactly
426 	 * match the hardware ring size, but it's not that important.
427 	 * Therefore we stop the queue when one more skb might fill
428 	 * the ring completely.  We wake it when half way back to
429 	 * empty.
430 	 */
431 	efx->txq_stop_thresh = efx->txq_entries - efx_siena_tx_max_skb_descs(efx);
432 	efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
433 
434 	/* Initialise the channels */
435 	efx_siena_start_channels(efx);
436 
437 	efx_siena_ptp_start_datapath(efx);
438 
439 	if (netif_device_present(efx->net_dev))
440 		netif_tx_wake_all_queues(efx->net_dev);
441 }
442 
443 static void efx_stop_datapath(struct efx_nic *efx)
444 {
445 	EFX_ASSERT_RESET_SERIALISED(efx);
446 	BUG_ON(efx->port_enabled);
447 
448 	efx_siena_ptp_stop_datapath(efx);
449 
450 	efx_siena_stop_channels(efx);
451 }
452 
453 /**************************************************************************
454  *
455  * Port handling
456  *
457  **************************************************************************/
458 
459 /* Equivalent to efx_siena_link_set_advertising with all-zeroes, except does not
460  * force the Autoneg bit on.
461  */
462 void efx_siena_link_clear_advertising(struct efx_nic *efx)
463 {
464 	bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS);
465 	efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
466 }
467 
468 void efx_siena_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
469 {
470 	efx->wanted_fc = wanted_fc;
471 	if (efx->link_advertising[0]) {
472 		if (wanted_fc & EFX_FC_RX)
473 			efx->link_advertising[0] |= (ADVERTISED_Pause |
474 						     ADVERTISED_Asym_Pause);
475 		else
476 			efx->link_advertising[0] &= ~(ADVERTISED_Pause |
477 						      ADVERTISED_Asym_Pause);
478 		if (wanted_fc & EFX_FC_TX)
479 			efx->link_advertising[0] ^= ADVERTISED_Asym_Pause;
480 	}
481 }
482 
483 static void efx_start_port(struct efx_nic *efx)
484 {
485 	netif_dbg(efx, ifup, efx->net_dev, "start port\n");
486 	BUG_ON(efx->port_enabled);
487 
488 	mutex_lock(&efx->mac_lock);
489 	efx->port_enabled = true;
490 
491 	/* Ensure MAC ingress/egress is enabled */
492 	efx_siena_mac_reconfigure(efx, false);
493 
494 	mutex_unlock(&efx->mac_lock);
495 }
496 
497 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
498  * and the async self-test, wait for them to finish and prevent them
499  * being scheduled again.  This doesn't cover online resets, which
500  * should only be cancelled when removing the device.
501  */
502 static void efx_stop_port(struct efx_nic *efx)
503 {
504 	netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
505 
506 	EFX_ASSERT_RESET_SERIALISED(efx);
507 
508 	mutex_lock(&efx->mac_lock);
509 	efx->port_enabled = false;
510 	mutex_unlock(&efx->mac_lock);
511 
512 	/* Serialise against efx_set_multicast_list() */
513 	netif_addr_lock_bh(efx->net_dev);
514 	netif_addr_unlock_bh(efx->net_dev);
515 
516 	cancel_delayed_work_sync(&efx->monitor_work);
517 	efx_siena_selftest_async_cancel(efx);
518 	cancel_work_sync(&efx->mac_work);
519 }
520 
521 /* If the interface is supposed to be running but is not, start
522  * the hardware and software data path, regular activity for the port
523  * (MAC statistics, link polling, etc.) and schedule the port to be
524  * reconfigured.  Interrupts must already be enabled.  This function
525  * is safe to call multiple times, so long as the NIC is not disabled.
526  * Requires the RTNL lock.
527  */
528 void efx_siena_start_all(struct efx_nic *efx)
529 {
530 	EFX_ASSERT_RESET_SERIALISED(efx);
531 	BUG_ON(efx->state == STATE_DISABLED);
532 
533 	/* Check that it is appropriate to restart the interface. All
534 	 * of these flags are safe to read under just the rtnl lock
535 	 */
536 	if (efx->port_enabled || !netif_running(efx->net_dev) ||
537 	    efx->reset_pending)
538 		return;
539 
540 	efx_start_port(efx);
541 	efx_start_datapath(efx);
542 
543 	/* Start the hardware monitor if there is one */
544 	efx_siena_start_monitor(efx);
545 
546 	/* Link state detection is normally event-driven; we have
547 	 * to poll now because we could have missed a change
548 	 */
549 	mutex_lock(&efx->mac_lock);
550 	if (efx_siena_mcdi_phy_poll(efx))
551 		efx_siena_link_status_changed(efx);
552 	mutex_unlock(&efx->mac_lock);
553 
554 	if (efx->type->start_stats) {
555 		efx->type->start_stats(efx);
556 		efx->type->pull_stats(efx);
557 		spin_lock_bh(&efx->stats_lock);
558 		efx->type->update_stats(efx, NULL, NULL);
559 		spin_unlock_bh(&efx->stats_lock);
560 	}
561 }
562 
563 /* Quiesce the hardware and software data path, and regular activity
564  * for the port without bringing the link down.  Safe to call multiple
565  * times with the NIC in almost any state, but interrupts should be
566  * enabled.  Requires the RTNL lock.
567  */
568 void efx_siena_stop_all(struct efx_nic *efx)
569 {
570 	EFX_ASSERT_RESET_SERIALISED(efx);
571 
572 	/* port_enabled can be read safely under the rtnl lock */
573 	if (!efx->port_enabled)
574 		return;
575 
576 	if (efx->type->update_stats) {
577 		/* update stats before we go down so we can accurately count
578 		 * rx_nodesc_drops
579 		 */
580 		efx->type->pull_stats(efx);
581 		spin_lock_bh(&efx->stats_lock);
582 		efx->type->update_stats(efx, NULL, NULL);
583 		spin_unlock_bh(&efx->stats_lock);
584 		efx->type->stop_stats(efx);
585 	}
586 
587 	efx_stop_port(efx);
588 
589 	/* Stop the kernel transmit interface.  This is only valid if
590 	 * the device is stopped or detached; otherwise the watchdog
591 	 * may fire immediately.
592 	 */
593 	WARN_ON(netif_running(efx->net_dev) &&
594 		netif_device_present(efx->net_dev));
595 	netif_tx_disable(efx->net_dev);
596 
597 	efx_stop_datapath(efx);
598 }
599 
600 static size_t efx_siena_update_stats_atomic(struct efx_nic *efx, u64 *full_stats,
601 					    struct rtnl_link_stats64 *core_stats)
602 {
603 	if (efx->type->update_stats_atomic)
604 		return efx->type->update_stats_atomic(efx, full_stats, core_stats);
605 	return efx->type->update_stats(efx, full_stats, core_stats);
606 }
607 
608 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
609 void efx_siena_net_stats(struct net_device *net_dev,
610 			 struct rtnl_link_stats64 *stats)
611 {
612 	struct efx_nic *efx = netdev_priv(net_dev);
613 
614 	spin_lock_bh(&efx->stats_lock);
615 	efx_siena_update_stats_atomic(efx, NULL, stats);
616 	spin_unlock_bh(&efx->stats_lock);
617 }
618 
619 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
620  * the MAC appropriately. All other PHY configuration changes are pushed
621  * through phy_op->set_settings(), and pushed asynchronously to the MAC
622  * through efx_monitor().
623  *
624  * Callers must hold the mac_lock
625  */
626 int __efx_siena_reconfigure_port(struct efx_nic *efx)
627 {
628 	enum efx_phy_mode phy_mode;
629 	int rc = 0;
630 
631 	WARN_ON(!mutex_is_locked(&efx->mac_lock));
632 
633 	/* Disable PHY transmit in mac level loopbacks */
634 	phy_mode = efx->phy_mode;
635 	if (LOOPBACK_INTERNAL(efx))
636 		efx->phy_mode |= PHY_MODE_TX_DISABLED;
637 	else
638 		efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
639 
640 	if (efx->type->reconfigure_port)
641 		rc = efx->type->reconfigure_port(efx);
642 
643 	if (rc)
644 		efx->phy_mode = phy_mode;
645 
646 	return rc;
647 }
648 
649 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
650  * disabled.
651  */
652 int efx_siena_reconfigure_port(struct efx_nic *efx)
653 {
654 	int rc;
655 
656 	EFX_ASSERT_RESET_SERIALISED(efx);
657 
658 	mutex_lock(&efx->mac_lock);
659 	rc = __efx_siena_reconfigure_port(efx);
660 	mutex_unlock(&efx->mac_lock);
661 
662 	return rc;
663 }
664 
665 /**************************************************************************
666  *
667  * Device reset and suspend
668  *
669  **************************************************************************/
670 
671 static void efx_wait_for_bist_end(struct efx_nic *efx)
672 {
673 	int i;
674 
675 	for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
676 		if (efx_siena_mcdi_poll_reboot(efx))
677 			goto out;
678 		msleep(BIST_WAIT_DELAY_MS);
679 	}
680 
681 	netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
682 out:
683 	/* Either way unset the BIST flag. If we found no reboot we probably
684 	 * won't recover, but we should try.
685 	 */
686 	efx->mc_bist_for_other_fn = false;
687 }
688 
689 /* Try recovery mechanisms.
690  * For now only EEH is supported.
691  * Returns 0 if the recovery mechanisms are unsuccessful.
692  * Returns a non-zero value otherwise.
693  */
694 int efx_siena_try_recovery(struct efx_nic *efx)
695 {
696 #ifdef CONFIG_EEH
697 	/* A PCI error can occur and not be seen by EEH because nothing
698 	 * happens on the PCI bus. In this case the driver may fail and
699 	 * schedule a 'recover or reset', leading to this recovery handler.
700 	 * Manually call the eeh failure check function.
701 	 */
702 	struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
703 	if (eeh_dev_check_failure(eehdev)) {
704 		/* The EEH mechanisms will handle the error and reset the
705 		 * device if necessary.
706 		 */
707 		return 1;
708 	}
709 #endif
710 	return 0;
711 }
712 
713 /* Tears down the entire software state and most of the hardware state
714  * before reset.
715  */
716 void efx_siena_reset_down(struct efx_nic *efx, enum reset_type method)
717 {
718 	EFX_ASSERT_RESET_SERIALISED(efx);
719 
720 	if (method == RESET_TYPE_MCDI_TIMEOUT)
721 		efx->type->prepare_flr(efx);
722 
723 	efx_siena_stop_all(efx);
724 	efx_siena_disable_interrupts(efx);
725 
726 	mutex_lock(&efx->mac_lock);
727 	down_write(&efx->filter_sem);
728 	mutex_lock(&efx->rss_lock);
729 	efx->type->fini(efx);
730 }
731 
732 /* Context: netif_tx_lock held, BHs disabled. */
733 void efx_siena_watchdog(struct net_device *net_dev, unsigned int txqueue)
734 {
735 	struct efx_nic *efx = netdev_priv(net_dev);
736 
737 	netif_err(efx, tx_err, efx->net_dev,
738 		  "TX stuck with port_enabled=%d: resetting channels\n",
739 		  efx->port_enabled);
740 
741 	efx_siena_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
742 }
743 
744 /* This function will always ensure that the locks acquired in
745  * efx_siena_reset_down() are released. A failure return code indicates
746  * that we were unable to reinitialise the hardware, and the
747  * driver should be disabled. If ok is false, then the rx and tx
748  * engines are not restarted, pending a RESET_DISABLE.
749  */
750 int efx_siena_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
751 {
752 	int rc;
753 
754 	EFX_ASSERT_RESET_SERIALISED(efx);
755 
756 	if (method == RESET_TYPE_MCDI_TIMEOUT)
757 		efx->type->finish_flr(efx);
758 
759 	/* Ensure that SRAM is initialised even if we're disabling the device */
760 	rc = efx->type->init(efx);
761 	if (rc) {
762 		netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
763 		goto fail;
764 	}
765 
766 	if (!ok)
767 		goto fail;
768 
769 	if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
770 	    method != RESET_TYPE_DATAPATH) {
771 		rc = efx_siena_mcdi_port_reconfigure(efx);
772 		if (rc && rc != -EPERM)
773 			netif_err(efx, drv, efx->net_dev,
774 				  "could not restore PHY settings\n");
775 	}
776 
777 	rc = efx_siena_enable_interrupts(efx);
778 	if (rc)
779 		goto fail;
780 
781 #ifdef CONFIG_SFC_SIENA_SRIOV
782 	rc = efx->type->vswitching_restore(efx);
783 	if (rc) /* not fatal; the PF will still work fine */
784 		netif_warn(efx, probe, efx->net_dev,
785 			   "failed to restore vswitching rc=%d;"
786 			   " VFs may not function\n", rc);
787 #endif
788 
789 	if (efx->type->rx_restore_rss_contexts)
790 		efx->type->rx_restore_rss_contexts(efx);
791 	mutex_unlock(&efx->rss_lock);
792 	efx->type->filter_table_restore(efx);
793 	up_write(&efx->filter_sem);
794 	if (efx->type->sriov_reset)
795 		efx->type->sriov_reset(efx);
796 
797 	mutex_unlock(&efx->mac_lock);
798 
799 	efx_siena_start_all(efx);
800 
801 	if (efx->type->udp_tnl_push_ports)
802 		efx->type->udp_tnl_push_ports(efx);
803 
804 	return 0;
805 
806 fail:
807 	efx->port_initialized = false;
808 
809 	mutex_unlock(&efx->rss_lock);
810 	up_write(&efx->filter_sem);
811 	mutex_unlock(&efx->mac_lock);
812 
813 	return rc;
814 }
815 
816 /* Reset the NIC using the specified method.  Note that the reset may
817  * fail, in which case the card will be left in an unusable state.
818  *
819  * Caller must hold the rtnl_lock.
820  */
821 int efx_siena_reset(struct efx_nic *efx, enum reset_type method)
822 {
823 	int rc, rc2 = 0;
824 	bool disabled;
825 
826 	netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
827 		   RESET_TYPE(method));
828 
829 	efx_device_detach_sync(efx);
830 	/* efx_siena_reset_down() grabs locks that prevent recovery on EF100.
831 	 * EF100 reset is handled in the efx_nic_type callback below.
832 	 */
833 	if (efx_nic_rev(efx) != EFX_REV_EF100)
834 		efx_siena_reset_down(efx, method);
835 
836 	rc = efx->type->reset(efx, method);
837 	if (rc) {
838 		netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
839 		goto out;
840 	}
841 
842 	/* Clear flags for the scopes we covered.  We assume the NIC and
843 	 * driver are now quiescent so that there is no race here.
844 	 */
845 	if (method < RESET_TYPE_MAX_METHOD)
846 		efx->reset_pending &= -(1 << (method + 1));
847 	else /* it doesn't fit into the well-ordered scope hierarchy */
848 		__clear_bit(method, &efx->reset_pending);
849 
850 	/* Reinitialise bus-mastering, which may have been turned off before
851 	 * the reset was scheduled. This is still appropriate, even in the
852 	 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
853 	 * can respond to requests.
854 	 */
855 	pci_set_master(efx->pci_dev);
856 
857 out:
858 	/* Leave device stopped if necessary */
859 	disabled = rc ||
860 		method == RESET_TYPE_DISABLE ||
861 		method == RESET_TYPE_RECOVER_OR_DISABLE;
862 	if (efx_nic_rev(efx) != EFX_REV_EF100)
863 		rc2 = efx_siena_reset_up(efx, method, !disabled);
864 	if (rc2) {
865 		disabled = true;
866 		if (!rc)
867 			rc = rc2;
868 	}
869 
870 	if (disabled) {
871 		dev_close(efx->net_dev);
872 		netif_err(efx, drv, efx->net_dev, "has been disabled\n");
873 		efx->state = STATE_DISABLED;
874 	} else {
875 		netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
876 		efx_device_attach_if_not_resetting(efx);
877 	}
878 	return rc;
879 }
880 
881 /* The worker thread exists so that code that cannot sleep can
882  * schedule a reset for later.
883  */
884 static void efx_reset_work(struct work_struct *data)
885 {
886 	struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
887 	unsigned long pending;
888 	enum reset_type method;
889 
890 	pending = READ_ONCE(efx->reset_pending);
891 	method = fls(pending) - 1;
892 
893 	if (method == RESET_TYPE_MC_BIST)
894 		efx_wait_for_bist_end(efx);
895 
896 	if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
897 	     method == RESET_TYPE_RECOVER_OR_ALL) &&
898 	    efx_siena_try_recovery(efx))
899 		return;
900 
901 	if (!pending)
902 		return;
903 
904 	rtnl_lock();
905 
906 	/* We checked the state in efx_siena_schedule_reset() but it may
907 	 * have changed by now.  Now that we have the RTNL lock,
908 	 * it cannot change again.
909 	 */
910 	if (efx->state == STATE_READY)
911 		(void)efx_siena_reset(efx, method);
912 
913 	rtnl_unlock();
914 }
915 
916 void efx_siena_schedule_reset(struct efx_nic *efx, enum reset_type type)
917 {
918 	enum reset_type method;
919 
920 	if (efx->state == STATE_RECOVERY) {
921 		netif_dbg(efx, drv, efx->net_dev,
922 			  "recovering: skip scheduling %s reset\n",
923 			  RESET_TYPE(type));
924 		return;
925 	}
926 
927 	switch (type) {
928 	case RESET_TYPE_INVISIBLE:
929 	case RESET_TYPE_ALL:
930 	case RESET_TYPE_RECOVER_OR_ALL:
931 	case RESET_TYPE_WORLD:
932 	case RESET_TYPE_DISABLE:
933 	case RESET_TYPE_RECOVER_OR_DISABLE:
934 	case RESET_TYPE_DATAPATH:
935 	case RESET_TYPE_MC_BIST:
936 	case RESET_TYPE_MCDI_TIMEOUT:
937 		method = type;
938 		netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
939 			  RESET_TYPE(method));
940 		break;
941 	default:
942 		method = efx->type->map_reset_reason(type);
943 		netif_dbg(efx, drv, efx->net_dev,
944 			  "scheduling %s reset for %s\n",
945 			  RESET_TYPE(method), RESET_TYPE(type));
946 		break;
947 	}
948 
949 	set_bit(method, &efx->reset_pending);
950 	smp_mb(); /* ensure we change reset_pending before checking state */
951 
952 	/* If we're not READY then just leave the flags set as the cue
953 	 * to abort probing or reschedule the reset later.
954 	 */
955 	if (READ_ONCE(efx->state) != STATE_READY)
956 		return;
957 
958 	/* efx_process_channel() will no longer read events once a
959 	 * reset is scheduled. So switch back to poll'd MCDI completions.
960 	 */
961 	efx_siena_mcdi_mode_poll(efx);
962 
963 	efx_siena_queue_reset_work(efx);
964 }
965 
966 /**************************************************************************
967  *
968  * Dummy NIC operations
969  *
970  * Can be used for some unimplemented operations
971  * Needed so all function pointers are valid and do not have to be tested
972  * before use
973  *
974  **************************************************************************/
975 int efx_siena_port_dummy_op_int(struct efx_nic *efx)
976 {
977 	return 0;
978 }
979 
980 void efx_siena_port_dummy_op_void(struct efx_nic *efx) {}
981 
982 /**************************************************************************
983  *
984  * Data housekeeping
985  *
986  **************************************************************************/
987 
988 /* This zeroes out and then fills in the invariants in a struct
989  * efx_nic (including all sub-structures).
990  */
991 int efx_siena_init_struct(struct efx_nic *efx,
992 			  struct pci_dev *pci_dev, struct net_device *net_dev)
993 {
994 	int rc = -ENOMEM;
995 
996 	/* Initialise common structures */
997 	INIT_LIST_HEAD(&efx->node);
998 	INIT_LIST_HEAD(&efx->secondary_list);
999 	spin_lock_init(&efx->biu_lock);
1000 #ifdef CONFIG_SFC_SIENA_MTD
1001 	INIT_LIST_HEAD(&efx->mtd_list);
1002 #endif
1003 	INIT_WORK(&efx->reset_work, efx_reset_work);
1004 	INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1005 	efx_siena_selftest_async_init(efx);
1006 	efx->pci_dev = pci_dev;
1007 	efx->msg_enable = debug;
1008 	efx->state = STATE_UNINIT;
1009 	strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1010 
1011 	efx->net_dev = net_dev;
1012 	efx->rx_prefix_size = efx->type->rx_prefix_size;
1013 	efx->rx_ip_align =
1014 		NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
1015 	efx->rx_packet_hash_offset =
1016 		efx->type->rx_hash_offset - efx->type->rx_prefix_size;
1017 	efx->rx_packet_ts_offset =
1018 		efx->type->rx_ts_offset - efx->type->rx_prefix_size;
1019 	INIT_LIST_HEAD(&efx->rss_context.list);
1020 	efx->rss_context.context_id = EFX_MCDI_RSS_CONTEXT_INVALID;
1021 	mutex_init(&efx->rss_lock);
1022 	efx->vport_id = EVB_PORT_ID_ASSIGNED;
1023 	spin_lock_init(&efx->stats_lock);
1024 	efx->vi_stride = EFX_DEFAULT_VI_STRIDE;
1025 	efx->num_mac_stats = MC_CMD_MAC_NSTATS;
1026 	BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END);
1027 	mutex_init(&efx->mac_lock);
1028 	init_rwsem(&efx->filter_sem);
1029 #ifdef CONFIG_RFS_ACCEL
1030 	mutex_init(&efx->rps_mutex);
1031 	spin_lock_init(&efx->rps_hash_lock);
1032 	/* Failure to allocate is not fatal, but may degrade ARFS performance */
1033 	efx->rps_hash_table = kcalloc(EFX_ARFS_HASH_TABLE_SIZE,
1034 				      sizeof(*efx->rps_hash_table), GFP_KERNEL);
1035 #endif
1036 	efx->mdio.dev = net_dev;
1037 	INIT_WORK(&efx->mac_work, efx_mac_work);
1038 	init_waitqueue_head(&efx->flush_wq);
1039 
1040 	efx->tx_queues_per_channel = 1;
1041 	efx->rxq_entries = EFX_DEFAULT_DMAQ_SIZE;
1042 	efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1043 
1044 	efx->mem_bar = UINT_MAX;
1045 
1046 	rc = efx_siena_init_channels(efx);
1047 	if (rc)
1048 		goto fail;
1049 
1050 	/* Would be good to use the net_dev name, but we're too early */
1051 	snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
1052 		 pci_name(pci_dev));
1053 	efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
1054 	if (!efx->workqueue) {
1055 		rc = -ENOMEM;
1056 		goto fail;
1057 	}
1058 
1059 	return 0;
1060 
1061 fail:
1062 	efx_siena_fini_struct(efx);
1063 	return rc;
1064 }
1065 
1066 void efx_siena_fini_struct(struct efx_nic *efx)
1067 {
1068 #ifdef CONFIG_RFS_ACCEL
1069 	kfree(efx->rps_hash_table);
1070 #endif
1071 
1072 	efx_siena_fini_channels(efx);
1073 
1074 	kfree(efx->vpd_sn);
1075 
1076 	if (efx->workqueue) {
1077 		destroy_workqueue(efx->workqueue);
1078 		efx->workqueue = NULL;
1079 	}
1080 }
1081 
1082 /* This configures the PCI device to enable I/O and DMA. */
1083 int efx_siena_init_io(struct efx_nic *efx, int bar, dma_addr_t dma_mask,
1084 		      unsigned int mem_map_size)
1085 {
1086 	struct pci_dev *pci_dev = efx->pci_dev;
1087 	int rc;
1088 
1089 	efx->mem_bar = UINT_MAX;
1090 
1091 	netif_dbg(efx, probe, efx->net_dev, "initialising I/O bar=%d\n", bar);
1092 
1093 	rc = pci_enable_device(pci_dev);
1094 	if (rc) {
1095 		netif_err(efx, probe, efx->net_dev,
1096 			  "failed to enable PCI device\n");
1097 		goto fail1;
1098 	}
1099 
1100 	pci_set_master(pci_dev);
1101 
1102 	rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1103 	if (rc) {
1104 		netif_err(efx, probe, efx->net_dev,
1105 			  "could not find a suitable DMA mask\n");
1106 		goto fail2;
1107 	}
1108 	netif_dbg(efx, probe, efx->net_dev,
1109 		  "using DMA mask %llx\n", (unsigned long long)dma_mask);
1110 
1111 	efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1112 	if (!efx->membase_phys) {
1113 		netif_err(efx, probe, efx->net_dev,
1114 			  "ERROR: No BAR%d mapping from the BIOS. "
1115 			  "Try pci=realloc on the kernel command line\n", bar);
1116 		rc = -ENODEV;
1117 		goto fail3;
1118 	}
1119 
1120 	rc = pci_request_region(pci_dev, bar, "sfc");
1121 	if (rc) {
1122 		netif_err(efx, probe, efx->net_dev,
1123 			  "request for memory BAR[%d] failed\n", bar);
1124 		rc = -EIO;
1125 		goto fail3;
1126 	}
1127 	efx->mem_bar = bar;
1128 	efx->membase = ioremap(efx->membase_phys, mem_map_size);
1129 	if (!efx->membase) {
1130 		netif_err(efx, probe, efx->net_dev,
1131 			  "could not map memory BAR[%d] at %llx+%x\n", bar,
1132 			  (unsigned long long)efx->membase_phys, mem_map_size);
1133 		rc = -ENOMEM;
1134 		goto fail4;
1135 	}
1136 	netif_dbg(efx, probe, efx->net_dev,
1137 		  "memory BAR[%d] at %llx+%x (virtual %p)\n", bar,
1138 		  (unsigned long long)efx->membase_phys, mem_map_size,
1139 		  efx->membase);
1140 
1141 	return 0;
1142 
1143 fail4:
1144 	pci_release_region(efx->pci_dev, bar);
1145 fail3:
1146 	efx->membase_phys = 0;
1147 fail2:
1148 	pci_disable_device(efx->pci_dev);
1149 fail1:
1150 	return rc;
1151 }
1152 
1153 void efx_siena_fini_io(struct efx_nic *efx)
1154 {
1155 	netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1156 
1157 	if (efx->membase) {
1158 		iounmap(efx->membase);
1159 		efx->membase = NULL;
1160 	}
1161 
1162 	if (efx->membase_phys) {
1163 		pci_release_region(efx->pci_dev, efx->mem_bar);
1164 		efx->membase_phys = 0;
1165 		efx->mem_bar = UINT_MAX;
1166 	}
1167 
1168 	/* Don't disable bus-mastering if VFs are assigned */
1169 	if (!pci_vfs_assigned(efx->pci_dev))
1170 		pci_disable_device(efx->pci_dev);
1171 }
1172 
1173 #ifdef CONFIG_SFC_SIENA_MCDI_LOGGING
1174 static ssize_t mcdi_logging_show(struct device *dev,
1175 				 struct device_attribute *attr,
1176 				 char *buf)
1177 {
1178 	struct efx_nic *efx = dev_get_drvdata(dev);
1179 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1180 
1181 	return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
1182 }
1183 
1184 static ssize_t mcdi_logging_store(struct device *dev,
1185 				  struct device_attribute *attr,
1186 				  const char *buf, size_t count)
1187 {
1188 	struct efx_nic *efx = dev_get_drvdata(dev);
1189 	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1190 	bool enable = count > 0 && *buf != '0';
1191 
1192 	mcdi->logging_enabled = enable;
1193 	return count;
1194 }
1195 
1196 static DEVICE_ATTR_RW(mcdi_logging);
1197 
1198 void efx_siena_init_mcdi_logging(struct efx_nic *efx)
1199 {
1200 	int rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
1201 
1202 	if (rc) {
1203 		netif_warn(efx, drv, efx->net_dev,
1204 			   "failed to init net dev attributes\n");
1205 	}
1206 }
1207 
1208 void efx_siena_fini_mcdi_logging(struct efx_nic *efx)
1209 {
1210 	device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
1211 }
1212 #endif
1213 
1214 /* A PCI error affecting this device was detected.
1215  * At this point MMIO and DMA may be disabled.
1216  * Stop the software path and request a slot reset.
1217  */
1218 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
1219 					      pci_channel_state_t state)
1220 {
1221 	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
1222 	struct efx_nic *efx = pci_get_drvdata(pdev);
1223 
1224 	if (state == pci_channel_io_perm_failure)
1225 		return PCI_ERS_RESULT_DISCONNECT;
1226 
1227 	rtnl_lock();
1228 
1229 	if (efx->state != STATE_DISABLED) {
1230 		efx->state = STATE_RECOVERY;
1231 		efx->reset_pending = 0;
1232 
1233 		efx_device_detach_sync(efx);
1234 
1235 		efx_siena_stop_all(efx);
1236 		efx_siena_disable_interrupts(efx);
1237 
1238 		status = PCI_ERS_RESULT_NEED_RESET;
1239 	} else {
1240 		/* If the interface is disabled we don't want to do anything
1241 		 * with it.
1242 		 */
1243 		status = PCI_ERS_RESULT_RECOVERED;
1244 	}
1245 
1246 	rtnl_unlock();
1247 
1248 	pci_disable_device(pdev);
1249 
1250 	return status;
1251 }
1252 
1253 /* Fake a successful reset, which will be performed later in efx_io_resume. */
1254 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
1255 {
1256 	struct efx_nic *efx = pci_get_drvdata(pdev);
1257 	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
1258 
1259 	if (pci_enable_device(pdev)) {
1260 		netif_err(efx, hw, efx->net_dev,
1261 			  "Cannot re-enable PCI device after reset.\n");
1262 		status =  PCI_ERS_RESULT_DISCONNECT;
1263 	}
1264 
1265 	return status;
1266 }
1267 
1268 /* Perform the actual reset and resume I/O operations. */
1269 static void efx_io_resume(struct pci_dev *pdev)
1270 {
1271 	struct efx_nic *efx = pci_get_drvdata(pdev);
1272 	int rc;
1273 
1274 	rtnl_lock();
1275 
1276 	if (efx->state == STATE_DISABLED)
1277 		goto out;
1278 
1279 	rc = efx_siena_reset(efx, RESET_TYPE_ALL);
1280 	if (rc) {
1281 		netif_err(efx, hw, efx->net_dev,
1282 			  "efx_siena_reset failed after PCI error (%d)\n", rc);
1283 	} else {
1284 		efx->state = STATE_READY;
1285 		netif_dbg(efx, hw, efx->net_dev,
1286 			  "Done resetting and resuming IO after PCI error.\n");
1287 	}
1288 
1289 out:
1290 	rtnl_unlock();
1291 }
1292 
1293 /* For simplicity and reliability, we always require a slot reset and try to
1294  * reset the hardware when a pci error affecting the device is detected.
1295  * We leave both the link_reset and mmio_enabled callback unimplemented:
1296  * with our request for slot reset the mmio_enabled callback will never be
1297  * called, and the link_reset callback is not used by AER or EEH mechanisms.
1298  */
1299 const struct pci_error_handlers efx_siena_err_handlers = {
1300 	.error_detected = efx_io_error_detected,
1301 	.slot_reset	= efx_io_slot_reset,
1302 	.resume		= efx_io_resume,
1303 };
1304 
1305 /* Determine whether the NIC will be able to handle TX offloads for a given
1306  * encapsulated packet.
1307  */
1308 static bool efx_can_encap_offloads(struct efx_nic *efx, struct sk_buff *skb)
1309 {
1310 	struct gre_base_hdr *greh;
1311 	__be16 dst_port;
1312 	u8 ipproto;
1313 
1314 	/* Does the NIC support encap offloads?
1315 	 * If not, we should never get here, because we shouldn't have
1316 	 * advertised encap offload feature flags in the first place.
1317 	 */
1318 	if (WARN_ON_ONCE(!efx->type->udp_tnl_has_port))
1319 		return false;
1320 
1321 	/* Determine encapsulation protocol in use */
1322 	switch (skb->protocol) {
1323 	case htons(ETH_P_IP):
1324 		ipproto = ip_hdr(skb)->protocol;
1325 		break;
1326 	case htons(ETH_P_IPV6):
1327 		/* If there are extension headers, this will cause us to
1328 		 * think we can't offload something that we maybe could have.
1329 		 */
1330 		ipproto = ipv6_hdr(skb)->nexthdr;
1331 		break;
1332 	default:
1333 		/* Not IP, so can't offload it */
1334 		return false;
1335 	}
1336 	switch (ipproto) {
1337 	case IPPROTO_GRE:
1338 		/* We support NVGRE but not IP over GRE or random gretaps.
1339 		 * Specifically, the NIC will accept GRE as encapsulated if
1340 		 * the inner protocol is Ethernet, but only handle it
1341 		 * correctly if the GRE header is 8 bytes long.  Moreover,
1342 		 * it will not update the Checksum or Sequence Number fields
1343 		 * if they are present.  (The Routing Present flag,
1344 		 * GRE_ROUTING, cannot be set else the header would be more
1345 		 * than 8 bytes long; so we don't have to worry about it.)
1346 		 */
1347 		if (skb->inner_protocol_type != ENCAP_TYPE_ETHER)
1348 			return false;
1349 		if (ntohs(skb->inner_protocol) != ETH_P_TEB)
1350 			return false;
1351 		if (skb_inner_mac_header(skb) - skb_transport_header(skb) != 8)
1352 			return false;
1353 		greh = (struct gre_base_hdr *)skb_transport_header(skb);
1354 		return !(greh->flags & (GRE_CSUM | GRE_SEQ));
1355 	case IPPROTO_UDP:
1356 		/* If the port is registered for a UDP tunnel, we assume the
1357 		 * packet is for that tunnel, and the NIC will handle it as
1358 		 * such.  If not, the NIC won't know what to do with it.
1359 		 */
1360 		dst_port = udp_hdr(skb)->dest;
1361 		return efx->type->udp_tnl_has_port(efx, dst_port);
1362 	default:
1363 		return false;
1364 	}
1365 }
1366 
1367 netdev_features_t efx_siena_features_check(struct sk_buff *skb,
1368 					   struct net_device *dev,
1369 					   netdev_features_t features)
1370 {
1371 	struct efx_nic *efx = netdev_priv(dev);
1372 
1373 	if (skb->encapsulation) {
1374 		if (features & NETIF_F_GSO_MASK)
1375 			/* Hardware can only do TSO with at most 208 bytes
1376 			 * of headers.
1377 			 */
1378 			if (skb_inner_transport_offset(skb) >
1379 			    EFX_TSO2_MAX_HDRLEN)
1380 				features &= ~(NETIF_F_GSO_MASK);
1381 		if (features & (NETIF_F_GSO_MASK | NETIF_F_CSUM_MASK))
1382 			if (!efx_can_encap_offloads(efx, skb))
1383 				features &= ~(NETIF_F_GSO_MASK |
1384 					      NETIF_F_CSUM_MASK);
1385 	}
1386 	return features;
1387 }
1388 
1389 int efx_siena_get_phys_port_id(struct net_device *net_dev,
1390 			       struct netdev_phys_item_id *ppid)
1391 {
1392 	struct efx_nic *efx = netdev_priv(net_dev);
1393 
1394 	if (efx->type->get_phys_port_id)
1395 		return efx->type->get_phys_port_id(efx, ppid);
1396 	else
1397 		return -EOPNOTSUPP;
1398 }
1399 
1400 int efx_siena_get_phys_port_name(struct net_device *net_dev,
1401 				 char *name, size_t len)
1402 {
1403 	struct efx_nic *efx = netdev_priv(net_dev);
1404 
1405 	if (snprintf(name, len, "p%u", efx->port_num) >= len)
1406 		return -EINVAL;
1407 	return 0;
1408 }
1409