1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */ 3 4 #ifndef _TXGBE_TYPE_H_ 5 #define _TXGBE_TYPE_H_ 6 7 /* Device IDs */ 8 #define TXGBE_DEV_ID_SP1000 0x1001 9 #define TXGBE_DEV_ID_WX1820 0x2001 10 11 /* Subsystem IDs */ 12 /* SFP */ 13 #define TXGBE_ID_SP1000_SFP 0x0000 14 #define TXGBE_ID_WX1820_SFP 0x2000 15 #define TXGBE_ID_SFP 0x00 16 17 /* copper */ 18 #define TXGBE_ID_SP1000_XAUI 0x1010 19 #define TXGBE_ID_WX1820_XAUI 0x2010 20 #define TXGBE_ID_XAUI 0x10 21 #define TXGBE_ID_SP1000_SGMII 0x1020 22 #define TXGBE_ID_WX1820_SGMII 0x2020 23 #define TXGBE_ID_SGMII 0x20 24 /* backplane */ 25 #define TXGBE_ID_SP1000_KR_KX_KX4 0x1030 26 #define TXGBE_ID_WX1820_KR_KX_KX4 0x2030 27 #define TXGBE_ID_KR_KX_KX4 0x30 28 /* MAC Interface */ 29 #define TXGBE_ID_SP1000_MAC_XAUI 0x1040 30 #define TXGBE_ID_WX1820_MAC_XAUI 0x2040 31 #define TXGBE_ID_MAC_XAUI 0x40 32 #define TXGBE_ID_SP1000_MAC_SGMII 0x1060 33 #define TXGBE_ID_WX1820_MAC_SGMII 0x2060 34 #define TXGBE_ID_MAC_SGMII 0x60 35 36 /* Combined interface*/ 37 #define TXGBE_ID_SFI_XAUI 0x50 38 39 /* Revision ID */ 40 #define TXGBE_SP_MPW 1 41 42 /**************** SP Registers ****************************/ 43 /* chip control Registers */ 44 #define TXGBE_MIS_PRB_CTL 0x10010 45 #define TXGBE_MIS_PRB_CTL_LAN_UP(_i) BIT(1 - (_i)) 46 /* FMGR Registers */ 47 #define TXGBE_SPI_ILDR_STATUS 0x10120 48 #define TXGBE_SPI_ILDR_STATUS_PERST BIT(0) /* PCIE_PERST is done */ 49 #define TXGBE_SPI_ILDR_STATUS_PWRRST BIT(1) /* Power on reset is done */ 50 #define TXGBE_SPI_ILDR_STATUS_LAN_SW_RST(_i) BIT((_i) + 9) /* lan soft reset done */ 51 52 /* Sensors for PVT(Process Voltage Temperature) */ 53 #define TXGBE_TS_CTL 0x10300 54 #define TXGBE_TS_CTL_EVAL_MD BIT(31) 55 56 /* Part Number String Length */ 57 #define TXGBE_PBANUM_LENGTH 32 58 59 /* Checksum and EEPROM pointers */ 60 #define TXGBE_EEPROM_LAST_WORD 0x800 61 #define TXGBE_EEPROM_CHECKSUM 0x2F 62 #define TXGBE_EEPROM_SUM 0xBABA 63 #define TXGBE_EEPROM_VERSION_L 0x1D 64 #define TXGBE_EEPROM_VERSION_H 0x1E 65 #define TXGBE_ISCSI_BOOT_CONFIG 0x07 66 #define TXGBE_PBANUM0_PTR 0x05 67 #define TXGBE_PBANUM1_PTR 0x06 68 #define TXGBE_PBANUM_PTR_GUARD 0xFAFA 69 70 #define TXGBE_MAX_MSIX_VECTORS 64 71 #define TXGBE_MAX_FDIR_INDICES 63 72 73 #define TXGBE_MAX_RX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1) 74 #define TXGBE_MAX_TX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1) 75 76 #define TXGBE_SP_MAX_TX_QUEUES 128 77 #define TXGBE_SP_MAX_RX_QUEUES 128 78 #define TXGBE_SP_RAR_ENTRIES 128 79 #define TXGBE_SP_MC_TBL_SIZE 128 80 #define TXGBE_SP_RX_PB_SIZE 512 81 #define TXGBE_SP_TDB_PB_SZ (160 * 1024) /* 160KB Packet Buffer */ 82 83 /* TX/RX descriptor defines */ 84 #define TXGBE_DEFAULT_TXD 512 85 #define TXGBE_DEFAULT_TX_WORK 256 86 87 #if (PAGE_SIZE < 8192) 88 #define TXGBE_DEFAULT_RXD 512 89 #define TXGBE_DEFAULT_RX_WORK 256 90 #else 91 #define TXGBE_DEFAULT_RXD 256 92 #define TXGBE_DEFAULT_RX_WORK 128 93 #endif 94 95 #define TXGBE_INTR_MISC(A) BIT((A)->num_q_vectors) 96 #define TXGBE_INTR_QALL(A) (TXGBE_INTR_MISC(A) - 1) 97 98 #define TXGBE_MAX_EITR GENMASK(11, 3) 99 100 extern char txgbe_driver_name[]; 101 102 #endif /* _TXGBE_TYPE_H_ */ 103