1 /* 2 * drivers/net/phy/cicada.c 3 * 4 * Driver for Cicada PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License as published by the 12 * Free Software Foundation; either version 2 of the License, or (at your 13 * option) any later version. 14 * 15 */ 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/string.h> 19 #include <linux/errno.h> 20 #include <linux/unistd.h> 21 #include <linux/slab.h> 22 #include <linux/interrupt.h> 23 #include <linux/init.h> 24 #include <linux/delay.h> 25 #include <linux/netdevice.h> 26 #include <linux/etherdevice.h> 27 #include <linux/skbuff.h> 28 #include <linux/spinlock.h> 29 #include <linux/mm.h> 30 #include <linux/module.h> 31 #include <linux/mii.h> 32 #include <linux/ethtool.h> 33 #include <linux/phy.h> 34 35 #include <asm/io.h> 36 #include <asm/irq.h> 37 #include <asm/uaccess.h> 38 39 /* Cicada Extended Control Register 1 */ 40 #define MII_CIS8201_EXT_CON1 0x17 41 #define MII_CIS8201_EXTCON1_INIT 0x0000 42 43 /* Cicada Interrupt Mask Register */ 44 #define MII_CIS8201_IMASK 0x19 45 #define MII_CIS8201_IMASK_IEN 0x8000 46 #define MII_CIS8201_IMASK_SPEED 0x4000 47 #define MII_CIS8201_IMASK_LINK 0x2000 48 #define MII_CIS8201_IMASK_DUPLEX 0x1000 49 #define MII_CIS8201_IMASK_MASK 0xf000 50 51 /* Cicada Interrupt Status Register */ 52 #define MII_CIS8201_ISTAT 0x1a 53 #define MII_CIS8201_ISTAT_STATUS 0x8000 54 #define MII_CIS8201_ISTAT_SPEED 0x4000 55 #define MII_CIS8201_ISTAT_LINK 0x2000 56 #define MII_CIS8201_ISTAT_DUPLEX 0x1000 57 58 /* Cicada Auxiliary Control/Status Register */ 59 #define MII_CIS8201_AUX_CONSTAT 0x1c 60 #define MII_CIS8201_AUXCONSTAT_INIT 0x0004 61 #define MII_CIS8201_AUXCONSTAT_DUPLEX 0x0020 62 #define MII_CIS8201_AUXCONSTAT_SPEED 0x0018 63 #define MII_CIS8201_AUXCONSTAT_GBIT 0x0010 64 #define MII_CIS8201_AUXCONSTAT_100 0x0008 65 66 MODULE_DESCRIPTION("Cicadia PHY driver"); 67 MODULE_AUTHOR("Andy Fleming"); 68 MODULE_LICENSE("GPL"); 69 70 static int cis820x_config_init(struct phy_device *phydev) 71 { 72 int err; 73 74 err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT, 75 MII_CIS8201_AUXCONSTAT_INIT); 76 77 if (err < 0) 78 return err; 79 80 err = phy_write(phydev, MII_CIS8201_EXT_CON1, 81 MII_CIS8201_EXTCON1_INIT); 82 83 return err; 84 } 85 86 static int cis820x_ack_interrupt(struct phy_device *phydev) 87 { 88 int err = phy_read(phydev, MII_CIS8201_ISTAT); 89 90 return (err < 0) ? err : 0; 91 } 92 93 static int cis820x_config_intr(struct phy_device *phydev) 94 { 95 int err; 96 97 if(phydev->interrupts == PHY_INTERRUPT_ENABLED) 98 err = phy_write(phydev, MII_CIS8201_IMASK, 99 MII_CIS8201_IMASK_MASK); 100 else 101 err = phy_write(phydev, MII_CIS8201_IMASK, 0); 102 103 return err; 104 } 105 106 /* Cicada 820x */ 107 static struct phy_driver cis8204_driver = { 108 .phy_id = 0x000fc440, 109 .name = "Cicada Cis8204", 110 .phy_id_mask = 0x000fffc0, 111 .features = PHY_GBIT_FEATURES, 112 .flags = PHY_HAS_INTERRUPT, 113 .config_init = &cis820x_config_init, 114 .config_aneg = &genphy_config_aneg, 115 .read_status = &genphy_read_status, 116 .ack_interrupt = &cis820x_ack_interrupt, 117 .config_intr = &cis820x_config_intr, 118 .driver = { .owner = THIS_MODULE,}, 119 }; 120 121 static int __init cis8204_init(void) 122 { 123 return phy_driver_register(&cis8204_driver); 124 } 125 126 static void __exit cis8204_exit(void) 127 { 128 phy_driver_unregister(&cis8204_driver); 129 } 130 131 module_init(cis8204_init); 132 module_exit(cis8204_exit); 133