134e45ad9SAndrew F. Davis /* 234e45ad9SAndrew F. Davis * Driver for the Texas Instruments DP83848 PHY 334e45ad9SAndrew F. Davis * 42f67864bSAndrew F. Davis * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 534e45ad9SAndrew F. Davis * 634e45ad9SAndrew F. Davis * This program is free software; you can redistribute it and/or modify 734e45ad9SAndrew F. Davis * it under the terms of the GNU General Public License as published by 834e45ad9SAndrew F. Davis * the Free Software Foundation; either version 2 of the License. 934e45ad9SAndrew F. Davis * 1034e45ad9SAndrew F. Davis * This program is distributed in the hope that it will be useful, 1134e45ad9SAndrew F. Davis * but WITHOUT ANY WARRANTY; without even the implied warranty of 1234e45ad9SAndrew F. Davis * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1334e45ad9SAndrew F. Davis * GNU General Public License for more details. 1434e45ad9SAndrew F. Davis */ 1534e45ad9SAndrew F. Davis 1634e45ad9SAndrew F. Davis #include <linux/module.h> 1734e45ad9SAndrew F. Davis #include <linux/phy.h> 1834e45ad9SAndrew F. Davis 1968336293SAndrew F. Davis #define TI_DP83848C_PHY_ID 0x20005ca0 2068336293SAndrew F. Davis #define NS_DP83848C_PHY_ID 0x20005c90 21d1782f7bSAndrew F. Davis #define TLK10X_PHY_ID 0x2000a210 2234e45ad9SAndrew F. Davis 2334e45ad9SAndrew F. Davis /* Registers */ 245fed0393SAndrew F. Davis #define DP83848_MICR 0x11 /* MII Interrupt Control Register */ 255fed0393SAndrew F. Davis #define DP83848_MISR 0x12 /* MII Interrupt Status Register */ 2634e45ad9SAndrew F. Davis 2734e45ad9SAndrew F. Davis /* MICR Register Fields */ 2834e45ad9SAndrew F. Davis #define DP83848_MICR_INT_OE BIT(0) /* Interrupt Output Enable */ 2934e45ad9SAndrew F. Davis #define DP83848_MICR_INTEN BIT(1) /* Interrupt Enable */ 3034e45ad9SAndrew F. Davis 3134e45ad9SAndrew F. Davis /* MISR Register Fields */ 3234e45ad9SAndrew F. Davis #define DP83848_MISR_RHF_INT_EN BIT(0) /* Receive Error Counter */ 3334e45ad9SAndrew F. Davis #define DP83848_MISR_FHF_INT_EN BIT(1) /* False Carrier Counter */ 3434e45ad9SAndrew F. Davis #define DP83848_MISR_ANC_INT_EN BIT(2) /* Auto-negotiation complete */ 3534e45ad9SAndrew F. Davis #define DP83848_MISR_DUP_INT_EN BIT(3) /* Duplex Status */ 3634e45ad9SAndrew F. Davis #define DP83848_MISR_SPD_INT_EN BIT(4) /* Speed status */ 3734e45ad9SAndrew F. Davis #define DP83848_MISR_LINK_INT_EN BIT(5) /* Link status */ 3834e45ad9SAndrew F. Davis #define DP83848_MISR_ED_INT_EN BIT(6) /* Energy detect */ 3934e45ad9SAndrew F. Davis #define DP83848_MISR_LQM_INT_EN BIT(7) /* Link Quality Monitor */ 4034e45ad9SAndrew F. Davis 41cf13be5aSAndrew F. Davis #define DP83848_INT_EN_MASK \ 42cf13be5aSAndrew F. Davis (DP83848_MISR_ANC_INT_EN | \ 43cf13be5aSAndrew F. Davis DP83848_MISR_DUP_INT_EN | \ 44cf13be5aSAndrew F. Davis DP83848_MISR_SPD_INT_EN | \ 45cf13be5aSAndrew F. Davis DP83848_MISR_LINK_INT_EN) 46cf13be5aSAndrew F. Davis 4734e45ad9SAndrew F. Davis static int dp83848_ack_interrupt(struct phy_device *phydev) 4834e45ad9SAndrew F. Davis { 4934e45ad9SAndrew F. Davis int err = phy_read(phydev, DP83848_MISR); 5034e45ad9SAndrew F. Davis 5134e45ad9SAndrew F. Davis return err < 0 ? err : 0; 5234e45ad9SAndrew F. Davis } 5334e45ad9SAndrew F. Davis 5434e45ad9SAndrew F. Davis static int dp83848_config_intr(struct phy_device *phydev) 5534e45ad9SAndrew F. Davis { 56cf13be5aSAndrew F. Davis int control, ret; 57cf13be5aSAndrew F. Davis 58cf13be5aSAndrew F. Davis control = phy_read(phydev, DP83848_MICR); 59cf13be5aSAndrew F. Davis if (control < 0) 60cf13be5aSAndrew F. Davis return control; 6134e45ad9SAndrew F. Davis 6234e45ad9SAndrew F. Davis if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { 63cf13be5aSAndrew F. Davis control |= DP83848_MICR_INT_OE; 64cf13be5aSAndrew F. Davis control |= DP83848_MICR_INTEN; 6534e45ad9SAndrew F. Davis 66cf13be5aSAndrew F. Davis ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK); 67cf13be5aSAndrew F. Davis if (ret < 0) 68cf13be5aSAndrew F. Davis return ret; 69cf13be5aSAndrew F. Davis } else { 70cf13be5aSAndrew F. Davis control &= ~DP83848_MICR_INTEN; 7134e45ad9SAndrew F. Davis } 7234e45ad9SAndrew F. Davis 73cf13be5aSAndrew F. Davis return phy_write(phydev, DP83848_MICR, control); 7434e45ad9SAndrew F. Davis } 7534e45ad9SAndrew F. Davis 7634e45ad9SAndrew F. Davis static struct mdio_device_id __maybe_unused dp83848_tbl[] = { 7768336293SAndrew F. Davis { TI_DP83848C_PHY_ID, 0xfffffff0 }, 7868336293SAndrew F. Davis { NS_DP83848C_PHY_ID, 0xfffffff0 }, 79d1782f7bSAndrew F. Davis { TLK10X_PHY_ID, 0xfffffff0 }, 8034e45ad9SAndrew F. Davis { } 8134e45ad9SAndrew F. Davis }; 8234e45ad9SAndrew F. Davis MODULE_DEVICE_TABLE(mdio, dp83848_tbl); 8334e45ad9SAndrew F. Davis 842f67864bSAndrew F. Davis #define DP83848_PHY_DRIVER(_id, _name) \ 852f67864bSAndrew F. Davis { \ 862f67864bSAndrew F. Davis .phy_id = _id, \ 872f67864bSAndrew F. Davis .phy_id_mask = 0xfffffff0, \ 882f67864bSAndrew F. Davis .name = _name, \ 892f67864bSAndrew F. Davis .features = PHY_BASIC_FEATURES, \ 902f67864bSAndrew F. Davis .flags = PHY_HAS_INTERRUPT, \ 912f67864bSAndrew F. Davis \ 922f67864bSAndrew F. Davis .soft_reset = genphy_soft_reset, \ 932f67864bSAndrew F. Davis .config_init = genphy_config_init, \ 942f67864bSAndrew F. Davis .suspend = genphy_suspend, \ 952f67864bSAndrew F. Davis .resume = genphy_resume, \ 962f67864bSAndrew F. Davis .config_aneg = genphy_config_aneg, \ 972f67864bSAndrew F. Davis .read_status = genphy_read_status, \ 982f67864bSAndrew F. Davis \ 992f67864bSAndrew F. Davis /* IRQ related */ \ 1002f67864bSAndrew F. Davis .ack_interrupt = dp83848_ack_interrupt, \ 1012f67864bSAndrew F. Davis .config_intr = dp83848_config_intr, \ 1022f67864bSAndrew F. Davis } 1032f67864bSAndrew F. Davis 10434e45ad9SAndrew F. Davis static struct phy_driver dp83848_driver[] = { 10568336293SAndrew F. Davis DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY"), 106*e12a285cSAndrew F. Davis DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY"), 107d1782f7bSAndrew F. Davis DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY"), 10834e45ad9SAndrew F. Davis }; 10934e45ad9SAndrew F. Davis module_phy_driver(dp83848_driver); 11034e45ad9SAndrew F. Davis 11134e45ad9SAndrew F. Davis MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver"); 11234e45ad9SAndrew F. Davis MODULE_AUTHOR("Andrew F. Davis <afd@ti.com"); 11334e45ad9SAndrew F. Davis MODULE_LICENSE("GPL"); 114