1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/firmware.h> 10 #include <linux/of.h> 11 #include <linux/property.h> 12 #include <linux/dmi.h> 13 #include <linux/ctype.h> 14 #include <asm/byteorder.h> 15 16 #include "core.h" 17 #include "mac.h" 18 #include "htc.h" 19 #include "hif.h" 20 #include "wmi.h" 21 #include "bmi.h" 22 #include "debug.h" 23 #include "htt.h" 24 #include "testmode.h" 25 #include "wmi-ops.h" 26 #include "coredump.h" 27 28 unsigned int ath10k_debug_mask; 29 static unsigned int ath10k_cryptmode_param; 30 static bool uart_print; 31 static bool skip_otp; 32 static bool rawmode; 33 34 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 35 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 36 37 /* FIXME: most of these should be readonly */ 38 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 39 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 40 module_param(uart_print, bool, 0644); 41 module_param(skip_otp, bool, 0644); 42 module_param(rawmode, bool, 0644); 43 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 44 45 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 46 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 50 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 51 52 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 53 { 54 .id = QCA988X_HW_2_0_VERSION, 55 .dev_id = QCA988X_2_0_DEVICE_ID, 56 .bus = ATH10K_BUS_PCI, 57 .name = "qca988x hw2.0", 58 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 59 .uart_pin = 7, 60 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 61 .otp_exe_param = 0, 62 .channel_counters_freq_hz = 88000, 63 .max_probe_resp_desc_thres = 0, 64 .cal_data_len = 2116, 65 .fw = { 66 .dir = QCA988X_HW_2_0_FW_DIR, 67 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 68 .board_size = QCA988X_BOARD_DATA_SZ, 69 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 70 }, 71 .hw_ops = &qca988x_ops, 72 .decap_align_bytes = 4, 73 .spectral_bin_discard = 0, 74 .spectral_bin_offset = 0, 75 .vht160_mcs_rx_highest = 0, 76 .vht160_mcs_tx_highest = 0, 77 .n_cipher_suites = 8, 78 .ast_skid_limit = 0x10, 79 .num_wds_entries = 0x20, 80 .target_64bit = false, 81 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 82 .shadow_reg_support = false, 83 .rri_on_ddr = false, 84 .hw_filter_reset_required = true, 85 .fw_diag_ce_download = false, 86 }, 87 { 88 .id = QCA988X_HW_2_0_VERSION, 89 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 90 .name = "qca988x hw2.0 ubiquiti", 91 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 92 .uart_pin = 7, 93 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 94 .otp_exe_param = 0, 95 .channel_counters_freq_hz = 88000, 96 .max_probe_resp_desc_thres = 0, 97 .cal_data_len = 2116, 98 .fw = { 99 .dir = QCA988X_HW_2_0_FW_DIR, 100 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 101 .board_size = QCA988X_BOARD_DATA_SZ, 102 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 103 }, 104 .hw_ops = &qca988x_ops, 105 .decap_align_bytes = 4, 106 .spectral_bin_discard = 0, 107 .spectral_bin_offset = 0, 108 .vht160_mcs_rx_highest = 0, 109 .vht160_mcs_tx_highest = 0, 110 .n_cipher_suites = 8, 111 .ast_skid_limit = 0x10, 112 .num_wds_entries = 0x20, 113 .target_64bit = false, 114 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 115 .per_ce_irq = false, 116 .shadow_reg_support = false, 117 .rri_on_ddr = false, 118 .hw_filter_reset_required = true, 119 .fw_diag_ce_download = false, 120 }, 121 { 122 .id = QCA9887_HW_1_0_VERSION, 123 .dev_id = QCA9887_1_0_DEVICE_ID, 124 .bus = ATH10K_BUS_PCI, 125 .name = "qca9887 hw1.0", 126 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 127 .uart_pin = 7, 128 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 129 .otp_exe_param = 0, 130 .channel_counters_freq_hz = 88000, 131 .max_probe_resp_desc_thres = 0, 132 .cal_data_len = 2116, 133 .fw = { 134 .dir = QCA9887_HW_1_0_FW_DIR, 135 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 136 .board_size = QCA9887_BOARD_DATA_SZ, 137 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 138 }, 139 .hw_ops = &qca988x_ops, 140 .decap_align_bytes = 4, 141 .spectral_bin_discard = 0, 142 .spectral_bin_offset = 0, 143 .vht160_mcs_rx_highest = 0, 144 .vht160_mcs_tx_highest = 0, 145 .n_cipher_suites = 8, 146 .ast_skid_limit = 0x10, 147 .num_wds_entries = 0x20, 148 .target_64bit = false, 149 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 150 .per_ce_irq = false, 151 .shadow_reg_support = false, 152 .rri_on_ddr = false, 153 .hw_filter_reset_required = true, 154 .fw_diag_ce_download = false, 155 }, 156 { 157 .id = QCA6174_HW_2_1_VERSION, 158 .dev_id = QCA6164_2_1_DEVICE_ID, 159 .bus = ATH10K_BUS_PCI, 160 .name = "qca6164 hw2.1", 161 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 162 .uart_pin = 6, 163 .otp_exe_param = 0, 164 .channel_counters_freq_hz = 88000, 165 .max_probe_resp_desc_thres = 0, 166 .cal_data_len = 8124, 167 .fw = { 168 .dir = QCA6174_HW_2_1_FW_DIR, 169 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 170 .board_size = QCA6174_BOARD_DATA_SZ, 171 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 172 }, 173 .hw_ops = &qca988x_ops, 174 .decap_align_bytes = 4, 175 .spectral_bin_discard = 0, 176 .spectral_bin_offset = 0, 177 .vht160_mcs_rx_highest = 0, 178 .vht160_mcs_tx_highest = 0, 179 .n_cipher_suites = 8, 180 .ast_skid_limit = 0x10, 181 .num_wds_entries = 0x20, 182 .target_64bit = false, 183 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 184 .per_ce_irq = false, 185 .shadow_reg_support = false, 186 .rri_on_ddr = false, 187 .hw_filter_reset_required = true, 188 .fw_diag_ce_download = false, 189 }, 190 { 191 .id = QCA6174_HW_2_1_VERSION, 192 .dev_id = QCA6174_2_1_DEVICE_ID, 193 .bus = ATH10K_BUS_PCI, 194 .name = "qca6174 hw2.1", 195 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 196 .uart_pin = 6, 197 .otp_exe_param = 0, 198 .channel_counters_freq_hz = 88000, 199 .max_probe_resp_desc_thres = 0, 200 .cal_data_len = 8124, 201 .fw = { 202 .dir = QCA6174_HW_2_1_FW_DIR, 203 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 204 .board_size = QCA6174_BOARD_DATA_SZ, 205 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 206 }, 207 .hw_ops = &qca988x_ops, 208 .decap_align_bytes = 4, 209 .spectral_bin_discard = 0, 210 .spectral_bin_offset = 0, 211 .vht160_mcs_rx_highest = 0, 212 .vht160_mcs_tx_highest = 0, 213 .n_cipher_suites = 8, 214 .ast_skid_limit = 0x10, 215 .num_wds_entries = 0x20, 216 .target_64bit = false, 217 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 218 .per_ce_irq = false, 219 .shadow_reg_support = false, 220 .rri_on_ddr = false, 221 .hw_filter_reset_required = true, 222 .fw_diag_ce_download = false, 223 }, 224 { 225 .id = QCA6174_HW_3_0_VERSION, 226 .dev_id = QCA6174_2_1_DEVICE_ID, 227 .bus = ATH10K_BUS_PCI, 228 .name = "qca6174 hw3.0", 229 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 230 .uart_pin = 6, 231 .otp_exe_param = 0, 232 .channel_counters_freq_hz = 88000, 233 .max_probe_resp_desc_thres = 0, 234 .cal_data_len = 8124, 235 .fw = { 236 .dir = QCA6174_HW_3_0_FW_DIR, 237 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 238 .board_size = QCA6174_BOARD_DATA_SZ, 239 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 240 }, 241 .hw_ops = &qca988x_ops, 242 .decap_align_bytes = 4, 243 .spectral_bin_discard = 0, 244 .spectral_bin_offset = 0, 245 .vht160_mcs_rx_highest = 0, 246 .vht160_mcs_tx_highest = 0, 247 .n_cipher_suites = 8, 248 .ast_skid_limit = 0x10, 249 .num_wds_entries = 0x20, 250 .target_64bit = false, 251 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 252 .per_ce_irq = false, 253 .shadow_reg_support = false, 254 .rri_on_ddr = false, 255 .hw_filter_reset_required = true, 256 .fw_diag_ce_download = false, 257 }, 258 { 259 .id = QCA6174_HW_3_2_VERSION, 260 .dev_id = QCA6174_2_1_DEVICE_ID, 261 .bus = ATH10K_BUS_PCI, 262 .name = "qca6174 hw3.2", 263 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 264 .uart_pin = 6, 265 .otp_exe_param = 0, 266 .channel_counters_freq_hz = 88000, 267 .max_probe_resp_desc_thres = 0, 268 .cal_data_len = 8124, 269 .fw = { 270 /* uses same binaries as hw3.0 */ 271 .dir = QCA6174_HW_3_0_FW_DIR, 272 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 273 .board_size = QCA6174_BOARD_DATA_SZ, 274 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 275 }, 276 .hw_ops = &qca6174_ops, 277 .hw_clk = qca6174_clk, 278 .target_cpu_freq = 176000000, 279 .decap_align_bytes = 4, 280 .spectral_bin_discard = 0, 281 .spectral_bin_offset = 0, 282 .vht160_mcs_rx_highest = 0, 283 .vht160_mcs_tx_highest = 0, 284 .n_cipher_suites = 8, 285 .ast_skid_limit = 0x10, 286 .num_wds_entries = 0x20, 287 .target_64bit = false, 288 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 289 .per_ce_irq = false, 290 .shadow_reg_support = false, 291 .rri_on_ddr = false, 292 .hw_filter_reset_required = true, 293 .fw_diag_ce_download = true, 294 }, 295 { 296 .id = QCA99X0_HW_2_0_DEV_VERSION, 297 .dev_id = QCA99X0_2_0_DEVICE_ID, 298 .bus = ATH10K_BUS_PCI, 299 .name = "qca99x0 hw2.0", 300 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 301 .uart_pin = 7, 302 .otp_exe_param = 0x00000700, 303 .continuous_frag_desc = true, 304 .cck_rate_map_rev2 = true, 305 .channel_counters_freq_hz = 150000, 306 .max_probe_resp_desc_thres = 24, 307 .tx_chain_mask = 0xf, 308 .rx_chain_mask = 0xf, 309 .max_spatial_stream = 4, 310 .cal_data_len = 12064, 311 .fw = { 312 .dir = QCA99X0_HW_2_0_FW_DIR, 313 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 314 .board_size = QCA99X0_BOARD_DATA_SZ, 315 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 316 }, 317 .sw_decrypt_mcast_mgmt = true, 318 .hw_ops = &qca99x0_ops, 319 .decap_align_bytes = 1, 320 .spectral_bin_discard = 4, 321 .spectral_bin_offset = 0, 322 .vht160_mcs_rx_highest = 0, 323 .vht160_mcs_tx_highest = 0, 324 .n_cipher_suites = 11, 325 .ast_skid_limit = 0x10, 326 .num_wds_entries = 0x20, 327 .target_64bit = false, 328 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 329 .per_ce_irq = false, 330 .shadow_reg_support = false, 331 .rri_on_ddr = false, 332 .hw_filter_reset_required = true, 333 .fw_diag_ce_download = false, 334 }, 335 { 336 .id = QCA9984_HW_1_0_DEV_VERSION, 337 .dev_id = QCA9984_1_0_DEVICE_ID, 338 .bus = ATH10K_BUS_PCI, 339 .name = "qca9984/qca9994 hw1.0", 340 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 341 .uart_pin = 7, 342 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 343 .otp_exe_param = 0x00000700, 344 .continuous_frag_desc = true, 345 .cck_rate_map_rev2 = true, 346 .channel_counters_freq_hz = 150000, 347 .max_probe_resp_desc_thres = 24, 348 .tx_chain_mask = 0xf, 349 .rx_chain_mask = 0xf, 350 .max_spatial_stream = 4, 351 .cal_data_len = 12064, 352 .fw = { 353 .dir = QCA9984_HW_1_0_FW_DIR, 354 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 355 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 356 .board_size = QCA99X0_BOARD_DATA_SZ, 357 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 358 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 359 }, 360 .sw_decrypt_mcast_mgmt = true, 361 .hw_ops = &qca99x0_ops, 362 .decap_align_bytes = 1, 363 .spectral_bin_discard = 12, 364 .spectral_bin_offset = 8, 365 366 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 367 * or 2x2 160Mhz, long-guard-interval. 368 */ 369 .vht160_mcs_rx_highest = 1560, 370 .vht160_mcs_tx_highest = 1560, 371 .n_cipher_suites = 11, 372 .ast_skid_limit = 0x10, 373 .num_wds_entries = 0x20, 374 .target_64bit = false, 375 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 376 .per_ce_irq = false, 377 .shadow_reg_support = false, 378 .rri_on_ddr = false, 379 .hw_filter_reset_required = true, 380 .fw_diag_ce_download = false, 381 }, 382 { 383 .id = QCA9888_HW_2_0_DEV_VERSION, 384 .dev_id = QCA9888_2_0_DEVICE_ID, 385 .bus = ATH10K_BUS_PCI, 386 .name = "qca9888 hw2.0", 387 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 388 .uart_pin = 7, 389 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 390 .otp_exe_param = 0x00000700, 391 .continuous_frag_desc = true, 392 .channel_counters_freq_hz = 150000, 393 .max_probe_resp_desc_thres = 24, 394 .tx_chain_mask = 3, 395 .rx_chain_mask = 3, 396 .max_spatial_stream = 2, 397 .cal_data_len = 12064, 398 .fw = { 399 .dir = QCA9888_HW_2_0_FW_DIR, 400 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 401 .board_size = QCA99X0_BOARD_DATA_SZ, 402 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 403 }, 404 .sw_decrypt_mcast_mgmt = true, 405 .hw_ops = &qca99x0_ops, 406 .decap_align_bytes = 1, 407 .spectral_bin_discard = 12, 408 .spectral_bin_offset = 8, 409 410 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 411 * 1x1 160Mhz, long-guard-interval. 412 */ 413 .vht160_mcs_rx_highest = 780, 414 .vht160_mcs_tx_highest = 780, 415 .n_cipher_suites = 11, 416 .ast_skid_limit = 0x10, 417 .num_wds_entries = 0x20, 418 .target_64bit = false, 419 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 420 .per_ce_irq = false, 421 .shadow_reg_support = false, 422 .rri_on_ddr = false, 423 .hw_filter_reset_required = true, 424 .fw_diag_ce_download = false, 425 }, 426 { 427 .id = QCA9377_HW_1_0_DEV_VERSION, 428 .dev_id = QCA9377_1_0_DEVICE_ID, 429 .bus = ATH10K_BUS_PCI, 430 .name = "qca9377 hw1.0", 431 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 432 .uart_pin = 6, 433 .otp_exe_param = 0, 434 .channel_counters_freq_hz = 88000, 435 .max_probe_resp_desc_thres = 0, 436 .cal_data_len = 8124, 437 .fw = { 438 .dir = QCA9377_HW_1_0_FW_DIR, 439 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 440 .board_size = QCA9377_BOARD_DATA_SZ, 441 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 442 }, 443 .hw_ops = &qca988x_ops, 444 .decap_align_bytes = 4, 445 .spectral_bin_discard = 0, 446 .spectral_bin_offset = 0, 447 .vht160_mcs_rx_highest = 0, 448 .vht160_mcs_tx_highest = 0, 449 .n_cipher_suites = 8, 450 .ast_skid_limit = 0x10, 451 .num_wds_entries = 0x20, 452 .target_64bit = false, 453 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 454 .per_ce_irq = false, 455 .shadow_reg_support = false, 456 .rri_on_ddr = false, 457 .hw_filter_reset_required = true, 458 .fw_diag_ce_download = false, 459 }, 460 { 461 .id = QCA9377_HW_1_1_DEV_VERSION, 462 .dev_id = QCA9377_1_0_DEVICE_ID, 463 .bus = ATH10K_BUS_PCI, 464 .name = "qca9377 hw1.1", 465 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 466 .uart_pin = 6, 467 .otp_exe_param = 0, 468 .channel_counters_freq_hz = 88000, 469 .max_probe_resp_desc_thres = 0, 470 .cal_data_len = 8124, 471 .fw = { 472 .dir = QCA9377_HW_1_0_FW_DIR, 473 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 474 .board_size = QCA9377_BOARD_DATA_SZ, 475 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 476 }, 477 .hw_ops = &qca6174_ops, 478 .hw_clk = qca6174_clk, 479 .target_cpu_freq = 176000000, 480 .decap_align_bytes = 4, 481 .spectral_bin_discard = 0, 482 .spectral_bin_offset = 0, 483 .vht160_mcs_rx_highest = 0, 484 .vht160_mcs_tx_highest = 0, 485 .n_cipher_suites = 8, 486 .ast_skid_limit = 0x10, 487 .num_wds_entries = 0x20, 488 .target_64bit = false, 489 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 490 .per_ce_irq = false, 491 .shadow_reg_support = false, 492 .rri_on_ddr = false, 493 .hw_filter_reset_required = true, 494 .fw_diag_ce_download = true, 495 }, 496 { 497 .id = QCA4019_HW_1_0_DEV_VERSION, 498 .dev_id = 0, 499 .bus = ATH10K_BUS_AHB, 500 .name = "qca4019 hw1.0", 501 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 502 .uart_pin = 7, 503 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 504 .otp_exe_param = 0x0010000, 505 .continuous_frag_desc = true, 506 .cck_rate_map_rev2 = true, 507 .channel_counters_freq_hz = 125000, 508 .max_probe_resp_desc_thres = 24, 509 .tx_chain_mask = 0x3, 510 .rx_chain_mask = 0x3, 511 .max_spatial_stream = 2, 512 .cal_data_len = 12064, 513 .fw = { 514 .dir = QCA4019_HW_1_0_FW_DIR, 515 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 516 .board_size = QCA4019_BOARD_DATA_SZ, 517 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 518 }, 519 .sw_decrypt_mcast_mgmt = true, 520 .hw_ops = &qca99x0_ops, 521 .decap_align_bytes = 1, 522 .spectral_bin_discard = 4, 523 .spectral_bin_offset = 0, 524 .vht160_mcs_rx_highest = 0, 525 .vht160_mcs_tx_highest = 0, 526 .n_cipher_suites = 11, 527 .ast_skid_limit = 0x10, 528 .num_wds_entries = 0x20, 529 .target_64bit = false, 530 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 531 .per_ce_irq = false, 532 .shadow_reg_support = false, 533 .rri_on_ddr = false, 534 .hw_filter_reset_required = true, 535 .fw_diag_ce_download = false, 536 }, 537 { 538 .id = WCN3990_HW_1_0_DEV_VERSION, 539 .dev_id = 0, 540 .bus = ATH10K_BUS_SNOC, 541 .name = "wcn3990 hw1.0", 542 .continuous_frag_desc = true, 543 .tx_chain_mask = 0x7, 544 .rx_chain_mask = 0x7, 545 .max_spatial_stream = 4, 546 .fw = { 547 .dir = WCN3990_HW_1_0_FW_DIR, 548 }, 549 .sw_decrypt_mcast_mgmt = true, 550 .hw_ops = &wcn3990_ops, 551 .decap_align_bytes = 1, 552 .num_peers = TARGET_HL_TLV_NUM_PEERS, 553 .n_cipher_suites = 11, 554 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 555 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 556 .target_64bit = true, 557 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 558 .per_ce_irq = true, 559 .shadow_reg_support = true, 560 .rri_on_ddr = true, 561 .hw_filter_reset_required = false, 562 .fw_diag_ce_download = false, 563 }, 564 }; 565 566 static const char *const ath10k_core_fw_feature_str[] = { 567 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 568 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 569 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 570 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 571 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 572 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 573 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 574 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 575 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 576 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 577 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 578 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 579 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 580 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 581 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 582 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 583 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 584 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 585 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 586 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 587 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 588 }; 589 590 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 591 size_t buf_len, 592 enum ath10k_fw_features feat) 593 { 594 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 595 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 596 ATH10K_FW_FEATURE_COUNT); 597 598 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 599 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 600 return scnprintf(buf, buf_len, "bit%d", feat); 601 } 602 603 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 604 } 605 606 void ath10k_core_get_fw_features_str(struct ath10k *ar, 607 char *buf, 608 size_t buf_len) 609 { 610 size_t len = 0; 611 int i; 612 613 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 614 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 615 if (len > 0) 616 len += scnprintf(buf + len, buf_len - len, ","); 617 618 len += ath10k_core_get_fw_feature_str(buf + len, 619 buf_len - len, 620 i); 621 } 622 } 623 } 624 625 static void ath10k_send_suspend_complete(struct ath10k *ar) 626 { 627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 628 629 complete(&ar->target_suspend); 630 } 631 632 static void ath10k_init_sdio(struct ath10k *ar) 633 { 634 u32 param = 0; 635 636 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 637 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 638 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 639 640 /* Data transfer is not initiated, when reduced Tx completion 641 * is used for SDIO. disable it until fixed 642 */ 643 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 644 645 /* Alternate credit size of 1544 as used by SDIO firmware is 646 * not big enough for mac80211 / native wifi frames. disable it 647 */ 648 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 649 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 650 ath10k_bmi_write32(ar, hi_acs_flags, param); 651 652 /* Explicitly set fwlog prints to zero as target may turn it on 653 * based on scratch registers. 654 */ 655 ath10k_bmi_read32(ar, hi_option_flag, ¶m); 656 param |= HI_OPTION_DISABLE_DBGLOG; 657 ath10k_bmi_write32(ar, hi_option_flag, param); 658 } 659 660 static int ath10k_init_configure_target(struct ath10k *ar) 661 { 662 u32 param_host; 663 int ret; 664 665 /* tell target which HTC version it is used*/ 666 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 667 HTC_PROTOCOL_VERSION); 668 if (ret) { 669 ath10k_err(ar, "settings HTC version failed\n"); 670 return ret; 671 } 672 673 /* set the firmware mode to STA/IBSS/AP */ 674 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 675 if (ret) { 676 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 677 return ret; 678 } 679 680 /* TODO following parameters need to be re-visited. */ 681 /* num_device */ 682 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 683 /* Firmware mode */ 684 /* FIXME: Why FW_MODE_AP ??.*/ 685 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 686 /* mac_addr_method */ 687 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 688 /* firmware_bridge */ 689 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 690 /* fwsubmode */ 691 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 692 693 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 694 if (ret) { 695 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 696 return ret; 697 } 698 699 /* We do all byte-swapping on the host */ 700 ret = ath10k_bmi_write32(ar, hi_be, 0); 701 if (ret) { 702 ath10k_err(ar, "setting host CPU BE mode failed\n"); 703 return ret; 704 } 705 706 /* FW descriptor/Data swap flags */ 707 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 708 709 if (ret) { 710 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 711 return ret; 712 } 713 714 /* Some devices have a special sanity check that verifies the PCI 715 * Device ID is written to this host interest var. It is known to be 716 * required to boot QCA6164. 717 */ 718 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 719 ar->dev_id); 720 if (ret) { 721 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 722 return ret; 723 } 724 725 return 0; 726 } 727 728 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 729 const char *dir, 730 const char *file) 731 { 732 char filename[100]; 733 const struct firmware *fw; 734 int ret; 735 736 if (file == NULL) 737 return ERR_PTR(-ENOENT); 738 739 if (dir == NULL) 740 dir = "."; 741 742 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 743 ret = firmware_request_nowarn(&fw, filename, ar->dev); 744 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 745 filename, ret); 746 747 if (ret) 748 return ERR_PTR(ret); 749 750 return fw; 751 } 752 753 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 754 size_t data_len) 755 { 756 u32 board_data_size = ar->hw_params.fw.board_size; 757 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 758 u32 board_ext_data_addr; 759 int ret; 760 761 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 762 if (ret) { 763 ath10k_err(ar, "could not read board ext data addr (%d)\n", 764 ret); 765 return ret; 766 } 767 768 ath10k_dbg(ar, ATH10K_DBG_BOOT, 769 "boot push board extended data addr 0x%x\n", 770 board_ext_data_addr); 771 772 if (board_ext_data_addr == 0) 773 return 0; 774 775 if (data_len != (board_data_size + board_ext_data_size)) { 776 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 777 data_len, board_data_size, board_ext_data_size); 778 return -EINVAL; 779 } 780 781 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 782 data + board_data_size, 783 board_ext_data_size); 784 if (ret) { 785 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 786 return ret; 787 } 788 789 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 790 (board_ext_data_size << 16) | 1); 791 if (ret) { 792 ath10k_err(ar, "could not write board ext data bit (%d)\n", 793 ret); 794 return ret; 795 } 796 797 return 0; 798 } 799 800 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 801 { 802 u32 result, address; 803 u8 board_id, chip_id; 804 bool ext_bid_support; 805 int ret, bmi_board_id_param; 806 807 address = ar->hw_params.patch_load_addr; 808 809 if (!ar->normal_mode_fw.fw_file.otp_data || 810 !ar->normal_mode_fw.fw_file.otp_len) { 811 ath10k_warn(ar, 812 "failed to retrieve board id because of invalid otp\n"); 813 return -ENODATA; 814 } 815 816 ath10k_dbg(ar, ATH10K_DBG_BOOT, 817 "boot upload otp to 0x%x len %zd for board id\n", 818 address, ar->normal_mode_fw.fw_file.otp_len); 819 820 ret = ath10k_bmi_fast_download(ar, address, 821 ar->normal_mode_fw.fw_file.otp_data, 822 ar->normal_mode_fw.fw_file.otp_len); 823 if (ret) { 824 ath10k_err(ar, "could not write otp for board id check: %d\n", 825 ret); 826 return ret; 827 } 828 829 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 830 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 831 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 832 else 833 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 834 835 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 836 if (ret) { 837 ath10k_err(ar, "could not execute otp for board id check: %d\n", 838 ret); 839 return ret; 840 } 841 842 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 843 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 844 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 845 846 ath10k_dbg(ar, ATH10K_DBG_BOOT, 847 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 848 result, board_id, chip_id, ext_bid_support); 849 850 ar->id.ext_bid_supported = ext_bid_support; 851 852 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 853 (board_id == 0)) { 854 ath10k_dbg(ar, ATH10K_DBG_BOOT, 855 "board id does not exist in otp, ignore it\n"); 856 return -EOPNOTSUPP; 857 } 858 859 ar->id.bmi_ids_valid = true; 860 ar->id.bmi_board_id = board_id; 861 ar->id.bmi_chip_id = chip_id; 862 863 return 0; 864 } 865 866 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 867 { 868 struct ath10k *ar = data; 869 const char *bdf_ext; 870 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 871 u8 bdf_enabled; 872 int i; 873 874 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 875 return; 876 877 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 878 ath10k_dbg(ar, ATH10K_DBG_BOOT, 879 "wrong smbios bdf ext type length (%d).\n", 880 hdr->length); 881 return; 882 } 883 884 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 885 if (!bdf_enabled) { 886 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 887 return; 888 } 889 890 /* Only one string exists (per spec) */ 891 bdf_ext = (char *)hdr + hdr->length; 892 893 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 894 ath10k_dbg(ar, ATH10K_DBG_BOOT, 895 "bdf variant magic does not match.\n"); 896 return; 897 } 898 899 for (i = 0; i < strlen(bdf_ext); i++) { 900 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 901 ath10k_dbg(ar, ATH10K_DBG_BOOT, 902 "bdf variant name contains non ascii chars.\n"); 903 return; 904 } 905 } 906 907 /* Copy extension name without magic suffix */ 908 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 909 sizeof(ar->id.bdf_ext)) < 0) { 910 ath10k_dbg(ar, ATH10K_DBG_BOOT, 911 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 912 bdf_ext); 913 return; 914 } 915 916 ath10k_dbg(ar, ATH10K_DBG_BOOT, 917 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 918 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 919 } 920 921 static int ath10k_core_check_smbios(struct ath10k *ar) 922 { 923 ar->id.bdf_ext[0] = '\0'; 924 dmi_walk(ath10k_core_check_bdfext, ar); 925 926 if (ar->id.bdf_ext[0] == '\0') 927 return -ENODATA; 928 929 return 0; 930 } 931 932 static int ath10k_core_check_dt(struct ath10k *ar) 933 { 934 struct device_node *node; 935 const char *variant = NULL; 936 937 node = ar->dev->of_node; 938 if (!node) 939 return -ENOENT; 940 941 of_property_read_string(node, "qcom,ath10k-calibration-variant", 942 &variant); 943 if (!variant) 944 return -ENODATA; 945 946 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 947 ath10k_dbg(ar, ATH10K_DBG_BOOT, 948 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 949 variant); 950 951 return 0; 952 } 953 954 static int ath10k_download_fw(struct ath10k *ar) 955 { 956 u32 address, data_len; 957 const void *data; 958 int ret; 959 960 address = ar->hw_params.patch_load_addr; 961 962 data = ar->running_fw->fw_file.firmware_data; 963 data_len = ar->running_fw->fw_file.firmware_len; 964 965 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 966 if (ret) { 967 ath10k_err(ar, "failed to configure fw code swap: %d\n", 968 ret); 969 return ret; 970 } 971 972 ath10k_dbg(ar, ATH10K_DBG_BOOT, 973 "boot uploading firmware image %pK len %d\n", 974 data, data_len); 975 976 /* Check if device supports to download firmware via 977 * diag copy engine. Downloading firmware via diag CE 978 * greatly reduces the time to download firmware. 979 */ 980 if (ar->hw_params.fw_diag_ce_download) { 981 ret = ath10k_hw_diag_fast_download(ar, address, 982 data, data_len); 983 if (ret == 0) 984 /* firmware upload via diag ce was successful */ 985 return 0; 986 987 ath10k_warn(ar, 988 "failed to upload firmware via diag ce, trying BMI: %d", 989 ret); 990 } 991 992 return ath10k_bmi_fast_download(ar, address, 993 data, data_len); 994 } 995 996 void ath10k_core_free_board_files(struct ath10k *ar) 997 { 998 if (!IS_ERR(ar->normal_mode_fw.board)) 999 release_firmware(ar->normal_mode_fw.board); 1000 1001 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1002 release_firmware(ar->normal_mode_fw.ext_board); 1003 1004 ar->normal_mode_fw.board = NULL; 1005 ar->normal_mode_fw.board_data = NULL; 1006 ar->normal_mode_fw.board_len = 0; 1007 ar->normal_mode_fw.ext_board = NULL; 1008 ar->normal_mode_fw.ext_board_data = NULL; 1009 ar->normal_mode_fw.ext_board_len = 0; 1010 } 1011 EXPORT_SYMBOL(ath10k_core_free_board_files); 1012 1013 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1014 { 1015 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1016 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1017 1018 if (!IS_ERR(ar->cal_file)) 1019 release_firmware(ar->cal_file); 1020 1021 if (!IS_ERR(ar->pre_cal_file)) 1022 release_firmware(ar->pre_cal_file); 1023 1024 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1025 1026 ar->normal_mode_fw.fw_file.otp_data = NULL; 1027 ar->normal_mode_fw.fw_file.otp_len = 0; 1028 1029 ar->normal_mode_fw.fw_file.firmware = NULL; 1030 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1031 ar->normal_mode_fw.fw_file.firmware_len = 0; 1032 1033 ar->cal_file = NULL; 1034 ar->pre_cal_file = NULL; 1035 } 1036 1037 static int ath10k_fetch_cal_file(struct ath10k *ar) 1038 { 1039 char filename[100]; 1040 1041 /* pre-cal-<bus>-<id>.bin */ 1042 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1043 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1044 1045 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1046 if (!IS_ERR(ar->pre_cal_file)) 1047 goto success; 1048 1049 /* cal-<bus>-<id>.bin */ 1050 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1051 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1052 1053 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1054 if (IS_ERR(ar->cal_file)) 1055 /* calibration file is optional, don't print any warnings */ 1056 return PTR_ERR(ar->cal_file); 1057 success: 1058 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1059 ATH10K_FW_DIR, filename); 1060 1061 return 0; 1062 } 1063 1064 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1065 { 1066 const struct firmware *fw; 1067 1068 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1069 if (!ar->hw_params.fw.board) { 1070 ath10k_err(ar, "failed to find board file fw entry\n"); 1071 return -EINVAL; 1072 } 1073 1074 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1075 ar->hw_params.fw.dir, 1076 ar->hw_params.fw.board); 1077 if (IS_ERR(ar->normal_mode_fw.board)) 1078 return PTR_ERR(ar->normal_mode_fw.board); 1079 1080 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1081 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1082 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1083 if (!ar->hw_params.fw.eboard) { 1084 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1085 return -EINVAL; 1086 } 1087 1088 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1089 ar->hw_params.fw.eboard); 1090 ar->normal_mode_fw.ext_board = fw; 1091 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1092 return PTR_ERR(ar->normal_mode_fw.ext_board); 1093 1094 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1095 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1096 } 1097 1098 return 0; 1099 } 1100 1101 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1102 const void *buf, size_t buf_len, 1103 const char *boardname, 1104 int bd_ie_type) 1105 { 1106 const struct ath10k_fw_ie *hdr; 1107 bool name_match_found; 1108 int ret, board_ie_id; 1109 size_t board_ie_len; 1110 const void *board_ie_data; 1111 1112 name_match_found = false; 1113 1114 /* go through ATH10K_BD_IE_BOARD_ elements */ 1115 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1116 hdr = buf; 1117 board_ie_id = le32_to_cpu(hdr->id); 1118 board_ie_len = le32_to_cpu(hdr->len); 1119 board_ie_data = hdr->data; 1120 1121 buf_len -= sizeof(*hdr); 1122 buf += sizeof(*hdr); 1123 1124 if (buf_len < ALIGN(board_ie_len, 4)) { 1125 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1126 buf_len, ALIGN(board_ie_len, 4)); 1127 ret = -EINVAL; 1128 goto out; 1129 } 1130 1131 switch (board_ie_id) { 1132 case ATH10K_BD_IE_BOARD_NAME: 1133 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1134 board_ie_data, board_ie_len); 1135 1136 if (board_ie_len != strlen(boardname)) 1137 break; 1138 1139 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1140 if (ret) 1141 break; 1142 1143 name_match_found = true; 1144 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1145 "boot found match for name '%s'", 1146 boardname); 1147 break; 1148 case ATH10K_BD_IE_BOARD_DATA: 1149 if (!name_match_found) 1150 /* no match found */ 1151 break; 1152 1153 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1154 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1155 "boot found board data for '%s'", 1156 boardname); 1157 1158 ar->normal_mode_fw.board_data = board_ie_data; 1159 ar->normal_mode_fw.board_len = board_ie_len; 1160 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1161 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1162 "boot found eboard data for '%s'", 1163 boardname); 1164 1165 ar->normal_mode_fw.ext_board_data = board_ie_data; 1166 ar->normal_mode_fw.ext_board_len = board_ie_len; 1167 } 1168 1169 ret = 0; 1170 goto out; 1171 default: 1172 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1173 board_ie_id); 1174 break; 1175 } 1176 1177 /* jump over the padding */ 1178 board_ie_len = ALIGN(board_ie_len, 4); 1179 1180 buf_len -= board_ie_len; 1181 buf += board_ie_len; 1182 } 1183 1184 /* no match found */ 1185 ret = -ENOENT; 1186 1187 out: 1188 return ret; 1189 } 1190 1191 static int ath10k_core_search_bd(struct ath10k *ar, 1192 const char *boardname, 1193 const u8 *data, 1194 size_t len) 1195 { 1196 size_t ie_len; 1197 struct ath10k_fw_ie *hdr; 1198 int ret = -ENOENT, ie_id; 1199 1200 while (len > sizeof(struct ath10k_fw_ie)) { 1201 hdr = (struct ath10k_fw_ie *)data; 1202 ie_id = le32_to_cpu(hdr->id); 1203 ie_len = le32_to_cpu(hdr->len); 1204 1205 len -= sizeof(*hdr); 1206 data = hdr->data; 1207 1208 if (len < ALIGN(ie_len, 4)) { 1209 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1210 ie_id, ie_len, len); 1211 return -EINVAL; 1212 } 1213 1214 switch (ie_id) { 1215 case ATH10K_BD_IE_BOARD: 1216 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1217 boardname, 1218 ATH10K_BD_IE_BOARD); 1219 if (ret == -ENOENT) 1220 /* no match found, continue */ 1221 break; 1222 1223 /* either found or error, so stop searching */ 1224 goto out; 1225 case ATH10K_BD_IE_BOARD_EXT: 1226 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1227 boardname, 1228 ATH10K_BD_IE_BOARD_EXT); 1229 if (ret == -ENOENT) 1230 /* no match found, continue */ 1231 break; 1232 1233 /* either found or error, so stop searching */ 1234 goto out; 1235 } 1236 1237 /* jump over the padding */ 1238 ie_len = ALIGN(ie_len, 4); 1239 1240 len -= ie_len; 1241 data += ie_len; 1242 } 1243 1244 out: 1245 /* return result of parse_bd_ie_board() or -ENOENT */ 1246 return ret; 1247 } 1248 1249 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1250 const char *boardname, 1251 const char *fallback_boardname, 1252 const char *filename) 1253 { 1254 size_t len, magic_len; 1255 const u8 *data; 1256 int ret; 1257 1258 /* Skip if already fetched during board data download */ 1259 if (!ar->normal_mode_fw.board) 1260 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1261 ar->hw_params.fw.dir, 1262 filename); 1263 if (IS_ERR(ar->normal_mode_fw.board)) 1264 return PTR_ERR(ar->normal_mode_fw.board); 1265 1266 data = ar->normal_mode_fw.board->data; 1267 len = ar->normal_mode_fw.board->size; 1268 1269 /* magic has extra null byte padded */ 1270 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1271 if (len < magic_len) { 1272 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1273 ar->hw_params.fw.dir, filename, len); 1274 ret = -EINVAL; 1275 goto err; 1276 } 1277 1278 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1279 ath10k_err(ar, "found invalid board magic\n"); 1280 ret = -EINVAL; 1281 goto err; 1282 } 1283 1284 /* magic is padded to 4 bytes */ 1285 magic_len = ALIGN(magic_len, 4); 1286 if (len < magic_len) { 1287 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1288 ar->hw_params.fw.dir, filename, len); 1289 ret = -EINVAL; 1290 goto err; 1291 } 1292 1293 data += magic_len; 1294 len -= magic_len; 1295 1296 /* attempt to find boardname in the IE list */ 1297 ret = ath10k_core_search_bd(ar, boardname, data, len); 1298 1299 /* if we didn't find it and have a fallback name, try that */ 1300 if (ret == -ENOENT && fallback_boardname) 1301 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1302 1303 if (ret == -ENOENT) { 1304 ath10k_err(ar, 1305 "failed to fetch board data for %s from %s/%s\n", 1306 boardname, ar->hw_params.fw.dir, filename); 1307 ret = -ENODATA; 1308 } 1309 1310 if (ret) 1311 goto err; 1312 1313 return 0; 1314 1315 err: 1316 ath10k_core_free_board_files(ar); 1317 return ret; 1318 } 1319 1320 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1321 size_t name_len, bool with_variant) 1322 { 1323 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1324 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1325 1326 if (with_variant && ar->id.bdf_ext[0] != '\0') 1327 scnprintf(variant, sizeof(variant), ",variant=%s", 1328 ar->id.bdf_ext); 1329 1330 if (ar->id.bmi_ids_valid) { 1331 scnprintf(name, name_len, 1332 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1333 ath10k_bus_str(ar->hif.bus), 1334 ar->id.bmi_chip_id, 1335 ar->id.bmi_board_id, variant); 1336 goto out; 1337 } 1338 1339 if (ar->id.qmi_ids_valid) { 1340 scnprintf(name, name_len, 1341 "bus=%s,qmi-board-id=%x", 1342 ath10k_bus_str(ar->hif.bus), 1343 ar->id.qmi_board_id); 1344 goto out; 1345 } 1346 1347 scnprintf(name, name_len, 1348 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1349 ath10k_bus_str(ar->hif.bus), 1350 ar->id.vendor, ar->id.device, 1351 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1352 out: 1353 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1354 1355 return 0; 1356 } 1357 1358 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1359 size_t name_len) 1360 { 1361 if (ar->id.bmi_ids_valid) { 1362 scnprintf(name, name_len, 1363 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1364 ath10k_bus_str(ar->hif.bus), 1365 ar->id.bmi_chip_id, 1366 ar->id.bmi_eboard_id); 1367 1368 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1369 return 0; 1370 } 1371 /* Fallback if returned board id is zero */ 1372 return -1; 1373 } 1374 1375 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1376 { 1377 char boardname[100], fallback_boardname[100]; 1378 int ret; 1379 1380 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1381 ret = ath10k_core_create_board_name(ar, boardname, 1382 sizeof(boardname), true); 1383 if (ret) { 1384 ath10k_err(ar, "failed to create board name: %d", ret); 1385 return ret; 1386 } 1387 1388 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1389 sizeof(boardname), false); 1390 if (ret) { 1391 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1392 return ret; 1393 } 1394 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1395 ret = ath10k_core_create_eboard_name(ar, boardname, 1396 sizeof(boardname)); 1397 if (ret) { 1398 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1399 goto fallback; 1400 } 1401 } 1402 1403 ar->bd_api = 2; 1404 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1405 fallback_boardname, 1406 ATH10K_BOARD_API2_FILE); 1407 if (!ret) 1408 goto success; 1409 1410 fallback: 1411 ar->bd_api = 1; 1412 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1413 if (ret) { 1414 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1415 ar->hw_params.fw.dir); 1416 return ret; 1417 } 1418 1419 success: 1420 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1421 return 0; 1422 } 1423 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1424 1425 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1426 { 1427 u32 result, address; 1428 u8 ext_board_id; 1429 int ret; 1430 1431 address = ar->hw_params.patch_load_addr; 1432 1433 if (!ar->normal_mode_fw.fw_file.otp_data || 1434 !ar->normal_mode_fw.fw_file.otp_len) { 1435 ath10k_warn(ar, 1436 "failed to retrieve extended board id due to otp binary missing\n"); 1437 return -ENODATA; 1438 } 1439 1440 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1441 "boot upload otp to 0x%x len %zd for ext board id\n", 1442 address, ar->normal_mode_fw.fw_file.otp_len); 1443 1444 ret = ath10k_bmi_fast_download(ar, address, 1445 ar->normal_mode_fw.fw_file.otp_data, 1446 ar->normal_mode_fw.fw_file.otp_len); 1447 if (ret) { 1448 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1449 ret); 1450 return ret; 1451 } 1452 1453 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1454 if (ret) { 1455 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1456 ret); 1457 return ret; 1458 } 1459 1460 if (!result) { 1461 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1462 "ext board id does not exist in otp, ignore it\n"); 1463 return -EOPNOTSUPP; 1464 } 1465 1466 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1467 1468 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1469 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1470 result, ext_board_id); 1471 1472 ar->id.bmi_eboard_id = ext_board_id; 1473 1474 return 0; 1475 } 1476 1477 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1478 size_t data_len) 1479 { 1480 u32 board_data_size = ar->hw_params.fw.board_size; 1481 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1482 u32 board_address; 1483 u32 ext_board_address; 1484 int ret; 1485 1486 ret = ath10k_push_board_ext_data(ar, data, data_len); 1487 if (ret) { 1488 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1489 goto exit; 1490 } 1491 1492 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1493 if (ret) { 1494 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1495 goto exit; 1496 } 1497 1498 ret = ath10k_bmi_write_memory(ar, board_address, data, 1499 min_t(u32, board_data_size, 1500 data_len)); 1501 if (ret) { 1502 ath10k_err(ar, "could not write board data (%d)\n", ret); 1503 goto exit; 1504 } 1505 1506 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1507 if (ret) { 1508 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1509 goto exit; 1510 } 1511 1512 if (!ar->id.ext_bid_supported) 1513 goto exit; 1514 1515 /* Extended board data download */ 1516 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1517 if (ret == -EOPNOTSUPP) { 1518 /* Not fetching ext_board_data if ext board id is 0 */ 1519 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1520 return 0; 1521 } else if (ret) { 1522 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1523 goto exit; 1524 } 1525 1526 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1527 if (ret) 1528 goto exit; 1529 1530 if (ar->normal_mode_fw.ext_board_data) { 1531 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1532 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1533 "boot writing ext board data to addr 0x%x", 1534 ext_board_address); 1535 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1536 ar->normal_mode_fw.ext_board_data, 1537 min_t(u32, eboard_data_size, data_len)); 1538 if (ret) 1539 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1540 } 1541 1542 exit: 1543 return ret; 1544 } 1545 1546 static int ath10k_download_and_run_otp(struct ath10k *ar) 1547 { 1548 u32 result, address = ar->hw_params.patch_load_addr; 1549 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1550 int ret; 1551 1552 ret = ath10k_download_board_data(ar, 1553 ar->running_fw->board_data, 1554 ar->running_fw->board_len); 1555 if (ret) { 1556 ath10k_err(ar, "failed to download board data: %d\n", ret); 1557 return ret; 1558 } 1559 1560 /* OTP is optional */ 1561 1562 if (!ar->running_fw->fw_file.otp_data || 1563 !ar->running_fw->fw_file.otp_len) { 1564 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1565 ar->running_fw->fw_file.otp_data, 1566 ar->running_fw->fw_file.otp_len); 1567 return 0; 1568 } 1569 1570 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1571 address, ar->running_fw->fw_file.otp_len); 1572 1573 ret = ath10k_bmi_fast_download(ar, address, 1574 ar->running_fw->fw_file.otp_data, 1575 ar->running_fw->fw_file.otp_len); 1576 if (ret) { 1577 ath10k_err(ar, "could not write otp (%d)\n", ret); 1578 return ret; 1579 } 1580 1581 /* As of now pre-cal is valid for 10_4 variants */ 1582 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1583 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1584 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1585 1586 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1587 if (ret) { 1588 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1589 return ret; 1590 } 1591 1592 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1593 1594 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1595 ar->running_fw->fw_file.fw_features)) && 1596 result != 0) { 1597 ath10k_err(ar, "otp calibration failed: %d", result); 1598 return -EINVAL; 1599 } 1600 1601 return 0; 1602 } 1603 1604 static int ath10k_download_cal_file(struct ath10k *ar, 1605 const struct firmware *file) 1606 { 1607 int ret; 1608 1609 if (!file) 1610 return -ENOENT; 1611 1612 if (IS_ERR(file)) 1613 return PTR_ERR(file); 1614 1615 ret = ath10k_download_board_data(ar, file->data, file->size); 1616 if (ret) { 1617 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1618 return ret; 1619 } 1620 1621 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1622 1623 return 0; 1624 } 1625 1626 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1627 { 1628 struct device_node *node; 1629 int data_len; 1630 void *data; 1631 int ret; 1632 1633 node = ar->dev->of_node; 1634 if (!node) 1635 /* Device Tree is optional, don't print any warnings if 1636 * there's no node for ath10k. 1637 */ 1638 return -ENOENT; 1639 1640 if (!of_get_property(node, dt_name, &data_len)) { 1641 /* The calibration data node is optional */ 1642 return -ENOENT; 1643 } 1644 1645 if (data_len != ar->hw_params.cal_data_len) { 1646 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1647 data_len); 1648 ret = -EMSGSIZE; 1649 goto out; 1650 } 1651 1652 data = kmalloc(data_len, GFP_KERNEL); 1653 if (!data) { 1654 ret = -ENOMEM; 1655 goto out; 1656 } 1657 1658 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1659 if (ret) { 1660 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1661 ret); 1662 goto out_free; 1663 } 1664 1665 ret = ath10k_download_board_data(ar, data, data_len); 1666 if (ret) { 1667 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1668 ret); 1669 goto out_free; 1670 } 1671 1672 ret = 0; 1673 1674 out_free: 1675 kfree(data); 1676 1677 out: 1678 return ret; 1679 } 1680 1681 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1682 { 1683 size_t data_len; 1684 void *data = NULL; 1685 int ret; 1686 1687 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1688 if (ret) { 1689 if (ret != -EOPNOTSUPP) 1690 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1691 ret); 1692 goto out_free; 1693 } 1694 1695 ret = ath10k_download_board_data(ar, data, data_len); 1696 if (ret) { 1697 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1698 ret); 1699 goto out_free; 1700 } 1701 1702 ret = 0; 1703 1704 out_free: 1705 kfree(data); 1706 1707 return ret; 1708 } 1709 1710 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1711 struct ath10k_fw_file *fw_file) 1712 { 1713 size_t magic_len, len, ie_len; 1714 int ie_id, i, index, bit, ret; 1715 struct ath10k_fw_ie *hdr; 1716 const u8 *data; 1717 __le32 *timestamp, *version; 1718 1719 /* first fetch the firmware file (firmware-*.bin) */ 1720 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1721 name); 1722 if (IS_ERR(fw_file->firmware)) 1723 return PTR_ERR(fw_file->firmware); 1724 1725 data = fw_file->firmware->data; 1726 len = fw_file->firmware->size; 1727 1728 /* magic also includes the null byte, check that as well */ 1729 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1730 1731 if (len < magic_len) { 1732 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1733 ar->hw_params.fw.dir, name, len); 1734 ret = -EINVAL; 1735 goto err; 1736 } 1737 1738 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1739 ath10k_err(ar, "invalid firmware magic\n"); 1740 ret = -EINVAL; 1741 goto err; 1742 } 1743 1744 /* jump over the padding */ 1745 magic_len = ALIGN(magic_len, 4); 1746 1747 len -= magic_len; 1748 data += magic_len; 1749 1750 /* loop elements */ 1751 while (len > sizeof(struct ath10k_fw_ie)) { 1752 hdr = (struct ath10k_fw_ie *)data; 1753 1754 ie_id = le32_to_cpu(hdr->id); 1755 ie_len = le32_to_cpu(hdr->len); 1756 1757 len -= sizeof(*hdr); 1758 data += sizeof(*hdr); 1759 1760 if (len < ie_len) { 1761 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1762 ie_id, len, ie_len); 1763 ret = -EINVAL; 1764 goto err; 1765 } 1766 1767 switch (ie_id) { 1768 case ATH10K_FW_IE_FW_VERSION: 1769 if (ie_len > sizeof(fw_file->fw_version) - 1) 1770 break; 1771 1772 memcpy(fw_file->fw_version, data, ie_len); 1773 fw_file->fw_version[ie_len] = '\0'; 1774 1775 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1776 "found fw version %s\n", 1777 fw_file->fw_version); 1778 break; 1779 case ATH10K_FW_IE_TIMESTAMP: 1780 if (ie_len != sizeof(u32)) 1781 break; 1782 1783 timestamp = (__le32 *)data; 1784 1785 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1786 le32_to_cpup(timestamp)); 1787 break; 1788 case ATH10K_FW_IE_FEATURES: 1789 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1790 "found firmware features ie (%zd B)\n", 1791 ie_len); 1792 1793 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1794 index = i / 8; 1795 bit = i % 8; 1796 1797 if (index == ie_len) 1798 break; 1799 1800 if (data[index] & (1 << bit)) { 1801 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1802 "Enabling feature bit: %i\n", 1803 i); 1804 __set_bit(i, fw_file->fw_features); 1805 } 1806 } 1807 1808 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1809 fw_file->fw_features, 1810 sizeof(fw_file->fw_features)); 1811 break; 1812 case ATH10K_FW_IE_FW_IMAGE: 1813 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1814 "found fw image ie (%zd B)\n", 1815 ie_len); 1816 1817 fw_file->firmware_data = data; 1818 fw_file->firmware_len = ie_len; 1819 1820 break; 1821 case ATH10K_FW_IE_OTP_IMAGE: 1822 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1823 "found otp image ie (%zd B)\n", 1824 ie_len); 1825 1826 fw_file->otp_data = data; 1827 fw_file->otp_len = ie_len; 1828 1829 break; 1830 case ATH10K_FW_IE_WMI_OP_VERSION: 1831 if (ie_len != sizeof(u32)) 1832 break; 1833 1834 version = (__le32 *)data; 1835 1836 fw_file->wmi_op_version = le32_to_cpup(version); 1837 1838 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1839 fw_file->wmi_op_version); 1840 break; 1841 case ATH10K_FW_IE_HTT_OP_VERSION: 1842 if (ie_len != sizeof(u32)) 1843 break; 1844 1845 version = (__le32 *)data; 1846 1847 fw_file->htt_op_version = le32_to_cpup(version); 1848 1849 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1850 fw_file->htt_op_version); 1851 break; 1852 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1853 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1854 "found fw code swap image ie (%zd B)\n", 1855 ie_len); 1856 fw_file->codeswap_data = data; 1857 fw_file->codeswap_len = ie_len; 1858 break; 1859 default: 1860 ath10k_warn(ar, "Unknown FW IE: %u\n", 1861 le32_to_cpu(hdr->id)); 1862 break; 1863 } 1864 1865 /* jump over the padding */ 1866 ie_len = ALIGN(ie_len, 4); 1867 1868 len -= ie_len; 1869 data += ie_len; 1870 } 1871 1872 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1873 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1874 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1875 ar->hw_params.fw.dir, name); 1876 ret = -ENOMEDIUM; 1877 goto err; 1878 } 1879 1880 return 0; 1881 1882 err: 1883 ath10k_core_free_firmware_files(ar); 1884 return ret; 1885 } 1886 1887 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1888 size_t fw_name_len, int fw_api) 1889 { 1890 switch (ar->hif.bus) { 1891 case ATH10K_BUS_SDIO: 1892 case ATH10K_BUS_USB: 1893 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1894 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1895 fw_api); 1896 break; 1897 case ATH10K_BUS_PCI: 1898 case ATH10K_BUS_AHB: 1899 case ATH10K_BUS_SNOC: 1900 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1901 ATH10K_FW_FILE_BASE, fw_api); 1902 break; 1903 } 1904 } 1905 1906 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1907 { 1908 int ret, i; 1909 char fw_name[100]; 1910 1911 /* calibration file is optional, don't check for any errors */ 1912 ath10k_fetch_cal_file(ar); 1913 1914 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1915 ar->fw_api = i; 1916 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1917 ar->fw_api); 1918 1919 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1920 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1921 &ar->normal_mode_fw.fw_file); 1922 if (!ret) 1923 goto success; 1924 } 1925 1926 /* we end up here if we couldn't fetch any firmware */ 1927 1928 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1929 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1930 ret); 1931 1932 return ret; 1933 1934 success: 1935 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1936 1937 return 0; 1938 } 1939 1940 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1941 { 1942 int ret; 1943 1944 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1945 if (ret == 0) { 1946 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1947 goto success; 1948 } 1949 1950 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1951 "boot did not find a pre calibration file, try DT next: %d\n", 1952 ret); 1953 1954 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1955 if (ret) { 1956 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1957 "unable to load pre cal data from DT: %d\n", ret); 1958 return ret; 1959 } 1960 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1961 1962 success: 1963 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1964 ath10k_cal_mode_str(ar->cal_mode)); 1965 1966 return 0; 1967 } 1968 1969 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1970 { 1971 int ret; 1972 1973 ret = ath10k_core_pre_cal_download(ar); 1974 if (ret) { 1975 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1976 "failed to load pre cal data: %d\n", ret); 1977 return ret; 1978 } 1979 1980 ret = ath10k_core_get_board_id_from_otp(ar); 1981 if (ret) { 1982 ath10k_err(ar, "failed to get board id: %d\n", ret); 1983 return ret; 1984 } 1985 1986 ret = ath10k_download_and_run_otp(ar); 1987 if (ret) { 1988 ath10k_err(ar, "failed to run otp: %d\n", ret); 1989 return ret; 1990 } 1991 1992 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1993 "pre cal configuration done successfully\n"); 1994 1995 return 0; 1996 } 1997 1998 static int ath10k_download_cal_data(struct ath10k *ar) 1999 { 2000 int ret; 2001 2002 ret = ath10k_core_pre_cal_config(ar); 2003 if (ret == 0) 2004 return 0; 2005 2006 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2007 "pre cal download procedure failed, try cal file: %d\n", 2008 ret); 2009 2010 ret = ath10k_download_cal_file(ar, ar->cal_file); 2011 if (ret == 0) { 2012 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2013 goto done; 2014 } 2015 2016 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2017 "boot did not find a calibration file, try DT next: %d\n", 2018 ret); 2019 2020 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2021 if (ret == 0) { 2022 ar->cal_mode = ATH10K_CAL_MODE_DT; 2023 goto done; 2024 } 2025 2026 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2027 "boot did not find DT entry, try target EEPROM next: %d\n", 2028 ret); 2029 2030 ret = ath10k_download_cal_eeprom(ar); 2031 if (ret == 0) { 2032 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2033 goto done; 2034 } 2035 2036 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2037 "boot did not find target EEPROM entry, try OTP next: %d\n", 2038 ret); 2039 2040 ret = ath10k_download_and_run_otp(ar); 2041 if (ret) { 2042 ath10k_err(ar, "failed to run otp: %d\n", ret); 2043 return ret; 2044 } 2045 2046 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2047 2048 done: 2049 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2050 ath10k_cal_mode_str(ar->cal_mode)); 2051 return 0; 2052 } 2053 2054 static int ath10k_init_uart(struct ath10k *ar) 2055 { 2056 int ret; 2057 2058 /* 2059 * Explicitly setting UART prints to zero as target turns it on 2060 * based on scratch registers. 2061 */ 2062 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2063 if (ret) { 2064 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2065 return ret; 2066 } 2067 2068 if (!uart_print) 2069 return 0; 2070 2071 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2072 if (ret) { 2073 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2074 return ret; 2075 } 2076 2077 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2078 if (ret) { 2079 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2080 return ret; 2081 } 2082 2083 /* Set the UART baud rate to 19200. */ 2084 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2085 if (ret) { 2086 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2087 return ret; 2088 } 2089 2090 ath10k_info(ar, "UART prints enabled\n"); 2091 return 0; 2092 } 2093 2094 static int ath10k_init_hw_params(struct ath10k *ar) 2095 { 2096 const struct ath10k_hw_params *uninitialized_var(hw_params); 2097 int i; 2098 2099 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2100 hw_params = &ath10k_hw_params_list[i]; 2101 2102 if (hw_params->bus == ar->hif.bus && 2103 hw_params->id == ar->target_version && 2104 hw_params->dev_id == ar->dev_id) 2105 break; 2106 } 2107 2108 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2109 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2110 ar->target_version); 2111 return -EINVAL; 2112 } 2113 2114 ar->hw_params = *hw_params; 2115 2116 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2117 ar->hw_params.name, ar->target_version); 2118 2119 return 0; 2120 } 2121 2122 static void ath10k_core_restart(struct work_struct *work) 2123 { 2124 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2125 int ret; 2126 2127 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2128 2129 /* Place a barrier to make sure the compiler doesn't reorder 2130 * CRASH_FLUSH and calling other functions. 2131 */ 2132 barrier(); 2133 2134 ieee80211_stop_queues(ar->hw); 2135 ath10k_drain_tx(ar); 2136 complete(&ar->scan.started); 2137 complete(&ar->scan.completed); 2138 complete(&ar->scan.on_channel); 2139 complete(&ar->offchan_tx_completed); 2140 complete(&ar->install_key_done); 2141 complete(&ar->vdev_setup_done); 2142 complete(&ar->thermal.wmi_sync); 2143 complete(&ar->bss_survey_done); 2144 wake_up(&ar->htt.empty_tx_wq); 2145 wake_up(&ar->wmi.tx_credits_wq); 2146 wake_up(&ar->peer_mapping_wq); 2147 2148 /* TODO: We can have one instance of cancelling coverage_class_work by 2149 * moving it to ath10k_halt(), so that both stop() and restart() would 2150 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2151 * with conf_mutex it will deadlock. 2152 */ 2153 cancel_work_sync(&ar->set_coverage_class_work); 2154 2155 mutex_lock(&ar->conf_mutex); 2156 2157 switch (ar->state) { 2158 case ATH10K_STATE_ON: 2159 ar->state = ATH10K_STATE_RESTARTING; 2160 ath10k_halt(ar); 2161 ath10k_scan_finish(ar); 2162 ieee80211_restart_hw(ar->hw); 2163 break; 2164 case ATH10K_STATE_OFF: 2165 /* this can happen if driver is being unloaded 2166 * or if the crash happens during FW probing 2167 */ 2168 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2169 break; 2170 case ATH10K_STATE_RESTARTING: 2171 /* hw restart might be requested from multiple places */ 2172 break; 2173 case ATH10K_STATE_RESTARTED: 2174 ar->state = ATH10K_STATE_WEDGED; 2175 /* fall through */ 2176 case ATH10K_STATE_WEDGED: 2177 ath10k_warn(ar, "device is wedged, will not restart\n"); 2178 break; 2179 case ATH10K_STATE_UTF: 2180 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2181 break; 2182 } 2183 2184 mutex_unlock(&ar->conf_mutex); 2185 2186 ret = ath10k_coredump_submit(ar); 2187 if (ret) 2188 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2189 ret); 2190 2191 complete(&ar->driver_recovery); 2192 } 2193 2194 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2195 { 2196 struct ath10k *ar = container_of(work, struct ath10k, 2197 set_coverage_class_work); 2198 2199 if (ar->hw_params.hw_ops->set_coverage_class) 2200 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2201 } 2202 2203 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2204 { 2205 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2206 int max_num_peers; 2207 2208 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2209 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2210 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2211 return -EINVAL; 2212 } 2213 2214 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2215 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2216 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2217 return -EINVAL; 2218 } 2219 2220 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2221 switch (ath10k_cryptmode_param) { 2222 case ATH10K_CRYPT_MODE_HW: 2223 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2224 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2225 break; 2226 case ATH10K_CRYPT_MODE_SW: 2227 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2228 fw_file->fw_features)) { 2229 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2230 return -EINVAL; 2231 } 2232 2233 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2234 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2235 break; 2236 default: 2237 ath10k_info(ar, "invalid cryptmode: %d\n", 2238 ath10k_cryptmode_param); 2239 return -EINVAL; 2240 } 2241 2242 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2243 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2244 2245 if (rawmode) { 2246 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2247 fw_file->fw_features)) { 2248 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2249 return -EINVAL; 2250 } 2251 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2252 } 2253 2254 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2255 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2256 2257 /* Workaround: 2258 * 2259 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2260 * and causes enormous performance issues (malformed frames, 2261 * etc). 2262 * 2263 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2264 * albeit a bit slower compared to regular operation. 2265 */ 2266 ar->htt.max_num_amsdu = 1; 2267 } 2268 2269 /* Backwards compatibility for firmwares without 2270 * ATH10K_FW_IE_WMI_OP_VERSION. 2271 */ 2272 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2273 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2274 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2275 fw_file->fw_features)) 2276 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2277 else 2278 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2279 } else { 2280 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2281 } 2282 } 2283 2284 switch (fw_file->wmi_op_version) { 2285 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2286 max_num_peers = TARGET_NUM_PEERS; 2287 ar->max_num_stations = TARGET_NUM_STATIONS; 2288 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2289 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2290 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2291 WMI_STAT_PEER; 2292 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2293 break; 2294 case ATH10K_FW_WMI_OP_VERSION_10_1: 2295 case ATH10K_FW_WMI_OP_VERSION_10_2: 2296 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2297 if (ath10k_peer_stats_enabled(ar)) { 2298 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2299 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2300 } else { 2301 max_num_peers = TARGET_10X_NUM_PEERS; 2302 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2303 } 2304 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2305 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2306 ar->fw_stats_req_mask = WMI_STAT_PEER; 2307 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2308 break; 2309 case ATH10K_FW_WMI_OP_VERSION_TLV: 2310 max_num_peers = TARGET_TLV_NUM_PEERS; 2311 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2312 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2313 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2314 if (ar->hif.bus == ATH10K_BUS_SDIO) 2315 ar->htt.max_num_pending_tx = 2316 TARGET_TLV_NUM_MSDU_DESC_HL; 2317 else 2318 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2319 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2320 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2321 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2322 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2323 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2324 break; 2325 case ATH10K_FW_WMI_OP_VERSION_10_4: 2326 max_num_peers = TARGET_10_4_NUM_PEERS; 2327 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2328 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2329 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2330 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2331 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2332 WMI_10_4_STAT_PEER_EXTD | 2333 WMI_10_4_STAT_VDEV_EXTD; 2334 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2335 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2336 2337 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2338 fw_file->fw_features)) 2339 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2340 else 2341 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2342 break; 2343 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2344 case ATH10K_FW_WMI_OP_VERSION_MAX: 2345 default: 2346 WARN_ON(1); 2347 return -EINVAL; 2348 } 2349 2350 if (ar->hw_params.num_peers) 2351 ar->max_num_peers = ar->hw_params.num_peers; 2352 else 2353 ar->max_num_peers = max_num_peers; 2354 2355 /* Backwards compatibility for firmwares without 2356 * ATH10K_FW_IE_HTT_OP_VERSION. 2357 */ 2358 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2359 switch (fw_file->wmi_op_version) { 2360 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2361 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2362 break; 2363 case ATH10K_FW_WMI_OP_VERSION_10_1: 2364 case ATH10K_FW_WMI_OP_VERSION_10_2: 2365 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2366 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2367 break; 2368 case ATH10K_FW_WMI_OP_VERSION_TLV: 2369 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2370 break; 2371 case ATH10K_FW_WMI_OP_VERSION_10_4: 2372 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2373 case ATH10K_FW_WMI_OP_VERSION_MAX: 2374 ath10k_err(ar, "htt op version not found from fw meta data"); 2375 return -EINVAL; 2376 } 2377 } 2378 2379 return 0; 2380 } 2381 2382 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2383 { 2384 int ret; 2385 int vdev_id; 2386 int vdev_type; 2387 int vdev_subtype; 2388 const u8 *vdev_addr; 2389 2390 vdev_id = 0; 2391 vdev_type = WMI_VDEV_TYPE_STA; 2392 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2393 vdev_addr = ar->mac_addr; 2394 2395 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2396 vdev_addr); 2397 if (ret) { 2398 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2399 return ret; 2400 } 2401 2402 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2403 if (ret) { 2404 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2405 return ret; 2406 } 2407 2408 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2409 * serialized properly implicitly. 2410 * 2411 * Moreover (most) WMI commands have no explicit acknowledges. It is 2412 * possible to infer it implicitly by poking firmware with echo 2413 * command - getting a reply means all preceding comments have been 2414 * (mostly) processed. 2415 * 2416 * In case of vdev create/delete this is sufficient. 2417 * 2418 * Without this it's possible to end up with a race when HTT Rx ring is 2419 * started before vdev create/delete hack is complete allowing a short 2420 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2421 */ 2422 ret = ath10k_wmi_barrier(ar); 2423 if (ret) { 2424 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2425 return ret; 2426 } 2427 2428 return 0; 2429 } 2430 2431 static int ath10k_core_compat_services(struct ath10k *ar) 2432 { 2433 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2434 2435 /* all 10.x firmware versions support thermal throttling but don't 2436 * advertise the support via service flags so we have to hardcode 2437 * it here 2438 */ 2439 switch (fw_file->wmi_op_version) { 2440 case ATH10K_FW_WMI_OP_VERSION_10_1: 2441 case ATH10K_FW_WMI_OP_VERSION_10_2: 2442 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2443 case ATH10K_FW_WMI_OP_VERSION_10_4: 2444 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2445 break; 2446 default: 2447 break; 2448 } 2449 2450 return 0; 2451 } 2452 2453 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2454 const struct ath10k_fw_components *fw) 2455 { 2456 int status; 2457 u32 val; 2458 2459 lockdep_assert_held(&ar->conf_mutex); 2460 2461 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2462 2463 ar->running_fw = fw; 2464 2465 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2466 ar->running_fw->fw_file.fw_features)) { 2467 ath10k_bmi_start(ar); 2468 2469 if (ath10k_init_configure_target(ar)) { 2470 status = -EINVAL; 2471 goto err; 2472 } 2473 2474 status = ath10k_download_cal_data(ar); 2475 if (status) 2476 goto err; 2477 2478 /* Some of of qca988x solutions are having global reset issue 2479 * during target initialization. Bypassing PLL setting before 2480 * downloading firmware and letting the SoC run on REF_CLK is 2481 * fixing the problem. Corresponding firmware change is also 2482 * needed to set the clock source once the target is 2483 * initialized. 2484 */ 2485 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2486 ar->running_fw->fw_file.fw_features)) { 2487 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2488 if (status) { 2489 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2490 status); 2491 goto err; 2492 } 2493 } 2494 2495 status = ath10k_download_fw(ar); 2496 if (status) 2497 goto err; 2498 2499 status = ath10k_init_uart(ar); 2500 if (status) 2501 goto err; 2502 2503 if (ar->hif.bus == ATH10K_BUS_SDIO) 2504 ath10k_init_sdio(ar); 2505 } 2506 2507 ar->htc.htc_ops.target_send_suspend_complete = 2508 ath10k_send_suspend_complete; 2509 2510 status = ath10k_htc_init(ar); 2511 if (status) { 2512 ath10k_err(ar, "could not init HTC (%d)\n", status); 2513 goto err; 2514 } 2515 2516 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2517 ar->running_fw->fw_file.fw_features)) { 2518 status = ath10k_bmi_done(ar); 2519 if (status) 2520 goto err; 2521 } 2522 2523 status = ath10k_wmi_attach(ar); 2524 if (status) { 2525 ath10k_err(ar, "WMI attach failed: %d\n", status); 2526 goto err; 2527 } 2528 2529 status = ath10k_htt_init(ar); 2530 if (status) { 2531 ath10k_err(ar, "failed to init htt: %d\n", status); 2532 goto err_wmi_detach; 2533 } 2534 2535 status = ath10k_htt_tx_start(&ar->htt); 2536 if (status) { 2537 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2538 goto err_wmi_detach; 2539 } 2540 2541 /* If firmware indicates Full Rx Reorder support it must be used in a 2542 * slightly different manner. Let HTT code know. 2543 */ 2544 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2545 ar->wmi.svc_map)); 2546 2547 status = ath10k_htt_rx_alloc(&ar->htt); 2548 if (status) { 2549 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2550 goto err_htt_tx_detach; 2551 } 2552 2553 status = ath10k_hif_start(ar); 2554 if (status) { 2555 ath10k_err(ar, "could not start HIF: %d\n", status); 2556 goto err_htt_rx_detach; 2557 } 2558 2559 status = ath10k_htc_wait_target(&ar->htc); 2560 if (status) { 2561 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2562 goto err_hif_stop; 2563 } 2564 2565 status = ath10k_hif_swap_mailbox(ar); 2566 if (status) { 2567 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 2568 goto err_hif_stop; 2569 } 2570 2571 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2572 status = ath10k_htt_connect(&ar->htt); 2573 if (status) { 2574 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2575 goto err_hif_stop; 2576 } 2577 } 2578 2579 status = ath10k_wmi_connect(ar); 2580 if (status) { 2581 ath10k_err(ar, "could not connect wmi: %d\n", status); 2582 goto err_hif_stop; 2583 } 2584 2585 status = ath10k_htc_start(&ar->htc); 2586 if (status) { 2587 ath10k_err(ar, "failed to start htc: %d\n", status); 2588 goto err_hif_stop; 2589 } 2590 2591 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2592 status = ath10k_wmi_wait_for_service_ready(ar); 2593 if (status) { 2594 ath10k_warn(ar, "wmi service ready event not received"); 2595 goto err_hif_stop; 2596 } 2597 } 2598 2599 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2600 ar->hw->wiphy->fw_version); 2601 2602 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2603 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2604 val = 0; 2605 if (ath10k_peer_stats_enabled(ar)) 2606 val = WMI_10_4_PEER_STATS; 2607 2608 /* Enable vdev stats by default */ 2609 val |= WMI_10_4_VDEV_STATS; 2610 2611 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2612 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2613 2614 /* 10.4 firmware supports BT-Coex without reloading firmware 2615 * via pdev param. To support Bluetooth coexistence pdev param, 2616 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2617 * enabled always. 2618 */ 2619 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2620 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2621 ar->running_fw->fw_file.fw_features)) 2622 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2623 2624 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2625 ar->wmi.svc_map)) 2626 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2627 2628 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2629 ar->wmi.svc_map)) 2630 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2631 2632 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2633 ar->wmi.svc_map)) 2634 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2635 2636 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 2637 val |= WMI_10_4_REPORT_AIRTIME; 2638 2639 status = ath10k_mac_ext_resource_config(ar, val); 2640 if (status) { 2641 ath10k_err(ar, 2642 "failed to send ext resource cfg command : %d\n", 2643 status); 2644 goto err_hif_stop; 2645 } 2646 } 2647 2648 status = ath10k_wmi_cmd_init(ar); 2649 if (status) { 2650 ath10k_err(ar, "could not send WMI init command (%d)\n", 2651 status); 2652 goto err_hif_stop; 2653 } 2654 2655 status = ath10k_wmi_wait_for_unified_ready(ar); 2656 if (status) { 2657 ath10k_err(ar, "wmi unified ready event not received\n"); 2658 goto err_hif_stop; 2659 } 2660 2661 status = ath10k_core_compat_services(ar); 2662 if (status) { 2663 ath10k_err(ar, "compat services failed: %d\n", status); 2664 goto err_hif_stop; 2665 } 2666 2667 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 2668 if (status && status != -EOPNOTSUPP) { 2669 ath10k_err(ar, 2670 "failed to set base mac address: %d\n", status); 2671 goto err_hif_stop; 2672 } 2673 2674 /* Some firmware revisions do not properly set up hardware rx filter 2675 * registers. 2676 * 2677 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2678 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2679 * any frames that matches MAC_PCU_RX_FILTER which is also 2680 * misconfigured to accept anything. 2681 * 2682 * The ADDR1 is programmed using internal firmware structure field and 2683 * can't be (easily/sanely) reached from the driver explicitly. It is 2684 * possible to implicitly make it correct by creating a dummy vdev and 2685 * then deleting it. 2686 */ 2687 if (ar->hw_params.hw_filter_reset_required && 2688 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2689 status = ath10k_core_reset_rx_filter(ar); 2690 if (status) { 2691 ath10k_err(ar, 2692 "failed to reset rx filter: %d\n", status); 2693 goto err_hif_stop; 2694 } 2695 } 2696 2697 status = ath10k_htt_rx_ring_refill(ar); 2698 if (status) { 2699 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2700 goto err_hif_stop; 2701 } 2702 2703 if (ar->max_num_vdevs >= 64) 2704 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2705 else 2706 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2707 2708 INIT_LIST_HEAD(&ar->arvifs); 2709 2710 /* we don't care about HTT in UTF mode */ 2711 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2712 status = ath10k_htt_setup(&ar->htt); 2713 if (status) { 2714 ath10k_err(ar, "failed to setup htt: %d\n", status); 2715 goto err_hif_stop; 2716 } 2717 } 2718 2719 status = ath10k_debug_start(ar); 2720 if (status) 2721 goto err_hif_stop; 2722 2723 return 0; 2724 2725 err_hif_stop: 2726 ath10k_hif_stop(ar); 2727 err_htt_rx_detach: 2728 ath10k_htt_rx_free(&ar->htt); 2729 err_htt_tx_detach: 2730 ath10k_htt_tx_free(&ar->htt); 2731 err_wmi_detach: 2732 ath10k_wmi_detach(ar); 2733 err: 2734 return status; 2735 } 2736 EXPORT_SYMBOL(ath10k_core_start); 2737 2738 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2739 { 2740 int ret; 2741 unsigned long time_left; 2742 2743 reinit_completion(&ar->target_suspend); 2744 2745 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2746 if (ret) { 2747 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2748 return ret; 2749 } 2750 2751 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2752 2753 if (!time_left) { 2754 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2755 return -ETIMEDOUT; 2756 } 2757 2758 return 0; 2759 } 2760 2761 void ath10k_core_stop(struct ath10k *ar) 2762 { 2763 lockdep_assert_held(&ar->conf_mutex); 2764 ath10k_debug_stop(ar); 2765 2766 /* try to suspend target */ 2767 if (ar->state != ATH10K_STATE_RESTARTING && 2768 ar->state != ATH10K_STATE_UTF) 2769 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2770 2771 ath10k_hif_stop(ar); 2772 ath10k_htt_tx_stop(&ar->htt); 2773 ath10k_htt_rx_free(&ar->htt); 2774 ath10k_wmi_detach(ar); 2775 } 2776 EXPORT_SYMBOL(ath10k_core_stop); 2777 2778 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2779 * order to know what hw capabilities should be advertised to mac80211 it is 2780 * necessary to load the firmware (and tear it down immediately since start 2781 * hook will try to init it again) before registering 2782 */ 2783 static int ath10k_core_probe_fw(struct ath10k *ar) 2784 { 2785 struct bmi_target_info target_info; 2786 int ret = 0; 2787 2788 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 2789 if (ret) { 2790 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2791 return ret; 2792 } 2793 2794 switch (ar->hif.bus) { 2795 case ATH10K_BUS_SDIO: 2796 memset(&target_info, 0, sizeof(target_info)); 2797 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2798 if (ret) { 2799 ath10k_err(ar, "could not get target info (%d)\n", ret); 2800 goto err_power_down; 2801 } 2802 ar->target_version = target_info.version; 2803 ar->hw->wiphy->hw_version = target_info.version; 2804 break; 2805 case ATH10K_BUS_PCI: 2806 case ATH10K_BUS_AHB: 2807 case ATH10K_BUS_USB: 2808 memset(&target_info, 0, sizeof(target_info)); 2809 ret = ath10k_bmi_get_target_info(ar, &target_info); 2810 if (ret) { 2811 ath10k_err(ar, "could not get target info (%d)\n", ret); 2812 goto err_power_down; 2813 } 2814 ar->target_version = target_info.version; 2815 ar->hw->wiphy->hw_version = target_info.version; 2816 break; 2817 case ATH10K_BUS_SNOC: 2818 memset(&target_info, 0, sizeof(target_info)); 2819 ret = ath10k_hif_get_target_info(ar, &target_info); 2820 if (ret) { 2821 ath10k_err(ar, "could not get target info (%d)\n", ret); 2822 goto err_power_down; 2823 } 2824 ar->target_version = target_info.version; 2825 ar->hw->wiphy->hw_version = target_info.version; 2826 break; 2827 default: 2828 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2829 } 2830 2831 ret = ath10k_init_hw_params(ar); 2832 if (ret) { 2833 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2834 goto err_power_down; 2835 } 2836 2837 ret = ath10k_core_fetch_firmware_files(ar); 2838 if (ret) { 2839 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2840 goto err_power_down; 2841 } 2842 2843 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2844 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2845 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2846 sizeof(ar->hw->wiphy->fw_version)); 2847 2848 ath10k_debug_print_hwfw_info(ar); 2849 2850 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2851 ar->normal_mode_fw.fw_file.fw_features)) { 2852 ret = ath10k_core_pre_cal_download(ar); 2853 if (ret) { 2854 /* pre calibration data download is not necessary 2855 * for all the chipsets. Ignore failures and continue. 2856 */ 2857 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2858 "could not load pre cal data: %d\n", ret); 2859 } 2860 2861 ret = ath10k_core_get_board_id_from_otp(ar); 2862 if (ret && ret != -EOPNOTSUPP) { 2863 ath10k_err(ar, "failed to get board id from otp: %d\n", 2864 ret); 2865 goto err_free_firmware_files; 2866 } 2867 2868 ret = ath10k_core_check_smbios(ar); 2869 if (ret) 2870 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2871 2872 ret = ath10k_core_check_dt(ar); 2873 if (ret) 2874 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2875 2876 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2877 if (ret) { 2878 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2879 goto err_free_firmware_files; 2880 } 2881 2882 ath10k_debug_print_board_info(ar); 2883 } 2884 2885 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2886 2887 ret = ath10k_core_init_firmware_features(ar); 2888 if (ret) { 2889 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2890 ret); 2891 goto err_free_firmware_files; 2892 } 2893 2894 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2895 ar->normal_mode_fw.fw_file.fw_features)) { 2896 ret = ath10k_swap_code_seg_init(ar, 2897 &ar->normal_mode_fw.fw_file); 2898 if (ret) { 2899 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2900 ret); 2901 goto err_free_firmware_files; 2902 } 2903 } 2904 2905 mutex_lock(&ar->conf_mutex); 2906 2907 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2908 &ar->normal_mode_fw); 2909 if (ret) { 2910 ath10k_err(ar, "could not init core (%d)\n", ret); 2911 goto err_unlock; 2912 } 2913 2914 ath10k_debug_print_boot_info(ar); 2915 ath10k_core_stop(ar); 2916 2917 mutex_unlock(&ar->conf_mutex); 2918 2919 ath10k_hif_power_down(ar); 2920 return 0; 2921 2922 err_unlock: 2923 mutex_unlock(&ar->conf_mutex); 2924 2925 err_free_firmware_files: 2926 ath10k_core_free_firmware_files(ar); 2927 2928 err_power_down: 2929 ath10k_hif_power_down(ar); 2930 2931 return ret; 2932 } 2933 2934 static void ath10k_core_register_work(struct work_struct *work) 2935 { 2936 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2937 int status; 2938 2939 /* peer stats are enabled by default */ 2940 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2941 2942 status = ath10k_core_probe_fw(ar); 2943 if (status) { 2944 ath10k_err(ar, "could not probe fw (%d)\n", status); 2945 goto err; 2946 } 2947 2948 status = ath10k_mac_register(ar); 2949 if (status) { 2950 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2951 goto err_release_fw; 2952 } 2953 2954 status = ath10k_coredump_register(ar); 2955 if (status) { 2956 ath10k_err(ar, "unable to register coredump\n"); 2957 goto err_unregister_mac; 2958 } 2959 2960 status = ath10k_debug_register(ar); 2961 if (status) { 2962 ath10k_err(ar, "unable to initialize debugfs\n"); 2963 goto err_unregister_coredump; 2964 } 2965 2966 status = ath10k_spectral_create(ar); 2967 if (status) { 2968 ath10k_err(ar, "failed to initialize spectral\n"); 2969 goto err_debug_destroy; 2970 } 2971 2972 status = ath10k_thermal_register(ar); 2973 if (status) { 2974 ath10k_err(ar, "could not register thermal device: %d\n", 2975 status); 2976 goto err_spectral_destroy; 2977 } 2978 2979 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2980 return; 2981 2982 err_spectral_destroy: 2983 ath10k_spectral_destroy(ar); 2984 err_debug_destroy: 2985 ath10k_debug_destroy(ar); 2986 err_unregister_coredump: 2987 ath10k_coredump_unregister(ar); 2988 err_unregister_mac: 2989 ath10k_mac_unregister(ar); 2990 err_release_fw: 2991 ath10k_core_free_firmware_files(ar); 2992 err: 2993 /* TODO: It's probably a good idea to release device from the driver 2994 * but calling device_release_driver() here will cause a deadlock. 2995 */ 2996 return; 2997 } 2998 2999 int ath10k_core_register(struct ath10k *ar, 3000 const struct ath10k_bus_params *bus_params) 3001 { 3002 ar->bus_param = *bus_params; 3003 3004 queue_work(ar->workqueue, &ar->register_work); 3005 3006 return 0; 3007 } 3008 EXPORT_SYMBOL(ath10k_core_register); 3009 3010 void ath10k_core_unregister(struct ath10k *ar) 3011 { 3012 cancel_work_sync(&ar->register_work); 3013 3014 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3015 return; 3016 3017 ath10k_thermal_unregister(ar); 3018 /* Stop spectral before unregistering from mac80211 to remove the 3019 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3020 * would be already be free'd recursively, leading to a double free. 3021 */ 3022 ath10k_spectral_destroy(ar); 3023 3024 /* We must unregister from mac80211 before we stop HTC and HIF. 3025 * Otherwise we will fail to submit commands to FW and mac80211 will be 3026 * unhappy about callback failures. 3027 */ 3028 ath10k_mac_unregister(ar); 3029 3030 ath10k_testmode_destroy(ar); 3031 3032 ath10k_core_free_firmware_files(ar); 3033 ath10k_core_free_board_files(ar); 3034 3035 ath10k_debug_unregister(ar); 3036 } 3037 EXPORT_SYMBOL(ath10k_core_unregister); 3038 3039 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3040 enum ath10k_bus bus, 3041 enum ath10k_hw_rev hw_rev, 3042 const struct ath10k_hif_ops *hif_ops) 3043 { 3044 struct ath10k *ar; 3045 int ret; 3046 3047 ar = ath10k_mac_create(priv_size); 3048 if (!ar) 3049 return NULL; 3050 3051 ar->ath_common.priv = ar; 3052 ar->ath_common.hw = ar->hw; 3053 ar->dev = dev; 3054 ar->hw_rev = hw_rev; 3055 ar->hif.ops = hif_ops; 3056 ar->hif.bus = bus; 3057 3058 switch (hw_rev) { 3059 case ATH10K_HW_QCA988X: 3060 case ATH10K_HW_QCA9887: 3061 ar->regs = &qca988x_regs; 3062 ar->hw_ce_regs = &qcax_ce_regs; 3063 ar->hw_values = &qca988x_values; 3064 break; 3065 case ATH10K_HW_QCA6174: 3066 case ATH10K_HW_QCA9377: 3067 ar->regs = &qca6174_regs; 3068 ar->hw_ce_regs = &qcax_ce_regs; 3069 ar->hw_values = &qca6174_values; 3070 break; 3071 case ATH10K_HW_QCA99X0: 3072 case ATH10K_HW_QCA9984: 3073 ar->regs = &qca99x0_regs; 3074 ar->hw_ce_regs = &qcax_ce_regs; 3075 ar->hw_values = &qca99x0_values; 3076 break; 3077 case ATH10K_HW_QCA9888: 3078 ar->regs = &qca99x0_regs; 3079 ar->hw_ce_regs = &qcax_ce_regs; 3080 ar->hw_values = &qca9888_values; 3081 break; 3082 case ATH10K_HW_QCA4019: 3083 ar->regs = &qca4019_regs; 3084 ar->hw_ce_regs = &qcax_ce_regs; 3085 ar->hw_values = &qca4019_values; 3086 break; 3087 case ATH10K_HW_WCN3990: 3088 ar->regs = &wcn3990_regs; 3089 ar->hw_ce_regs = &wcn3990_ce_regs; 3090 ar->hw_values = &wcn3990_values; 3091 break; 3092 default: 3093 ath10k_err(ar, "unsupported core hardware revision %d\n", 3094 hw_rev); 3095 ret = -ENOTSUPP; 3096 goto err_free_mac; 3097 } 3098 3099 init_completion(&ar->scan.started); 3100 init_completion(&ar->scan.completed); 3101 init_completion(&ar->scan.on_channel); 3102 init_completion(&ar->target_suspend); 3103 init_completion(&ar->driver_recovery); 3104 init_completion(&ar->wow.wakeup_completed); 3105 3106 init_completion(&ar->install_key_done); 3107 init_completion(&ar->vdev_setup_done); 3108 init_completion(&ar->thermal.wmi_sync); 3109 init_completion(&ar->bss_survey_done); 3110 3111 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3112 3113 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3114 if (!ar->workqueue) 3115 goto err_free_mac; 3116 3117 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3118 if (!ar->workqueue_aux) 3119 goto err_free_wq; 3120 3121 mutex_init(&ar->conf_mutex); 3122 mutex_init(&ar->dump_mutex); 3123 spin_lock_init(&ar->data_lock); 3124 3125 INIT_LIST_HEAD(&ar->peers); 3126 init_waitqueue_head(&ar->peer_mapping_wq); 3127 init_waitqueue_head(&ar->htt.empty_tx_wq); 3128 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3129 3130 init_completion(&ar->offchan_tx_completed); 3131 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3132 skb_queue_head_init(&ar->offchan_tx_queue); 3133 3134 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3135 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3136 3137 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3138 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3139 INIT_WORK(&ar->set_coverage_class_work, 3140 ath10k_core_set_coverage_class_work); 3141 3142 init_dummy_netdev(&ar->napi_dev); 3143 3144 ret = ath10k_coredump_create(ar); 3145 if (ret) 3146 goto err_free_aux_wq; 3147 3148 ret = ath10k_debug_create(ar); 3149 if (ret) 3150 goto err_free_coredump; 3151 3152 return ar; 3153 3154 err_free_coredump: 3155 ath10k_coredump_destroy(ar); 3156 3157 err_free_aux_wq: 3158 destroy_workqueue(ar->workqueue_aux); 3159 err_free_wq: 3160 destroy_workqueue(ar->workqueue); 3161 3162 err_free_mac: 3163 ath10k_mac_destroy(ar); 3164 3165 return NULL; 3166 } 3167 EXPORT_SYMBOL(ath10k_core_create); 3168 3169 void ath10k_core_destroy(struct ath10k *ar) 3170 { 3171 flush_workqueue(ar->workqueue); 3172 destroy_workqueue(ar->workqueue); 3173 3174 flush_workqueue(ar->workqueue_aux); 3175 destroy_workqueue(ar->workqueue_aux); 3176 3177 ath10k_debug_destroy(ar); 3178 ath10k_coredump_destroy(ar); 3179 ath10k_htt_tx_destroy(&ar->htt); 3180 ath10k_wmi_free_host_mem(ar); 3181 ath10k_mac_destroy(ar); 3182 } 3183 EXPORT_SYMBOL(ath10k_core_destroy); 3184 3185 MODULE_AUTHOR("Qualcomm Atheros"); 3186 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3187 MODULE_LICENSE("Dual BSD/GPL"); 3188