1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _DEBUG_H_ 9 #define _DEBUG_H_ 10 11 #include <linux/types.h> 12 #include "trace.h" 13 14 enum ath10k_debug_mask { 15 ATH10K_DBG_PCI = 0x00000001, 16 ATH10K_DBG_WMI = 0x00000002, 17 ATH10K_DBG_HTC = 0x00000004, 18 ATH10K_DBG_HTT = 0x00000008, 19 ATH10K_DBG_MAC = 0x00000010, 20 ATH10K_DBG_BOOT = 0x00000020, 21 ATH10K_DBG_PCI_DUMP = 0x00000040, 22 ATH10K_DBG_HTT_DUMP = 0x00000080, 23 ATH10K_DBG_MGMT = 0x00000100, 24 ATH10K_DBG_DATA = 0x00000200, 25 ATH10K_DBG_BMI = 0x00000400, 26 ATH10K_DBG_REGULATORY = 0x00000800, 27 ATH10K_DBG_TESTMODE = 0x00001000, 28 ATH10K_DBG_WMI_PRINT = 0x00002000, 29 ATH10K_DBG_PCI_PS = 0x00004000, 30 ATH10K_DBG_AHB = 0x00008000, 31 ATH10K_DBG_SDIO = 0x00010000, 32 ATH10K_DBG_SDIO_DUMP = 0x00020000, 33 ATH10K_DBG_USB = 0x00040000, 34 ATH10K_DBG_USB_BULK = 0x00080000, 35 ATH10K_DBG_SNOC = 0x00100000, 36 ATH10K_DBG_QMI = 0x00200000, 37 ATH10K_DBG_ANY = 0xffffffff, 38 }; 39 40 enum ath10k_pktlog_filter { 41 ATH10K_PKTLOG_RX = 0x000000001, 42 ATH10K_PKTLOG_TX = 0x000000002, 43 ATH10K_PKTLOG_RCFIND = 0x000000004, 44 ATH10K_PKTLOG_RCUPDATE = 0x000000008, 45 ATH10K_PKTLOG_DBG_PRINT = 0x000000010, 46 ATH10K_PKTLOG_PEER_STATS = 0x000000040, 47 ATH10K_PKTLOG_ANY = 0x00000005f, 48 }; 49 50 enum ath10k_dbg_aggr_mode { 51 ATH10K_DBG_AGGR_MODE_AUTO, 52 ATH10K_DBG_AGGR_MODE_MANUAL, 53 ATH10K_DBG_AGGR_MODE_MAX, 54 }; 55 56 /* Types of packet log events */ 57 enum ath_pktlog_type { 58 ATH_PKTLOG_TYPE_TX_CTRL = 1, 59 ATH_PKTLOG_TYPE_TX_STAT, 60 }; 61 62 struct ath10k_pktlog_hdr { 63 __le16 flags; 64 __le16 missed_cnt; 65 __le16 log_type; /* Type of log information foll this header */ 66 __le16 size; /* Size of variable length log information in bytes */ 67 __le32 timestamp; 68 u8 payload[0]; 69 } __packed; 70 71 /* FIXME: How to calculate the buffer size sanely? */ 72 #define ATH10K_FW_STATS_BUF_SIZE (1024 * 1024) 73 74 #define ATH10K_TX_POWER_MAX_VAL 70 75 #define ATH10K_TX_POWER_MIN_VAL 0 76 77 extern unsigned int ath10k_debug_mask; 78 79 __printf(2, 3) void ath10k_info(struct ath10k *ar, const char *fmt, ...); 80 __printf(2, 3) void ath10k_err(struct ath10k *ar, const char *fmt, ...); 81 __printf(2, 3) void ath10k_warn(struct ath10k *ar, const char *fmt, ...); 82 83 void ath10k_debug_print_hwfw_info(struct ath10k *ar); 84 void ath10k_debug_print_board_info(struct ath10k *ar); 85 void ath10k_debug_print_boot_info(struct ath10k *ar); 86 void ath10k_print_driver_info(struct ath10k *ar); 87 88 #ifdef CONFIG_ATH10K_DEBUGFS 89 int ath10k_debug_start(struct ath10k *ar); 90 void ath10k_debug_stop(struct ath10k *ar); 91 int ath10k_debug_create(struct ath10k *ar); 92 void ath10k_debug_destroy(struct ath10k *ar); 93 int ath10k_debug_register(struct ath10k *ar); 94 void ath10k_debug_unregister(struct ath10k *ar); 95 void ath10k_debug_fw_stats_process(struct ath10k *ar, struct sk_buff *skb); 96 void ath10k_debug_tpc_stats_process(struct ath10k *ar, 97 struct ath10k_tpc_stats *tpc_stats); 98 void 99 ath10k_debug_tpc_stats_final_process(struct ath10k *ar, 100 struct ath10k_tpc_stats_final *tpc_stats); 101 void ath10k_debug_dbglog_add(struct ath10k *ar, u8 *buffer, int len); 102 103 #define ATH10K_DFS_STAT_INC(ar, c) (ar->debug.dfs_stats.c++) 104 105 void ath10k_debug_get_et_strings(struct ieee80211_hw *hw, 106 struct ieee80211_vif *vif, 107 u32 sset, u8 *data); 108 int ath10k_debug_get_et_sset_count(struct ieee80211_hw *hw, 109 struct ieee80211_vif *vif, int sset); 110 void ath10k_debug_get_et_stats(struct ieee80211_hw *hw, 111 struct ieee80211_vif *vif, 112 struct ethtool_stats *stats, u64 *data); 113 114 static inline u64 ath10k_debug_get_fw_dbglog_mask(struct ath10k *ar) 115 { 116 return ar->debug.fw_dbglog_mask; 117 } 118 119 static inline u32 ath10k_debug_get_fw_dbglog_level(struct ath10k *ar) 120 { 121 return ar->debug.fw_dbglog_level; 122 } 123 124 static inline int ath10k_debug_is_extd_tx_stats_enabled(struct ath10k *ar) 125 { 126 return ar->debug.enable_extd_tx_stats; 127 } 128 #else 129 130 static inline int ath10k_debug_start(struct ath10k *ar) 131 { 132 return 0; 133 } 134 135 static inline void ath10k_debug_stop(struct ath10k *ar) 136 { 137 } 138 139 static inline int ath10k_debug_create(struct ath10k *ar) 140 { 141 return 0; 142 } 143 144 static inline void ath10k_debug_destroy(struct ath10k *ar) 145 { 146 } 147 148 static inline int ath10k_debug_register(struct ath10k *ar) 149 { 150 return 0; 151 } 152 153 static inline void ath10k_debug_unregister(struct ath10k *ar) 154 { 155 } 156 157 static inline void ath10k_debug_fw_stats_process(struct ath10k *ar, 158 struct sk_buff *skb) 159 { 160 } 161 162 static inline void ath10k_debug_tpc_stats_process(struct ath10k *ar, 163 struct ath10k_tpc_stats *tpc_stats) 164 { 165 kfree(tpc_stats); 166 } 167 168 static inline void 169 ath10k_debug_tpc_stats_final_process(struct ath10k *ar, 170 struct ath10k_tpc_stats_final *tpc_stats) 171 { 172 kfree(tpc_stats); 173 } 174 175 static inline void ath10k_debug_dbglog_add(struct ath10k *ar, u8 *buffer, 176 int len) 177 { 178 } 179 180 static inline u64 ath10k_debug_get_fw_dbglog_mask(struct ath10k *ar) 181 { 182 return 0; 183 } 184 185 static inline u32 ath10k_debug_get_fw_dbglog_level(struct ath10k *ar) 186 { 187 return 0; 188 } 189 190 static inline int ath10k_debug_is_extd_tx_stats_enabled(struct ath10k *ar) 191 { 192 return 0; 193 } 194 195 #define ATH10K_DFS_STAT_INC(ar, c) do { } while (0) 196 197 #define ath10k_debug_get_et_strings NULL 198 #define ath10k_debug_get_et_sset_count NULL 199 #define ath10k_debug_get_et_stats NULL 200 201 #endif /* CONFIG_ATH10K_DEBUGFS */ 202 #ifdef CONFIG_MAC80211_DEBUGFS 203 void ath10k_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 204 struct ieee80211_sta *sta, struct dentry *dir); 205 void ath10k_sta_update_rx_duration(struct ath10k *ar, 206 struct ath10k_fw_stats *stats); 207 void ath10k_sta_update_rx_tid_stats(struct ath10k *ar, u8 *first_hdr, 208 unsigned long num_msdus, 209 enum ath10k_pkt_rx_err err, 210 unsigned long unchain_cnt, 211 unsigned long drop_cnt, 212 unsigned long drop_cnt_filter, 213 unsigned long queued_msdus); 214 void ath10k_sta_update_rx_tid_stats_ampdu(struct ath10k *ar, 215 u16 peer_id, u8 tid, 216 struct htt_rx_indication_mpdu_range *ranges, 217 int num_ranges); 218 #else 219 static inline 220 void ath10k_sta_update_rx_duration(struct ath10k *ar, 221 struct ath10k_fw_stats *stats) 222 { 223 } 224 225 static inline 226 void ath10k_sta_update_rx_tid_stats(struct ath10k *ar, u8 *first_hdr, 227 unsigned long num_msdus, 228 enum ath10k_pkt_rx_err err, 229 unsigned long unchain_cnt, 230 unsigned long drop_cnt, 231 unsigned long drop_cnt_filter, 232 unsigned long queued_msdus) 233 { 234 } 235 236 static inline 237 void ath10k_sta_update_rx_tid_stats_ampdu(struct ath10k *ar, 238 u16 peer_id, u8 tid, 239 struct htt_rx_indication_mpdu_range *ranges, 240 int num_ranges) 241 { 242 } 243 #endif /* CONFIG_MAC80211_DEBUGFS */ 244 245 #ifdef CONFIG_ATH10K_DEBUG 246 __printf(3, 4) void __ath10k_dbg(struct ath10k *ar, 247 enum ath10k_debug_mask mask, 248 const char *fmt, ...); 249 void ath10k_dbg_dump(struct ath10k *ar, 250 enum ath10k_debug_mask mask, 251 const char *msg, const char *prefix, 252 const void *buf, size_t len); 253 #else /* CONFIG_ATH10K_DEBUG */ 254 255 static inline int __ath10k_dbg(struct ath10k *ar, 256 enum ath10k_debug_mask dbg_mask, 257 const char *fmt, ...) 258 { 259 return 0; 260 } 261 262 static inline void ath10k_dbg_dump(struct ath10k *ar, 263 enum ath10k_debug_mask mask, 264 const char *msg, const char *prefix, 265 const void *buf, size_t len) 266 { 267 } 268 #endif /* CONFIG_ATH10K_DEBUG */ 269 270 /* Avoid calling __ath10k_dbg() if debug_mask is not set and tracing 271 * disabled. 272 */ 273 #define ath10k_dbg(ar, dbg_mask, fmt, ...) \ 274 do { \ 275 if ((ath10k_debug_mask & dbg_mask) || \ 276 trace_ath10k_log_dbg_enabled()) \ 277 __ath10k_dbg(ar, dbg_mask, fmt, ##__VA_ARGS__); \ 278 } while (0) 279 #endif /* _DEBUG_H_ */ 280