1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debug.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "peer.h" 22 23 struct ath12k_wmi_svc_ready_parse { 24 bool wmi_svc_bitmap_done; 25 }; 26 27 struct ath12k_wmi_dma_ring_caps_parse { 28 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 29 u32 n_dma_ring_caps; 30 }; 31 32 struct ath12k_wmi_service_ext_arg { 33 u32 default_conc_scan_config_bits; 34 u32 default_fw_config_bits; 35 struct ath12k_wmi_ppe_threshold_arg ppet; 36 u32 he_cap_info; 37 u32 mpdu_density; 38 u32 max_bssid_rx_filters; 39 u32 num_hw_modes; 40 u32 num_phy; 41 }; 42 43 struct ath12k_wmi_svc_rdy_ext_parse { 44 struct ath12k_wmi_service_ext_arg arg; 45 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 46 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 47 u32 n_hw_mode_caps; 48 u32 tot_phy_id; 49 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 50 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 51 u32 n_mac_phy_caps; 52 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 53 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 54 u32 n_ext_hal_reg_caps; 55 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 56 bool hw_mode_done; 57 bool mac_phy_done; 58 bool ext_hal_reg_done; 59 bool mac_phy_chainmask_combo_done; 60 bool mac_phy_chainmask_cap_done; 61 bool oem_dma_ring_cap_done; 62 bool dma_ring_cap_done; 63 }; 64 65 struct ath12k_wmi_svc_rdy_ext2_parse { 66 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 67 bool dma_ring_cap_done; 68 }; 69 70 struct ath12k_wmi_rdy_parse { 71 u32 num_extra_mac_addr; 72 }; 73 74 struct ath12k_wmi_dma_buf_release_arg { 75 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 76 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 77 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 78 u32 num_buf_entry; 79 u32 num_meta; 80 bool buf_entry_done; 81 bool meta_data_done; 82 }; 83 84 struct ath12k_wmi_tlv_policy { 85 size_t min_len; 86 }; 87 88 struct wmi_tlv_mgmt_rx_parse { 89 const struct ath12k_wmi_mgmt_rx_params *fixed; 90 const u8 *frame_buf; 91 bool frame_buf_done; 92 }; 93 94 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 95 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 96 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 97 [WMI_TAG_SERVICE_READY_EVENT] = { 98 .min_len = sizeof(struct wmi_service_ready_event) }, 99 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 100 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 101 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 102 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 103 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 104 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 105 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 106 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 107 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 108 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 109 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 110 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 111 [WMI_TAG_VDEV_STOPPED_EVENT] = { 112 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 113 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 114 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 115 [WMI_TAG_MGMT_RX_HDR] = { 116 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 117 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 118 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 119 [WMI_TAG_SCAN_EVENT] = { 120 .min_len = sizeof(struct wmi_scan_event) }, 121 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 122 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 123 [WMI_TAG_ROAM_EVENT] = { 124 .min_len = sizeof(struct wmi_roam_event) }, 125 [WMI_TAG_CHAN_INFO_EVENT] = { 126 .min_len = sizeof(struct wmi_chan_info_event) }, 127 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 128 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 129 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 130 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 131 [WMI_TAG_READY_EVENT] = { 132 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 133 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 134 .min_len = sizeof(struct wmi_service_available_event) }, 135 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 136 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 137 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 138 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 139 [WMI_TAG_HOST_SWFDA_EVENT] = { 140 .min_len = sizeof(struct wmi_fils_discovery_event) }, 141 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 142 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 143 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 144 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 145 }; 146 147 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 148 { 149 return le32_encode_bits(cmd, WMI_TLV_TAG) | 150 le32_encode_bits(len, WMI_TLV_LEN); 151 } 152 153 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 154 { 155 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 156 } 157 158 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 159 struct ath12k_wmi_resource_config_arg *config) 160 { 161 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 162 163 if (ab->num_radios == 2) { 164 config->num_peers = TARGET_NUM_PEERS(DBS); 165 config->num_tids = TARGET_NUM_TIDS(DBS); 166 } else if (ab->num_radios == 3) { 167 config->num_peers = TARGET_NUM_PEERS(DBS_SBS); 168 config->num_tids = TARGET_NUM_TIDS(DBS_SBS); 169 } else { 170 /* Control should not reach here */ 171 config->num_peers = TARGET_NUM_PEERS(SINGLE); 172 config->num_tids = TARGET_NUM_TIDS(SINGLE); 173 } 174 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 175 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 176 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 177 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 178 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 179 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 180 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 181 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 182 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 183 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 184 185 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 186 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 187 else 188 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 189 190 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 191 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 192 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 193 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 194 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 195 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 196 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 197 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 198 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 199 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 200 config->rx_skip_defrag_timeout_dup_detection_check = 201 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 202 config->vow_config = TARGET_VOW_CONFIG; 203 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 204 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 205 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 206 config->rx_batchmode = TARGET_RX_BATCHMODE; 207 /* Indicates host supports peer map v3 and unmap v2 support */ 208 config->peer_map_unmap_version = 0x32; 209 config->twt_ap_pdev_count = ab->num_radios; 210 config->twt_ap_sta_count = 1000; 211 } 212 213 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 214 struct ath12k_wmi_resource_config_arg *config) 215 { 216 config->num_vdevs = 4; 217 config->num_peers = 16; 218 config->num_tids = 32; 219 220 config->num_offload_peers = 3; 221 config->num_offload_reorder_buffs = 3; 222 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 223 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 224 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 225 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 226 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 227 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 228 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 229 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 230 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 231 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 232 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 233 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 234 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 235 config->num_mcast_groups = 0; 236 config->num_mcast_table_elems = 0; 237 config->mcast2ucast_mode = 0; 238 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 239 config->num_wds_entries = 0; 240 config->dma_burst_size = 0; 241 config->rx_skip_defrag_timeout_dup_detection_check = 0; 242 config->vow_config = TARGET_VOW_CONFIG; 243 config->gtk_offload_max_vdev = 2; 244 config->num_msdu_desc = 0x400; 245 config->beacon_tx_offload_max_vdev = 2; 246 config->rx_batchmode = TARGET_RX_BATCHMODE; 247 248 config->peer_map_unmap_version = 0x1; 249 config->use_pdev_id = 1; 250 config->max_frag_entries = 0xa; 251 config->num_tdls_vdevs = 0x1; 252 config->num_tdls_conn_table_entries = 8; 253 config->beacon_tx_offload_max_vdev = 0x2; 254 config->num_multicast_filter_entries = 0x20; 255 config->num_wow_filters = 0x16; 256 config->num_keep_alive_pattern = 0; 257 } 258 259 #define PRIMAP(_hw_mode_) \ 260 [_hw_mode_] = _hw_mode_##_PRI 261 262 static const int ath12k_hw_mode_pri_map[] = { 263 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 264 PRIMAP(WMI_HOST_HW_MODE_DBS), 265 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 266 PRIMAP(WMI_HOST_HW_MODE_SBS), 267 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 268 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 269 /* keep last */ 270 PRIMAP(WMI_HOST_HW_MODE_MAX), 271 }; 272 273 static int 274 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 275 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 276 const void *ptr, void *data), 277 void *data) 278 { 279 const void *begin = ptr; 280 const struct wmi_tlv *tlv; 281 u16 tlv_tag, tlv_len; 282 int ret; 283 284 while (len > 0) { 285 if (len < sizeof(*tlv)) { 286 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 287 ptr - begin, len, sizeof(*tlv)); 288 return -EINVAL; 289 } 290 291 tlv = ptr; 292 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 293 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 294 ptr += sizeof(*tlv); 295 len -= sizeof(*tlv); 296 297 if (tlv_len > len) { 298 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 299 tlv_tag, ptr - begin, len, tlv_len); 300 return -EINVAL; 301 } 302 303 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 304 ath12k_wmi_tlv_policies[tlv_tag].min_len && 305 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 306 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 307 tlv_tag, ptr - begin, tlv_len, 308 ath12k_wmi_tlv_policies[tlv_tag].min_len); 309 return -EINVAL; 310 } 311 312 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 313 if (ret) 314 return ret; 315 316 ptr += tlv_len; 317 len -= tlv_len; 318 } 319 320 return 0; 321 } 322 323 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 324 const void *ptr, void *data) 325 { 326 const void **tb = data; 327 328 if (tag < WMI_TAG_MAX) 329 tb[tag] = ptr; 330 331 return 0; 332 } 333 334 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 335 const void *ptr, size_t len) 336 { 337 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 338 (void *)tb); 339 } 340 341 static const void ** 342 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, const void *ptr, 343 size_t len, gfp_t gfp) 344 { 345 const void **tb; 346 int ret; 347 348 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 349 if (!tb) 350 return ERR_PTR(-ENOMEM); 351 352 ret = ath12k_wmi_tlv_parse(ab, tb, ptr, len); 353 if (ret) { 354 kfree(tb); 355 return ERR_PTR(ret); 356 } 357 358 return tb; 359 } 360 361 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 362 u32 cmd_id) 363 { 364 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 365 struct ath12k_base *ab = wmi->wmi_ab->ab; 366 struct wmi_cmd_hdr *cmd_hdr; 367 int ret; 368 369 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 370 return -ENOMEM; 371 372 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 373 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 374 375 memset(skb_cb, 0, sizeof(*skb_cb)); 376 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 377 378 if (ret) 379 goto err_pull; 380 381 return 0; 382 383 err_pull: 384 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 385 return ret; 386 } 387 388 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 389 u32 cmd_id) 390 { 391 struct ath12k_wmi_base *wmi_sc = wmi->wmi_ab; 392 int ret = -EOPNOTSUPP; 393 394 might_sleep(); 395 396 wait_event_timeout(wmi_sc->tx_credits_wq, ({ 397 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 398 399 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_sc->ab->dev_flags)) 400 ret = -ESHUTDOWN; 401 402 (ret != -EAGAIN); 403 }), WMI_SEND_TIMEOUT_HZ); 404 405 if (ret == -EAGAIN) 406 ath12k_warn(wmi_sc->ab, "wmi command %d timeout\n", cmd_id); 407 408 return ret; 409 } 410 411 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 412 const void *ptr, 413 struct ath12k_wmi_service_ext_arg *arg) 414 { 415 const struct wmi_service_ready_ext_event *ev = ptr; 416 int i; 417 418 if (!ev) 419 return -EINVAL; 420 421 /* Move this to host based bitmap */ 422 arg->default_conc_scan_config_bits = 423 le32_to_cpu(ev->default_conc_scan_config_bits); 424 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 425 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 426 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 427 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 428 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 429 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 430 431 for (i = 0; i < WMI_MAX_NUM_SS; i++) 432 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 433 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 434 435 return 0; 436 } 437 438 static int 439 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 440 struct ath12k_wmi_svc_rdy_ext_parse *svc, 441 u8 hw_mode_id, u8 phy_id, 442 struct ath12k_pdev *pdev) 443 { 444 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 445 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 446 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 447 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 448 struct ath12k_band_cap *cap_band; 449 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 450 u32 phy_map; 451 u32 hw_idx, phy_idx = 0; 452 int i; 453 454 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 455 return -EINVAL; 456 457 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 458 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 459 break; 460 461 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 462 phy_idx = fls(phy_map); 463 } 464 465 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 466 return -EINVAL; 467 468 phy_idx += phy_id; 469 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 470 return -EINVAL; 471 472 mac_caps = wmi_mac_phy_caps + phy_idx; 473 474 pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id); 475 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 476 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 477 478 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 479 * band to band for a single radio, need to see how this should be 480 * handled. 481 */ 482 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 483 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 484 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 485 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 486 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 487 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 488 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 489 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 490 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 491 } else { 492 return -EINVAL; 493 } 494 495 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 496 * For example, for 4x4 capable macphys, first 4 chains can be used for first 497 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 498 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 499 * will be advertised for second mac or vice-versa. Compute the shift value 500 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 501 * mac80211. 502 */ 503 pdev_cap->tx_chain_mask_shift = 504 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 505 pdev_cap->rx_chain_mask_shift = 506 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 507 508 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 509 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 510 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 511 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 512 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 513 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 514 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 515 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 516 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 517 cap_band->he_cap_phy_info[i] = 518 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 519 520 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 521 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 522 523 for (i = 0; i < WMI_MAX_NUM_SS; i++) 524 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 525 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 526 } 527 528 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 529 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 530 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 531 cap_band->max_bw_supported = 532 le32_to_cpu(mac_caps->max_bw_supported_5g); 533 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 534 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 535 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 536 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 537 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 538 cap_band->he_cap_phy_info[i] = 539 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 540 541 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 542 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 543 544 for (i = 0; i < WMI_MAX_NUM_SS; i++) 545 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 546 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 547 548 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 549 cap_band->max_bw_supported = 550 le32_to_cpu(mac_caps->max_bw_supported_5g); 551 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 552 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 553 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 554 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 555 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 556 cap_band->he_cap_phy_info[i] = 557 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 558 559 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 560 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 561 562 for (i = 0; i < WMI_MAX_NUM_SS; i++) 563 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 564 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 565 } 566 567 return 0; 568 } 569 570 static int 571 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 572 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 573 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 574 u8 phy_idx, 575 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 576 { 577 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 578 579 if (!reg_caps || !ext_caps) 580 return -EINVAL; 581 582 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 583 return -EINVAL; 584 585 ext_reg_cap = &ext_caps[phy_idx]; 586 587 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 588 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 589 param->eeprom_reg_domain_ext = 590 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 591 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 592 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 593 /* check if param->wireless_mode is needed */ 594 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 595 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 596 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 597 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 598 599 return 0; 600 } 601 602 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 603 const void *evt_buf, 604 struct ath12k_wmi_target_cap_arg *cap) 605 { 606 const struct wmi_service_ready_event *ev = evt_buf; 607 608 if (!ev) { 609 ath12k_err(ab, "%s: failed by NULL param\n", 610 __func__); 611 return -EINVAL; 612 } 613 614 cap->phy_capability = le32_to_cpu(ev->phy_capability); 615 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 616 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 617 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 618 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 619 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 620 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 621 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 622 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 623 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 624 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 625 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 626 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 627 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 628 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 629 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 630 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 631 632 return 0; 633 } 634 635 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 636 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 637 * 4-byte word. 638 */ 639 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 640 const u32 *wmi_svc_bm) 641 { 642 int i, j; 643 644 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 645 do { 646 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 647 set_bit(j, wmi->wmi_ab->svc_map); 648 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 649 } 650 } 651 652 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 653 const void *ptr, void *data) 654 { 655 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 656 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 657 u16 expect_len; 658 659 switch (tag) { 660 case WMI_TAG_SERVICE_READY_EVENT: 661 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 662 return -EINVAL; 663 break; 664 665 case WMI_TAG_ARRAY_UINT32: 666 if (!svc_ready->wmi_svc_bitmap_done) { 667 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 668 if (len < expect_len) { 669 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 670 len, tag); 671 return -EINVAL; 672 } 673 674 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 675 676 svc_ready->wmi_svc_bitmap_done = true; 677 } 678 break; 679 default: 680 break; 681 } 682 683 return 0; 684 } 685 686 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 687 { 688 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 689 int ret; 690 691 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 692 ath12k_wmi_svc_rdy_parse, 693 &svc_ready); 694 if (ret) { 695 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 696 return ret; 697 } 698 699 return 0; 700 } 701 702 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len) 703 { 704 struct sk_buff *skb; 705 struct ath12k_base *ab = wmi_sc->ab; 706 u32 round_len = roundup(len, 4); 707 708 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 709 if (!skb) 710 return NULL; 711 712 skb_reserve(skb, WMI_SKB_HEADROOM); 713 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 714 ath12k_warn(ab, "unaligned WMI skb data\n"); 715 716 skb_put(skb, round_len); 717 memset(skb->data, 0, round_len); 718 719 return skb; 720 } 721 722 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 723 struct sk_buff *frame) 724 { 725 struct ath12k_wmi_pdev *wmi = ar->wmi; 726 struct wmi_mgmt_send_cmd *cmd; 727 struct wmi_tlv *frame_tlv; 728 struct sk_buff *skb; 729 u32 buf_len; 730 int ret, len; 731 732 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 733 734 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 735 736 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 737 if (!skb) 738 return -ENOMEM; 739 740 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 741 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 742 sizeof(*cmd)); 743 cmd->vdev_id = cpu_to_le32(vdev_id); 744 cmd->desc_id = cpu_to_le32(buf_id); 745 cmd->chanfreq = 0; 746 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 747 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 748 cmd->frame_len = cpu_to_le32(frame->len); 749 cmd->buf_len = cpu_to_le32(buf_len); 750 cmd->tx_params_valid = 0; 751 752 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 753 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 754 755 memcpy(frame_tlv->value, frame->data, buf_len); 756 757 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 758 if (ret) { 759 ath12k_warn(ar->ab, 760 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 761 dev_kfree_skb(skb); 762 } 763 764 return ret; 765 } 766 767 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 768 struct ath12k_wmi_vdev_create_arg *args) 769 { 770 struct ath12k_wmi_pdev *wmi = ar->wmi; 771 struct wmi_vdev_create_cmd *cmd; 772 struct sk_buff *skb; 773 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 774 struct wmi_tlv *tlv; 775 int ret, len; 776 void *ptr; 777 778 /* It can be optimized my sending tx/rx chain configuration 779 * only for supported bands instead of always sending it for 780 * both the bands. 781 */ 782 len = sizeof(*cmd) + TLV_HDR_SIZE + 783 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)); 784 785 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 786 if (!skb) 787 return -ENOMEM; 788 789 cmd = (struct wmi_vdev_create_cmd *)skb->data; 790 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 791 sizeof(*cmd)); 792 793 cmd->vdev_id = cpu_to_le32(args->if_id); 794 cmd->vdev_type = cpu_to_le32(args->type); 795 cmd->vdev_subtype = cpu_to_le32(args->subtype); 796 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 797 cmd->pdev_id = cpu_to_le32(args->pdev_id); 798 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 799 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 800 801 ptr = skb->data + sizeof(*cmd); 802 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 803 804 tlv = ptr; 805 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 806 807 ptr += TLV_HDR_SIZE; 808 txrx_streams = ptr; 809 len = sizeof(*txrx_streams); 810 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 811 len); 812 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_2G; 813 txrx_streams->supported_tx_streams = 814 args->chains[NL80211_BAND_2GHZ].tx; 815 txrx_streams->supported_rx_streams = 816 args->chains[NL80211_BAND_2GHZ].rx; 817 818 txrx_streams++; 819 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 820 len); 821 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_5G; 822 txrx_streams->supported_tx_streams = 823 args->chains[NL80211_BAND_5GHZ].tx; 824 txrx_streams->supported_rx_streams = 825 args->chains[NL80211_BAND_5GHZ].rx; 826 827 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 828 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 829 args->if_id, args->type, args->subtype, 830 macaddr, args->pdev_id); 831 832 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 833 if (ret) { 834 ath12k_warn(ar->ab, 835 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 836 dev_kfree_skb(skb); 837 } 838 839 return ret; 840 } 841 842 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 843 { 844 struct ath12k_wmi_pdev *wmi = ar->wmi; 845 struct wmi_vdev_delete_cmd *cmd; 846 struct sk_buff *skb; 847 int ret; 848 849 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 850 if (!skb) 851 return -ENOMEM; 852 853 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 854 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 855 sizeof(*cmd)); 856 cmd->vdev_id = cpu_to_le32(vdev_id); 857 858 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 859 860 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 861 if (ret) { 862 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 863 dev_kfree_skb(skb); 864 } 865 866 return ret; 867 } 868 869 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 870 { 871 struct ath12k_wmi_pdev *wmi = ar->wmi; 872 struct wmi_vdev_stop_cmd *cmd; 873 struct sk_buff *skb; 874 int ret; 875 876 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 877 if (!skb) 878 return -ENOMEM; 879 880 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 881 882 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 883 sizeof(*cmd)); 884 cmd->vdev_id = cpu_to_le32(vdev_id); 885 886 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 887 888 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 889 if (ret) { 890 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 891 dev_kfree_skb(skb); 892 } 893 894 return ret; 895 } 896 897 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 898 { 899 struct ath12k_wmi_pdev *wmi = ar->wmi; 900 struct wmi_vdev_down_cmd *cmd; 901 struct sk_buff *skb; 902 int ret; 903 904 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 905 if (!skb) 906 return -ENOMEM; 907 908 cmd = (struct wmi_vdev_down_cmd *)skb->data; 909 910 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 911 sizeof(*cmd)); 912 cmd->vdev_id = cpu_to_le32(vdev_id); 913 914 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 915 916 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 917 if (ret) { 918 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 919 dev_kfree_skb(skb); 920 } 921 922 return ret; 923 } 924 925 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 926 struct wmi_vdev_start_req_arg *arg) 927 { 928 memset(chan, 0, sizeof(*chan)); 929 930 chan->mhz = cpu_to_le32(arg->freq); 931 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 932 if (arg->mode == MODE_11AC_VHT80_80) 933 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 934 else 935 chan->band_center_freq2 = 0; 936 937 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 938 if (arg->passive) 939 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 940 if (arg->allow_ibss) 941 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 942 if (arg->allow_ht) 943 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 944 if (arg->allow_vht) 945 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 946 if (arg->allow_he) 947 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 948 if (arg->ht40plus) 949 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 950 if (arg->chan_radar) 951 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 952 if (arg->freq2_radar) 953 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 954 955 chan->reg_info_1 = le32_encode_bits(arg->max_power, 956 WMI_CHAN_REG_INFO1_MAX_PWR) | 957 le32_encode_bits(arg->max_reg_power, 958 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 959 960 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 961 WMI_CHAN_REG_INFO2_ANT_MAX) | 962 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 963 } 964 965 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 966 bool restart) 967 { 968 struct ath12k_wmi_pdev *wmi = ar->wmi; 969 struct wmi_vdev_start_request_cmd *cmd; 970 struct sk_buff *skb; 971 struct ath12k_wmi_channel_params *chan; 972 struct wmi_tlv *tlv; 973 void *ptr; 974 int ret, len; 975 976 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 977 return -EINVAL; 978 979 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 980 981 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 982 if (!skb) 983 return -ENOMEM; 984 985 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 986 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 987 sizeof(*cmd)); 988 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 989 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 990 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 991 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 992 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 993 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 994 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 995 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 996 cmd->regdomain = cpu_to_le32(arg->regdomain); 997 cmd->he_ops = cpu_to_le32(arg->he_ops); 998 999 if (!restart) { 1000 if (arg->ssid) { 1001 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1002 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1003 } 1004 if (arg->hidden_ssid) 1005 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1006 if (arg->pmf_enabled) 1007 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1008 } 1009 1010 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1011 1012 ptr = skb->data + sizeof(*cmd); 1013 chan = ptr; 1014 1015 ath12k_wmi_put_wmi_channel(chan, arg); 1016 1017 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1018 sizeof(*chan)); 1019 ptr += sizeof(*chan); 1020 1021 tlv = ptr; 1022 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1023 1024 /* Note: This is a nested TLV containing: 1025 * [wmi_tlv][wmi_p2p_noa_descriptor][wmi_tlv].. 1026 */ 1027 1028 ptr += sizeof(*tlv); 1029 1030 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1031 restart ? "restart" : "start", arg->vdev_id, 1032 arg->freq, arg->mode); 1033 1034 if (restart) 1035 ret = ath12k_wmi_cmd_send(wmi, skb, 1036 WMI_VDEV_RESTART_REQUEST_CMDID); 1037 else 1038 ret = ath12k_wmi_cmd_send(wmi, skb, 1039 WMI_VDEV_START_REQUEST_CMDID); 1040 if (ret) { 1041 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1042 restart ? "restart" : "start"); 1043 dev_kfree_skb(skb); 1044 } 1045 1046 return ret; 1047 } 1048 1049 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, const u8 *bssid) 1050 { 1051 struct ath12k_wmi_pdev *wmi = ar->wmi; 1052 struct wmi_vdev_up_cmd *cmd; 1053 struct sk_buff *skb; 1054 int ret; 1055 1056 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1057 if (!skb) 1058 return -ENOMEM; 1059 1060 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1061 1062 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1063 sizeof(*cmd)); 1064 cmd->vdev_id = cpu_to_le32(vdev_id); 1065 cmd->vdev_assoc_id = cpu_to_le32(aid); 1066 1067 ether_addr_copy(cmd->vdev_bssid.addr, bssid); 1068 1069 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1070 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1071 vdev_id, aid, bssid); 1072 1073 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1074 if (ret) { 1075 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1076 dev_kfree_skb(skb); 1077 } 1078 1079 return ret; 1080 } 1081 1082 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1083 struct ath12k_wmi_peer_create_arg *arg) 1084 { 1085 struct ath12k_wmi_pdev *wmi = ar->wmi; 1086 struct wmi_peer_create_cmd *cmd; 1087 struct sk_buff *skb; 1088 int ret; 1089 1090 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1091 if (!skb) 1092 return -ENOMEM; 1093 1094 cmd = (struct wmi_peer_create_cmd *)skb->data; 1095 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1096 sizeof(*cmd)); 1097 1098 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1099 cmd->peer_type = cpu_to_le32(arg->peer_type); 1100 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1101 1102 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1103 "WMI peer create vdev_id %d peer_addr %pM\n", 1104 arg->vdev_id, arg->peer_addr); 1105 1106 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1107 if (ret) { 1108 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1109 dev_kfree_skb(skb); 1110 } 1111 1112 return ret; 1113 } 1114 1115 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1116 const u8 *peer_addr, u8 vdev_id) 1117 { 1118 struct ath12k_wmi_pdev *wmi = ar->wmi; 1119 struct wmi_peer_delete_cmd *cmd; 1120 struct sk_buff *skb; 1121 int ret; 1122 1123 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1124 if (!skb) 1125 return -ENOMEM; 1126 1127 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1128 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1129 sizeof(*cmd)); 1130 1131 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1132 cmd->vdev_id = cpu_to_le32(vdev_id); 1133 1134 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1135 "WMI peer delete vdev_id %d peer_addr %pM\n", 1136 vdev_id, peer_addr); 1137 1138 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1139 if (ret) { 1140 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1141 dev_kfree_skb(skb); 1142 } 1143 1144 return ret; 1145 } 1146 1147 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1148 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1149 { 1150 struct ath12k_wmi_pdev *wmi = ar->wmi; 1151 struct wmi_pdev_set_regdomain_cmd *cmd; 1152 struct sk_buff *skb; 1153 int ret; 1154 1155 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1156 if (!skb) 1157 return -ENOMEM; 1158 1159 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1160 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1161 sizeof(*cmd)); 1162 1163 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1164 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1165 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1166 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1167 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1168 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1169 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1170 1171 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1172 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1173 arg->current_rd_in_use, arg->current_rd_2g, 1174 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1175 1176 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1177 if (ret) { 1178 ath12k_warn(ar->ab, 1179 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1180 dev_kfree_skb(skb); 1181 } 1182 1183 return ret; 1184 } 1185 1186 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1187 u32 vdev_id, u32 param_id, u32 param_val) 1188 { 1189 struct ath12k_wmi_pdev *wmi = ar->wmi; 1190 struct wmi_peer_set_param_cmd *cmd; 1191 struct sk_buff *skb; 1192 int ret; 1193 1194 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1195 if (!skb) 1196 return -ENOMEM; 1197 1198 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1199 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1200 sizeof(*cmd)); 1201 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1202 cmd->vdev_id = cpu_to_le32(vdev_id); 1203 cmd->param_id = cpu_to_le32(param_id); 1204 cmd->param_value = cpu_to_le32(param_val); 1205 1206 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1207 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1208 vdev_id, peer_addr, param_id, param_val); 1209 1210 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1211 if (ret) { 1212 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1213 dev_kfree_skb(skb); 1214 } 1215 1216 return ret; 1217 } 1218 1219 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1220 u8 peer_addr[ETH_ALEN], 1221 u32 peer_tid_bitmap, 1222 u8 vdev_id) 1223 { 1224 struct ath12k_wmi_pdev *wmi = ar->wmi; 1225 struct wmi_peer_flush_tids_cmd *cmd; 1226 struct sk_buff *skb; 1227 int ret; 1228 1229 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1230 if (!skb) 1231 return -ENOMEM; 1232 1233 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1234 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1235 sizeof(*cmd)); 1236 1237 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1238 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1239 cmd->vdev_id = cpu_to_le32(vdev_id); 1240 1241 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1242 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1243 vdev_id, peer_addr, peer_tid_bitmap); 1244 1245 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1246 if (ret) { 1247 ath12k_warn(ar->ab, 1248 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1249 dev_kfree_skb(skb); 1250 } 1251 1252 return ret; 1253 } 1254 1255 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1256 int vdev_id, const u8 *addr, 1257 dma_addr_t paddr, u8 tid, 1258 u8 ba_window_size_valid, 1259 u32 ba_window_size) 1260 { 1261 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1262 struct sk_buff *skb; 1263 int ret; 1264 1265 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1266 if (!skb) 1267 return -ENOMEM; 1268 1269 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1270 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1271 sizeof(*cmd)); 1272 1273 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1274 cmd->vdev_id = cpu_to_le32(vdev_id); 1275 cmd->tid = cpu_to_le32(tid); 1276 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1277 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1278 cmd->queue_no = cpu_to_le32(tid); 1279 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1280 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1281 1282 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1283 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1284 addr, vdev_id, tid); 1285 1286 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1287 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1288 if (ret) { 1289 ath12k_warn(ar->ab, 1290 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1291 dev_kfree_skb(skb); 1292 } 1293 1294 return ret; 1295 } 1296 1297 int 1298 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1299 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1300 { 1301 struct ath12k_wmi_pdev *wmi = ar->wmi; 1302 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1303 struct sk_buff *skb; 1304 int ret; 1305 1306 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1307 if (!skb) 1308 return -ENOMEM; 1309 1310 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1311 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1312 sizeof(*cmd)); 1313 1314 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1315 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1316 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1317 1318 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1319 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1320 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1321 1322 ret = ath12k_wmi_cmd_send(wmi, skb, 1323 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1324 if (ret) { 1325 ath12k_warn(ar->ab, 1326 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1327 dev_kfree_skb(skb); 1328 } 1329 1330 return ret; 1331 } 1332 1333 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1334 u32 param_value, u8 pdev_id) 1335 { 1336 struct ath12k_wmi_pdev *wmi = ar->wmi; 1337 struct wmi_pdev_set_param_cmd *cmd; 1338 struct sk_buff *skb; 1339 int ret; 1340 1341 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1342 if (!skb) 1343 return -ENOMEM; 1344 1345 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1346 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1347 sizeof(*cmd)); 1348 cmd->pdev_id = cpu_to_le32(pdev_id); 1349 cmd->param_id = cpu_to_le32(param_id); 1350 cmd->param_value = cpu_to_le32(param_value); 1351 1352 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1353 "WMI pdev set param %d pdev id %d value %d\n", 1354 param_id, pdev_id, param_value); 1355 1356 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1357 if (ret) { 1358 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1359 dev_kfree_skb(skb); 1360 } 1361 1362 return ret; 1363 } 1364 1365 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1366 { 1367 struct ath12k_wmi_pdev *wmi = ar->wmi; 1368 struct wmi_pdev_set_ps_mode_cmd *cmd; 1369 struct sk_buff *skb; 1370 int ret; 1371 1372 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1373 if (!skb) 1374 return -ENOMEM; 1375 1376 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1377 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1378 sizeof(*cmd)); 1379 cmd->vdev_id = cpu_to_le32(vdev_id); 1380 cmd->sta_ps_mode = cpu_to_le32(enable); 1381 1382 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1383 "WMI vdev set psmode %d vdev id %d\n", 1384 enable, vdev_id); 1385 1386 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1387 if (ret) { 1388 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1389 dev_kfree_skb(skb); 1390 } 1391 1392 return ret; 1393 } 1394 1395 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1396 u32 pdev_id) 1397 { 1398 struct ath12k_wmi_pdev *wmi = ar->wmi; 1399 struct wmi_pdev_suspend_cmd *cmd; 1400 struct sk_buff *skb; 1401 int ret; 1402 1403 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1404 if (!skb) 1405 return -ENOMEM; 1406 1407 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1408 1409 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1410 sizeof(*cmd)); 1411 1412 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1413 cmd->pdev_id = cpu_to_le32(pdev_id); 1414 1415 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1416 "WMI pdev suspend pdev_id %d\n", pdev_id); 1417 1418 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1419 if (ret) { 1420 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1421 dev_kfree_skb(skb); 1422 } 1423 1424 return ret; 1425 } 1426 1427 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1428 { 1429 struct ath12k_wmi_pdev *wmi = ar->wmi; 1430 struct wmi_pdev_resume_cmd *cmd; 1431 struct sk_buff *skb; 1432 int ret; 1433 1434 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1435 if (!skb) 1436 return -ENOMEM; 1437 1438 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1439 1440 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1441 sizeof(*cmd)); 1442 cmd->pdev_id = cpu_to_le32(pdev_id); 1443 1444 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1445 "WMI pdev resume pdev id %d\n", pdev_id); 1446 1447 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1448 if (ret) { 1449 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1450 dev_kfree_skb(skb); 1451 } 1452 1453 return ret; 1454 } 1455 1456 /* TODO FW Support for the cmd is not available yet. 1457 * Can be tested once the command and corresponding 1458 * event is implemented in FW 1459 */ 1460 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1461 enum wmi_bss_chan_info_req_type type) 1462 { 1463 struct ath12k_wmi_pdev *wmi = ar->wmi; 1464 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1465 struct sk_buff *skb; 1466 int ret; 1467 1468 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1469 if (!skb) 1470 return -ENOMEM; 1471 1472 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1473 1474 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1475 sizeof(*cmd)); 1476 cmd->req_type = cpu_to_le32(type); 1477 1478 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1479 "WMI bss chan info req type %d\n", type); 1480 1481 ret = ath12k_wmi_cmd_send(wmi, skb, 1482 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1483 if (ret) { 1484 ath12k_warn(ar->ab, 1485 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1486 dev_kfree_skb(skb); 1487 } 1488 1489 return ret; 1490 } 1491 1492 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1493 struct ath12k_wmi_ap_ps_arg *arg) 1494 { 1495 struct ath12k_wmi_pdev *wmi = ar->wmi; 1496 struct wmi_ap_ps_peer_cmd *cmd; 1497 struct sk_buff *skb; 1498 int ret; 1499 1500 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1501 if (!skb) 1502 return -ENOMEM; 1503 1504 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1505 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1506 sizeof(*cmd)); 1507 1508 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1509 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1510 cmd->param = cpu_to_le32(arg->param); 1511 cmd->value = cpu_to_le32(arg->value); 1512 1513 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1514 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1515 arg->vdev_id, peer_addr, arg->param, arg->value); 1516 1517 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1518 if (ret) { 1519 ath12k_warn(ar->ab, 1520 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1521 dev_kfree_skb(skb); 1522 } 1523 1524 return ret; 1525 } 1526 1527 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1528 u32 param, u32 param_value) 1529 { 1530 struct ath12k_wmi_pdev *wmi = ar->wmi; 1531 struct wmi_sta_powersave_param_cmd *cmd; 1532 struct sk_buff *skb; 1533 int ret; 1534 1535 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1536 if (!skb) 1537 return -ENOMEM; 1538 1539 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1540 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1541 sizeof(*cmd)); 1542 1543 cmd->vdev_id = cpu_to_le32(vdev_id); 1544 cmd->param = cpu_to_le32(param); 1545 cmd->value = cpu_to_le32(param_value); 1546 1547 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1548 "WMI set sta ps vdev_id %d param %d value %d\n", 1549 vdev_id, param, param_value); 1550 1551 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1552 if (ret) { 1553 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1554 dev_kfree_skb(skb); 1555 } 1556 1557 return ret; 1558 } 1559 1560 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1561 { 1562 struct ath12k_wmi_pdev *wmi = ar->wmi; 1563 struct wmi_force_fw_hang_cmd *cmd; 1564 struct sk_buff *skb; 1565 int ret, len; 1566 1567 len = sizeof(*cmd); 1568 1569 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1570 if (!skb) 1571 return -ENOMEM; 1572 1573 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1574 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1575 len); 1576 1577 cmd->type = cpu_to_le32(type); 1578 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1579 1580 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1581 1582 if (ret) { 1583 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1584 dev_kfree_skb(skb); 1585 } 1586 return ret; 1587 } 1588 1589 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1590 u32 param_id, u32 param_value) 1591 { 1592 struct ath12k_wmi_pdev *wmi = ar->wmi; 1593 struct wmi_vdev_set_param_cmd *cmd; 1594 struct sk_buff *skb; 1595 int ret; 1596 1597 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1598 if (!skb) 1599 return -ENOMEM; 1600 1601 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1602 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1603 sizeof(*cmd)); 1604 1605 cmd->vdev_id = cpu_to_le32(vdev_id); 1606 cmd->param_id = cpu_to_le32(param_id); 1607 cmd->param_value = cpu_to_le32(param_value); 1608 1609 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1610 "WMI vdev id 0x%x set param %d value %d\n", 1611 vdev_id, param_id, param_value); 1612 1613 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1614 if (ret) { 1615 ath12k_warn(ar->ab, 1616 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1617 dev_kfree_skb(skb); 1618 } 1619 1620 return ret; 1621 } 1622 1623 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1624 { 1625 struct ath12k_wmi_pdev *wmi = ar->wmi; 1626 struct wmi_get_pdev_temperature_cmd *cmd; 1627 struct sk_buff *skb; 1628 int ret; 1629 1630 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1631 if (!skb) 1632 return -ENOMEM; 1633 1634 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1635 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1636 sizeof(*cmd)); 1637 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1638 1639 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1640 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1641 1642 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1643 if (ret) { 1644 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1645 dev_kfree_skb(skb); 1646 } 1647 1648 return ret; 1649 } 1650 1651 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1652 u32 vdev_id, u32 bcn_ctrl_op) 1653 { 1654 struct ath12k_wmi_pdev *wmi = ar->wmi; 1655 struct wmi_bcn_offload_ctrl_cmd *cmd; 1656 struct sk_buff *skb; 1657 int ret; 1658 1659 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1660 if (!skb) 1661 return -ENOMEM; 1662 1663 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1664 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1665 sizeof(*cmd)); 1666 1667 cmd->vdev_id = cpu_to_le32(vdev_id); 1668 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1669 1670 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1671 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1672 vdev_id, bcn_ctrl_op); 1673 1674 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1675 if (ret) { 1676 ath12k_warn(ar->ab, 1677 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1678 dev_kfree_skb(skb); 1679 } 1680 1681 return ret; 1682 } 1683 1684 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 1685 struct ieee80211_mutable_offsets *offs, 1686 struct sk_buff *bcn) 1687 { 1688 struct ath12k_wmi_pdev *wmi = ar->wmi; 1689 struct wmi_bcn_tmpl_cmd *cmd; 1690 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1691 struct wmi_tlv *tlv; 1692 struct sk_buff *skb; 1693 void *ptr; 1694 int ret, len; 1695 size_t aligned_len = roundup(bcn->len, 4); 1696 1697 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1698 1699 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1700 if (!skb) 1701 return -ENOMEM; 1702 1703 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1704 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1705 sizeof(*cmd)); 1706 cmd->vdev_id = cpu_to_le32(vdev_id); 1707 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1708 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]); 1709 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]); 1710 cmd->buf_len = cpu_to_le32(bcn->len); 1711 1712 ptr = skb->data + sizeof(*cmd); 1713 1714 bcn_prb_info = ptr; 1715 len = sizeof(*bcn_prb_info); 1716 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 1717 len); 1718 bcn_prb_info->caps = 0; 1719 bcn_prb_info->erp = 0; 1720 1721 ptr += sizeof(*bcn_prb_info); 1722 1723 tlv = ptr; 1724 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 1725 memcpy(tlv->value, bcn->data, bcn->len); 1726 1727 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 1728 if (ret) { 1729 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 1730 dev_kfree_skb(skb); 1731 } 1732 1733 return ret; 1734 } 1735 1736 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 1737 struct wmi_vdev_install_key_arg *arg) 1738 { 1739 struct ath12k_wmi_pdev *wmi = ar->wmi; 1740 struct wmi_vdev_install_key_cmd *cmd; 1741 struct wmi_tlv *tlv; 1742 struct sk_buff *skb; 1743 int ret, len, key_len_aligned; 1744 1745 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 1746 * length is specified in cmd->key_len. 1747 */ 1748 key_len_aligned = roundup(arg->key_len, 4); 1749 1750 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 1751 1752 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1753 if (!skb) 1754 return -ENOMEM; 1755 1756 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 1757 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 1758 sizeof(*cmd)); 1759 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1760 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 1761 cmd->key_idx = cpu_to_le32(arg->key_idx); 1762 cmd->key_flags = cpu_to_le32(arg->key_flags); 1763 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 1764 cmd->key_len = cpu_to_le32(arg->key_len); 1765 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 1766 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 1767 1768 if (arg->key_rsc_counter) 1769 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 1770 1771 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 1772 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 1773 memcpy(tlv->value, arg->key_data, arg->key_len); 1774 1775 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1776 "WMI vdev install key idx %d cipher %d len %d\n", 1777 arg->key_idx, arg->key_cipher, arg->key_len); 1778 1779 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 1780 if (ret) { 1781 ath12k_warn(ar->ab, 1782 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 1783 dev_kfree_skb(skb); 1784 } 1785 1786 return ret; 1787 } 1788 1789 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 1790 struct ath12k_wmi_peer_assoc_arg *arg, 1791 bool hw_crypto_disabled) 1792 { 1793 cmd->peer_flags = 0; 1794 1795 if (arg->is_wme_set) { 1796 if (arg->qos_flag) 1797 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 1798 if (arg->apsd_flag) 1799 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 1800 if (arg->ht_flag) 1801 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 1802 if (arg->bw_40) 1803 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 1804 if (arg->bw_80) 1805 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 1806 if (arg->bw_160) 1807 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 1808 1809 /* Typically if STBC is enabled for VHT it should be enabled 1810 * for HT as well 1811 **/ 1812 if (arg->stbc_flag) 1813 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 1814 1815 /* Typically if LDPC is enabled for VHT it should be enabled 1816 * for HT as well 1817 **/ 1818 if (arg->ldpc_flag) 1819 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 1820 1821 if (arg->static_mimops_flag) 1822 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 1823 if (arg->dynamic_mimops_flag) 1824 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 1825 if (arg->spatial_mux_flag) 1826 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 1827 if (arg->vht_flag) 1828 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 1829 if (arg->he_flag) 1830 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 1831 if (arg->twt_requester) 1832 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 1833 if (arg->twt_responder) 1834 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 1835 } 1836 1837 /* Suppress authorization for all AUTH modes that need 4-way handshake 1838 * (during re-association). 1839 * Authorization will be done for these modes on key installation. 1840 */ 1841 if (arg->auth_flag) 1842 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 1843 if (arg->need_ptk_4_way) { 1844 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 1845 if (!hw_crypto_disabled) 1846 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 1847 } 1848 if (arg->need_gtk_2_way) 1849 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 1850 /* safe mode bypass the 4-way handshake */ 1851 if (arg->safe_mode_enabled) 1852 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 1853 WMI_PEER_NEED_GTK_2_WAY)); 1854 1855 if (arg->is_pmf_enabled) 1856 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 1857 1858 /* Disable AMSDU for station transmit, if user configures it */ 1859 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 1860 * it 1861 * if (arg->amsdu_disable) Add after FW support 1862 **/ 1863 1864 /* Target asserts if node is marked HT and all MCS is set to 0. 1865 * Mark the node as non-HT if all the mcs rates are disabled through 1866 * iwpriv 1867 **/ 1868 if (arg->peer_ht_rates.num_rates == 0) 1869 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 1870 } 1871 1872 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 1873 struct ath12k_wmi_peer_assoc_arg *arg) 1874 { 1875 struct ath12k_wmi_pdev *wmi = ar->wmi; 1876 struct wmi_peer_assoc_complete_cmd *cmd; 1877 struct ath12k_wmi_vht_rate_set_params *mcs; 1878 struct ath12k_wmi_he_rate_set_params *he_mcs; 1879 struct sk_buff *skb; 1880 struct wmi_tlv *tlv; 1881 void *ptr; 1882 u32 peer_legacy_rates_align; 1883 u32 peer_ht_rates_align; 1884 int i, ret, len; 1885 1886 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 1887 sizeof(u32)); 1888 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 1889 sizeof(u32)); 1890 1891 len = sizeof(*cmd) + 1892 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 1893 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 1894 sizeof(*mcs) + TLV_HDR_SIZE + 1895 (sizeof(*he_mcs) * arg->peer_he_mcs_count); 1896 1897 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1898 if (!skb) 1899 return -ENOMEM; 1900 1901 ptr = skb->data; 1902 1903 cmd = ptr; 1904 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1905 sizeof(*cmd)); 1906 1907 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1908 1909 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 1910 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 1911 1912 ath12k_wmi_copy_peer_flags(cmd, arg, 1913 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 1914 &ar->ab->dev_flags)); 1915 1916 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 1917 1918 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 1919 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 1920 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 1921 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 1922 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 1923 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 1924 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 1925 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 1926 1927 /* Update 11ax capabilities */ 1928 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 1929 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 1930 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 1931 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 1932 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 1933 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 1934 cmd->peer_he_cap_phy[i] = 1935 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 1936 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 1937 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 1938 for (i = 0; i < WMI_MAX_NUM_SS; i++) 1939 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 1940 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 1941 1942 /* Update peer legacy rate information */ 1943 ptr += sizeof(*cmd); 1944 1945 tlv = ptr; 1946 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 1947 1948 ptr += TLV_HDR_SIZE; 1949 1950 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 1951 memcpy(ptr, arg->peer_legacy_rates.rates, 1952 arg->peer_legacy_rates.num_rates); 1953 1954 /* Update peer HT rate information */ 1955 ptr += peer_legacy_rates_align; 1956 1957 tlv = ptr; 1958 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 1959 ptr += TLV_HDR_SIZE; 1960 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 1961 memcpy(ptr, arg->peer_ht_rates.rates, 1962 arg->peer_ht_rates.num_rates); 1963 1964 /* VHT Rates */ 1965 ptr += peer_ht_rates_align; 1966 1967 mcs = ptr; 1968 1969 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 1970 sizeof(*mcs)); 1971 1972 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 1973 1974 /* Update bandwidth-NSS mapping */ 1975 cmd->peer_bw_rxnss_override = 0; 1976 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 1977 1978 if (arg->vht_capable) { 1979 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 1980 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 1981 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 1982 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 1983 } 1984 1985 /* HE Rates */ 1986 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 1987 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 1988 1989 ptr += sizeof(*mcs); 1990 1991 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 1992 1993 tlv = ptr; 1994 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 1995 ptr += TLV_HDR_SIZE; 1996 1997 /* Loop through the HE rate set */ 1998 for (i = 0; i < arg->peer_he_mcs_count; i++) { 1999 he_mcs = ptr; 2000 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2001 sizeof(*he_mcs)); 2002 2003 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2004 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2005 ptr += sizeof(*he_mcs); 2006 } 2007 2008 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2009 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x\n", 2010 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2011 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2012 cmd->peer_listen_intval, cmd->peer_ht_caps, 2013 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2014 cmd->peer_mpdu_density, 2015 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2016 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2017 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2018 cmd->peer_he_cap_phy[2], 2019 cmd->peer_bw_rxnss_override); 2020 2021 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2022 if (ret) { 2023 ath12k_warn(ar->ab, 2024 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2025 dev_kfree_skb(skb); 2026 } 2027 2028 return ret; 2029 } 2030 2031 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2032 struct ath12k_wmi_scan_req_arg *arg) 2033 { 2034 /* setup commonly used values */ 2035 arg->scan_req_id = 1; 2036 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2037 arg->dwell_time_active = 50; 2038 arg->dwell_time_active_2g = 0; 2039 arg->dwell_time_passive = 150; 2040 arg->dwell_time_active_6g = 40; 2041 arg->dwell_time_passive_6g = 30; 2042 arg->min_rest_time = 50; 2043 arg->max_rest_time = 500; 2044 arg->repeat_probe_time = 0; 2045 arg->probe_spacing_time = 0; 2046 arg->idle_time = 0; 2047 arg->max_scan_time = 20000; 2048 arg->probe_delay = 5; 2049 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2050 WMI_SCAN_EVENT_COMPLETED | 2051 WMI_SCAN_EVENT_BSS_CHANNEL | 2052 WMI_SCAN_EVENT_FOREIGN_CHAN | 2053 WMI_SCAN_EVENT_DEQUEUED; 2054 arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT; 2055 arg->num_bssid = 1; 2056 2057 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2058 * ZEROs in probe request 2059 */ 2060 eth_broadcast_addr(arg->bssid_list[0].addr); 2061 } 2062 2063 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2064 struct ath12k_wmi_scan_req_arg *arg) 2065 { 2066 /* Scan events subscription */ 2067 if (arg->scan_ev_started) 2068 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2069 if (arg->scan_ev_completed) 2070 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2071 if (arg->scan_ev_bss_chan) 2072 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2073 if (arg->scan_ev_foreign_chan) 2074 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2075 if (arg->scan_ev_dequeued) 2076 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2077 if (arg->scan_ev_preempted) 2078 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2079 if (arg->scan_ev_start_failed) 2080 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2081 if (arg->scan_ev_restarted) 2082 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2083 if (arg->scan_ev_foreign_chn_exit) 2084 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2085 if (arg->scan_ev_suspended) 2086 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2087 if (arg->scan_ev_resumed) 2088 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2089 2090 /** Set scan control flags */ 2091 cmd->scan_ctrl_flags = 0; 2092 if (arg->scan_f_passive) 2093 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2094 if (arg->scan_f_strict_passive_pch) 2095 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2096 if (arg->scan_f_promisc_mode) 2097 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2098 if (arg->scan_f_capture_phy_err) 2099 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2100 if (arg->scan_f_half_rate) 2101 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2102 if (arg->scan_f_quarter_rate) 2103 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2104 if (arg->scan_f_cck_rates) 2105 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2106 if (arg->scan_f_ofdm_rates) 2107 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2108 if (arg->scan_f_chan_stat_evnt) 2109 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2110 if (arg->scan_f_filter_prb_req) 2111 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2112 if (arg->scan_f_bcast_probe) 2113 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2114 if (arg->scan_f_offchan_mgmt_tx) 2115 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2116 if (arg->scan_f_offchan_data_tx) 2117 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2118 if (arg->scan_f_force_active_dfs_chn) 2119 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2120 if (arg->scan_f_add_tpc_ie_in_probe) 2121 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2122 if (arg->scan_f_add_ds_ie_in_probe) 2123 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2124 if (arg->scan_f_add_spoofed_mac_in_probe) 2125 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2126 if (arg->scan_f_add_rand_seq_in_probe) 2127 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2128 if (arg->scan_f_en_ie_whitelist_in_probe) 2129 cmd->scan_ctrl_flags |= 2130 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2131 2132 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2133 WMI_SCAN_DWELL_MODE_MASK); 2134 } 2135 2136 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2137 struct ath12k_wmi_scan_req_arg *arg) 2138 { 2139 struct ath12k_wmi_pdev *wmi = ar->wmi; 2140 struct wmi_start_scan_cmd *cmd; 2141 struct ath12k_wmi_ssid_params *ssid = NULL; 2142 struct ath12k_wmi_mac_addr_params *bssid; 2143 struct sk_buff *skb; 2144 struct wmi_tlv *tlv; 2145 void *ptr; 2146 int i, ret, len; 2147 u32 *tmp_ptr; 2148 u8 extraie_len_with_pad = 0; 2149 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2150 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2151 2152 len = sizeof(*cmd); 2153 2154 len += TLV_HDR_SIZE; 2155 if (arg->num_chan) 2156 len += arg->num_chan * sizeof(u32); 2157 2158 len += TLV_HDR_SIZE; 2159 if (arg->num_ssids) 2160 len += arg->num_ssids * sizeof(*ssid); 2161 2162 len += TLV_HDR_SIZE; 2163 if (arg->num_bssid) 2164 len += sizeof(*bssid) * arg->num_bssid; 2165 2166 len += TLV_HDR_SIZE; 2167 if (arg->extraie.len) 2168 extraie_len_with_pad = 2169 roundup(arg->extraie.len, sizeof(u32)); 2170 len += extraie_len_with_pad; 2171 2172 if (arg->num_hint_bssid) 2173 len += TLV_HDR_SIZE + 2174 arg->num_hint_bssid * sizeof(*hint_bssid); 2175 2176 if (arg->num_hint_s_ssid) 2177 len += TLV_HDR_SIZE + 2178 arg->num_hint_s_ssid * sizeof(*s_ssid); 2179 2180 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2181 if (!skb) 2182 return -ENOMEM; 2183 2184 ptr = skb->data; 2185 2186 cmd = ptr; 2187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2188 sizeof(*cmd)); 2189 2190 cmd->scan_id = cpu_to_le32(arg->scan_id); 2191 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2192 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2193 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2194 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2195 2196 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2197 2198 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2199 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2200 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2201 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2202 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2203 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2204 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2205 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2206 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2207 cmd->idle_time = cpu_to_le32(arg->idle_time); 2208 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2209 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2210 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2211 cmd->num_chan = cpu_to_le32(arg->num_chan); 2212 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2213 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2214 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2215 cmd->n_probes = cpu_to_le32(arg->n_probes); 2216 2217 ptr += sizeof(*cmd); 2218 2219 len = arg->num_chan * sizeof(u32); 2220 2221 tlv = ptr; 2222 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2223 ptr += TLV_HDR_SIZE; 2224 tmp_ptr = (u32 *)ptr; 2225 2226 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2227 2228 ptr += len; 2229 2230 len = arg->num_ssids * sizeof(*ssid); 2231 tlv = ptr; 2232 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2233 2234 ptr += TLV_HDR_SIZE; 2235 2236 if (arg->num_ssids) { 2237 ssid = ptr; 2238 for (i = 0; i < arg->num_ssids; ++i) { 2239 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2240 memcpy(ssid->ssid, arg->ssid[i].ssid, 2241 arg->ssid[i].ssid_len); 2242 ssid++; 2243 } 2244 } 2245 2246 ptr += (arg->num_ssids * sizeof(*ssid)); 2247 len = arg->num_bssid * sizeof(*bssid); 2248 tlv = ptr; 2249 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2250 2251 ptr += TLV_HDR_SIZE; 2252 bssid = ptr; 2253 2254 if (arg->num_bssid) { 2255 for (i = 0; i < arg->num_bssid; ++i) { 2256 ether_addr_copy(bssid->addr, 2257 arg->bssid_list[i].addr); 2258 bssid++; 2259 } 2260 } 2261 2262 ptr += arg->num_bssid * sizeof(*bssid); 2263 2264 len = extraie_len_with_pad; 2265 tlv = ptr; 2266 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2267 ptr += TLV_HDR_SIZE; 2268 2269 if (arg->extraie.len) 2270 memcpy(ptr, arg->extraie.ptr, 2271 arg->extraie.len); 2272 2273 ptr += extraie_len_with_pad; 2274 2275 if (arg->num_hint_s_ssid) { 2276 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2277 tlv = ptr; 2278 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2279 ptr += TLV_HDR_SIZE; 2280 s_ssid = ptr; 2281 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2282 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2283 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2284 s_ssid++; 2285 } 2286 ptr += len; 2287 } 2288 2289 if (arg->num_hint_bssid) { 2290 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2291 tlv = ptr; 2292 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2293 ptr += TLV_HDR_SIZE; 2294 hint_bssid = ptr; 2295 for (i = 0; i < arg->num_hint_bssid; ++i) { 2296 hint_bssid->freq_flags = 2297 arg->hint_bssid[i].freq_flags; 2298 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2299 &hint_bssid->bssid.addr[0]); 2300 hint_bssid++; 2301 } 2302 } 2303 2304 ret = ath12k_wmi_cmd_send(wmi, skb, 2305 WMI_START_SCAN_CMDID); 2306 if (ret) { 2307 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2308 dev_kfree_skb(skb); 2309 } 2310 2311 return ret; 2312 } 2313 2314 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2315 struct ath12k_wmi_scan_cancel_arg *arg) 2316 { 2317 struct ath12k_wmi_pdev *wmi = ar->wmi; 2318 struct wmi_stop_scan_cmd *cmd; 2319 struct sk_buff *skb; 2320 int ret; 2321 2322 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2323 if (!skb) 2324 return -ENOMEM; 2325 2326 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2327 2328 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2329 sizeof(*cmd)); 2330 2331 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2332 cmd->requestor = cpu_to_le32(arg->requester); 2333 cmd->scan_id = cpu_to_le32(arg->scan_id); 2334 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2335 /* stop the scan with the corresponding scan_id */ 2336 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2337 /* Cancelling all scans */ 2338 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2339 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2340 /* Cancelling VAP scans */ 2341 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2342 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2343 /* Cancelling specific scan */ 2344 cmd->req_type = WMI_SCAN_STOP_ONE; 2345 } else { 2346 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2347 arg->req_type); 2348 dev_kfree_skb(skb); 2349 return -EINVAL; 2350 } 2351 2352 ret = ath12k_wmi_cmd_send(wmi, skb, 2353 WMI_STOP_SCAN_CMDID); 2354 if (ret) { 2355 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2356 dev_kfree_skb(skb); 2357 } 2358 2359 return ret; 2360 } 2361 2362 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2363 struct ath12k_wmi_scan_chan_list_arg *arg) 2364 { 2365 struct ath12k_wmi_pdev *wmi = ar->wmi; 2366 struct wmi_scan_chan_list_cmd *cmd; 2367 struct sk_buff *skb; 2368 struct ath12k_wmi_channel_params *chan_info; 2369 struct ath12k_wmi_channel_arg *channel_arg; 2370 struct wmi_tlv *tlv; 2371 void *ptr; 2372 int i, ret, len; 2373 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2374 __le32 *reg1, *reg2; 2375 2376 channel_arg = &arg->channel[0]; 2377 while (arg->nallchans) { 2378 len = sizeof(*cmd) + TLV_HDR_SIZE; 2379 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2380 sizeof(*chan_info); 2381 2382 num_send_chans = min(arg->nallchans, max_chan_limit); 2383 2384 arg->nallchans -= num_send_chans; 2385 len += sizeof(*chan_info) * num_send_chans; 2386 2387 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2388 if (!skb) 2389 return -ENOMEM; 2390 2391 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2392 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2393 sizeof(*cmd)); 2394 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2395 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2396 if (num_sends) 2397 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2398 2399 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2400 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2401 num_send_chans, len, cmd->pdev_id, num_sends); 2402 2403 ptr = skb->data + sizeof(*cmd); 2404 2405 len = sizeof(*chan_info) * num_send_chans; 2406 tlv = ptr; 2407 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2408 len); 2409 ptr += TLV_HDR_SIZE; 2410 2411 for (i = 0; i < num_send_chans; ++i) { 2412 chan_info = ptr; 2413 memset(chan_info, 0, sizeof(*chan_info)); 2414 len = sizeof(*chan_info); 2415 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2416 len); 2417 2418 reg1 = &chan_info->reg_info_1; 2419 reg2 = &chan_info->reg_info_2; 2420 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2421 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2422 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2423 2424 if (channel_arg->is_chan_passive) 2425 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2426 if (channel_arg->allow_he) 2427 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2428 else if (channel_arg->allow_vht) 2429 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2430 else if (channel_arg->allow_ht) 2431 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2432 if (channel_arg->half_rate) 2433 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2434 if (channel_arg->quarter_rate) 2435 chan_info->info |= 2436 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2437 2438 if (channel_arg->psc_channel) 2439 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2440 2441 if (channel_arg->dfs_set) 2442 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2443 2444 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2445 WMI_CHAN_INFO_MODE); 2446 *reg1 |= le32_encode_bits(channel_arg->minpower, 2447 WMI_CHAN_REG_INFO1_MIN_PWR); 2448 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2449 WMI_CHAN_REG_INFO1_MAX_PWR); 2450 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2451 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2452 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2453 WMI_CHAN_REG_INFO1_REG_CLS); 2454 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2455 WMI_CHAN_REG_INFO2_ANT_MAX); 2456 2457 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2458 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2459 i, chan_info->mhz, chan_info->info); 2460 2461 ptr += sizeof(*chan_info); 2462 2463 channel_arg++; 2464 } 2465 2466 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2467 if (ret) { 2468 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2469 dev_kfree_skb(skb); 2470 return ret; 2471 } 2472 2473 num_sends++; 2474 } 2475 2476 return 0; 2477 } 2478 2479 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2480 struct wmi_wmm_params_all_arg *param) 2481 { 2482 struct ath12k_wmi_pdev *wmi = ar->wmi; 2483 struct wmi_vdev_set_wmm_params_cmd *cmd; 2484 struct wmi_wmm_params *wmm_param; 2485 struct wmi_wmm_params_arg *wmi_wmm_arg; 2486 struct sk_buff *skb; 2487 int ret, ac; 2488 2489 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2490 if (!skb) 2491 return -ENOMEM; 2492 2493 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2494 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2495 sizeof(*cmd)); 2496 2497 cmd->vdev_id = cpu_to_le32(vdev_id); 2498 cmd->wmm_param_type = 0; 2499 2500 for (ac = 0; ac < WME_NUM_AC; ac++) { 2501 switch (ac) { 2502 case WME_AC_BE: 2503 wmi_wmm_arg = ¶m->ac_be; 2504 break; 2505 case WME_AC_BK: 2506 wmi_wmm_arg = ¶m->ac_bk; 2507 break; 2508 case WME_AC_VI: 2509 wmi_wmm_arg = ¶m->ac_vi; 2510 break; 2511 case WME_AC_VO: 2512 wmi_wmm_arg = ¶m->ac_vo; 2513 break; 2514 } 2515 2516 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2517 wmm_param->tlv_header = 2518 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2519 sizeof(*wmm_param)); 2520 2521 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2522 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2523 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2524 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2525 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2526 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2527 2528 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2529 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2530 ac, wmm_param->aifs, wmm_param->cwmin, 2531 wmm_param->cwmax, wmm_param->txoplimit, 2532 wmm_param->acm, wmm_param->no_ack); 2533 } 2534 ret = ath12k_wmi_cmd_send(wmi, skb, 2535 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2536 if (ret) { 2537 ath12k_warn(ar->ab, 2538 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2539 dev_kfree_skb(skb); 2540 } 2541 2542 return ret; 2543 } 2544 2545 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 2546 u32 pdev_id) 2547 { 2548 struct ath12k_wmi_pdev *wmi = ar->wmi; 2549 struct wmi_dfs_phyerr_offload_cmd *cmd; 2550 struct sk_buff *skb; 2551 int ret; 2552 2553 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2554 if (!skb) 2555 return -ENOMEM; 2556 2557 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 2558 cmd->tlv_header = 2559 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 2560 sizeof(*cmd)); 2561 2562 cmd->pdev_id = cpu_to_le32(pdev_id); 2563 2564 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2565 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 2566 2567 ret = ath12k_wmi_cmd_send(wmi, skb, 2568 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 2569 if (ret) { 2570 ath12k_warn(ar->ab, 2571 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 2572 dev_kfree_skb(skb); 2573 } 2574 2575 return ret; 2576 } 2577 2578 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2579 u32 tid, u32 initiator, u32 reason) 2580 { 2581 struct ath12k_wmi_pdev *wmi = ar->wmi; 2582 struct wmi_delba_send_cmd *cmd; 2583 struct sk_buff *skb; 2584 int ret; 2585 2586 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2587 if (!skb) 2588 return -ENOMEM; 2589 2590 cmd = (struct wmi_delba_send_cmd *)skb->data; 2591 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 2592 sizeof(*cmd)); 2593 cmd->vdev_id = cpu_to_le32(vdev_id); 2594 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2595 cmd->tid = cpu_to_le32(tid); 2596 cmd->initiator = cpu_to_le32(initiator); 2597 cmd->reasoncode = cpu_to_le32(reason); 2598 2599 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2600 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 2601 vdev_id, mac, tid, initiator, reason); 2602 2603 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 2604 2605 if (ret) { 2606 ath12k_warn(ar->ab, 2607 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 2608 dev_kfree_skb(skb); 2609 } 2610 2611 return ret; 2612 } 2613 2614 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2615 u32 tid, u32 status) 2616 { 2617 struct ath12k_wmi_pdev *wmi = ar->wmi; 2618 struct wmi_addba_setresponse_cmd *cmd; 2619 struct sk_buff *skb; 2620 int ret; 2621 2622 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2623 if (!skb) 2624 return -ENOMEM; 2625 2626 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 2627 cmd->tlv_header = 2628 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 2629 sizeof(*cmd)); 2630 cmd->vdev_id = cpu_to_le32(vdev_id); 2631 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2632 cmd->tid = cpu_to_le32(tid); 2633 cmd->statuscode = cpu_to_le32(status); 2634 2635 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2636 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 2637 vdev_id, mac, tid, status); 2638 2639 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 2640 2641 if (ret) { 2642 ath12k_warn(ar->ab, 2643 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 2644 dev_kfree_skb(skb); 2645 } 2646 2647 return ret; 2648 } 2649 2650 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2651 u32 tid, u32 buf_size) 2652 { 2653 struct ath12k_wmi_pdev *wmi = ar->wmi; 2654 struct wmi_addba_send_cmd *cmd; 2655 struct sk_buff *skb; 2656 int ret; 2657 2658 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2659 if (!skb) 2660 return -ENOMEM; 2661 2662 cmd = (struct wmi_addba_send_cmd *)skb->data; 2663 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 2664 sizeof(*cmd)); 2665 cmd->vdev_id = cpu_to_le32(vdev_id); 2666 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2667 cmd->tid = cpu_to_le32(tid); 2668 cmd->buffersize = cpu_to_le32(buf_size); 2669 2670 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2671 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 2672 vdev_id, mac, tid, buf_size); 2673 2674 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 2675 2676 if (ret) { 2677 ath12k_warn(ar->ab, 2678 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 2679 dev_kfree_skb(skb); 2680 } 2681 2682 return ret; 2683 } 2684 2685 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 2686 { 2687 struct ath12k_wmi_pdev *wmi = ar->wmi; 2688 struct wmi_addba_clear_resp_cmd *cmd; 2689 struct sk_buff *skb; 2690 int ret; 2691 2692 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2693 if (!skb) 2694 return -ENOMEM; 2695 2696 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 2697 cmd->tlv_header = 2698 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 2699 sizeof(*cmd)); 2700 cmd->vdev_id = cpu_to_le32(vdev_id); 2701 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2702 2703 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2704 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 2705 vdev_id, mac); 2706 2707 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 2708 2709 if (ret) { 2710 ath12k_warn(ar->ab, 2711 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 2712 dev_kfree_skb(skb); 2713 } 2714 2715 return ret; 2716 } 2717 2718 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 2719 struct ath12k_wmi_init_country_arg *arg) 2720 { 2721 struct ath12k_wmi_pdev *wmi = ar->wmi; 2722 struct wmi_init_country_cmd *cmd; 2723 struct sk_buff *skb; 2724 int ret; 2725 2726 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2727 if (!skb) 2728 return -ENOMEM; 2729 2730 cmd = (struct wmi_init_country_cmd *)skb->data; 2731 cmd->tlv_header = 2732 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 2733 sizeof(*cmd)); 2734 2735 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 2736 2737 switch (arg->flags) { 2738 case ALPHA_IS_SET: 2739 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 2740 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 2741 break; 2742 case CC_IS_SET: 2743 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 2744 cmd->cc_info.country_code = 2745 cpu_to_le32(arg->cc_info.country_code); 2746 break; 2747 case REGDMN_IS_SET: 2748 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 2749 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 2750 break; 2751 default: 2752 ret = -EINVAL; 2753 goto out; 2754 } 2755 2756 ret = ath12k_wmi_cmd_send(wmi, skb, 2757 WMI_SET_INIT_COUNTRY_CMDID); 2758 2759 out: 2760 if (ret) { 2761 ath12k_warn(ar->ab, 2762 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 2763 ret); 2764 dev_kfree_skb(skb); 2765 } 2766 2767 return ret; 2768 } 2769 2770 int 2771 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 2772 { 2773 struct ath12k_wmi_pdev *wmi = ar->wmi; 2774 struct ath12k_base *ab = wmi->wmi_ab->ab; 2775 struct wmi_twt_enable_params_cmd *cmd; 2776 struct sk_buff *skb; 2777 int ret, len; 2778 2779 len = sizeof(*cmd); 2780 2781 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2782 if (!skb) 2783 return -ENOMEM; 2784 2785 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 2786 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 2787 len); 2788 cmd->pdev_id = cpu_to_le32(pdev_id); 2789 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 2790 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 2791 cmd->congestion_thresh_setup = 2792 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 2793 cmd->congestion_thresh_teardown = 2794 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 2795 cmd->congestion_thresh_critical = 2796 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 2797 cmd->interference_thresh_teardown = 2798 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 2799 cmd->interference_thresh_setup = 2800 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 2801 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 2802 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 2803 cmd->no_of_bcast_mcast_slots = 2804 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 2805 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 2806 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 2807 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 2808 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 2809 cmd->remove_sta_slot_interval = 2810 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 2811 /* TODO add MBSSID support */ 2812 cmd->mbss_support = 0; 2813 2814 ret = ath12k_wmi_cmd_send(wmi, skb, 2815 WMI_TWT_ENABLE_CMDID); 2816 if (ret) { 2817 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 2818 dev_kfree_skb(skb); 2819 } 2820 return ret; 2821 } 2822 2823 int 2824 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 2825 { 2826 struct ath12k_wmi_pdev *wmi = ar->wmi; 2827 struct ath12k_base *ab = wmi->wmi_ab->ab; 2828 struct wmi_twt_disable_params_cmd *cmd; 2829 struct sk_buff *skb; 2830 int ret, len; 2831 2832 len = sizeof(*cmd); 2833 2834 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2835 if (!skb) 2836 return -ENOMEM; 2837 2838 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 2839 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 2840 len); 2841 cmd->pdev_id = cpu_to_le32(pdev_id); 2842 2843 ret = ath12k_wmi_cmd_send(wmi, skb, 2844 WMI_TWT_DISABLE_CMDID); 2845 if (ret) { 2846 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 2847 dev_kfree_skb(skb); 2848 } 2849 return ret; 2850 } 2851 2852 int 2853 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 2854 struct ieee80211_he_obss_pd *he_obss_pd) 2855 { 2856 struct ath12k_wmi_pdev *wmi = ar->wmi; 2857 struct ath12k_base *ab = wmi->wmi_ab->ab; 2858 struct wmi_obss_spatial_reuse_params_cmd *cmd; 2859 struct sk_buff *skb; 2860 int ret, len; 2861 2862 len = sizeof(*cmd); 2863 2864 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2865 if (!skb) 2866 return -ENOMEM; 2867 2868 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 2869 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 2870 len); 2871 cmd->vdev_id = cpu_to_le32(vdev_id); 2872 cmd->enable = cpu_to_le32(he_obss_pd->enable); 2873 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 2874 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 2875 2876 ret = ath12k_wmi_cmd_send(wmi, skb, 2877 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 2878 if (ret) { 2879 ath12k_warn(ab, 2880 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 2881 dev_kfree_skb(skb); 2882 } 2883 return ret; 2884 } 2885 2886 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 2887 u8 bss_color, u32 period, 2888 bool enable) 2889 { 2890 struct ath12k_wmi_pdev *wmi = ar->wmi; 2891 struct ath12k_base *ab = wmi->wmi_ab->ab; 2892 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 2893 struct sk_buff *skb; 2894 int ret, len; 2895 2896 len = sizeof(*cmd); 2897 2898 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2899 if (!skb) 2900 return -ENOMEM; 2901 2902 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 2903 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 2904 len); 2905 cmd->vdev_id = cpu_to_le32(vdev_id); 2906 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 2907 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 2908 cmd->current_bss_color = cpu_to_le32(bss_color); 2909 cmd->detection_period_ms = cpu_to_le32(period); 2910 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 2911 cmd->free_slot_expiry_time_ms = 0; 2912 cmd->flags = 0; 2913 2914 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2915 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 2916 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 2917 cmd->detection_period_ms, cmd->scan_period_ms); 2918 2919 ret = ath12k_wmi_cmd_send(wmi, skb, 2920 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 2921 if (ret) { 2922 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 2923 dev_kfree_skb(skb); 2924 } 2925 return ret; 2926 } 2927 2928 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 2929 bool enable) 2930 { 2931 struct ath12k_wmi_pdev *wmi = ar->wmi; 2932 struct ath12k_base *ab = wmi->wmi_ab->ab; 2933 struct wmi_bss_color_change_enable_params_cmd *cmd; 2934 struct sk_buff *skb; 2935 int ret, len; 2936 2937 len = sizeof(*cmd); 2938 2939 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2940 if (!skb) 2941 return -ENOMEM; 2942 2943 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 2944 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 2945 len); 2946 cmd->vdev_id = cpu_to_le32(vdev_id); 2947 cmd->enable = enable ? cpu_to_le32(1) : 0; 2948 2949 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2950 "wmi_send_bss_color_change_enable id %d enable %d\n", 2951 cmd->vdev_id, cmd->enable); 2952 2953 ret = ath12k_wmi_cmd_send(wmi, skb, 2954 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 2955 if (ret) { 2956 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 2957 dev_kfree_skb(skb); 2958 } 2959 return ret; 2960 } 2961 2962 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 2963 struct sk_buff *tmpl) 2964 { 2965 struct wmi_tlv *tlv; 2966 struct sk_buff *skb; 2967 void *ptr; 2968 int ret, len; 2969 size_t aligned_len; 2970 struct wmi_fils_discovery_tmpl_cmd *cmd; 2971 2972 aligned_len = roundup(tmpl->len, 4); 2973 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 2974 2975 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2976 "WMI vdev %i set FILS discovery template\n", vdev_id); 2977 2978 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 2979 if (!skb) 2980 return -ENOMEM; 2981 2982 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 2983 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 2984 sizeof(*cmd)); 2985 cmd->vdev_id = cpu_to_le32(vdev_id); 2986 cmd->buf_len = cpu_to_le32(tmpl->len); 2987 ptr = skb->data + sizeof(*cmd); 2988 2989 tlv = ptr; 2990 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 2991 memcpy(tlv->value, tmpl->data, tmpl->len); 2992 2993 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 2994 if (ret) { 2995 ath12k_warn(ar->ab, 2996 "WMI vdev %i failed to send FILS discovery template command\n", 2997 vdev_id); 2998 dev_kfree_skb(skb); 2999 } 3000 return ret; 3001 } 3002 3003 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3004 struct sk_buff *tmpl) 3005 { 3006 struct wmi_probe_tmpl_cmd *cmd; 3007 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3008 struct wmi_tlv *tlv; 3009 struct sk_buff *skb; 3010 void *ptr; 3011 int ret, len; 3012 size_t aligned_len = roundup(tmpl->len, 4); 3013 3014 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3015 "WMI vdev %i set probe response template\n", vdev_id); 3016 3017 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3018 3019 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3020 if (!skb) 3021 return -ENOMEM; 3022 3023 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3024 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3025 sizeof(*cmd)); 3026 cmd->vdev_id = cpu_to_le32(vdev_id); 3027 cmd->buf_len = cpu_to_le32(tmpl->len); 3028 3029 ptr = skb->data + sizeof(*cmd); 3030 3031 probe_info = ptr; 3032 len = sizeof(*probe_info); 3033 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3034 len); 3035 probe_info->caps = 0; 3036 probe_info->erp = 0; 3037 3038 ptr += sizeof(*probe_info); 3039 3040 tlv = ptr; 3041 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3042 memcpy(tlv->value, tmpl->data, tmpl->len); 3043 3044 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3045 if (ret) { 3046 ath12k_warn(ar->ab, 3047 "WMI vdev %i failed to send probe response template command\n", 3048 vdev_id); 3049 dev_kfree_skb(skb); 3050 } 3051 return ret; 3052 } 3053 3054 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3055 bool unsol_bcast_probe_resp_enabled) 3056 { 3057 struct sk_buff *skb; 3058 int ret, len; 3059 struct wmi_fils_discovery_cmd *cmd; 3060 3061 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3062 "WMI vdev %i set %s interval to %u TU\n", 3063 vdev_id, unsol_bcast_probe_resp_enabled ? 3064 "unsolicited broadcast probe response" : "FILS discovery", 3065 interval); 3066 3067 len = sizeof(*cmd); 3068 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3069 if (!skb) 3070 return -ENOMEM; 3071 3072 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3073 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3074 len); 3075 cmd->vdev_id = cpu_to_le32(vdev_id); 3076 cmd->interval = cpu_to_le32(interval); 3077 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3078 3079 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3080 if (ret) { 3081 ath12k_warn(ar->ab, 3082 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3083 vdev_id); 3084 dev_kfree_skb(skb); 3085 } 3086 return ret; 3087 } 3088 3089 static void 3090 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3091 struct ath12k_wmi_pdev_band_arg *arg) 3092 { 3093 u8 i; 3094 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3095 struct ath12k_pdev *pdev; 3096 3097 for (i = 0; i < soc->num_radios; i++) { 3098 pdev = &soc->pdevs[i]; 3099 hal_reg_cap = &soc->hal_reg_cap[i]; 3100 arg[i].pdev_id = pdev->pdev_id; 3101 3102 switch (pdev->cap.supported_bands) { 3103 case WMI_HOST_WLAN_2G_5G_CAP: 3104 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3105 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3106 break; 3107 case WMI_HOST_WLAN_2G_CAP: 3108 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3109 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3110 break; 3111 case WMI_HOST_WLAN_5G_CAP: 3112 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3113 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3114 break; 3115 default: 3116 break; 3117 } 3118 } 3119 } 3120 3121 static void 3122 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3123 struct ath12k_wmi_resource_config_arg *tg_cfg) 3124 { 3125 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3126 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3127 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3128 wmi_cfg->num_offload_reorder_buffs = 3129 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3130 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3131 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3132 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3133 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3134 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3135 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3136 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3137 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3138 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3139 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3140 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3141 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3142 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3143 wmi_cfg->roam_offload_max_ap_profiles = 3144 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3145 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3146 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3147 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3148 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3149 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3150 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3151 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3152 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3153 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3154 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3155 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3156 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3157 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3158 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3159 wmi_cfg->num_tdls_conn_table_entries = 3160 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3161 wmi_cfg->beacon_tx_offload_max_vdev = 3162 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3163 wmi_cfg->num_multicast_filter_entries = 3164 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3165 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3166 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3167 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3168 wmi_cfg->max_tdls_concurrent_sleep_sta = 3169 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3170 wmi_cfg->max_tdls_concurrent_buffer_sta = 3171 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3172 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3173 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3174 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3175 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3176 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3177 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3178 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3179 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config); 3180 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3181 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3182 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3183 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3184 wmi_cfg->host_service_flags = 3185 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3186 } 3187 3188 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3189 struct ath12k_wmi_init_cmd_arg *arg) 3190 { 3191 struct ath12k_base *ab = wmi->wmi_ab->ab; 3192 struct sk_buff *skb; 3193 struct wmi_init_cmd *cmd; 3194 struct ath12k_wmi_resource_config_params *cfg; 3195 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3196 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3197 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3198 struct wmi_tlv *tlv; 3199 size_t ret, len; 3200 void *ptr; 3201 u32 hw_mode_len = 0; 3202 u16 idx; 3203 3204 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3205 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3206 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3207 3208 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3209 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3210 3211 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3212 if (!skb) 3213 return -ENOMEM; 3214 3215 cmd = (struct wmi_init_cmd *)skb->data; 3216 3217 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3218 sizeof(*cmd)); 3219 3220 ptr = skb->data + sizeof(*cmd); 3221 cfg = ptr; 3222 3223 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3224 3225 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3226 sizeof(*cfg)); 3227 3228 ptr += sizeof(*cfg); 3229 host_mem_chunks = ptr + TLV_HDR_SIZE; 3230 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3231 3232 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3233 host_mem_chunks[idx].tlv_header = 3234 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3235 len); 3236 3237 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3238 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3239 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3240 3241 ath12k_dbg(ab, ATH12K_DBG_WMI, 3242 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3243 arg->mem_chunks[idx].req_id, 3244 (u64)arg->mem_chunks[idx].paddr, 3245 arg->mem_chunks[idx].len); 3246 } 3247 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3248 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3249 3250 /* num_mem_chunks is zero */ 3251 tlv = ptr; 3252 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3253 ptr += TLV_HDR_SIZE + len; 3254 3255 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3256 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3257 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3258 sizeof(*hw_mode)); 3259 3260 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3261 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3262 3263 ptr += sizeof(*hw_mode); 3264 3265 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3266 tlv = ptr; 3267 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3268 3269 ptr += TLV_HDR_SIZE; 3270 len = sizeof(*band_to_mac); 3271 3272 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3273 band_to_mac = (void *)ptr; 3274 3275 band_to_mac->tlv_header = 3276 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3277 len); 3278 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3279 band_to_mac->start_freq = 3280 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3281 band_to_mac->end_freq = 3282 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3283 ptr += sizeof(*band_to_mac); 3284 } 3285 } 3286 3287 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 3288 if (ret) { 3289 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 3290 dev_kfree_skb(skb); 3291 } 3292 3293 return ret; 3294 } 3295 3296 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 3297 int pdev_id) 3298 { 3299 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 3300 struct sk_buff *skb; 3301 int ret; 3302 3303 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3304 if (!skb) 3305 return -ENOMEM; 3306 3307 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 3308 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 3309 sizeof(*cmd)); 3310 3311 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 3312 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 3313 3314 cmd->pdev_id = cpu_to_le32(pdev_id); 3315 3316 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3317 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 3318 3319 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 3320 if (ret) { 3321 ath12k_warn(ar->ab, 3322 "failed to send lro cfg req wmi cmd\n"); 3323 goto err; 3324 } 3325 3326 return 0; 3327 err: 3328 dev_kfree_skb(skb); 3329 return ret; 3330 } 3331 3332 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 3333 { 3334 unsigned long time_left; 3335 3336 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 3337 WMI_SERVICE_READY_TIMEOUT_HZ); 3338 if (!time_left) 3339 return -ETIMEDOUT; 3340 3341 return 0; 3342 } 3343 3344 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 3345 { 3346 unsigned long time_left; 3347 3348 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 3349 WMI_SERVICE_READY_TIMEOUT_HZ); 3350 if (!time_left) 3351 return -ETIMEDOUT; 3352 3353 return 0; 3354 } 3355 3356 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 3357 enum wmi_host_hw_mode_config_type mode) 3358 { 3359 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 3360 struct sk_buff *skb; 3361 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3362 int len; 3363 int ret; 3364 3365 len = sizeof(*cmd); 3366 3367 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3368 if (!skb) 3369 return -ENOMEM; 3370 3371 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 3372 3373 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3374 sizeof(*cmd)); 3375 3376 cmd->pdev_id = WMI_PDEV_ID_SOC; 3377 cmd->hw_mode_index = cpu_to_le32(mode); 3378 3379 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 3380 if (ret) { 3381 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 3382 dev_kfree_skb(skb); 3383 } 3384 3385 return ret; 3386 } 3387 3388 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 3389 { 3390 struct ath12k_wmi_base *wmi_sc = &ab->wmi_ab; 3391 struct ath12k_wmi_init_cmd_arg arg = {}; 3392 3393 ab->hw_params->wmi_init(ab, &arg.res_cfg); 3394 3395 arg.num_mem_chunks = wmi_sc->num_mem_chunks; 3396 arg.hw_mode_id = wmi_sc->preferred_hw_mode; 3397 arg.mem_chunks = wmi_sc->mem_chunks; 3398 3399 if (ab->hw_params->single_pdev_only) 3400 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 3401 3402 arg.num_band_to_mac = ab->num_radios; 3403 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 3404 3405 return ath12k_init_cmd_send(&wmi_sc->wmi[0], &arg); 3406 } 3407 3408 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 3409 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 3410 { 3411 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 3412 struct sk_buff *skb; 3413 int ret; 3414 3415 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3416 if (!skb) 3417 return -ENOMEM; 3418 3419 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 3420 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 3421 sizeof(*cmd)); 3422 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3423 cmd->scan_count = cpu_to_le32(arg->scan_count); 3424 cmd->scan_period = cpu_to_le32(arg->scan_period); 3425 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 3426 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 3427 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 3428 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 3429 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 3430 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 3431 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 3432 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 3433 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 3434 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 3435 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 3436 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 3437 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 3438 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 3439 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 3440 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 3441 3442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3443 "WMI spectral scan config cmd vdev_id 0x%x\n", 3444 arg->vdev_id); 3445 3446 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3447 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 3448 if (ret) { 3449 ath12k_warn(ar->ab, 3450 "failed to send spectral scan config wmi cmd\n"); 3451 goto err; 3452 } 3453 3454 return 0; 3455 err: 3456 dev_kfree_skb(skb); 3457 return ret; 3458 } 3459 3460 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 3461 u32 trigger, u32 enable) 3462 { 3463 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 3464 struct sk_buff *skb; 3465 int ret; 3466 3467 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3468 if (!skb) 3469 return -ENOMEM; 3470 3471 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 3472 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 3473 sizeof(*cmd)); 3474 3475 cmd->vdev_id = cpu_to_le32(vdev_id); 3476 cmd->trigger_cmd = cpu_to_le32(trigger); 3477 cmd->enable_cmd = cpu_to_le32(enable); 3478 3479 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3480 "WMI spectral enable cmd vdev id 0x%x\n", 3481 vdev_id); 3482 3483 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3484 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 3485 if (ret) { 3486 ath12k_warn(ar->ab, 3487 "failed to send spectral enable wmi cmd\n"); 3488 goto err; 3489 } 3490 3491 return 0; 3492 err: 3493 dev_kfree_skb(skb); 3494 return ret; 3495 } 3496 3497 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 3498 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 3499 { 3500 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 3501 struct sk_buff *skb; 3502 int ret; 3503 3504 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3505 if (!skb) 3506 return -ENOMEM; 3507 3508 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 3509 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 3510 sizeof(*cmd)); 3511 3512 cmd->pdev_id = cpu_to_le32(DP_SW2HW_MACID(arg->pdev_id)); 3513 cmd->module_id = cpu_to_le32(arg->module_id); 3514 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 3515 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 3516 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 3517 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 3518 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 3519 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 3520 cmd->num_elems = cpu_to_le32(arg->num_elems); 3521 cmd->buf_size = cpu_to_le32(arg->buf_size); 3522 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 3523 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 3524 3525 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3526 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 3527 arg->pdev_id); 3528 3529 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3530 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 3531 if (ret) { 3532 ath12k_warn(ar->ab, 3533 "failed to send dma ring cfg req wmi cmd\n"); 3534 goto err; 3535 } 3536 3537 return 0; 3538 err: 3539 dev_kfree_skb(skb); 3540 return ret; 3541 } 3542 3543 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 3544 u16 tag, u16 len, 3545 const void *ptr, void *data) 3546 { 3547 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3548 3549 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 3550 return -EPROTO; 3551 3552 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 3553 return -ENOBUFS; 3554 3555 arg->num_buf_entry++; 3556 return 0; 3557 } 3558 3559 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 3560 u16 tag, u16 len, 3561 const void *ptr, void *data) 3562 { 3563 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3564 3565 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 3566 return -EPROTO; 3567 3568 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 3569 return -ENOBUFS; 3570 3571 arg->num_meta++; 3572 3573 return 0; 3574 } 3575 3576 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 3577 u16 tag, u16 len, 3578 const void *ptr, void *data) 3579 { 3580 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3581 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 3582 u32 pdev_id; 3583 int ret; 3584 3585 switch (tag) { 3586 case WMI_TAG_DMA_BUF_RELEASE: 3587 fixed = ptr; 3588 arg->fixed = *fixed; 3589 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 3590 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 3591 break; 3592 case WMI_TAG_ARRAY_STRUCT: 3593 if (!arg->buf_entry_done) { 3594 arg->num_buf_entry = 0; 3595 arg->buf_entry = ptr; 3596 3597 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3598 ath12k_wmi_dma_buf_entry_parse, 3599 arg); 3600 if (ret) { 3601 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 3602 ret); 3603 return ret; 3604 } 3605 3606 arg->buf_entry_done = true; 3607 } else if (!arg->meta_data_done) { 3608 arg->num_meta = 0; 3609 arg->meta_data = ptr; 3610 3611 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3612 ath12k_wmi_dma_buf_meta_parse, 3613 arg); 3614 if (ret) { 3615 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 3616 ret); 3617 return ret; 3618 } 3619 3620 arg->meta_data_done = true; 3621 } 3622 break; 3623 default: 3624 break; 3625 } 3626 return 0; 3627 } 3628 3629 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 3630 struct sk_buff *skb) 3631 { 3632 struct ath12k_wmi_dma_buf_release_arg arg = {}; 3633 struct ath12k_dbring_buf_release_event param; 3634 int ret; 3635 3636 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 3637 ath12k_wmi_dma_buf_parse, 3638 &arg); 3639 if (ret) { 3640 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 3641 return; 3642 } 3643 3644 param.fixed = arg.fixed; 3645 param.buf_entry = arg.buf_entry; 3646 param.num_buf_entry = arg.num_buf_entry; 3647 param.meta_data = arg.meta_data; 3648 param.num_meta = arg.num_meta; 3649 3650 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 3651 if (ret) { 3652 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 3653 return; 3654 } 3655 } 3656 3657 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 3658 u16 tag, u16 len, 3659 const void *ptr, void *data) 3660 { 3661 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3662 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 3663 u32 phy_map = 0; 3664 3665 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 3666 return -EPROTO; 3667 3668 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 3669 return -ENOBUFS; 3670 3671 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 3672 hw_mode_id); 3673 svc_rdy_ext->n_hw_mode_caps++; 3674 3675 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 3676 svc_rdy_ext->tot_phy_id += fls(phy_map); 3677 3678 return 0; 3679 } 3680 3681 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 3682 u16 len, const void *ptr, void *data) 3683 { 3684 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3685 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 3686 enum wmi_host_hw_mode_config_type mode, pref; 3687 u32 i; 3688 int ret; 3689 3690 svc_rdy_ext->n_hw_mode_caps = 0; 3691 svc_rdy_ext->hw_mode_caps = ptr; 3692 3693 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3694 ath12k_wmi_hw_mode_caps_parse, 3695 svc_rdy_ext); 3696 if (ret) { 3697 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3698 return ret; 3699 } 3700 3701 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 3702 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 3703 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 3704 pref = soc->wmi_ab.preferred_hw_mode; 3705 3706 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 3707 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 3708 soc->wmi_ab.preferred_hw_mode = mode; 3709 } 3710 } 3711 3712 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n", 3713 soc->wmi_ab.preferred_hw_mode); 3714 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 3715 return -EINVAL; 3716 3717 return 0; 3718 } 3719 3720 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 3721 u16 tag, u16 len, 3722 const void *ptr, void *data) 3723 { 3724 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3725 3726 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 3727 return -EPROTO; 3728 3729 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 3730 return -ENOBUFS; 3731 3732 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 3733 if (!svc_rdy_ext->n_mac_phy_caps) { 3734 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 3735 GFP_ATOMIC); 3736 if (!svc_rdy_ext->mac_phy_caps) 3737 return -ENOMEM; 3738 } 3739 3740 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 3741 svc_rdy_ext->n_mac_phy_caps++; 3742 return 0; 3743 } 3744 3745 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 3746 u16 tag, u16 len, 3747 const void *ptr, void *data) 3748 { 3749 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3750 3751 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 3752 return -EPROTO; 3753 3754 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 3755 return -ENOBUFS; 3756 3757 svc_rdy_ext->n_ext_hal_reg_caps++; 3758 return 0; 3759 } 3760 3761 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 3762 u16 len, const void *ptr, void *data) 3763 { 3764 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 3765 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3766 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 3767 int ret; 3768 u32 i; 3769 3770 svc_rdy_ext->n_ext_hal_reg_caps = 0; 3771 svc_rdy_ext->ext_hal_reg_caps = ptr; 3772 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3773 ath12k_wmi_ext_hal_reg_caps_parse, 3774 svc_rdy_ext); 3775 if (ret) { 3776 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3777 return ret; 3778 } 3779 3780 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 3781 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 3782 svc_rdy_ext->soc_hal_reg_caps, 3783 svc_rdy_ext->ext_hal_reg_caps, i, 3784 ®_cap); 3785 if (ret) { 3786 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 3787 return ret; 3788 } 3789 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 3790 } 3791 return 0; 3792 } 3793 3794 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 3795 u16 len, const void *ptr, 3796 void *data) 3797 { 3798 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 3799 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3800 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 3801 u32 phy_id_map; 3802 int pdev_index = 0; 3803 int ret; 3804 3805 svc_rdy_ext->soc_hal_reg_caps = ptr; 3806 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 3807 3808 soc->num_radios = 0; 3809 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 3810 3811 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 3812 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 3813 svc_rdy_ext, 3814 hw_mode_id, soc->num_radios, 3815 &soc->pdevs[pdev_index]); 3816 if (ret) { 3817 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 3818 soc->num_radios); 3819 return ret; 3820 } 3821 3822 soc->num_radios++; 3823 3824 /* For single_pdev_only targets, 3825 * save mac_phy capability in the same pdev 3826 */ 3827 if (soc->hw_params->single_pdev_only) 3828 pdev_index = 0; 3829 else 3830 pdev_index = soc->num_radios; 3831 3832 /* TODO: mac_phy_cap prints */ 3833 phy_id_map >>= 1; 3834 } 3835 3836 if (soc->hw_params->single_pdev_only) { 3837 soc->num_radios = 1; 3838 soc->pdevs[0].pdev_id = 0; 3839 } 3840 3841 return 0; 3842 } 3843 3844 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 3845 u16 tag, u16 len, 3846 const void *ptr, void *data) 3847 { 3848 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 3849 3850 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 3851 return -EPROTO; 3852 3853 parse->n_dma_ring_caps++; 3854 return 0; 3855 } 3856 3857 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 3858 u32 num_cap) 3859 { 3860 size_t sz; 3861 void *ptr; 3862 3863 sz = num_cap * sizeof(struct ath12k_dbring_cap); 3864 ptr = kzalloc(sz, GFP_ATOMIC); 3865 if (!ptr) 3866 return -ENOMEM; 3867 3868 ab->db_caps = ptr; 3869 ab->num_db_cap = num_cap; 3870 3871 return 0; 3872 } 3873 3874 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 3875 { 3876 kfree(ab->db_caps); 3877 ab->db_caps = NULL; 3878 } 3879 3880 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 3881 u16 len, const void *ptr, void *data) 3882 { 3883 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 3884 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 3885 struct ath12k_dbring_cap *dir_buff_caps; 3886 int ret; 3887 u32 i; 3888 3889 dma_caps_parse->n_dma_ring_caps = 0; 3890 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 3891 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3892 ath12k_wmi_dma_ring_caps_parse, 3893 dma_caps_parse); 3894 if (ret) { 3895 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 3896 return ret; 3897 } 3898 3899 if (!dma_caps_parse->n_dma_ring_caps) 3900 return 0; 3901 3902 if (ab->num_db_cap) { 3903 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 3904 return 0; 3905 } 3906 3907 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 3908 if (ret) 3909 return ret; 3910 3911 dir_buff_caps = ab->db_caps; 3912 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 3913 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 3914 ath12k_warn(ab, "Invalid module id %d\n", 3915 le32_to_cpu(dma_caps[i].module_id)); 3916 ret = -EINVAL; 3917 goto free_dir_buff; 3918 } 3919 3920 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 3921 dir_buff_caps[i].pdev_id = 3922 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 3923 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 3924 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 3925 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 3926 } 3927 3928 return 0; 3929 3930 free_dir_buff: 3931 ath12k_wmi_free_dbring_caps(ab); 3932 return ret; 3933 } 3934 3935 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 3936 u16 tag, u16 len, 3937 const void *ptr, void *data) 3938 { 3939 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 3940 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3941 int ret; 3942 3943 switch (tag) { 3944 case WMI_TAG_SERVICE_READY_EXT_EVENT: 3945 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 3946 &svc_rdy_ext->arg); 3947 if (ret) { 3948 ath12k_warn(ab, "unable to extract ext params\n"); 3949 return ret; 3950 } 3951 break; 3952 3953 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 3954 svc_rdy_ext->hw_caps = ptr; 3955 svc_rdy_ext->arg.num_hw_modes = 3956 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 3957 break; 3958 3959 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 3960 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 3961 svc_rdy_ext); 3962 if (ret) 3963 return ret; 3964 break; 3965 3966 case WMI_TAG_ARRAY_STRUCT: 3967 if (!svc_rdy_ext->hw_mode_done) { 3968 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 3969 if (ret) 3970 return ret; 3971 3972 svc_rdy_ext->hw_mode_done = true; 3973 } else if (!svc_rdy_ext->mac_phy_done) { 3974 svc_rdy_ext->n_mac_phy_caps = 0; 3975 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3976 ath12k_wmi_mac_phy_caps_parse, 3977 svc_rdy_ext); 3978 if (ret) { 3979 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 3980 return ret; 3981 } 3982 3983 svc_rdy_ext->mac_phy_done = true; 3984 } else if (!svc_rdy_ext->ext_hal_reg_done) { 3985 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 3986 if (ret) 3987 return ret; 3988 3989 svc_rdy_ext->ext_hal_reg_done = true; 3990 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 3991 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 3992 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 3993 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 3994 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 3995 svc_rdy_ext->oem_dma_ring_cap_done = true; 3996 } else if (!svc_rdy_ext->dma_ring_cap_done) { 3997 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 3998 &svc_rdy_ext->dma_caps_parse); 3999 if (ret) 4000 return ret; 4001 4002 svc_rdy_ext->dma_ring_cap_done = true; 4003 } 4004 break; 4005 4006 default: 4007 break; 4008 } 4009 return 0; 4010 } 4011 4012 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4013 struct sk_buff *skb) 4014 { 4015 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4016 int ret; 4017 4018 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4019 ath12k_wmi_svc_rdy_ext_parse, 4020 &svc_rdy_ext); 4021 if (ret) { 4022 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4023 goto err; 4024 } 4025 4026 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4027 complete(&ab->wmi_ab.service_ready); 4028 4029 kfree(svc_rdy_ext.mac_phy_caps); 4030 return 0; 4031 4032 err: 4033 ath12k_wmi_free_dbring_caps(ab); 4034 return ret; 4035 } 4036 4037 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 4038 u16 tag, u16 len, 4039 const void *ptr, void *data) 4040 { 4041 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 4042 int ret; 4043 4044 switch (tag) { 4045 case WMI_TAG_ARRAY_STRUCT: 4046 if (!parse->dma_ring_cap_done) { 4047 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4048 &parse->dma_caps_parse); 4049 if (ret) 4050 return ret; 4051 4052 parse->dma_ring_cap_done = true; 4053 } 4054 break; 4055 default: 4056 break; 4057 } 4058 4059 return 0; 4060 } 4061 4062 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 4063 struct sk_buff *skb) 4064 { 4065 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 4066 int ret; 4067 4068 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4069 ath12k_wmi_svc_rdy_ext2_parse, 4070 &svc_rdy_ext2); 4071 if (ret) { 4072 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 4073 goto err; 4074 } 4075 4076 complete(&ab->wmi_ab.service_ready); 4077 4078 return 0; 4079 4080 err: 4081 ath12k_wmi_free_dbring_caps(ab); 4082 return ret; 4083 } 4084 4085 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4086 struct wmi_vdev_start_resp_event *vdev_rsp) 4087 { 4088 const void **tb; 4089 const struct wmi_vdev_start_resp_event *ev; 4090 int ret; 4091 4092 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4093 if (IS_ERR(tb)) { 4094 ret = PTR_ERR(tb); 4095 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4096 return ret; 4097 } 4098 4099 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 4100 if (!ev) { 4101 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 4102 kfree(tb); 4103 return -EPROTO; 4104 } 4105 4106 *vdev_rsp = *ev; 4107 4108 kfree(tb); 4109 return 0; 4110 } 4111 4112 static struct ath12k_reg_rule 4113 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 4114 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 4115 { 4116 struct ath12k_reg_rule *reg_rule_ptr; 4117 u32 count; 4118 4119 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 4120 GFP_ATOMIC); 4121 4122 if (!reg_rule_ptr) 4123 return NULL; 4124 4125 for (count = 0; count < num_reg_rules; count++) { 4126 reg_rule_ptr[count].start_freq = 4127 le32_get_bits(wmi_reg_rule[count].freq_info, 4128 REG_RULE_START_FREQ); 4129 reg_rule_ptr[count].end_freq = 4130 le32_get_bits(wmi_reg_rule[count].freq_info, 4131 REG_RULE_END_FREQ); 4132 reg_rule_ptr[count].max_bw = 4133 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4134 REG_RULE_MAX_BW); 4135 reg_rule_ptr[count].reg_power = 4136 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4137 REG_RULE_REG_PWR); 4138 reg_rule_ptr[count].ant_gain = 4139 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4140 REG_RULE_ANT_GAIN); 4141 reg_rule_ptr[count].flags = 4142 le32_get_bits(wmi_reg_rule[count].flag_info, 4143 REG_RULE_FLAGS); 4144 reg_rule_ptr[count].psd_flag = 4145 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4146 REG_RULE_PSD_INFO); 4147 reg_rule_ptr[count].psd_eirp = 4148 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4149 REG_RULE_PSD_EIRP); 4150 } 4151 4152 return reg_rule_ptr; 4153 } 4154 4155 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 4156 struct sk_buff *skb, 4157 struct ath12k_reg_info *reg_info) 4158 { 4159 const void **tb; 4160 const struct wmi_reg_chan_list_cc_ext_event *ev; 4161 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 4162 u32 num_2g_reg_rules, num_5g_reg_rules; 4163 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4164 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4165 u32 total_reg_rules = 0; 4166 int ret, i, j; 4167 4168 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 4169 4170 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4171 if (IS_ERR(tb)) { 4172 ret = PTR_ERR(tb); 4173 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4174 return ret; 4175 } 4176 4177 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 4178 if (!ev) { 4179 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 4180 kfree(tb); 4181 return -EPROTO; 4182 } 4183 4184 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 4185 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 4186 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 4187 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 4188 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 4189 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 4190 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 4191 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 4192 4193 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4194 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4195 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 4196 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4197 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 4198 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4199 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 4200 } 4201 4202 num_2g_reg_rules = reg_info->num_2g_reg_rules; 4203 total_reg_rules += num_2g_reg_rules; 4204 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4205 total_reg_rules += num_5g_reg_rules; 4206 4207 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 4208 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 4209 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 4210 kfree(tb); 4211 return -EINVAL; 4212 } 4213 4214 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4215 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 4216 4217 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4218 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 4219 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4220 kfree(tb); 4221 return -EINVAL; 4222 } 4223 4224 total_reg_rules += num_6g_reg_rules_ap[i]; 4225 } 4226 4227 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4228 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4229 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4230 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4231 4232 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4233 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4234 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4235 4236 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4237 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4238 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4239 4240 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 4241 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 4242 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 4243 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 4244 i); 4245 kfree(tb); 4246 return -EINVAL; 4247 } 4248 } 4249 4250 if (!total_reg_rules) { 4251 ath12k_warn(ab, "No reg rules available\n"); 4252 kfree(tb); 4253 return -EINVAL; 4254 } 4255 4256 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 4257 4258 /* FIXME: Currently FW includes 6G reg rule also in 5G rule 4259 * list for country US. 4260 * Having same 6G reg rule in 5G and 6G rules list causes 4261 * intersect check to be true, and same rules will be shown 4262 * multiple times in iw cmd. So added hack below to avoid 4263 * parsing 6G rule from 5G reg rule list, and this can be 4264 * removed later, after FW updates to remove 6G reg rule 4265 * from 5G rules list. 4266 */ 4267 if (memcmp(reg_info->alpha2, "US", 2) == 0) { 4268 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES; 4269 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4270 } 4271 4272 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 4273 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 4274 reg_info->num_phy = le32_to_cpu(ev->num_phy); 4275 reg_info->phy_id = le32_to_cpu(ev->phy_id); 4276 reg_info->ctry_code = le32_to_cpu(ev->country_id); 4277 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 4278 4279 switch (le32_to_cpu(ev->status_code)) { 4280 case WMI_REG_SET_CC_STATUS_PASS: 4281 reg_info->status_code = REG_SET_CC_STATUS_PASS; 4282 break; 4283 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4284 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 4285 break; 4286 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4287 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 4288 break; 4289 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4290 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 4291 break; 4292 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4293 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 4294 break; 4295 case WMI_REG_SET_CC_STATUS_FAIL: 4296 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 4297 break; 4298 } 4299 4300 reg_info->is_ext_reg_event = true; 4301 4302 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 4303 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 4304 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 4305 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 4306 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 4307 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 4308 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 4309 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 4310 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 4311 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 4312 4313 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4314 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4315 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 4316 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4317 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 4318 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4319 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 4320 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4321 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 4322 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 4323 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 4324 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 4325 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 4326 } 4327 4328 ath12k_dbg(ab, ATH12K_DBG_WMI, 4329 "%s:cc_ext %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d", 4330 __func__, reg_info->alpha2, reg_info->dfs_region, 4331 reg_info->min_bw_2g, reg_info->max_bw_2g, 4332 reg_info->min_bw_5g, reg_info->max_bw_5g); 4333 4334 ath12k_dbg(ab, ATH12K_DBG_WMI, 4335 "num_2g_reg_rules %d num_5g_reg_rules %d", 4336 num_2g_reg_rules, num_5g_reg_rules); 4337 4338 ath12k_dbg(ab, ATH12K_DBG_WMI, 4339 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 4340 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 4341 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 4342 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 4343 4344 ath12k_dbg(ab, ATH12K_DBG_WMI, 4345 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4346 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 4347 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 4348 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 4349 4350 ath12k_dbg(ab, ATH12K_DBG_WMI, 4351 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4352 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 4353 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 4354 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 4355 4356 ext_wmi_reg_rule = 4357 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 4358 + sizeof(*ev) 4359 + sizeof(struct wmi_tlv)); 4360 4361 if (num_2g_reg_rules) { 4362 reg_info->reg_rules_2g_ptr = 4363 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 4364 ext_wmi_reg_rule); 4365 4366 if (!reg_info->reg_rules_2g_ptr) { 4367 kfree(tb); 4368 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 4369 return -ENOMEM; 4370 } 4371 } 4372 4373 if (num_5g_reg_rules) { 4374 ext_wmi_reg_rule += num_2g_reg_rules; 4375 reg_info->reg_rules_5g_ptr = 4376 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 4377 ext_wmi_reg_rule); 4378 4379 if (!reg_info->reg_rules_5g_ptr) { 4380 kfree(tb); 4381 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 4382 return -ENOMEM; 4383 } 4384 } 4385 4386 ext_wmi_reg_rule += num_5g_reg_rules; 4387 4388 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4389 reg_info->reg_rules_6g_ap_ptr[i] = 4390 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 4391 ext_wmi_reg_rule); 4392 4393 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 4394 kfree(tb); 4395 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 4396 return -ENOMEM; 4397 } 4398 4399 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 4400 } 4401 4402 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 4403 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4404 reg_info->reg_rules_6g_client_ptr[j][i] = 4405 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 4406 ext_wmi_reg_rule); 4407 4408 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 4409 kfree(tb); 4410 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 4411 return -ENOMEM; 4412 } 4413 4414 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 4415 } 4416 } 4417 4418 reg_info->client_type = le32_to_cpu(ev->client_type); 4419 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 4420 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 4421 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 4422 le32_to_cpu(ev->domain_code_6g_ap_lpi); 4423 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 4424 le32_to_cpu(ev->domain_code_6g_ap_sp); 4425 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 4426 le32_to_cpu(ev->domain_code_6g_ap_vlp); 4427 4428 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4429 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 4430 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 4431 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 4432 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 4433 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 4434 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 4435 } 4436 4437 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 4438 4439 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 4440 reg_info->client_type, reg_info->domain_code_6g_super_id); 4441 4442 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 4443 4444 kfree(tb); 4445 return 0; 4446 } 4447 4448 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 4449 struct wmi_peer_delete_resp_event *peer_del_resp) 4450 { 4451 const void **tb; 4452 const struct wmi_peer_delete_resp_event *ev; 4453 int ret; 4454 4455 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4456 if (IS_ERR(tb)) { 4457 ret = PTR_ERR(tb); 4458 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4459 return ret; 4460 } 4461 4462 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 4463 if (!ev) { 4464 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 4465 kfree(tb); 4466 return -EPROTO; 4467 } 4468 4469 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 4470 4471 peer_del_resp->vdev_id = ev->vdev_id; 4472 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 4473 ev->peer_macaddr.addr); 4474 4475 kfree(tb); 4476 return 0; 4477 } 4478 4479 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 4480 struct sk_buff *skb, 4481 u32 *vdev_id) 4482 { 4483 const void **tb; 4484 const struct wmi_vdev_delete_resp_event *ev; 4485 int ret; 4486 4487 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4488 if (IS_ERR(tb)) { 4489 ret = PTR_ERR(tb); 4490 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4491 return ret; 4492 } 4493 4494 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 4495 if (!ev) { 4496 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 4497 kfree(tb); 4498 return -EPROTO; 4499 } 4500 4501 *vdev_id = le32_to_cpu(ev->vdev_id); 4502 4503 kfree(tb); 4504 return 0; 4505 } 4506 4507 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, void *evt_buf, 4508 u32 len, u32 *vdev_id, 4509 u32 *tx_status) 4510 { 4511 const void **tb; 4512 const struct wmi_bcn_tx_status_event *ev; 4513 int ret; 4514 4515 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 4516 if (IS_ERR(tb)) { 4517 ret = PTR_ERR(tb); 4518 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4519 return ret; 4520 } 4521 4522 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 4523 if (!ev) { 4524 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 4525 kfree(tb); 4526 return -EPROTO; 4527 } 4528 4529 *vdev_id = le32_to_cpu(ev->vdev_id); 4530 *tx_status = le32_to_cpu(ev->tx_status); 4531 4532 kfree(tb); 4533 return 0; 4534 } 4535 4536 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4537 u32 *vdev_id) 4538 { 4539 const void **tb; 4540 const struct wmi_vdev_stopped_event *ev; 4541 int ret; 4542 4543 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4544 if (IS_ERR(tb)) { 4545 ret = PTR_ERR(tb); 4546 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4547 return ret; 4548 } 4549 4550 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 4551 if (!ev) { 4552 ath12k_warn(ab, "failed to fetch vdev stop ev"); 4553 kfree(tb); 4554 return -EPROTO; 4555 } 4556 4557 *vdev_id = le32_to_cpu(ev->vdev_id); 4558 4559 kfree(tb); 4560 return 0; 4561 } 4562 4563 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 4564 u16 tag, u16 len, 4565 const void *ptr, void *data) 4566 { 4567 struct wmi_tlv_mgmt_rx_parse *parse = data; 4568 4569 switch (tag) { 4570 case WMI_TAG_MGMT_RX_HDR: 4571 parse->fixed = ptr; 4572 break; 4573 case WMI_TAG_ARRAY_BYTE: 4574 if (!parse->frame_buf_done) { 4575 parse->frame_buf = ptr; 4576 parse->frame_buf_done = true; 4577 } 4578 break; 4579 } 4580 return 0; 4581 } 4582 4583 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 4584 struct sk_buff *skb, 4585 struct ath12k_wmi_mgmt_rx_arg *hdr) 4586 { 4587 struct wmi_tlv_mgmt_rx_parse parse = { }; 4588 const struct ath12k_wmi_mgmt_rx_params *ev; 4589 const u8 *frame; 4590 int i, ret; 4591 4592 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4593 ath12k_wmi_tlv_mgmt_rx_parse, 4594 &parse); 4595 if (ret) { 4596 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 4597 return ret; 4598 } 4599 4600 ev = parse.fixed; 4601 frame = parse.frame_buf; 4602 4603 if (!ev || !frame) { 4604 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 4605 return -EPROTO; 4606 } 4607 4608 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 4609 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 4610 hdr->channel = le32_to_cpu(ev->channel); 4611 hdr->snr = le32_to_cpu(ev->snr); 4612 hdr->rate = le32_to_cpu(ev->rate); 4613 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 4614 hdr->buf_len = le32_to_cpu(ev->buf_len); 4615 hdr->status = le32_to_cpu(ev->status); 4616 hdr->flags = le32_to_cpu(ev->flags); 4617 hdr->rssi = a_sle32_to_cpu(ev->rssi); 4618 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 4619 4620 for (i = 0; i < ATH_MAX_ANTENNA; i++) 4621 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 4622 4623 if (skb->len < (frame - skb->data) + hdr->buf_len) { 4624 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 4625 return -EPROTO; 4626 } 4627 4628 /* shift the sk_buff to point to `frame` */ 4629 skb_trim(skb, 0); 4630 skb_put(skb, frame - skb->data); 4631 skb_pull(skb, frame - skb->data); 4632 skb_put(skb, hdr->buf_len); 4633 4634 return 0; 4635 } 4636 4637 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 4638 u32 status) 4639 { 4640 struct sk_buff *msdu; 4641 struct ieee80211_tx_info *info; 4642 struct ath12k_skb_cb *skb_cb; 4643 4644 spin_lock_bh(&ar->txmgmt_idr_lock); 4645 msdu = idr_find(&ar->txmgmt_idr, desc_id); 4646 4647 if (!msdu) { 4648 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 4649 desc_id); 4650 spin_unlock_bh(&ar->txmgmt_idr_lock); 4651 return -ENOENT; 4652 } 4653 4654 idr_remove(&ar->txmgmt_idr, desc_id); 4655 spin_unlock_bh(&ar->txmgmt_idr_lock); 4656 4657 skb_cb = ATH12K_SKB_CB(msdu); 4658 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 4659 4660 info = IEEE80211_SKB_CB(msdu); 4661 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 4662 info->flags |= IEEE80211_TX_STAT_ACK; 4663 4664 ieee80211_tx_status_irqsafe(ar->hw, msdu); 4665 4666 /* WARN when we received this event without doing any mgmt tx */ 4667 if (atomic_dec_if_positive(&ar->num_pending_mgmt_tx) < 0) 4668 WARN_ON_ONCE(1); 4669 4670 return 0; 4671 } 4672 4673 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 4674 struct sk_buff *skb, 4675 struct wmi_mgmt_tx_compl_event *param) 4676 { 4677 const void **tb; 4678 const struct wmi_mgmt_tx_compl_event *ev; 4679 int ret; 4680 4681 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4682 if (IS_ERR(tb)) { 4683 ret = PTR_ERR(tb); 4684 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4685 return ret; 4686 } 4687 4688 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 4689 if (!ev) { 4690 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 4691 kfree(tb); 4692 return -EPROTO; 4693 } 4694 4695 param->pdev_id = ev->pdev_id; 4696 param->desc_id = ev->desc_id; 4697 param->status = ev->status; 4698 4699 kfree(tb); 4700 return 0; 4701 } 4702 4703 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 4704 { 4705 lockdep_assert_held(&ar->data_lock); 4706 4707 switch (ar->scan.state) { 4708 case ATH12K_SCAN_IDLE: 4709 case ATH12K_SCAN_RUNNING: 4710 case ATH12K_SCAN_ABORTING: 4711 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 4712 ath12k_scan_state_str(ar->scan.state), 4713 ar->scan.state); 4714 break; 4715 case ATH12K_SCAN_STARTING: 4716 ar->scan.state = ATH12K_SCAN_RUNNING; 4717 complete(&ar->scan.started); 4718 break; 4719 } 4720 } 4721 4722 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 4723 { 4724 lockdep_assert_held(&ar->data_lock); 4725 4726 switch (ar->scan.state) { 4727 case ATH12K_SCAN_IDLE: 4728 case ATH12K_SCAN_RUNNING: 4729 case ATH12K_SCAN_ABORTING: 4730 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 4731 ath12k_scan_state_str(ar->scan.state), 4732 ar->scan.state); 4733 break; 4734 case ATH12K_SCAN_STARTING: 4735 complete(&ar->scan.started); 4736 __ath12k_mac_scan_finish(ar); 4737 break; 4738 } 4739 } 4740 4741 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 4742 { 4743 lockdep_assert_held(&ar->data_lock); 4744 4745 switch (ar->scan.state) { 4746 case ATH12K_SCAN_IDLE: 4747 case ATH12K_SCAN_STARTING: 4748 /* One suspected reason scan can be completed while starting is 4749 * if firmware fails to deliver all scan events to the host, 4750 * e.g. when transport pipe is full. This has been observed 4751 * with spectral scan phyerr events starving wmi transport 4752 * pipe. In such case the "scan completed" event should be (and 4753 * is) ignored by the host as it may be just firmware's scan 4754 * state machine recovering. 4755 */ 4756 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 4757 ath12k_scan_state_str(ar->scan.state), 4758 ar->scan.state); 4759 break; 4760 case ATH12K_SCAN_RUNNING: 4761 case ATH12K_SCAN_ABORTING: 4762 __ath12k_mac_scan_finish(ar); 4763 break; 4764 } 4765 } 4766 4767 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 4768 { 4769 lockdep_assert_held(&ar->data_lock); 4770 4771 switch (ar->scan.state) { 4772 case ATH12K_SCAN_IDLE: 4773 case ATH12K_SCAN_STARTING: 4774 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 4775 ath12k_scan_state_str(ar->scan.state), 4776 ar->scan.state); 4777 break; 4778 case ATH12K_SCAN_RUNNING: 4779 case ATH12K_SCAN_ABORTING: 4780 ar->scan_channel = NULL; 4781 break; 4782 } 4783 } 4784 4785 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 4786 { 4787 lockdep_assert_held(&ar->data_lock); 4788 4789 switch (ar->scan.state) { 4790 case ATH12K_SCAN_IDLE: 4791 case ATH12K_SCAN_STARTING: 4792 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 4793 ath12k_scan_state_str(ar->scan.state), 4794 ar->scan.state); 4795 break; 4796 case ATH12K_SCAN_RUNNING: 4797 case ATH12K_SCAN_ABORTING: 4798 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); 4799 break; 4800 } 4801 } 4802 4803 static const char * 4804 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 4805 enum wmi_scan_completion_reason reason) 4806 { 4807 switch (type) { 4808 case WMI_SCAN_EVENT_STARTED: 4809 return "started"; 4810 case WMI_SCAN_EVENT_COMPLETED: 4811 switch (reason) { 4812 case WMI_SCAN_REASON_COMPLETED: 4813 return "completed"; 4814 case WMI_SCAN_REASON_CANCELLED: 4815 return "completed [cancelled]"; 4816 case WMI_SCAN_REASON_PREEMPTED: 4817 return "completed [preempted]"; 4818 case WMI_SCAN_REASON_TIMEDOUT: 4819 return "completed [timedout]"; 4820 case WMI_SCAN_REASON_INTERNAL_FAILURE: 4821 return "completed [internal err]"; 4822 case WMI_SCAN_REASON_MAX: 4823 break; 4824 } 4825 return "completed [unknown]"; 4826 case WMI_SCAN_EVENT_BSS_CHANNEL: 4827 return "bss channel"; 4828 case WMI_SCAN_EVENT_FOREIGN_CHAN: 4829 return "foreign channel"; 4830 case WMI_SCAN_EVENT_DEQUEUED: 4831 return "dequeued"; 4832 case WMI_SCAN_EVENT_PREEMPTED: 4833 return "preempted"; 4834 case WMI_SCAN_EVENT_START_FAILED: 4835 return "start failed"; 4836 case WMI_SCAN_EVENT_RESTARTED: 4837 return "restarted"; 4838 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 4839 return "foreign channel exit"; 4840 default: 4841 return "unknown"; 4842 } 4843 } 4844 4845 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 4846 struct wmi_scan_event *scan_evt_param) 4847 { 4848 const void **tb; 4849 const struct wmi_scan_event *ev; 4850 int ret; 4851 4852 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4853 if (IS_ERR(tb)) { 4854 ret = PTR_ERR(tb); 4855 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4856 return ret; 4857 } 4858 4859 ev = tb[WMI_TAG_SCAN_EVENT]; 4860 if (!ev) { 4861 ath12k_warn(ab, "failed to fetch scan ev"); 4862 kfree(tb); 4863 return -EPROTO; 4864 } 4865 4866 scan_evt_param->event_type = ev->event_type; 4867 scan_evt_param->reason = ev->reason; 4868 scan_evt_param->channel_freq = ev->channel_freq; 4869 scan_evt_param->scan_req_id = ev->scan_req_id; 4870 scan_evt_param->scan_id = ev->scan_id; 4871 scan_evt_param->vdev_id = ev->vdev_id; 4872 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 4873 4874 kfree(tb); 4875 return 0; 4876 } 4877 4878 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 4879 struct wmi_peer_sta_kickout_arg *arg) 4880 { 4881 const void **tb; 4882 const struct wmi_peer_sta_kickout_event *ev; 4883 int ret; 4884 4885 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4886 if (IS_ERR(tb)) { 4887 ret = PTR_ERR(tb); 4888 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4889 return ret; 4890 } 4891 4892 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 4893 if (!ev) { 4894 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 4895 kfree(tb); 4896 return -EPROTO; 4897 } 4898 4899 arg->mac_addr = ev->peer_macaddr.addr; 4900 4901 kfree(tb); 4902 return 0; 4903 } 4904 4905 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 4906 struct wmi_roam_event *roam_ev) 4907 { 4908 const void **tb; 4909 const struct wmi_roam_event *ev; 4910 int ret; 4911 4912 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4913 if (IS_ERR(tb)) { 4914 ret = PTR_ERR(tb); 4915 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4916 return ret; 4917 } 4918 4919 ev = tb[WMI_TAG_ROAM_EVENT]; 4920 if (!ev) { 4921 ath12k_warn(ab, "failed to fetch roam ev"); 4922 kfree(tb); 4923 return -EPROTO; 4924 } 4925 4926 roam_ev->vdev_id = ev->vdev_id; 4927 roam_ev->reason = ev->reason; 4928 roam_ev->rssi = ev->rssi; 4929 4930 kfree(tb); 4931 return 0; 4932 } 4933 4934 static int freq_to_idx(struct ath12k *ar, int freq) 4935 { 4936 struct ieee80211_supported_band *sband; 4937 int band, ch, idx = 0; 4938 4939 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 4940 if (!ar->mac.sbands[band].channels) 4941 continue; 4942 4943 sband = ar->hw->wiphy->bands[band]; 4944 if (!sband) 4945 continue; 4946 4947 for (ch = 0; ch < sband->n_channels; ch++, idx++) 4948 if (sband->channels[ch].center_freq == freq) 4949 goto exit; 4950 } 4951 4952 exit: 4953 return idx; 4954 } 4955 4956 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, u8 *evt_buf, 4957 u32 len, struct wmi_chan_info_event *ch_info_ev) 4958 { 4959 const void **tb; 4960 const struct wmi_chan_info_event *ev; 4961 int ret; 4962 4963 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 4964 if (IS_ERR(tb)) { 4965 ret = PTR_ERR(tb); 4966 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4967 return ret; 4968 } 4969 4970 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 4971 if (!ev) { 4972 ath12k_warn(ab, "failed to fetch chan info ev"); 4973 kfree(tb); 4974 return -EPROTO; 4975 } 4976 4977 ch_info_ev->err_code = ev->err_code; 4978 ch_info_ev->freq = ev->freq; 4979 ch_info_ev->cmd_flags = ev->cmd_flags; 4980 ch_info_ev->noise_floor = ev->noise_floor; 4981 ch_info_ev->rx_clear_count = ev->rx_clear_count; 4982 ch_info_ev->cycle_count = ev->cycle_count; 4983 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 4984 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 4985 ch_info_ev->rx_frame_count = ev->rx_frame_count; 4986 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 4987 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 4988 ch_info_ev->vdev_id = ev->vdev_id; 4989 4990 kfree(tb); 4991 return 0; 4992 } 4993 4994 static int 4995 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 4996 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 4997 { 4998 const void **tb; 4999 const struct wmi_pdev_bss_chan_info_event *ev; 5000 int ret; 5001 5002 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5003 if (IS_ERR(tb)) { 5004 ret = PTR_ERR(tb); 5005 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5006 return ret; 5007 } 5008 5009 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 5010 if (!ev) { 5011 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 5012 kfree(tb); 5013 return -EPROTO; 5014 } 5015 5016 bss_ch_info_ev->pdev_id = ev->pdev_id; 5017 bss_ch_info_ev->freq = ev->freq; 5018 bss_ch_info_ev->noise_floor = ev->noise_floor; 5019 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 5020 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 5021 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 5022 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 5023 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 5024 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 5025 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 5026 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 5027 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 5028 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 5029 5030 kfree(tb); 5031 return 0; 5032 } 5033 5034 static int 5035 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 5036 struct wmi_vdev_install_key_complete_arg *arg) 5037 { 5038 const void **tb; 5039 const struct wmi_vdev_install_key_compl_event *ev; 5040 int ret; 5041 5042 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5043 if (IS_ERR(tb)) { 5044 ret = PTR_ERR(tb); 5045 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5046 return ret; 5047 } 5048 5049 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 5050 if (!ev) { 5051 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 5052 kfree(tb); 5053 return -EPROTO; 5054 } 5055 5056 arg->vdev_id = le32_to_cpu(ev->vdev_id); 5057 arg->macaddr = ev->peer_macaddr.addr; 5058 arg->key_idx = le32_to_cpu(ev->key_idx); 5059 arg->key_flags = le32_to_cpu(ev->key_flags); 5060 arg->status = le32_to_cpu(ev->status); 5061 5062 kfree(tb); 5063 return 0; 5064 } 5065 5066 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 5067 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 5068 { 5069 const void **tb; 5070 const struct wmi_peer_assoc_conf_event *ev; 5071 int ret; 5072 5073 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5074 if (IS_ERR(tb)) { 5075 ret = PTR_ERR(tb); 5076 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5077 return ret; 5078 } 5079 5080 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 5081 if (!ev) { 5082 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 5083 kfree(tb); 5084 return -EPROTO; 5085 } 5086 5087 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 5088 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 5089 5090 kfree(tb); 5091 return 0; 5092 } 5093 5094 static int 5095 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, u8 *evt_buf, 5096 u32 len, const struct wmi_pdev_temperature_event *ev) 5097 { 5098 const void **tb; 5099 int ret; 5100 5101 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 5102 if (IS_ERR(tb)) { 5103 ret = PTR_ERR(tb); 5104 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5105 return ret; 5106 } 5107 5108 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 5109 if (!ev) { 5110 ath12k_warn(ab, "failed to fetch pdev temp ev"); 5111 kfree(tb); 5112 return -EPROTO; 5113 } 5114 5115 kfree(tb); 5116 return 0; 5117 } 5118 5119 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 5120 { 5121 /* try to send pending beacons first. they take priority */ 5122 wake_up(&ab->wmi_ab.tx_credits_wq); 5123 } 5124 5125 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 5126 struct sk_buff *skb) 5127 { 5128 dev_kfree_skb(skb); 5129 } 5130 5131 static bool ath12k_reg_is_world_alpha(char *alpha) 5132 { 5133 return alpha[0] == '0' && alpha[1] == '0'; 5134 } 5135 5136 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 5137 { 5138 struct ath12k_reg_info *reg_info = NULL; 5139 struct ieee80211_regdomain *regd = NULL; 5140 bool intersect = false; 5141 int ret = 0, pdev_idx, i, j; 5142 struct ath12k *ar; 5143 5144 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 5145 if (!reg_info) { 5146 ret = -ENOMEM; 5147 goto fallback; 5148 } 5149 5150 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 5151 5152 if (ret) { 5153 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 5154 goto fallback; 5155 } 5156 5157 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { 5158 /* In case of failure to set the requested ctry, 5159 * fw retains the current regd. We print a failure info 5160 * and return from here. 5161 */ 5162 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n"); 5163 goto mem_free; 5164 } 5165 5166 pdev_idx = reg_info->phy_id; 5167 5168 if (pdev_idx >= ab->num_radios) { 5169 /* Process the event for phy0 only if single_pdev_only 5170 * is true. If pdev_idx is valid but not 0, discard the 5171 * event. Otherwise, it goes to fallback. 5172 */ 5173 if (ab->hw_params->single_pdev_only && 5174 pdev_idx < ab->hw_params->num_rxmda_per_pdev) 5175 goto mem_free; 5176 else 5177 goto fallback; 5178 } 5179 5180 /* Avoid multiple overwrites to default regd, during core 5181 * stop-start after mac registration. 5182 */ 5183 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && 5184 !memcmp(ab->default_regd[pdev_idx]->alpha2, 5185 reg_info->alpha2, 2)) 5186 goto mem_free; 5187 5188 /* Intersect new rules with default regd if a new country setting was 5189 * requested, i.e a default regd was already set during initialization 5190 * and the regd coming from this event has a valid country info. 5191 */ 5192 if (ab->default_regd[pdev_idx] && 5193 !ath12k_reg_is_world_alpha((char *) 5194 ab->default_regd[pdev_idx]->alpha2) && 5195 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2)) 5196 intersect = true; 5197 5198 regd = ath12k_reg_build_regd(ab, reg_info, intersect); 5199 if (!regd) { 5200 ath12k_warn(ab, "failed to build regd from reg_info\n"); 5201 goto fallback; 5202 } 5203 5204 spin_lock(&ab->base_lock); 5205 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) { 5206 /* Once mac is registered, ar is valid and all CC events from 5207 * fw is considered to be received due to user requests 5208 * currently. 5209 * Free previously built regd before assigning the newly 5210 * generated regd to ar. NULL pointer handling will be 5211 * taken care by kfree itself. 5212 */ 5213 ar = ab->pdevs[pdev_idx].ar; 5214 kfree(ab->new_regd[pdev_idx]); 5215 ab->new_regd[pdev_idx] = regd; 5216 ieee80211_queue_work(ar->hw, &ar->regd_update_work); 5217 } else { 5218 /* Multiple events for the same *ar is not expected. But we 5219 * can still clear any previously stored default_regd if we 5220 * are receiving this event for the same radio by mistake. 5221 * NULL pointer handling will be taken care by kfree itself. 5222 */ 5223 kfree(ab->default_regd[pdev_idx]); 5224 /* This regd would be applied during mac registration */ 5225 ab->default_regd[pdev_idx] = regd; 5226 } 5227 ab->dfs_region = reg_info->dfs_region; 5228 spin_unlock(&ab->base_lock); 5229 5230 goto mem_free; 5231 5232 fallback: 5233 /* Fallback to older reg (by sending previous country setting 5234 * again if fw has succeeded and we failed to process here. 5235 * The Regdomain should be uniform across driver and fw. Since the 5236 * FW has processed the command and sent a success status, we expect 5237 * this function to succeed as well. If it doesn't, CTRY needs to be 5238 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 5239 */ 5240 /* TODO: This is rare, but still should also be handled */ 5241 WARN_ON(1); 5242 mem_free: 5243 if (reg_info) { 5244 kfree(reg_info->reg_rules_2g_ptr); 5245 kfree(reg_info->reg_rules_5g_ptr); 5246 if (reg_info->is_ext_reg_event) { 5247 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) 5248 kfree(reg_info->reg_rules_6g_ap_ptr[i]); 5249 5250 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) 5251 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) 5252 kfree(reg_info->reg_rules_6g_client_ptr[j][i]); 5253 } 5254 kfree(reg_info); 5255 } 5256 return ret; 5257 } 5258 5259 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 5260 const void *ptr, void *data) 5261 { 5262 struct ath12k_wmi_rdy_parse *rdy_parse = data; 5263 struct wmi_ready_event fixed_param; 5264 struct ath12k_wmi_mac_addr_params *addr_list; 5265 struct ath12k_pdev *pdev; 5266 u32 num_mac_addr; 5267 int i; 5268 5269 switch (tag) { 5270 case WMI_TAG_READY_EVENT: 5271 memset(&fixed_param, 0, sizeof(fixed_param)); 5272 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 5273 min_t(u16, sizeof(fixed_param), len)); 5274 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 5275 rdy_parse->num_extra_mac_addr = 5276 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 5277 5278 ether_addr_copy(ab->mac_addr, 5279 fixed_param.ready_event_min.mac_addr.addr); 5280 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 5281 ab->wmi_ready = true; 5282 break; 5283 case WMI_TAG_ARRAY_FIXED_STRUCT: 5284 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 5285 num_mac_addr = rdy_parse->num_extra_mac_addr; 5286 5287 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 5288 break; 5289 5290 for (i = 0; i < ab->num_radios; i++) { 5291 pdev = &ab->pdevs[i]; 5292 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 5293 } 5294 ab->pdevs_macaddr_valid = true; 5295 break; 5296 default: 5297 break; 5298 } 5299 5300 return 0; 5301 } 5302 5303 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 5304 { 5305 struct ath12k_wmi_rdy_parse rdy_parse = { }; 5306 int ret; 5307 5308 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5309 ath12k_wmi_rdy_parse, &rdy_parse); 5310 if (ret) { 5311 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5312 return ret; 5313 } 5314 5315 complete(&ab->wmi_ab.unified_ready); 5316 return 0; 5317 } 5318 5319 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5320 { 5321 struct wmi_peer_delete_resp_event peer_del_resp; 5322 struct ath12k *ar; 5323 5324 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 5325 ath12k_warn(ab, "failed to extract peer delete resp"); 5326 return; 5327 } 5328 5329 rcu_read_lock(); 5330 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 5331 if (!ar) { 5332 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 5333 peer_del_resp.vdev_id); 5334 rcu_read_unlock(); 5335 return; 5336 } 5337 5338 complete(&ar->peer_delete_done); 5339 rcu_read_unlock(); 5340 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 5341 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 5342 } 5343 5344 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 5345 struct sk_buff *skb) 5346 { 5347 struct ath12k *ar; 5348 u32 vdev_id = 0; 5349 5350 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 5351 ath12k_warn(ab, "failed to extract vdev delete resp"); 5352 return; 5353 } 5354 5355 rcu_read_lock(); 5356 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5357 if (!ar) { 5358 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 5359 vdev_id); 5360 rcu_read_unlock(); 5361 return; 5362 } 5363 5364 complete(&ar->vdev_delete_done); 5365 5366 rcu_read_unlock(); 5367 5368 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 5369 vdev_id); 5370 } 5371 5372 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 5373 { 5374 switch (vdev_resp_status) { 5375 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 5376 return "invalid vdev id"; 5377 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 5378 return "not supported"; 5379 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 5380 return "dfs violation"; 5381 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 5382 return "invalid regdomain"; 5383 default: 5384 return "unknown"; 5385 } 5386 } 5387 5388 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5389 { 5390 struct wmi_vdev_start_resp_event vdev_start_resp; 5391 struct ath12k *ar; 5392 u32 status; 5393 5394 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 5395 ath12k_warn(ab, "failed to extract vdev start resp"); 5396 return; 5397 } 5398 5399 rcu_read_lock(); 5400 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 5401 if (!ar) { 5402 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 5403 vdev_start_resp.vdev_id); 5404 rcu_read_unlock(); 5405 return; 5406 } 5407 5408 ar->last_wmi_vdev_start_status = 0; 5409 5410 status = le32_to_cpu(vdev_start_resp.status); 5411 5412 if (WARN_ON_ONCE(status)) { 5413 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 5414 status, ath12k_wmi_vdev_resp_print(status)); 5415 ar->last_wmi_vdev_start_status = status; 5416 } 5417 5418 complete(&ar->vdev_setup_done); 5419 5420 rcu_read_unlock(); 5421 5422 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 5423 vdev_start_resp.vdev_id); 5424 } 5425 5426 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 5427 { 5428 u32 vdev_id, tx_status; 5429 5430 if (ath12k_pull_bcn_tx_status_ev(ab, skb->data, skb->len, 5431 &vdev_id, &tx_status) != 0) { 5432 ath12k_warn(ab, "failed to extract bcn tx status"); 5433 return; 5434 } 5435 } 5436 5437 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 5438 { 5439 struct ath12k *ar; 5440 u32 vdev_id = 0; 5441 5442 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 5443 ath12k_warn(ab, "failed to extract vdev stopped event"); 5444 return; 5445 } 5446 5447 rcu_read_lock(); 5448 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5449 if (!ar) { 5450 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 5451 vdev_id); 5452 rcu_read_unlock(); 5453 return; 5454 } 5455 5456 complete(&ar->vdev_setup_done); 5457 5458 rcu_read_unlock(); 5459 5460 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 5461 } 5462 5463 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 5464 { 5465 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 5466 struct ath12k *ar; 5467 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 5468 struct ieee80211_hdr *hdr; 5469 u16 fc; 5470 struct ieee80211_supported_band *sband; 5471 5472 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 5473 ath12k_warn(ab, "failed to extract mgmt rx event"); 5474 dev_kfree_skb(skb); 5475 return; 5476 } 5477 5478 memset(status, 0, sizeof(*status)); 5479 5480 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 5481 rx_ev.status); 5482 5483 rcu_read_lock(); 5484 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 5485 5486 if (!ar) { 5487 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 5488 rx_ev.pdev_id); 5489 dev_kfree_skb(skb); 5490 goto exit; 5491 } 5492 5493 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) || 5494 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 5495 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 5496 WMI_RX_STATUS_ERR_CRC))) { 5497 dev_kfree_skb(skb); 5498 goto exit; 5499 } 5500 5501 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 5502 status->flag |= RX_FLAG_MMIC_ERROR; 5503 5504 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ) { 5505 status->band = NL80211_BAND_6GHZ; 5506 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 5507 status->band = NL80211_BAND_2GHZ; 5508 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 5509 status->band = NL80211_BAND_5GHZ; 5510 } else { 5511 /* Shouldn't happen unless list of advertised channels to 5512 * mac80211 has been changed. 5513 */ 5514 WARN_ON_ONCE(1); 5515 dev_kfree_skb(skb); 5516 goto exit; 5517 } 5518 5519 if (rx_ev.phy_mode == MODE_11B && 5520 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 5521 ath12k_dbg(ab, ATH12K_DBG_WMI, 5522 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 5523 5524 sband = &ar->mac.sbands[status->band]; 5525 5526 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 5527 status->band); 5528 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; 5529 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 5530 5531 hdr = (struct ieee80211_hdr *)skb->data; 5532 fc = le16_to_cpu(hdr->frame_control); 5533 5534 /* Firmware is guaranteed to report all essential management frames via 5535 * WMI while it can deliver some extra via HTT. Since there can be 5536 * duplicates split the reporting wrt monitor/sniffing. 5537 */ 5538 status->flag |= RX_FLAG_SKIP_MONITOR; 5539 5540 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 5541 * including group privacy action frames. 5542 */ 5543 if (ieee80211_has_protected(hdr->frame_control)) { 5544 status->flag |= RX_FLAG_DECRYPTED; 5545 5546 if (!ieee80211_is_robust_mgmt_frame(skb)) { 5547 status->flag |= RX_FLAG_IV_STRIPPED | 5548 RX_FLAG_MMIC_STRIPPED; 5549 hdr->frame_control = __cpu_to_le16(fc & 5550 ~IEEE80211_FCTL_PROTECTED); 5551 } 5552 } 5553 5554 /* TODO: Pending handle beacon implementation 5555 *if (ieee80211_is_beacon(hdr->frame_control)) 5556 * ath12k_mac_handle_beacon(ar, skb); 5557 */ 5558 5559 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5560 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n", 5561 skb, skb->len, 5562 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 5563 5564 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5565 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 5566 status->freq, status->band, status->signal, 5567 status->rate_idx); 5568 5569 ieee80211_rx_ni(ar->hw, skb); 5570 5571 exit: 5572 rcu_read_unlock(); 5573 } 5574 5575 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 5576 { 5577 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 5578 struct ath12k *ar; 5579 5580 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 5581 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 5582 return; 5583 } 5584 5585 rcu_read_lock(); 5586 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 5587 if (!ar) { 5588 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 5589 tx_compl_param.pdev_id); 5590 goto exit; 5591 } 5592 5593 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 5594 le32_to_cpu(tx_compl_param.status)); 5595 5596 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5597 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 5598 tx_compl_param.pdev_id, tx_compl_param.desc_id, 5599 tx_compl_param.status); 5600 5601 exit: 5602 rcu_read_unlock(); 5603 } 5604 5605 static struct ath12k *ath12k_get_ar_on_scan_abort(struct ath12k_base *ab, 5606 u32 vdev_id) 5607 { 5608 int i; 5609 struct ath12k_pdev *pdev; 5610 struct ath12k *ar; 5611 5612 for (i = 0; i < ab->num_radios; i++) { 5613 pdev = rcu_dereference(ab->pdevs_active[i]); 5614 if (pdev && pdev->ar) { 5615 ar = pdev->ar; 5616 5617 spin_lock_bh(&ar->data_lock); 5618 if (ar->scan.state == ATH12K_SCAN_ABORTING && 5619 ar->scan.vdev_id == vdev_id) { 5620 spin_unlock_bh(&ar->data_lock); 5621 return ar; 5622 } 5623 spin_unlock_bh(&ar->data_lock); 5624 } 5625 } 5626 return NULL; 5627 } 5628 5629 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 5630 { 5631 struct ath12k *ar; 5632 struct wmi_scan_event scan_ev = {0}; 5633 5634 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 5635 ath12k_warn(ab, "failed to extract scan event"); 5636 return; 5637 } 5638 5639 rcu_read_lock(); 5640 5641 /* In case the scan was cancelled, ex. during interface teardown, 5642 * the interface will not be found in active interfaces. 5643 * Rather, in such scenarios, iterate over the active pdev's to 5644 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 5645 * aborting scan's vdev id matches this event info. 5646 */ 5647 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 5648 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) 5649 ar = ath12k_get_ar_on_scan_abort(ab, le32_to_cpu(scan_ev.vdev_id)); 5650 else 5651 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 5652 5653 if (!ar) { 5654 ath12k_warn(ab, "Received scan event for unknown vdev"); 5655 rcu_read_unlock(); 5656 return; 5657 } 5658 5659 spin_lock_bh(&ar->data_lock); 5660 5661 ath12k_dbg(ab, ATH12K_DBG_WMI, 5662 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 5663 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 5664 le32_to_cpu(scan_ev.reason)), 5665 le32_to_cpu(scan_ev.event_type), 5666 le32_to_cpu(scan_ev.reason), 5667 le32_to_cpu(scan_ev.channel_freq), 5668 le32_to_cpu(scan_ev.scan_req_id), 5669 le32_to_cpu(scan_ev.scan_id), 5670 le32_to_cpu(scan_ev.vdev_id), 5671 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 5672 5673 switch (le32_to_cpu(scan_ev.event_type)) { 5674 case WMI_SCAN_EVENT_STARTED: 5675 ath12k_wmi_event_scan_started(ar); 5676 break; 5677 case WMI_SCAN_EVENT_COMPLETED: 5678 ath12k_wmi_event_scan_completed(ar); 5679 break; 5680 case WMI_SCAN_EVENT_BSS_CHANNEL: 5681 ath12k_wmi_event_scan_bss_chan(ar); 5682 break; 5683 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5684 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 5685 break; 5686 case WMI_SCAN_EVENT_START_FAILED: 5687 ath12k_warn(ab, "received scan start failure event\n"); 5688 ath12k_wmi_event_scan_start_failed(ar); 5689 break; 5690 case WMI_SCAN_EVENT_DEQUEUED: 5691 case WMI_SCAN_EVENT_PREEMPTED: 5692 case WMI_SCAN_EVENT_RESTARTED: 5693 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5694 default: 5695 break; 5696 } 5697 5698 spin_unlock_bh(&ar->data_lock); 5699 5700 rcu_read_unlock(); 5701 } 5702 5703 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 5704 { 5705 struct wmi_peer_sta_kickout_arg arg = {}; 5706 struct ieee80211_sta *sta; 5707 struct ath12k_peer *peer; 5708 struct ath12k *ar; 5709 5710 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 5711 ath12k_warn(ab, "failed to extract peer sta kickout event"); 5712 return; 5713 } 5714 5715 rcu_read_lock(); 5716 5717 spin_lock_bh(&ab->base_lock); 5718 5719 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 5720 5721 if (!peer) { 5722 ath12k_warn(ab, "peer not found %pM\n", 5723 arg.mac_addr); 5724 goto exit; 5725 } 5726 5727 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 5728 if (!ar) { 5729 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 5730 peer->vdev_id); 5731 goto exit; 5732 } 5733 5734 sta = ieee80211_find_sta_by_ifaddr(ar->hw, 5735 arg.mac_addr, NULL); 5736 if (!sta) { 5737 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 5738 arg.mac_addr); 5739 goto exit; 5740 } 5741 5742 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 5743 arg.mac_addr); 5744 5745 ieee80211_report_low_ack(sta, 10); 5746 5747 exit: 5748 spin_unlock_bh(&ab->base_lock); 5749 rcu_read_unlock(); 5750 } 5751 5752 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 5753 { 5754 struct wmi_roam_event roam_ev = {}; 5755 struct ath12k *ar; 5756 5757 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 5758 ath12k_warn(ab, "failed to extract roam event"); 5759 return; 5760 } 5761 5762 ath12k_dbg(ab, ATH12K_DBG_WMI, 5763 "wmi roam event vdev %u reason 0x%08x rssi %d\n", 5764 roam_ev.vdev_id, roam_ev.reason, roam_ev.rssi); 5765 5766 rcu_read_lock(); 5767 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(roam_ev.vdev_id)); 5768 if (!ar) { 5769 ath12k_warn(ab, "invalid vdev id in roam ev %d", 5770 roam_ev.vdev_id); 5771 rcu_read_unlock(); 5772 return; 5773 } 5774 5775 if (le32_to_cpu(roam_ev.reason) >= WMI_ROAM_REASON_MAX) 5776 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 5777 roam_ev.reason, roam_ev.vdev_id); 5778 5779 switch (le32_to_cpu(roam_ev.reason)) { 5780 case WMI_ROAM_REASON_BEACON_MISS: 5781 /* TODO: Pending beacon miss and connection_loss_work 5782 * implementation 5783 * ath12k_mac_handle_beacon_miss(ar, vdev_id); 5784 */ 5785 break; 5786 case WMI_ROAM_REASON_BETTER_AP: 5787 case WMI_ROAM_REASON_LOW_RSSI: 5788 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 5789 case WMI_ROAM_REASON_HO_FAILED: 5790 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 5791 roam_ev.reason, roam_ev.vdev_id); 5792 break; 5793 } 5794 5795 rcu_read_unlock(); 5796 } 5797 5798 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 5799 { 5800 struct wmi_chan_info_event ch_info_ev = {0}; 5801 struct ath12k *ar; 5802 struct survey_info *survey; 5803 int idx; 5804 /* HW channel counters frequency value in hertz */ 5805 u32 cc_freq_hz = ab->cc_freq_hz; 5806 5807 if (ath12k_pull_chan_info_ev(ab, skb->data, skb->len, &ch_info_ev) != 0) { 5808 ath12k_warn(ab, "failed to extract chan info event"); 5809 return; 5810 } 5811 5812 ath12k_dbg(ab, ATH12K_DBG_WMI, 5813 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 5814 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 5815 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 5816 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 5817 ch_info_ev.mac_clk_mhz); 5818 5819 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 5820 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 5821 return; 5822 } 5823 5824 rcu_read_lock(); 5825 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 5826 if (!ar) { 5827 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 5828 ch_info_ev.vdev_id); 5829 rcu_read_unlock(); 5830 return; 5831 } 5832 spin_lock_bh(&ar->data_lock); 5833 5834 switch (ar->scan.state) { 5835 case ATH12K_SCAN_IDLE: 5836 case ATH12K_SCAN_STARTING: 5837 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 5838 goto exit; 5839 case ATH12K_SCAN_RUNNING: 5840 case ATH12K_SCAN_ABORTING: 5841 break; 5842 } 5843 5844 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 5845 if (idx >= ARRAY_SIZE(ar->survey)) { 5846 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 5847 ch_info_ev.freq, idx); 5848 goto exit; 5849 } 5850 5851 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 5852 * HW channel counters frequency value 5853 */ 5854 if (ch_info_ev.mac_clk_mhz) 5855 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 5856 5857 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 5858 survey = &ar->survey[idx]; 5859 memset(survey, 0, sizeof(*survey)); 5860 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 5861 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 5862 SURVEY_INFO_TIME_BUSY; 5863 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 5864 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 5865 cc_freq_hz); 5866 } 5867 exit: 5868 spin_unlock_bh(&ar->data_lock); 5869 rcu_read_unlock(); 5870 } 5871 5872 static void 5873 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 5874 { 5875 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 5876 struct survey_info *survey; 5877 struct ath12k *ar; 5878 u32 cc_freq_hz = ab->cc_freq_hz; 5879 u64 busy, total, tx, rx, rx_bss; 5880 int idx; 5881 5882 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 5883 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 5884 return; 5885 } 5886 5887 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 5888 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 5889 5890 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 5891 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 5892 5893 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 5894 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 5895 5896 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 5897 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 5898 5899 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 5900 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 5901 5902 ath12k_dbg(ab, ATH12K_DBG_WMI, 5903 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 5904 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 5905 bss_ch_info_ev.noise_floor, busy, total, 5906 tx, rx, rx_bss); 5907 5908 rcu_read_lock(); 5909 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 5910 5911 if (!ar) { 5912 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 5913 bss_ch_info_ev.pdev_id); 5914 rcu_read_unlock(); 5915 return; 5916 } 5917 5918 spin_lock_bh(&ar->data_lock); 5919 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 5920 if (idx >= ARRAY_SIZE(ar->survey)) { 5921 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 5922 bss_ch_info_ev.freq, idx); 5923 goto exit; 5924 } 5925 5926 survey = &ar->survey[idx]; 5927 5928 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 5929 survey->time = div_u64(total, cc_freq_hz); 5930 survey->time_busy = div_u64(busy, cc_freq_hz); 5931 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 5932 survey->time_tx = div_u64(tx, cc_freq_hz); 5933 survey->filled |= (SURVEY_INFO_NOISE_DBM | 5934 SURVEY_INFO_TIME | 5935 SURVEY_INFO_TIME_BUSY | 5936 SURVEY_INFO_TIME_RX | 5937 SURVEY_INFO_TIME_TX); 5938 exit: 5939 spin_unlock_bh(&ar->data_lock); 5940 complete(&ar->bss_survey_done); 5941 5942 rcu_read_unlock(); 5943 } 5944 5945 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 5946 struct sk_buff *skb) 5947 { 5948 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 5949 struct ath12k *ar; 5950 5951 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 5952 ath12k_warn(ab, "failed to extract install key compl event"); 5953 return; 5954 } 5955 5956 ath12k_dbg(ab, ATH12K_DBG_WMI, 5957 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 5958 install_key_compl.key_idx, install_key_compl.key_flags, 5959 install_key_compl.macaddr, install_key_compl.status); 5960 5961 rcu_read_lock(); 5962 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 5963 if (!ar) { 5964 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 5965 install_key_compl.vdev_id); 5966 rcu_read_unlock(); 5967 return; 5968 } 5969 5970 ar->install_key_status = 0; 5971 5972 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 5973 ath12k_warn(ab, "install key failed for %pM status %d\n", 5974 install_key_compl.macaddr, install_key_compl.status); 5975 ar->install_key_status = install_key_compl.status; 5976 } 5977 5978 complete(&ar->install_key_done); 5979 rcu_read_unlock(); 5980 } 5981 5982 static void ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 5983 { 5984 const void **tb; 5985 const struct wmi_service_available_event *ev; 5986 int ret; 5987 int i, j; 5988 5989 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5990 if (IS_ERR(tb)) { 5991 ret = PTR_ERR(tb); 5992 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5993 return; 5994 } 5995 5996 ev = tb[WMI_TAG_SERVICE_AVAILABLE_EVENT]; 5997 if (!ev) { 5998 ath12k_warn(ab, "failed to fetch svc available ev"); 5999 kfree(tb); 6000 return; 6001 } 6002 6003 /* TODO: Use wmi_service_segment_offset information to get the service 6004 * especially when more services are advertised in multiple service 6005 * available events. 6006 */ 6007 for (i = 0, j = WMI_MAX_SERVICE; 6008 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 6009 i++) { 6010 do { 6011 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 6012 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6013 set_bit(j, ab->wmi_ab.svc_map); 6014 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6015 } 6016 6017 ath12k_dbg(ab, ATH12K_DBG_WMI, 6018 "wmi_ext_service_bitmap 0:0x%x, 1:0x%x, 2:0x%x, 3:0x%x", 6019 ev->wmi_service_segment_bitmap[0], ev->wmi_service_segment_bitmap[1], 6020 ev->wmi_service_segment_bitmap[2], ev->wmi_service_segment_bitmap[3]); 6021 6022 kfree(tb); 6023 } 6024 6025 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 6026 { 6027 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 6028 struct ath12k *ar; 6029 6030 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 6031 ath12k_warn(ab, "failed to extract peer assoc conf event"); 6032 return; 6033 } 6034 6035 ath12k_dbg(ab, ATH12K_DBG_WMI, 6036 "peer assoc conf ev vdev id %d macaddr %pM\n", 6037 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 6038 6039 rcu_read_lock(); 6040 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 6041 6042 if (!ar) { 6043 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 6044 peer_assoc_conf.vdev_id); 6045 rcu_read_unlock(); 6046 return; 6047 } 6048 6049 complete(&ar->peer_assoc_done); 6050 rcu_read_unlock(); 6051 } 6052 6053 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 6054 { 6055 } 6056 6057 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 6058 * is not part of BDF CTL(Conformance test limits) table entries. 6059 */ 6060 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 6061 struct sk_buff *skb) 6062 { 6063 const void **tb; 6064 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 6065 int ret; 6066 6067 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6068 if (IS_ERR(tb)) { 6069 ret = PTR_ERR(tb); 6070 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6071 return; 6072 } 6073 6074 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 6075 if (!ev) { 6076 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 6077 kfree(tb); 6078 return; 6079 } 6080 6081 ath12k_dbg(ab, ATH12K_DBG_WMI, 6082 "pdev ctl failsafe check ev status %d\n", 6083 ev->ctl_failsafe_status); 6084 6085 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 6086 * to 10 dBm else the CTL power entry in the BDF would be picked up. 6087 */ 6088 if (ev->ctl_failsafe_status != 0) 6089 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 6090 ev->ctl_failsafe_status); 6091 6092 kfree(tb); 6093 } 6094 6095 static void 6096 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 6097 const struct ath12k_wmi_pdev_csa_event *ev, 6098 const u32 *vdev_ids) 6099 { 6100 int i; 6101 struct ath12k_vif *arvif; 6102 6103 /* Finish CSA once the switch count becomes NULL */ 6104 if (ev->current_switch_count) 6105 return; 6106 6107 rcu_read_lock(); 6108 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) { 6109 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 6110 6111 if (!arvif) { 6112 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 6113 vdev_ids[i]); 6114 continue; 6115 } 6116 6117 if (arvif->is_up && arvif->vif->bss_conf.csa_active) 6118 ieee80211_csa_finish(arvif->vif); 6119 } 6120 rcu_read_unlock(); 6121 } 6122 6123 static void 6124 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 6125 struct sk_buff *skb) 6126 { 6127 const void **tb; 6128 const struct ath12k_wmi_pdev_csa_event *ev; 6129 const u32 *vdev_ids; 6130 int ret; 6131 6132 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6133 if (IS_ERR(tb)) { 6134 ret = PTR_ERR(tb); 6135 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6136 return; 6137 } 6138 6139 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 6140 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 6141 6142 if (!ev || !vdev_ids) { 6143 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 6144 kfree(tb); 6145 return; 6146 } 6147 6148 ath12k_dbg(ab, ATH12K_DBG_WMI, 6149 "pdev csa switch count %d for pdev %d, num_vdevs %d", 6150 ev->current_switch_count, ev->pdev_id, 6151 ev->num_vdevs); 6152 6153 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 6154 6155 kfree(tb); 6156 } 6157 6158 static void 6159 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 6160 { 6161 const void **tb; 6162 const struct ath12k_wmi_pdev_radar_event *ev; 6163 struct ath12k *ar; 6164 int ret; 6165 6166 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6167 if (IS_ERR(tb)) { 6168 ret = PTR_ERR(tb); 6169 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6170 return; 6171 } 6172 6173 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 6174 6175 if (!ev) { 6176 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 6177 kfree(tb); 6178 return; 6179 } 6180 6181 ath12k_dbg(ab, ATH12K_DBG_WMI, 6182 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 6183 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 6184 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 6185 ev->freq_offset, ev->sidx); 6186 6187 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 6188 6189 if (!ar) { 6190 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 6191 ev->pdev_id); 6192 goto exit; 6193 } 6194 6195 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 6196 ev->pdev_id); 6197 6198 if (ar->dfs_block_radar_events) 6199 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 6200 else 6201 ieee80211_radar_detected(ar->hw); 6202 6203 exit: 6204 kfree(tb); 6205 } 6206 6207 static void 6208 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 6209 struct sk_buff *skb) 6210 { 6211 struct ath12k *ar; 6212 struct wmi_pdev_temperature_event ev = {0}; 6213 6214 if (ath12k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) { 6215 ath12k_warn(ab, "failed to extract pdev temperature event"); 6216 return; 6217 } 6218 6219 ath12k_dbg(ab, ATH12K_DBG_WMI, 6220 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 6221 6222 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 6223 if (!ar) { 6224 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 6225 return; 6226 } 6227 } 6228 6229 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 6230 struct sk_buff *skb) 6231 { 6232 const void **tb; 6233 const struct wmi_fils_discovery_event *ev; 6234 int ret; 6235 6236 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6237 if (IS_ERR(tb)) { 6238 ret = PTR_ERR(tb); 6239 ath12k_warn(ab, 6240 "failed to parse FILS discovery event tlv %d\n", 6241 ret); 6242 return; 6243 } 6244 6245 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 6246 if (!ev) { 6247 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 6248 kfree(tb); 6249 return; 6250 } 6251 6252 ath12k_warn(ab, 6253 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 6254 ev->vdev_id, ev->fils_tt, ev->tbtt); 6255 6256 kfree(tb); 6257 } 6258 6259 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 6260 struct sk_buff *skb) 6261 { 6262 const void **tb; 6263 const struct wmi_probe_resp_tx_status_event *ev; 6264 int ret; 6265 6266 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6267 if (IS_ERR(tb)) { 6268 ret = PTR_ERR(tb); 6269 ath12k_warn(ab, 6270 "failed to parse probe response transmission status event tlv: %d\n", 6271 ret); 6272 return; 6273 } 6274 6275 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 6276 if (!ev) { 6277 ath12k_warn(ab, 6278 "failed to fetch probe response transmission status event"); 6279 kfree(tb); 6280 return; 6281 } 6282 6283 if (ev->tx_status) 6284 ath12k_warn(ab, 6285 "Probe response transmission failed for vdev_id %u, status %u\n", 6286 ev->vdev_id, ev->tx_status); 6287 6288 kfree(tb); 6289 } 6290 6291 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 6292 { 6293 struct wmi_cmd_hdr *cmd_hdr; 6294 enum wmi_tlv_event_id id; 6295 6296 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 6297 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 6298 6299 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 6300 goto out; 6301 6302 switch (id) { 6303 /* Process all the WMI events here */ 6304 case WMI_SERVICE_READY_EVENTID: 6305 ath12k_service_ready_event(ab, skb); 6306 break; 6307 case WMI_SERVICE_READY_EXT_EVENTID: 6308 ath12k_service_ready_ext_event(ab, skb); 6309 break; 6310 case WMI_SERVICE_READY_EXT2_EVENTID: 6311 ath12k_service_ready_ext2_event(ab, skb); 6312 break; 6313 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 6314 ath12k_reg_chan_list_event(ab, skb); 6315 break; 6316 case WMI_READY_EVENTID: 6317 ath12k_ready_event(ab, skb); 6318 break; 6319 case WMI_PEER_DELETE_RESP_EVENTID: 6320 ath12k_peer_delete_resp_event(ab, skb); 6321 break; 6322 case WMI_VDEV_START_RESP_EVENTID: 6323 ath12k_vdev_start_resp_event(ab, skb); 6324 break; 6325 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 6326 ath12k_bcn_tx_status_event(ab, skb); 6327 break; 6328 case WMI_VDEV_STOPPED_EVENTID: 6329 ath12k_vdev_stopped_event(ab, skb); 6330 break; 6331 case WMI_MGMT_RX_EVENTID: 6332 ath12k_mgmt_rx_event(ab, skb); 6333 /* mgmt_rx_event() owns the skb now! */ 6334 return; 6335 case WMI_MGMT_TX_COMPLETION_EVENTID: 6336 ath12k_mgmt_tx_compl_event(ab, skb); 6337 break; 6338 case WMI_SCAN_EVENTID: 6339 ath12k_scan_event(ab, skb); 6340 break; 6341 case WMI_PEER_STA_KICKOUT_EVENTID: 6342 ath12k_peer_sta_kickout_event(ab, skb); 6343 break; 6344 case WMI_ROAM_EVENTID: 6345 ath12k_roam_event(ab, skb); 6346 break; 6347 case WMI_CHAN_INFO_EVENTID: 6348 ath12k_chan_info_event(ab, skb); 6349 break; 6350 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 6351 ath12k_pdev_bss_chan_info_event(ab, skb); 6352 break; 6353 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 6354 ath12k_vdev_install_key_compl_event(ab, skb); 6355 break; 6356 case WMI_SERVICE_AVAILABLE_EVENTID: 6357 ath12k_service_available_event(ab, skb); 6358 break; 6359 case WMI_PEER_ASSOC_CONF_EVENTID: 6360 ath12k_peer_assoc_conf_event(ab, skb); 6361 break; 6362 case WMI_UPDATE_STATS_EVENTID: 6363 ath12k_update_stats_event(ab, skb); 6364 break; 6365 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 6366 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 6367 break; 6368 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 6369 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 6370 break; 6371 case WMI_PDEV_TEMPERATURE_EVENTID: 6372 ath12k_wmi_pdev_temperature_event(ab, skb); 6373 break; 6374 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 6375 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 6376 break; 6377 case WMI_HOST_FILS_DISCOVERY_EVENTID: 6378 ath12k_fils_discovery_event(ab, skb); 6379 break; 6380 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 6381 ath12k_probe_resp_tx_status_event(ab, skb); 6382 break; 6383 /* add Unsupported events here */ 6384 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 6385 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 6386 case WMI_TWT_ENABLE_EVENTID: 6387 case WMI_TWT_DISABLE_EVENTID: 6388 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 6389 ath12k_dbg(ab, ATH12K_DBG_WMI, 6390 "ignoring unsupported event 0x%x\n", id); 6391 break; 6392 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 6393 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 6394 break; 6395 case WMI_VDEV_DELETE_RESP_EVENTID: 6396 ath12k_vdev_delete_resp_event(ab, skb); 6397 break; 6398 /* TODO: Add remaining events */ 6399 default: 6400 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 6401 break; 6402 } 6403 6404 out: 6405 dev_kfree_skb(skb); 6406 } 6407 6408 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 6409 u32 pdev_idx) 6410 { 6411 int status; 6412 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL, 6413 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 6414 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 }; 6415 struct ath12k_htc_svc_conn_req conn_req = {}; 6416 struct ath12k_htc_svc_conn_resp conn_resp = {}; 6417 6418 /* these fields are the same for all service endpoints */ 6419 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 6420 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 6421 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 6422 6423 /* connect to control service */ 6424 conn_req.service_id = svc_id[pdev_idx]; 6425 6426 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 6427 if (status) { 6428 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 6429 status); 6430 return status; 6431 } 6432 6433 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 6434 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 6435 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 6436 6437 return 0; 6438 } 6439 6440 static int 6441 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 6442 struct wmi_unit_test_cmd ut_cmd, 6443 u32 *test_args) 6444 { 6445 struct ath12k_wmi_pdev *wmi = ar->wmi; 6446 struct wmi_unit_test_cmd *cmd; 6447 struct sk_buff *skb; 6448 struct wmi_tlv *tlv; 6449 void *ptr; 6450 u32 *ut_cmd_args; 6451 int buf_len, arg_len; 6452 int ret; 6453 int i; 6454 6455 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 6456 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 6457 6458 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 6459 if (!skb) 6460 return -ENOMEM; 6461 6462 cmd = (struct wmi_unit_test_cmd *)skb->data; 6463 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 6464 sizeof(ut_cmd)); 6465 6466 cmd->vdev_id = ut_cmd.vdev_id; 6467 cmd->module_id = ut_cmd.module_id; 6468 cmd->num_args = ut_cmd.num_args; 6469 cmd->diag_token = ut_cmd.diag_token; 6470 6471 ptr = skb->data + sizeof(ut_cmd); 6472 6473 tlv = ptr; 6474 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 6475 6476 ptr += TLV_HDR_SIZE; 6477 6478 ut_cmd_args = ptr; 6479 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 6480 ut_cmd_args[i] = test_args[i]; 6481 6482 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 6483 "WMI unit test : module %d vdev %d n_args %d token %d\n", 6484 cmd->module_id, cmd->vdev_id, cmd->num_args, 6485 cmd->diag_token); 6486 6487 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 6488 6489 if (ret) { 6490 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 6491 ret); 6492 dev_kfree_skb(skb); 6493 } 6494 6495 return ret; 6496 } 6497 6498 int ath12k_wmi_simulate_radar(struct ath12k *ar) 6499 { 6500 struct ath12k_vif *arvif; 6501 u32 dfs_args[DFS_MAX_TEST_ARGS]; 6502 struct wmi_unit_test_cmd wmi_ut; 6503 bool arvif_found = false; 6504 6505 list_for_each_entry(arvif, &ar->arvifs, list) { 6506 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) { 6507 arvif_found = true; 6508 break; 6509 } 6510 } 6511 6512 if (!arvif_found) 6513 return -EINVAL; 6514 6515 dfs_args[DFS_TEST_CMDID] = 0; 6516 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 6517 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 6518 * freq offset (b3 - b10) to unit test. For simulation 6519 * purpose this can be set to 0 which is valid. 6520 */ 6521 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 6522 6523 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 6524 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 6525 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 6526 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 6527 6528 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 6529 6530 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 6531 } 6532 6533 int ath12k_wmi_connect(struct ath12k_base *ab) 6534 { 6535 u32 i; 6536 u8 wmi_ep_count; 6537 6538 wmi_ep_count = ab->htc.wmi_ep_count; 6539 if (wmi_ep_count > ab->hw_params->max_radios) 6540 return -1; 6541 6542 for (i = 0; i < wmi_ep_count; i++) 6543 ath12k_connect_pdev_htc_service(ab, i); 6544 6545 return 0; 6546 } 6547 6548 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 6549 { 6550 if (WARN_ON(pdev_id >= MAX_RADIOS)) 6551 return; 6552 6553 /* TODO: Deinit any pdev specific wmi resource */ 6554 } 6555 6556 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 6557 u8 pdev_id) 6558 { 6559 struct ath12k_wmi_pdev *wmi_handle; 6560 6561 if (pdev_id >= ab->hw_params->max_radios) 6562 return -EINVAL; 6563 6564 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 6565 6566 wmi_handle->wmi_ab = &ab->wmi_ab; 6567 6568 ab->wmi_ab.ab = ab; 6569 /* TODO: Init remaining resource specific to pdev */ 6570 6571 return 0; 6572 } 6573 6574 int ath12k_wmi_attach(struct ath12k_base *ab) 6575 { 6576 int ret; 6577 6578 ret = ath12k_wmi_pdev_attach(ab, 0); 6579 if (ret) 6580 return ret; 6581 6582 ab->wmi_ab.ab = ab; 6583 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 6584 6585 /* It's overwritten when service_ext_ready is handled */ 6586 if (ab->hw_params->single_pdev_only) 6587 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 6588 6589 /* TODO: Init remaining wmi soc resources required */ 6590 init_completion(&ab->wmi_ab.service_ready); 6591 init_completion(&ab->wmi_ab.unified_ready); 6592 6593 return 0; 6594 } 6595 6596 void ath12k_wmi_detach(struct ath12k_base *ab) 6597 { 6598 int i; 6599 6600 /* TODO: Deinit wmi resource specific to SOC as required */ 6601 6602 for (i = 0; i < ab->htc.wmi_ep_count; i++) 6603 ath12k_wmi_pdev_detach(ab, i); 6604 6605 ath12k_wmi_free_dbring_caps(ab); 6606 } 6607