1 /* 2 * NXP Wireless LAN device driver: SDIO specific handling 3 * 4 * Copyright 2011-2020 NXP 5 * 6 * This software file (the "File") is distributed by NXP 7 * under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20 #include <linux/firmware.h> 21 22 #include "decl.h" 23 #include "ioctl.h" 24 #include "util.h" 25 #include "fw.h" 26 #include "main.h" 27 #include "wmm.h" 28 #include "11n.h" 29 #include "sdio.h" 30 31 32 #define SDIO_VERSION "1.0" 33 34 static void mwifiex_sdio_work(struct work_struct *work); 35 36 static struct mwifiex_if_ops sdio_ops; 37 38 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = { 39 .start_rd_port = 1, 40 .start_wr_port = 1, 41 .base_0_reg = 0x0040, 42 .base_1_reg = 0x0041, 43 .poll_reg = 0x30, 44 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK, 45 .host_int_rsr_reg = 0x1, 46 .host_int_mask_reg = 0x02, 47 .host_int_status_reg = 0x03, 48 .status_reg_0 = 0x60, 49 .status_reg_1 = 0x61, 50 .sdio_int_mask = 0x3f, 51 .data_port_mask = 0x0000fffe, 52 .io_port_0_reg = 0x78, 53 .io_port_1_reg = 0x79, 54 .io_port_2_reg = 0x7A, 55 .max_mp_regs = 64, 56 .rd_bitmap_l = 0x04, 57 .rd_bitmap_u = 0x05, 58 .wr_bitmap_l = 0x06, 59 .wr_bitmap_u = 0x07, 60 .rd_len_p0_l = 0x08, 61 .rd_len_p0_u = 0x09, 62 .card_misc_cfg_reg = 0x6c, 63 .func1_dump_reg_start = 0x0, 64 .func1_dump_reg_end = 0x9, 65 .func1_scratch_reg = 0x60, 66 .func1_spec_reg_num = 5, 67 .func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c}, 68 }; 69 70 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = { 71 .start_rd_port = 0, 72 .start_wr_port = 0, 73 .base_0_reg = 0x60, 74 .base_1_reg = 0x61, 75 .poll_reg = 0x50, 76 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 77 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 78 .host_int_rsr_reg = 0x1, 79 .host_int_status_reg = 0x03, 80 .host_int_mask_reg = 0x02, 81 .status_reg_0 = 0xc0, 82 .status_reg_1 = 0xc1, 83 .sdio_int_mask = 0xff, 84 .data_port_mask = 0xffffffff, 85 .io_port_0_reg = 0xD8, 86 .io_port_1_reg = 0xD9, 87 .io_port_2_reg = 0xDA, 88 .max_mp_regs = 184, 89 .rd_bitmap_l = 0x04, 90 .rd_bitmap_u = 0x05, 91 .rd_bitmap_1l = 0x06, 92 .rd_bitmap_1u = 0x07, 93 .wr_bitmap_l = 0x08, 94 .wr_bitmap_u = 0x09, 95 .wr_bitmap_1l = 0x0a, 96 .wr_bitmap_1u = 0x0b, 97 .rd_len_p0_l = 0x0c, 98 .rd_len_p0_u = 0x0d, 99 .card_misc_cfg_reg = 0xcc, 100 .card_cfg_2_1_reg = 0xcd, 101 .cmd_rd_len_0 = 0xb4, 102 .cmd_rd_len_1 = 0xb5, 103 .cmd_rd_len_2 = 0xb6, 104 .cmd_rd_len_3 = 0xb7, 105 .cmd_cfg_0 = 0xb8, 106 .cmd_cfg_1 = 0xb9, 107 .cmd_cfg_2 = 0xba, 108 .cmd_cfg_3 = 0xbb, 109 .fw_dump_host_ready = 0xee, 110 .fw_dump_ctrl = 0xe2, 111 .fw_dump_start = 0xe3, 112 .fw_dump_end = 0xea, 113 .func1_dump_reg_start = 0x0, 114 .func1_dump_reg_end = 0xb, 115 .func1_scratch_reg = 0xc0, 116 .func1_spec_reg_num = 8, 117 .func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58, 118 0x59, 0x5c, 0x5d}, 119 }; 120 121 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8977 = { 122 .start_rd_port = 0, 123 .start_wr_port = 0, 124 .base_0_reg = 0xF8, 125 .base_1_reg = 0xF9, 126 .poll_reg = 0x5C, 127 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 128 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 129 .host_int_rsr_reg = 0x4, 130 .host_int_status_reg = 0x0C, 131 .host_int_mask_reg = 0x08, 132 .status_reg_0 = 0xE8, 133 .status_reg_1 = 0xE9, 134 .sdio_int_mask = 0xff, 135 .data_port_mask = 0xffffffff, 136 .io_port_0_reg = 0xE4, 137 .io_port_1_reg = 0xE5, 138 .io_port_2_reg = 0xE6, 139 .max_mp_regs = 196, 140 .rd_bitmap_l = 0x10, 141 .rd_bitmap_u = 0x11, 142 .rd_bitmap_1l = 0x12, 143 .rd_bitmap_1u = 0x13, 144 .wr_bitmap_l = 0x14, 145 .wr_bitmap_u = 0x15, 146 .wr_bitmap_1l = 0x16, 147 .wr_bitmap_1u = 0x17, 148 .rd_len_p0_l = 0x18, 149 .rd_len_p0_u = 0x19, 150 .card_misc_cfg_reg = 0xd8, 151 .card_cfg_2_1_reg = 0xd9, 152 .cmd_rd_len_0 = 0xc0, 153 .cmd_rd_len_1 = 0xc1, 154 .cmd_rd_len_2 = 0xc2, 155 .cmd_rd_len_3 = 0xc3, 156 .cmd_cfg_0 = 0xc4, 157 .cmd_cfg_1 = 0xc5, 158 .cmd_cfg_2 = 0xc6, 159 .cmd_cfg_3 = 0xc7, 160 .fw_dump_host_ready = 0xcc, 161 .fw_dump_ctrl = 0xf0, 162 .fw_dump_start = 0xf1, 163 .fw_dump_end = 0xf8, 164 .func1_dump_reg_start = 0x10, 165 .func1_dump_reg_end = 0x17, 166 .func1_scratch_reg = 0xe8, 167 .func1_spec_reg_num = 13, 168 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 169 0x60, 0x61, 0x62, 0x64, 170 0x65, 0x66, 0x68, 0x69, 171 0x6a}, 172 }; 173 174 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = { 175 .start_rd_port = 0, 176 .start_wr_port = 0, 177 .base_0_reg = 0xF8, 178 .base_1_reg = 0xF9, 179 .poll_reg = 0x5C, 180 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 181 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 182 .host_int_rsr_reg = 0x4, 183 .host_int_status_reg = 0x0C, 184 .host_int_mask_reg = 0x08, 185 .status_reg_0 = 0xE8, 186 .status_reg_1 = 0xE9, 187 .sdio_int_mask = 0xff, 188 .data_port_mask = 0xffffffff, 189 .io_port_0_reg = 0xE4, 190 .io_port_1_reg = 0xE5, 191 .io_port_2_reg = 0xE6, 192 .max_mp_regs = 196, 193 .rd_bitmap_l = 0x10, 194 .rd_bitmap_u = 0x11, 195 .rd_bitmap_1l = 0x12, 196 .rd_bitmap_1u = 0x13, 197 .wr_bitmap_l = 0x14, 198 .wr_bitmap_u = 0x15, 199 .wr_bitmap_1l = 0x16, 200 .wr_bitmap_1u = 0x17, 201 .rd_len_p0_l = 0x18, 202 .rd_len_p0_u = 0x19, 203 .card_misc_cfg_reg = 0xd8, 204 .card_cfg_2_1_reg = 0xd9, 205 .cmd_rd_len_0 = 0xc0, 206 .cmd_rd_len_1 = 0xc1, 207 .cmd_rd_len_2 = 0xc2, 208 .cmd_rd_len_3 = 0xc3, 209 .cmd_cfg_0 = 0xc4, 210 .cmd_cfg_1 = 0xc5, 211 .cmd_cfg_2 = 0xc6, 212 .cmd_cfg_3 = 0xc7, 213 .fw_dump_host_ready = 0xcc, 214 .fw_dump_ctrl = 0xf0, 215 .fw_dump_start = 0xf1, 216 .fw_dump_end = 0xf8, 217 .func1_dump_reg_start = 0x10, 218 .func1_dump_reg_end = 0x17, 219 .func1_scratch_reg = 0xe8, 220 .func1_spec_reg_num = 13, 221 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 222 0x60, 0x61, 0x62, 0x64, 223 0x65, 0x66, 0x68, 0x69, 224 0x6a}, 225 }; 226 227 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = { 228 .start_rd_port = 0, 229 .start_wr_port = 0, 230 .base_0_reg = 0x6C, 231 .base_1_reg = 0x6D, 232 .poll_reg = 0x5C, 233 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 234 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 235 .host_int_rsr_reg = 0x4, 236 .host_int_status_reg = 0x0C, 237 .host_int_mask_reg = 0x08, 238 .status_reg_0 = 0x90, 239 .status_reg_1 = 0x91, 240 .sdio_int_mask = 0xff, 241 .data_port_mask = 0xffffffff, 242 .io_port_0_reg = 0xE4, 243 .io_port_1_reg = 0xE5, 244 .io_port_2_reg = 0xE6, 245 .max_mp_regs = 196, 246 .rd_bitmap_l = 0x10, 247 .rd_bitmap_u = 0x11, 248 .rd_bitmap_1l = 0x12, 249 .rd_bitmap_1u = 0x13, 250 .wr_bitmap_l = 0x14, 251 .wr_bitmap_u = 0x15, 252 .wr_bitmap_1l = 0x16, 253 .wr_bitmap_1u = 0x17, 254 .rd_len_p0_l = 0x18, 255 .rd_len_p0_u = 0x19, 256 .card_misc_cfg_reg = 0xd8, 257 .card_cfg_2_1_reg = 0xd9, 258 .cmd_rd_len_0 = 0xc0, 259 .cmd_rd_len_1 = 0xc1, 260 .cmd_rd_len_2 = 0xc2, 261 .cmd_rd_len_3 = 0xc3, 262 .cmd_cfg_0 = 0xc4, 263 .cmd_cfg_1 = 0xc5, 264 .cmd_cfg_2 = 0xc6, 265 .cmd_cfg_3 = 0xc7, 266 .func1_dump_reg_start = 0x10, 267 .func1_dump_reg_end = 0x17, 268 .func1_scratch_reg = 0x90, 269 .func1_spec_reg_num = 13, 270 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60, 271 0x61, 0x62, 0x64, 0x65, 0x66, 272 0x68, 0x69, 0x6a}, 273 }; 274 275 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8987 = { 276 .start_rd_port = 0, 277 .start_wr_port = 0, 278 .base_0_reg = 0xF8, 279 .base_1_reg = 0xF9, 280 .poll_reg = 0x5C, 281 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK | 282 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK, 283 .host_int_rsr_reg = 0x4, 284 .host_int_status_reg = 0x0C, 285 .host_int_mask_reg = 0x08, 286 .status_reg_0 = 0xE8, 287 .status_reg_1 = 0xE9, 288 .sdio_int_mask = 0xff, 289 .data_port_mask = 0xffffffff, 290 .io_port_0_reg = 0xE4, 291 .io_port_1_reg = 0xE5, 292 .io_port_2_reg = 0xE6, 293 .max_mp_regs = 196, 294 .rd_bitmap_l = 0x10, 295 .rd_bitmap_u = 0x11, 296 .rd_bitmap_1l = 0x12, 297 .rd_bitmap_1u = 0x13, 298 .wr_bitmap_l = 0x14, 299 .wr_bitmap_u = 0x15, 300 .wr_bitmap_1l = 0x16, 301 .wr_bitmap_1u = 0x17, 302 .rd_len_p0_l = 0x18, 303 .rd_len_p0_u = 0x19, 304 .card_misc_cfg_reg = 0xd8, 305 .card_cfg_2_1_reg = 0xd9, 306 .cmd_rd_len_0 = 0xc0, 307 .cmd_rd_len_1 = 0xc1, 308 .cmd_rd_len_2 = 0xc2, 309 .cmd_rd_len_3 = 0xc3, 310 .cmd_cfg_0 = 0xc4, 311 .cmd_cfg_1 = 0xc5, 312 .cmd_cfg_2 = 0xc6, 313 .cmd_cfg_3 = 0xc7, 314 .fw_dump_host_ready = 0xcc, 315 .fw_dump_ctrl = 0xf9, 316 .fw_dump_start = 0xf1, 317 .fw_dump_end = 0xf8, 318 .func1_dump_reg_start = 0x10, 319 .func1_dump_reg_end = 0x17, 320 .func1_scratch_reg = 0xE8, 321 .func1_spec_reg_num = 13, 322 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60, 323 0x61, 0x62, 0x64, 0x65, 0x66, 324 0x68, 0x69, 0x6a}, 325 }; 326 327 static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = { 328 .firmware = SD8786_DEFAULT_FW_NAME, 329 .reg = &mwifiex_reg_sd87xx, 330 .max_ports = 16, 331 .mp_agg_pkt_limit = 8, 332 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 333 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 334 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 335 .supports_sdio_new_mode = false, 336 .has_control_mask = true, 337 .can_dump_fw = false, 338 .can_auto_tdls = false, 339 .can_ext_scan = false, 340 }; 341 342 static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = { 343 .firmware = SD8787_DEFAULT_FW_NAME, 344 .reg = &mwifiex_reg_sd87xx, 345 .max_ports = 16, 346 .mp_agg_pkt_limit = 8, 347 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 348 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 349 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 350 .supports_sdio_new_mode = false, 351 .has_control_mask = true, 352 .can_dump_fw = false, 353 .can_auto_tdls = false, 354 .can_ext_scan = true, 355 }; 356 357 static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = { 358 .firmware = SD8797_DEFAULT_FW_NAME, 359 .reg = &mwifiex_reg_sd87xx, 360 .max_ports = 16, 361 .mp_agg_pkt_limit = 8, 362 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 363 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 364 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 365 .supports_sdio_new_mode = false, 366 .has_control_mask = true, 367 .can_dump_fw = false, 368 .can_auto_tdls = false, 369 .can_ext_scan = true, 370 }; 371 372 static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = { 373 .firmware = SD8897_DEFAULT_FW_NAME, 374 .reg = &mwifiex_reg_sd8897, 375 .max_ports = 32, 376 .mp_agg_pkt_limit = 16, 377 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 378 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 379 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 380 .supports_sdio_new_mode = true, 381 .has_control_mask = false, 382 .can_dump_fw = true, 383 .can_auto_tdls = false, 384 .can_ext_scan = true, 385 }; 386 387 static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = { 388 .firmware = SD8977_DEFAULT_FW_NAME, 389 .reg = &mwifiex_reg_sd8977, 390 .max_ports = 32, 391 .mp_agg_pkt_limit = 16, 392 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 393 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 394 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 395 .supports_sdio_new_mode = true, 396 .has_control_mask = false, 397 .can_dump_fw = true, 398 .fw_dump_enh = true, 399 .can_auto_tdls = false, 400 .can_ext_scan = true, 401 }; 402 403 static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = { 404 .firmware = SD8997_DEFAULT_FW_NAME, 405 .reg = &mwifiex_reg_sd8997, 406 .max_ports = 32, 407 .mp_agg_pkt_limit = 16, 408 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 409 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 410 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 411 .supports_sdio_new_mode = true, 412 .has_control_mask = false, 413 .can_dump_fw = true, 414 .fw_dump_enh = true, 415 .can_auto_tdls = false, 416 .can_ext_scan = true, 417 }; 418 419 static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = { 420 .firmware = SD8887_DEFAULT_FW_NAME, 421 .reg = &mwifiex_reg_sd8887, 422 .max_ports = 32, 423 .mp_agg_pkt_limit = 16, 424 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 425 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K, 426 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K, 427 .supports_sdio_new_mode = true, 428 .has_control_mask = false, 429 .can_dump_fw = false, 430 .can_auto_tdls = true, 431 .can_ext_scan = true, 432 }; 433 434 static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = { 435 .firmware = SD8987_DEFAULT_FW_NAME, 436 .reg = &mwifiex_reg_sd8987, 437 .max_ports = 32, 438 .mp_agg_pkt_limit = 16, 439 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 440 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 441 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, 442 .supports_sdio_new_mode = true, 443 .has_control_mask = false, 444 .can_dump_fw = true, 445 .fw_dump_enh = true, 446 .can_auto_tdls = true, 447 .can_ext_scan = true, 448 }; 449 450 static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = { 451 .firmware = SD8801_DEFAULT_FW_NAME, 452 .reg = &mwifiex_reg_sd87xx, 453 .max_ports = 16, 454 .mp_agg_pkt_limit = 8, 455 .supports_sdio_new_mode = false, 456 .has_control_mask = true, 457 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 458 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 459 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K, 460 .can_dump_fw = false, 461 .can_auto_tdls = false, 462 .can_ext_scan = true, 463 }; 464 465 static struct memory_type_mapping generic_mem_type_map[] = { 466 {"DUMP", NULL, 0, 0xDD}, 467 }; 468 469 static struct memory_type_mapping mem_type_mapping_tbl[] = { 470 {"ITCM", NULL, 0, 0xF0}, 471 {"DTCM", NULL, 0, 0xF1}, 472 {"SQRAM", NULL, 0, 0xF2}, 473 {"APU", NULL, 0, 0xF3}, 474 {"CIU", NULL, 0, 0xF4}, 475 {"ICU", NULL, 0, 0xF5}, 476 {"MAC", NULL, 0, 0xF6}, 477 {"EXT7", NULL, 0, 0xF7}, 478 {"EXT8", NULL, 0, 0xF8}, 479 {"EXT9", NULL, 0, 0xF9}, 480 {"EXT10", NULL, 0, 0xFA}, 481 {"EXT11", NULL, 0, 0xFB}, 482 {"EXT12", NULL, 0, 0xFC}, 483 {"EXT13", NULL, 0, 0xFD}, 484 {"EXTLAST", NULL, 0, 0xFE}, 485 }; 486 487 static const struct of_device_id mwifiex_sdio_of_match_table[] = { 488 { .compatible = "marvell,sd8897" }, 489 { .compatible = "marvell,sd8997" }, 490 { } 491 }; 492 493 /* This function parse device tree node using mmc subnode devicetree API. 494 * The device node is saved in card->plt_of_node. 495 * if the device tree node exist and include interrupts attributes, this 496 * function will also request platform specific wakeup interrupt. 497 */ 498 static int mwifiex_sdio_probe_of(struct device *dev) 499 { 500 if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) { 501 dev_err(dev, "required compatible string missing\n"); 502 return -EINVAL; 503 } 504 505 return 0; 506 } 507 508 /* 509 * SDIO probe. 510 * 511 * This function probes an mwifiex device and registers it. It allocates 512 * the card structure, enables SDIO function number and initiates the 513 * device registration and initialization procedure by adding a logical 514 * interface. 515 */ 516 static int 517 mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id) 518 { 519 int ret; 520 struct sdio_mmc_card *card = NULL; 521 522 pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n", 523 func->vendor, func->device, func->class, func->num); 524 525 card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL); 526 if (!card) 527 return -ENOMEM; 528 529 init_completion(&card->fw_done); 530 531 card->func = func; 532 533 func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE; 534 535 if (id->driver_data) { 536 struct mwifiex_sdio_device *data = (void *)id->driver_data; 537 538 card->firmware = data->firmware; 539 card->reg = data->reg; 540 card->max_ports = data->max_ports; 541 card->mp_agg_pkt_limit = data->mp_agg_pkt_limit; 542 card->supports_sdio_new_mode = data->supports_sdio_new_mode; 543 card->has_control_mask = data->has_control_mask; 544 card->tx_buf_size = data->tx_buf_size; 545 card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size; 546 card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size; 547 card->can_dump_fw = data->can_dump_fw; 548 card->fw_dump_enh = data->fw_dump_enh; 549 card->can_auto_tdls = data->can_auto_tdls; 550 card->can_ext_scan = data->can_ext_scan; 551 INIT_WORK(&card->work, mwifiex_sdio_work); 552 } 553 554 sdio_claim_host(func); 555 ret = sdio_enable_func(func); 556 sdio_release_host(func); 557 558 if (ret) { 559 dev_err(&func->dev, "failed to enable function\n"); 560 return ret; 561 } 562 563 /* device tree node parsing and platform specific configuration*/ 564 if (func->dev.of_node) { 565 ret = mwifiex_sdio_probe_of(&func->dev); 566 if (ret) 567 goto err_disable; 568 } 569 570 ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops, 571 MWIFIEX_SDIO, &func->dev); 572 if (ret) { 573 dev_err(&func->dev, "add card failed\n"); 574 goto err_disable; 575 } 576 577 return 0; 578 579 err_disable: 580 sdio_claim_host(func); 581 sdio_disable_func(func); 582 sdio_release_host(func); 583 584 return ret; 585 } 586 587 /* 588 * SDIO resume. 589 * 590 * Kernel needs to suspend all functions separately. Therefore all 591 * registered functions must have drivers with suspend and resume 592 * methods. Failing that the kernel simply removes the whole card. 593 * 594 * If already not resumed, this function turns on the traffic and 595 * sends a host sleep cancel request to the firmware. 596 */ 597 static int mwifiex_sdio_resume(struct device *dev) 598 { 599 struct sdio_func *func = dev_to_sdio_func(dev); 600 struct sdio_mmc_card *card; 601 struct mwifiex_adapter *adapter; 602 603 card = sdio_get_drvdata(func); 604 if (!card || !card->adapter) { 605 dev_err(dev, "resume: invalid card or adapter\n"); 606 return 0; 607 } 608 609 adapter = card->adapter; 610 611 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 612 mwifiex_dbg(adapter, WARN, 613 "device already resumed\n"); 614 return 0; 615 } 616 617 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 618 619 /* Disable Host Sleep */ 620 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), 621 MWIFIEX_SYNC_CMD); 622 623 mwifiex_disable_wake(adapter); 624 625 return 0; 626 } 627 628 /* Write data into SDIO card register. Caller claims SDIO device. */ 629 static int 630 mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data) 631 { 632 int ret = -1; 633 634 sdio_writeb(func, data, reg, &ret); 635 return ret; 636 } 637 638 /* This function writes data into SDIO card register. 639 */ 640 static int 641 mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data) 642 { 643 struct sdio_mmc_card *card = adapter->card; 644 int ret; 645 646 sdio_claim_host(card->func); 647 ret = mwifiex_write_reg_locked(card->func, reg, data); 648 sdio_release_host(card->func); 649 650 return ret; 651 } 652 653 /* This function reads data from SDIO card register. 654 */ 655 static int 656 mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data) 657 { 658 struct sdio_mmc_card *card = adapter->card; 659 int ret = -1; 660 u8 val; 661 662 sdio_claim_host(card->func); 663 val = sdio_readb(card->func, reg, &ret); 664 sdio_release_host(card->func); 665 666 *data = val; 667 668 return ret; 669 } 670 671 /* This function writes multiple data into SDIO card memory. 672 * 673 * This does not work in suspended mode. 674 */ 675 static int 676 mwifiex_write_data_sync(struct mwifiex_adapter *adapter, 677 u8 *buffer, u32 pkt_len, u32 port) 678 { 679 struct sdio_mmc_card *card = adapter->card; 680 int ret; 681 u8 blk_mode = 682 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE; 683 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 684 u32 blk_cnt = 685 (blk_mode == 686 BLOCK_MODE) ? (pkt_len / 687 MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len; 688 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 689 690 if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) { 691 mwifiex_dbg(adapter, ERROR, 692 "%s: not allowed while suspended\n", __func__); 693 return -1; 694 } 695 696 sdio_claim_host(card->func); 697 698 ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size); 699 700 sdio_release_host(card->func); 701 702 return ret; 703 } 704 705 /* This function reads multiple data from SDIO card memory. 706 */ 707 static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer, 708 u32 len, u32 port, u8 claim) 709 { 710 struct sdio_mmc_card *card = adapter->card; 711 int ret; 712 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE 713 : BLOCK_MODE; 714 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1; 715 u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE) 716 : len; 717 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK); 718 719 if (claim) 720 sdio_claim_host(card->func); 721 722 ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size); 723 724 if (claim) 725 sdio_release_host(card->func); 726 727 return ret; 728 } 729 730 /* This function reads the firmware status. 731 */ 732 static int 733 mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat) 734 { 735 struct sdio_mmc_card *card = adapter->card; 736 const struct mwifiex_sdio_card_reg *reg = card->reg; 737 u8 fws0, fws1; 738 739 if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0)) 740 return -1; 741 742 if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1)) 743 return -1; 744 745 *dat = (u16)((fws1 << 8) | fws0); 746 return 0; 747 } 748 749 /* This function checks the firmware status in card. 750 */ 751 static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, 752 u32 poll_num) 753 { 754 int ret = 0; 755 u16 firmware_stat; 756 u32 tries; 757 758 for (tries = 0; tries < poll_num; tries++) { 759 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 760 if (ret) 761 continue; 762 if (firmware_stat == FIRMWARE_READY_SDIO) { 763 ret = 0; 764 break; 765 } 766 767 msleep(100); 768 ret = -1; 769 } 770 771 return ret; 772 } 773 774 /* This function checks if WLAN is the winner. 775 */ 776 static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter) 777 { 778 int ret = 0; 779 u8 winner = 0; 780 struct sdio_mmc_card *card = adapter->card; 781 782 if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner)) 783 return -1; 784 785 if (winner) 786 adapter->winner = 0; 787 else 788 adapter->winner = 1; 789 790 return ret; 791 } 792 793 /* 794 * SDIO remove. 795 * 796 * This function removes the interface and frees up the card structure. 797 */ 798 static void 799 mwifiex_sdio_remove(struct sdio_func *func) 800 { 801 struct sdio_mmc_card *card; 802 struct mwifiex_adapter *adapter; 803 struct mwifiex_private *priv; 804 int ret = 0; 805 u16 firmware_stat; 806 807 card = sdio_get_drvdata(func); 808 if (!card) 809 return; 810 811 wait_for_completion(&card->fw_done); 812 813 adapter = card->adapter; 814 if (!adapter || !adapter->priv_num) 815 return; 816 817 mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num); 818 819 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat); 820 if (!ret && firmware_stat == FIRMWARE_READY_SDIO && 821 !adapter->mfg_mode) { 822 mwifiex_deauthenticate_all(adapter); 823 824 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 825 mwifiex_disable_auto_ds(priv); 826 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); 827 } 828 829 mwifiex_remove_card(adapter); 830 } 831 832 /* 833 * SDIO suspend. 834 * 835 * Kernel needs to suspend all functions separately. Therefore all 836 * registered functions must have drivers with suspend and resume 837 * methods. Failing that the kernel simply removes the whole card. 838 * 839 * If already not suspended, this function allocates and sends a host 840 * sleep activate request to the firmware and turns off the traffic. 841 */ 842 static int mwifiex_sdio_suspend(struct device *dev) 843 { 844 struct sdio_func *func = dev_to_sdio_func(dev); 845 struct sdio_mmc_card *card; 846 struct mwifiex_adapter *adapter; 847 mmc_pm_flag_t pm_flag = 0; 848 int ret = 0; 849 850 pm_flag = sdio_get_host_pm_caps(func); 851 pr_debug("cmd: %s: suspend: PM flag = 0x%x\n", 852 sdio_func_id(func), pm_flag); 853 if (!(pm_flag & MMC_PM_KEEP_POWER)) { 854 dev_err(dev, "%s: cannot remain alive while host is" 855 " suspended\n", sdio_func_id(func)); 856 return -ENOSYS; 857 } 858 859 card = sdio_get_drvdata(func); 860 if (!card) { 861 dev_err(dev, "suspend: invalid card\n"); 862 return 0; 863 } 864 865 /* Might still be loading firmware */ 866 wait_for_completion(&card->fw_done); 867 868 adapter = card->adapter; 869 if (!adapter) { 870 dev_err(dev, "adapter is not valid\n"); 871 return 0; 872 } 873 874 if (!adapter->is_up) 875 return -EBUSY; 876 877 mwifiex_enable_wake(adapter); 878 879 /* Enable the Host Sleep */ 880 if (!mwifiex_enable_hs(adapter)) { 881 mwifiex_dbg(adapter, ERROR, 882 "cmd: failed to suspend\n"); 883 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 884 mwifiex_disable_wake(adapter); 885 return -EFAULT; 886 } 887 888 mwifiex_dbg(adapter, INFO, 889 "cmd: suspend with MMC_PM_KEEP_POWER\n"); 890 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 891 892 /* Indicate device suspended */ 893 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags); 894 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags); 895 896 return ret; 897 } 898 899 static void mwifiex_sdio_coredump(struct device *dev) 900 { 901 struct sdio_func *func = dev_to_sdio_func(dev); 902 struct sdio_mmc_card *card; 903 904 card = sdio_get_drvdata(func); 905 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 906 &card->work_flags)) 907 schedule_work(&card->work); 908 } 909 910 /* WLAN IDs */ 911 static const struct sdio_device_id mwifiex_ids[] = { 912 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786_WLAN), 913 .driver_data = (unsigned long) &mwifiex_sdio_sd8786}, 914 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787_WLAN), 915 .driver_data = (unsigned long) &mwifiex_sdio_sd8787}, 916 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_WLAN), 917 .driver_data = (unsigned long) &mwifiex_sdio_sd8797}, 918 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897_WLAN), 919 .driver_data = (unsigned long) &mwifiex_sdio_sd8897}, 920 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887_WLAN), 921 .driver_data = (unsigned long)&mwifiex_sdio_sd8887}, 922 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801_WLAN), 923 .driver_data = (unsigned long)&mwifiex_sdio_sd8801}, 924 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN), 925 .driver_data = (unsigned long)&mwifiex_sdio_sd8977}, 926 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN), 927 .driver_data = (unsigned long)&mwifiex_sdio_sd8987}, 928 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN), 929 .driver_data = (unsigned long)&mwifiex_sdio_sd8997}, 930 {}, 931 }; 932 933 MODULE_DEVICE_TABLE(sdio, mwifiex_ids); 934 935 static const struct dev_pm_ops mwifiex_sdio_pm_ops = { 936 .suspend = mwifiex_sdio_suspend, 937 .resume = mwifiex_sdio_resume, 938 }; 939 940 static struct sdio_driver mwifiex_sdio = { 941 .name = "mwifiex_sdio", 942 .id_table = mwifiex_ids, 943 .probe = mwifiex_sdio_probe, 944 .remove = mwifiex_sdio_remove, 945 .drv = { 946 .owner = THIS_MODULE, 947 .coredump = mwifiex_sdio_coredump, 948 .pm = &mwifiex_sdio_pm_ops, 949 } 950 }; 951 952 /* 953 * This function wakes up the card. 954 * 955 * A host power up command is written to the card configuration 956 * register to wake up the card. 957 */ 958 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) 959 { 960 mwifiex_dbg(adapter, EVENT, 961 "event: wakeup device...\n"); 962 963 return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP); 964 } 965 966 /* 967 * This function is called after the card has woken up. 968 * 969 * The card configuration register is reset. 970 */ 971 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) 972 { 973 mwifiex_dbg(adapter, EVENT, 974 "cmd: wakeup device completed\n"); 975 976 return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0); 977 } 978 979 static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter, 980 struct mwifiex_fw_image *fw) 981 { 982 struct sdio_mmc_card *card = adapter->card; 983 int ret; 984 985 sdio_claim_host(card->func); 986 ret = mwifiex_dnld_fw(adapter, fw); 987 sdio_release_host(card->func); 988 989 return ret; 990 } 991 992 /* 993 * This function is used to initialize IO ports for the 994 * chipsets supporting SDIO new mode eg SD8897. 995 */ 996 static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter) 997 { 998 u8 reg; 999 struct sdio_mmc_card *card = adapter->card; 1000 1001 adapter->ioport = MEM_PORT; 1002 1003 /* enable sdio new mode */ 1004 if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®)) 1005 return -1; 1006 if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg, 1007 reg | CMD53_NEW_MODE)) 1008 return -1; 1009 1010 /* Configure cmd port and enable reading rx length from the register */ 1011 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®)) 1012 return -1; 1013 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0, 1014 reg | CMD_PORT_RD_LEN_EN)) 1015 return -1; 1016 1017 /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is 1018 * completed 1019 */ 1020 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®)) 1021 return -1; 1022 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1, 1023 reg | CMD_PORT_AUTO_EN)) 1024 return -1; 1025 1026 return 0; 1027 } 1028 1029 /* This function initializes the IO ports. 1030 * 1031 * The following operations are performed - 1032 * - Read the IO ports (0, 1 and 2) 1033 * - Set host interrupt Reset-To-Read to clear 1034 * - Set auto re-enable interrupt 1035 */ 1036 static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter) 1037 { 1038 u8 reg; 1039 struct sdio_mmc_card *card = adapter->card; 1040 1041 adapter->ioport = 0; 1042 1043 if (card->supports_sdio_new_mode) { 1044 if (mwifiex_init_sdio_new_mode(adapter)) 1045 return -1; 1046 goto cont; 1047 } 1048 1049 /* Read the IO port */ 1050 if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®)) 1051 adapter->ioport |= (reg & 0xff); 1052 else 1053 return -1; 1054 1055 if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®)) 1056 adapter->ioport |= ((reg & 0xff) << 8); 1057 else 1058 return -1; 1059 1060 if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®)) 1061 adapter->ioport |= ((reg & 0xff) << 16); 1062 else 1063 return -1; 1064 cont: 1065 mwifiex_dbg(adapter, INFO, 1066 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport); 1067 1068 /* Set Host interrupt reset to read to clear */ 1069 if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®)) 1070 mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg, 1071 reg | card->reg->sdio_int_mask); 1072 else 1073 return -1; 1074 1075 /* Dnld/Upld ready set to auto reset */ 1076 if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®)) 1077 mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg, 1078 reg | AUTO_RE_ENABLE_INT); 1079 else 1080 return -1; 1081 1082 return 0; 1083 } 1084 1085 /* 1086 * This function sends data to the card. 1087 */ 1088 static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter, 1089 u8 *payload, u32 pkt_len, u32 port) 1090 { 1091 u32 i = 0; 1092 int ret; 1093 1094 do { 1095 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port); 1096 if (ret) { 1097 i++; 1098 mwifiex_dbg(adapter, ERROR, 1099 "host_to_card, write iomem\t" 1100 "(%d) failed: %d\n", i, ret); 1101 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1102 mwifiex_dbg(adapter, ERROR, 1103 "write CFG reg failed\n"); 1104 1105 ret = -1; 1106 if (i > MAX_WRITE_IOMEM_RETRY) 1107 return ret; 1108 } 1109 } while (ret == -1); 1110 1111 return ret; 1112 } 1113 1114 /* 1115 * This function gets the read port. 1116 * 1117 * If control port bit is set in MP read bitmap, the control port 1118 * is returned, otherwise the current read port is returned and 1119 * the value is increased (provided it does not reach the maximum 1120 * limit, in which case it is reset to 1) 1121 */ 1122 static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port) 1123 { 1124 struct sdio_mmc_card *card = adapter->card; 1125 const struct mwifiex_sdio_card_reg *reg = card->reg; 1126 u32 rd_bitmap = card->mp_rd_bitmap; 1127 1128 mwifiex_dbg(adapter, DATA, 1129 "data: mp_rd_bitmap=0x%08x\n", rd_bitmap); 1130 1131 if (card->supports_sdio_new_mode) { 1132 if (!(rd_bitmap & reg->data_port_mask)) 1133 return -1; 1134 } else { 1135 if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask))) 1136 return -1; 1137 } 1138 1139 if ((card->has_control_mask) && 1140 (card->mp_rd_bitmap & CTRL_PORT_MASK)) { 1141 card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK); 1142 *port = CTRL_PORT; 1143 mwifiex_dbg(adapter, DATA, 1144 "data: port=%d mp_rd_bitmap=0x%08x\n", 1145 *port, card->mp_rd_bitmap); 1146 return 0; 1147 } 1148 1149 if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port))) 1150 return -1; 1151 1152 /* We are now handling the SDIO data ports */ 1153 card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port)); 1154 *port = card->curr_rd_port; 1155 1156 if (++card->curr_rd_port == card->max_ports) 1157 card->curr_rd_port = reg->start_rd_port; 1158 1159 mwifiex_dbg(adapter, DATA, 1160 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n", 1161 *port, rd_bitmap, card->mp_rd_bitmap); 1162 1163 return 0; 1164 } 1165 1166 /* 1167 * This function gets the write port for data. 1168 * 1169 * The current write port is returned if available and the value is 1170 * increased (provided it does not reach the maximum limit, in which 1171 * case it is reset to 1) 1172 */ 1173 static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port) 1174 { 1175 struct sdio_mmc_card *card = adapter->card; 1176 const struct mwifiex_sdio_card_reg *reg = card->reg; 1177 u32 wr_bitmap = card->mp_wr_bitmap; 1178 1179 mwifiex_dbg(adapter, DATA, 1180 "data: mp_wr_bitmap=0x%08x\n", wr_bitmap); 1181 1182 if (!(wr_bitmap & card->mp_data_port_mask)) { 1183 adapter->data_sent = true; 1184 return -EBUSY; 1185 } 1186 1187 if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) { 1188 card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port)); 1189 *port = card->curr_wr_port; 1190 if (++card->curr_wr_port == card->mp_end_port) 1191 card->curr_wr_port = reg->start_wr_port; 1192 } else { 1193 adapter->data_sent = true; 1194 return -EBUSY; 1195 } 1196 1197 if ((card->has_control_mask) && (*port == CTRL_PORT)) { 1198 mwifiex_dbg(adapter, ERROR, 1199 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 1200 *port, card->curr_wr_port, wr_bitmap, 1201 card->mp_wr_bitmap); 1202 return -1; 1203 } 1204 1205 mwifiex_dbg(adapter, DATA, 1206 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n", 1207 *port, wr_bitmap, card->mp_wr_bitmap); 1208 1209 return 0; 1210 } 1211 1212 /* 1213 * This function polls the card status. 1214 */ 1215 static int 1216 mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits) 1217 { 1218 struct sdio_mmc_card *card = adapter->card; 1219 u32 tries; 1220 u8 cs; 1221 1222 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1223 if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs)) 1224 break; 1225 else if ((cs & bits) == bits) 1226 return 0; 1227 1228 usleep_range(10, 20); 1229 } 1230 1231 mwifiex_dbg(adapter, ERROR, 1232 "poll card status failed, tries = %d\n", tries); 1233 1234 return -1; 1235 } 1236 1237 /* 1238 * This function disables the host interrupt. 1239 * 1240 * The host interrupt mask is read, the disable bit is reset and 1241 * written back to the card host interrupt mask register. 1242 */ 1243 static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter) 1244 { 1245 struct sdio_mmc_card *card = adapter->card; 1246 struct sdio_func *func = card->func; 1247 1248 sdio_claim_host(func); 1249 mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0); 1250 sdio_release_irq(func); 1251 sdio_release_host(func); 1252 } 1253 1254 /* 1255 * This function reads the interrupt status from card. 1256 */ 1257 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) 1258 { 1259 struct sdio_mmc_card *card = adapter->card; 1260 u8 sdio_ireg; 1261 unsigned long flags; 1262 1263 if (mwifiex_read_data_sync(adapter, card->mp_regs, 1264 card->reg->max_mp_regs, 1265 REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) { 1266 mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n"); 1267 return; 1268 } 1269 1270 sdio_ireg = card->mp_regs[card->reg->host_int_status_reg]; 1271 if (sdio_ireg) { 1272 /* 1273 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS 1274 * For SDIO new mode CMD port interrupts 1275 * DN_LD_CMD_PORT_HOST_INT_STATUS and/or 1276 * UP_LD_CMD_PORT_HOST_INT_STATUS 1277 * Clear the interrupt status register 1278 */ 1279 mwifiex_dbg(adapter, INTR, 1280 "int: sdio_ireg = %#x\n", sdio_ireg); 1281 spin_lock_irqsave(&adapter->int_lock, flags); 1282 adapter->int_status |= sdio_ireg; 1283 spin_unlock_irqrestore(&adapter->int_lock, flags); 1284 } 1285 } 1286 1287 /* 1288 * SDIO interrupt handler. 1289 * 1290 * This function reads the interrupt status from firmware and handles 1291 * the interrupt in current thread (ksdioirqd) right away. 1292 */ 1293 static void 1294 mwifiex_sdio_interrupt(struct sdio_func *func) 1295 { 1296 struct mwifiex_adapter *adapter; 1297 struct sdio_mmc_card *card; 1298 1299 card = sdio_get_drvdata(func); 1300 if (!card || !card->adapter) { 1301 pr_err("int: func=%p card=%p adapter=%p\n", 1302 func, card, card ? card->adapter : NULL); 1303 return; 1304 } 1305 adapter = card->adapter; 1306 1307 if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP) 1308 adapter->ps_state = PS_STATE_AWAKE; 1309 1310 mwifiex_interrupt_status(adapter); 1311 mwifiex_main_process(adapter); 1312 } 1313 1314 /* 1315 * This function enables the host interrupt. 1316 * 1317 * The host interrupt enable mask is written to the card 1318 * host interrupt mask register. 1319 */ 1320 static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter) 1321 { 1322 struct sdio_mmc_card *card = adapter->card; 1323 struct sdio_func *func = card->func; 1324 int ret; 1325 1326 sdio_claim_host(func); 1327 1328 /* Request the SDIO IRQ */ 1329 ret = sdio_claim_irq(func, mwifiex_sdio_interrupt); 1330 if (ret) { 1331 mwifiex_dbg(adapter, ERROR, 1332 "claim irq failed: ret=%d\n", ret); 1333 goto out; 1334 } 1335 1336 /* Simply write the mask to the register */ 1337 ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 1338 card->reg->host_int_enable); 1339 if (ret) { 1340 mwifiex_dbg(adapter, ERROR, 1341 "enable host interrupt failed\n"); 1342 sdio_release_irq(func); 1343 } 1344 1345 out: 1346 sdio_release_host(func); 1347 return ret; 1348 } 1349 1350 /* 1351 * This function sends a data buffer to the card. 1352 */ 1353 static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter, 1354 u32 *type, u8 *buffer, 1355 u32 npayload, u32 ioport) 1356 { 1357 int ret; 1358 u32 nb; 1359 1360 if (!buffer) { 1361 mwifiex_dbg(adapter, ERROR, 1362 "%s: buffer is NULL\n", __func__); 1363 return -1; 1364 } 1365 1366 ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1); 1367 1368 if (ret) { 1369 mwifiex_dbg(adapter, ERROR, 1370 "%s: read iomem failed: %d\n", __func__, 1371 ret); 1372 return -1; 1373 } 1374 1375 nb = get_unaligned_le16((buffer)); 1376 if (nb > npayload) { 1377 mwifiex_dbg(adapter, ERROR, 1378 "%s: invalid packet, nb=%d npayload=%d\n", 1379 __func__, nb, npayload); 1380 return -1; 1381 } 1382 1383 *type = get_unaligned_le16((buffer + 2)); 1384 1385 return ret; 1386 } 1387 1388 /* 1389 * This function downloads the firmware to the card. 1390 * 1391 * Firmware is downloaded to the card in blocks. Every block download 1392 * is tested for CRC errors, and retried a number of times before 1393 * returning failure. 1394 */ 1395 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, 1396 struct mwifiex_fw_image *fw) 1397 { 1398 struct sdio_mmc_card *card = adapter->card; 1399 const struct mwifiex_sdio_card_reg *reg = card->reg; 1400 int ret; 1401 u8 *firmware = fw->fw_buf; 1402 u32 firmware_len = fw->fw_len; 1403 u32 offset = 0; 1404 u8 base0, base1; 1405 u8 *fwbuf; 1406 u16 len = 0; 1407 u32 txlen, tx_blocks = 0, tries; 1408 u32 i = 0; 1409 1410 if (!firmware_len) { 1411 mwifiex_dbg(adapter, ERROR, 1412 "firmware image not found! Terminating download\n"); 1413 return -1; 1414 } 1415 1416 mwifiex_dbg(adapter, INFO, 1417 "info: downloading FW image (%d bytes)\n", 1418 firmware_len); 1419 1420 /* Assume that the allocated buffer is 8-byte aligned */ 1421 fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL); 1422 if (!fwbuf) 1423 return -ENOMEM; 1424 1425 sdio_claim_host(card->func); 1426 1427 /* Perform firmware data transfer */ 1428 do { 1429 /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY 1430 bits */ 1431 ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY | 1432 DN_LD_CARD_RDY); 1433 if (ret) { 1434 mwifiex_dbg(adapter, ERROR, 1435 "FW download with helper:\t" 1436 "poll status timeout @ %d\n", offset); 1437 goto done; 1438 } 1439 1440 /* More data? */ 1441 if (offset >= firmware_len) 1442 break; 1443 1444 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 1445 ret = mwifiex_read_reg(adapter, reg->base_0_reg, 1446 &base0); 1447 if (ret) { 1448 mwifiex_dbg(adapter, ERROR, 1449 "dev BASE0 register read failed:\t" 1450 "base0=%#04X(%d). Terminating dnld\n", 1451 base0, base0); 1452 goto done; 1453 } 1454 ret = mwifiex_read_reg(adapter, reg->base_1_reg, 1455 &base1); 1456 if (ret) { 1457 mwifiex_dbg(adapter, ERROR, 1458 "dev BASE1 register read failed:\t" 1459 "base1=%#04X(%d). Terminating dnld\n", 1460 base1, base1); 1461 goto done; 1462 } 1463 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff)); 1464 1465 if (len) 1466 break; 1467 1468 usleep_range(10, 20); 1469 } 1470 1471 if (!len) { 1472 break; 1473 } else if (len > MWIFIEX_UPLD_SIZE) { 1474 mwifiex_dbg(adapter, ERROR, 1475 "FW dnld failed @ %d, invalid length %d\n", 1476 offset, len); 1477 ret = -1; 1478 goto done; 1479 } 1480 1481 txlen = len; 1482 1483 if (len & BIT(0)) { 1484 i++; 1485 if (i > MAX_WRITE_IOMEM_RETRY) { 1486 mwifiex_dbg(adapter, ERROR, 1487 "FW dnld failed @ %d, over max retry\n", 1488 offset); 1489 ret = -1; 1490 goto done; 1491 } 1492 mwifiex_dbg(adapter, ERROR, 1493 "CRC indicated by the helper:\t" 1494 "len = 0x%04X, txlen = %d\n", len, txlen); 1495 len &= ~BIT(0); 1496 /* Setting this to 0 to resend from same offset */ 1497 txlen = 0; 1498 } else { 1499 i = 0; 1500 1501 /* Set blocksize to transfer - checking for last 1502 block */ 1503 if (firmware_len - offset < txlen) 1504 txlen = firmware_len - offset; 1505 1506 tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1) 1507 / MWIFIEX_SDIO_BLOCK_SIZE; 1508 1509 /* Copy payload to buffer */ 1510 memmove(fwbuf, &firmware[offset], txlen); 1511 } 1512 1513 ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks * 1514 MWIFIEX_SDIO_BLOCK_SIZE, 1515 adapter->ioport); 1516 if (ret) { 1517 mwifiex_dbg(adapter, ERROR, 1518 "FW download, write iomem (%d) failed @ %d\n", 1519 i, offset); 1520 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04)) 1521 mwifiex_dbg(adapter, ERROR, 1522 "write CFG reg failed\n"); 1523 1524 ret = -1; 1525 goto done; 1526 } 1527 1528 offset += txlen; 1529 } while (true); 1530 1531 mwifiex_dbg(adapter, MSG, 1532 "info: FW download over, size %d bytes\n", offset); 1533 1534 ret = 0; 1535 done: 1536 sdio_release_host(card->func); 1537 kfree(fwbuf); 1538 return ret; 1539 } 1540 1541 /* 1542 * This function decode sdio aggreation pkt. 1543 * 1544 * Based on the the data block size and pkt_len, 1545 * skb data will be decoded to few packets. 1546 */ 1547 static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter, 1548 struct sk_buff *skb) 1549 { 1550 u32 total_pkt_len, pkt_len; 1551 struct sk_buff *skb_deaggr; 1552 u16 blk_size; 1553 u8 blk_num; 1554 u8 *data; 1555 1556 data = skb->data; 1557 total_pkt_len = skb->len; 1558 1559 while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) { 1560 if (total_pkt_len < adapter->sdio_rx_block_size) 1561 break; 1562 blk_num = *(data + BLOCK_NUMBER_OFFSET); 1563 blk_size = adapter->sdio_rx_block_size * blk_num; 1564 if (blk_size > total_pkt_len) { 1565 mwifiex_dbg(adapter, ERROR, 1566 "%s: error in blk_size,\t" 1567 "blk_num=%d, blk_size=%d, total_pkt_len=%d\n", 1568 __func__, blk_num, blk_size, total_pkt_len); 1569 break; 1570 } 1571 pkt_len = get_unaligned_le16((data + 1572 SDIO_HEADER_OFFSET)); 1573 if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) { 1574 mwifiex_dbg(adapter, ERROR, 1575 "%s: error in pkt_len,\t" 1576 "pkt_len=%d, blk_size=%d\n", 1577 __func__, pkt_len, blk_size); 1578 break; 1579 } 1580 1581 skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL); 1582 if (!skb_deaggr) 1583 break; 1584 skb_put(skb_deaggr, pkt_len); 1585 memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len); 1586 skb_pull(skb_deaggr, adapter->intf_hdr_len); 1587 1588 mwifiex_handle_rx_packet(adapter, skb_deaggr); 1589 data += blk_size; 1590 total_pkt_len -= blk_size; 1591 } 1592 } 1593 1594 /* 1595 * This function decodes a received packet. 1596 * 1597 * Based on the type, the packet is treated as either a data, or 1598 * a command response, or an event, and the correct handler 1599 * function is invoked. 1600 */ 1601 static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter, 1602 struct sk_buff *skb, u32 upld_typ) 1603 { 1604 u8 *cmd_buf; 1605 u16 pkt_len; 1606 struct mwifiex_rxinfo *rx_info; 1607 1608 pkt_len = get_unaligned_le16(skb->data); 1609 1610 if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) { 1611 skb_trim(skb, pkt_len); 1612 skb_pull(skb, adapter->intf_hdr_len); 1613 } 1614 1615 switch (upld_typ) { 1616 case MWIFIEX_TYPE_AGGR_DATA: 1617 mwifiex_dbg(adapter, INFO, 1618 "info: --- Rx: Aggr Data packet ---\n"); 1619 rx_info = MWIFIEX_SKB_RXCB(skb); 1620 rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA; 1621 if (adapter->rx_work_enabled) { 1622 skb_queue_tail(&adapter->rx_data_q, skb); 1623 atomic_inc(&adapter->rx_pending); 1624 adapter->data_received = true; 1625 } else { 1626 mwifiex_deaggr_sdio_pkt(adapter, skb); 1627 dev_kfree_skb_any(skb); 1628 } 1629 break; 1630 1631 case MWIFIEX_TYPE_DATA: 1632 mwifiex_dbg(adapter, DATA, 1633 "info: --- Rx: Data packet ---\n"); 1634 if (adapter->rx_work_enabled) { 1635 skb_queue_tail(&adapter->rx_data_q, skb); 1636 adapter->data_received = true; 1637 atomic_inc(&adapter->rx_pending); 1638 } else { 1639 mwifiex_handle_rx_packet(adapter, skb); 1640 } 1641 break; 1642 1643 case MWIFIEX_TYPE_CMD: 1644 mwifiex_dbg(adapter, CMD, 1645 "info: --- Rx: Cmd Response ---\n"); 1646 /* take care of curr_cmd = NULL case */ 1647 if (!adapter->curr_cmd) { 1648 cmd_buf = adapter->upld_buf; 1649 1650 if (adapter->ps_state == PS_STATE_SLEEP_CFM) 1651 mwifiex_process_sleep_confirm_resp(adapter, 1652 skb->data, 1653 skb->len); 1654 1655 memcpy(cmd_buf, skb->data, 1656 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, 1657 skb->len)); 1658 1659 dev_kfree_skb_any(skb); 1660 } else { 1661 adapter->cmd_resp_received = true; 1662 adapter->curr_cmd->resp_skb = skb; 1663 } 1664 break; 1665 1666 case MWIFIEX_TYPE_EVENT: 1667 mwifiex_dbg(adapter, EVENT, 1668 "info: --- Rx: Event ---\n"); 1669 adapter->event_cause = get_unaligned_le32(skb->data); 1670 1671 if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE)) 1672 memcpy(adapter->event_body, 1673 skb->data + MWIFIEX_EVENT_HEADER_LEN, 1674 skb->len); 1675 1676 /* event cause has been saved to adapter->event_cause */ 1677 adapter->event_received = true; 1678 adapter->event_skb = skb; 1679 1680 break; 1681 1682 default: 1683 mwifiex_dbg(adapter, ERROR, 1684 "unknown upload type %#x\n", upld_typ); 1685 dev_kfree_skb_any(skb); 1686 break; 1687 } 1688 1689 return 0; 1690 } 1691 1692 /* 1693 * This function transfers received packets from card to driver, performing 1694 * aggregation if required. 1695 * 1696 * For data received on control port, or if aggregation is disabled, the 1697 * received buffers are uploaded as separate packets. However, if aggregation 1698 * is enabled and required, the buffers are copied onto an aggregation buffer, 1699 * provided there is space left, processed and finally uploaded. 1700 */ 1701 static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter, 1702 u16 rx_len, u8 port) 1703 { 1704 struct sdio_mmc_card *card = adapter->card; 1705 s32 f_do_rx_aggr = 0; 1706 s32 f_do_rx_cur = 0; 1707 s32 f_aggr_cur = 0; 1708 s32 f_post_aggr_cur = 0; 1709 struct sk_buff *skb_deaggr; 1710 struct sk_buff *skb = NULL; 1711 u32 pkt_len, pkt_type, mport, pind; 1712 u8 *curr_ptr; 1713 1714 if ((card->has_control_mask) && (port == CTRL_PORT)) { 1715 /* Read the command Resp without aggr */ 1716 mwifiex_dbg(adapter, CMD, 1717 "info: %s: no aggregation for cmd\t" 1718 "response\n", __func__); 1719 1720 f_do_rx_cur = 1; 1721 goto rx_curr_single; 1722 } 1723 1724 if (!card->mpa_rx.enabled) { 1725 mwifiex_dbg(adapter, WARN, 1726 "info: %s: rx aggregation disabled\n", 1727 __func__); 1728 1729 f_do_rx_cur = 1; 1730 goto rx_curr_single; 1731 } 1732 1733 if ((!card->has_control_mask && (card->mp_rd_bitmap & 1734 card->reg->data_port_mask)) || 1735 (card->has_control_mask && (card->mp_rd_bitmap & 1736 (~((u32) CTRL_PORT_MASK))))) { 1737 /* Some more data RX pending */ 1738 mwifiex_dbg(adapter, INFO, 1739 "info: %s: not last packet\n", __func__); 1740 1741 if (MP_RX_AGGR_IN_PROGRESS(card)) { 1742 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) { 1743 f_aggr_cur = 1; 1744 } else { 1745 /* No room in Aggr buf, do rx aggr now */ 1746 f_do_rx_aggr = 1; 1747 f_post_aggr_cur = 1; 1748 } 1749 } else { 1750 /* Rx aggr not in progress */ 1751 f_aggr_cur = 1; 1752 } 1753 1754 } else { 1755 /* No more data RX pending */ 1756 mwifiex_dbg(adapter, INFO, 1757 "info: %s: last packet\n", __func__); 1758 1759 if (MP_RX_AGGR_IN_PROGRESS(card)) { 1760 f_do_rx_aggr = 1; 1761 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) 1762 f_aggr_cur = 1; 1763 else 1764 /* No room in Aggr buf, do rx aggr now */ 1765 f_do_rx_cur = 1; 1766 } else { 1767 f_do_rx_cur = 1; 1768 } 1769 } 1770 1771 if (f_aggr_cur) { 1772 mwifiex_dbg(adapter, INFO, 1773 "info: current packet aggregation\n"); 1774 /* Curr pkt can be aggregated */ 1775 mp_rx_aggr_setup(card, rx_len, port); 1776 1777 if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) || 1778 mp_rx_aggr_port_limit_reached(card)) { 1779 mwifiex_dbg(adapter, INFO, 1780 "info: %s: aggregated packet\t" 1781 "limit reached\n", __func__); 1782 /* No more pkts allowed in Aggr buf, rx it */ 1783 f_do_rx_aggr = 1; 1784 } 1785 } 1786 1787 if (f_do_rx_aggr) { 1788 /* do aggr RX now */ 1789 mwifiex_dbg(adapter, DATA, 1790 "info: do_rx_aggr: num of packets: %d\n", 1791 card->mpa_rx.pkt_cnt); 1792 1793 if (card->supports_sdio_new_mode) { 1794 int i; 1795 u32 port_count; 1796 1797 for (i = 0, port_count = 0; i < card->max_ports; i++) 1798 if (card->mpa_rx.ports & BIT(i)) 1799 port_count++; 1800 1801 /* Reading data from "start_port + 0" to "start_port + 1802 * port_count -1", so decrease the count by 1 1803 */ 1804 port_count--; 1805 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1806 (port_count << 8)) + card->mpa_rx.start_port; 1807 } else { 1808 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 1809 (card->mpa_rx.ports << 4)) + 1810 card->mpa_rx.start_port; 1811 } 1812 1813 if (card->mpa_rx.pkt_cnt == 1) 1814 mport = adapter->ioport + card->mpa_rx.start_port; 1815 1816 if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf, 1817 card->mpa_rx.buf_len, mport, 1)) 1818 goto error; 1819 1820 curr_ptr = card->mpa_rx.buf; 1821 1822 for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) { 1823 u32 *len_arr = card->mpa_rx.len_arr; 1824 1825 /* get curr PKT len & type */ 1826 pkt_len = get_unaligned_le16(&curr_ptr[0]); 1827 pkt_type = get_unaligned_le16(&curr_ptr[2]); 1828 1829 /* copy pkt to deaggr buf */ 1830 skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind], 1831 GFP_KERNEL); 1832 if (!skb_deaggr) { 1833 mwifiex_dbg(adapter, ERROR, "skb allocation failure\t" 1834 "drop pkt len=%d type=%d\n", 1835 pkt_len, pkt_type); 1836 curr_ptr += len_arr[pind]; 1837 continue; 1838 } 1839 1840 skb_put(skb_deaggr, len_arr[pind]); 1841 1842 if ((pkt_type == MWIFIEX_TYPE_DATA || 1843 (pkt_type == MWIFIEX_TYPE_AGGR_DATA && 1844 adapter->sdio_rx_aggr_enable)) && 1845 (pkt_len <= len_arr[pind])) { 1846 1847 memcpy(skb_deaggr->data, curr_ptr, pkt_len); 1848 1849 skb_trim(skb_deaggr, pkt_len); 1850 1851 /* Process de-aggr packet */ 1852 mwifiex_decode_rx_packet(adapter, skb_deaggr, 1853 pkt_type); 1854 } else { 1855 mwifiex_dbg(adapter, ERROR, 1856 "drop wrong aggr pkt:\t" 1857 "sdio_single_port_rx_aggr=%d\t" 1858 "type=%d len=%d max_len=%d\n", 1859 adapter->sdio_rx_aggr_enable, 1860 pkt_type, pkt_len, len_arr[pind]); 1861 dev_kfree_skb_any(skb_deaggr); 1862 } 1863 curr_ptr += len_arr[pind]; 1864 } 1865 MP_RX_AGGR_BUF_RESET(card); 1866 } 1867 1868 rx_curr_single: 1869 if (f_do_rx_cur) { 1870 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n", 1871 port, rx_len); 1872 1873 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 1874 if (!skb) { 1875 mwifiex_dbg(adapter, ERROR, 1876 "single skb allocated fail,\t" 1877 "drop pkt port=%d len=%d\n", port, rx_len); 1878 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1879 card->mpa_rx.buf, rx_len, 1880 adapter->ioport + port)) 1881 goto error; 1882 return 0; 1883 } 1884 1885 skb_put(skb, rx_len); 1886 1887 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, 1888 skb->data, skb->len, 1889 adapter->ioport + port)) 1890 goto error; 1891 if (!adapter->sdio_rx_aggr_enable && 1892 pkt_type == MWIFIEX_TYPE_AGGR_DATA) { 1893 mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t" 1894 "current SDIO RX Aggr not enabled\n", 1895 pkt_type); 1896 dev_kfree_skb_any(skb); 1897 return 0; 1898 } 1899 1900 mwifiex_decode_rx_packet(adapter, skb, pkt_type); 1901 } 1902 if (f_post_aggr_cur) { 1903 mwifiex_dbg(adapter, INFO, 1904 "info: current packet aggregation\n"); 1905 /* Curr pkt can be aggregated */ 1906 mp_rx_aggr_setup(card, rx_len, port); 1907 } 1908 1909 return 0; 1910 error: 1911 if (MP_RX_AGGR_IN_PROGRESS(card)) 1912 MP_RX_AGGR_BUF_RESET(card); 1913 1914 if (f_do_rx_cur && skb) 1915 /* Single transfer pending. Free curr buff also */ 1916 dev_kfree_skb_any(skb); 1917 1918 return -1; 1919 } 1920 1921 /* 1922 * This function checks the current interrupt status. 1923 * 1924 * The following interrupts are checked and handled by this function - 1925 * - Data sent 1926 * - Command sent 1927 * - Packets received 1928 * 1929 * Since the firmware does not generate download ready interrupt if the 1930 * port updated is command port only, command sent interrupt checking 1931 * should be done manually, and for every SDIO interrupt. 1932 * 1933 * In case of Rx packets received, the packets are uploaded from card to 1934 * host and processed accordingly. 1935 */ 1936 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) 1937 { 1938 struct sdio_mmc_card *card = adapter->card; 1939 const struct mwifiex_sdio_card_reg *reg = card->reg; 1940 int ret = 0; 1941 u8 sdio_ireg; 1942 struct sk_buff *skb; 1943 u8 port = CTRL_PORT; 1944 u32 len_reg_l, len_reg_u; 1945 u32 rx_blocks; 1946 u16 rx_len; 1947 unsigned long flags; 1948 u32 bitmap; 1949 u8 cr; 1950 1951 spin_lock_irqsave(&adapter->int_lock, flags); 1952 sdio_ireg = adapter->int_status; 1953 adapter->int_status = 0; 1954 spin_unlock_irqrestore(&adapter->int_lock, flags); 1955 1956 if (!sdio_ireg) 1957 return ret; 1958 1959 /* Following interrupt is only for SDIO new mode */ 1960 if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent) 1961 adapter->cmd_sent = false; 1962 1963 /* Following interrupt is only for SDIO new mode */ 1964 if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) { 1965 u32 pkt_type; 1966 1967 /* read the len of control packet */ 1968 rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8; 1969 rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0]; 1970 rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE); 1971 if (rx_len <= adapter->intf_hdr_len || 1972 (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 1973 MWIFIEX_RX_DATA_BUF_SIZE) 1974 return -1; 1975 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 1976 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len); 1977 1978 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL); 1979 if (!skb) 1980 return -1; 1981 1982 skb_put(skb, rx_len); 1983 1984 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data, 1985 skb->len, adapter->ioport | 1986 CMD_PORT_SLCT)) { 1987 mwifiex_dbg(adapter, ERROR, 1988 "%s: failed to card_to_host", __func__); 1989 dev_kfree_skb_any(skb); 1990 goto term_cmd; 1991 } 1992 1993 if ((pkt_type != MWIFIEX_TYPE_CMD) && 1994 (pkt_type != MWIFIEX_TYPE_EVENT)) 1995 mwifiex_dbg(adapter, ERROR, 1996 "%s:Received wrong packet on cmd port", 1997 __func__); 1998 1999 mwifiex_decode_rx_packet(adapter, skb, pkt_type); 2000 } 2001 2002 if (sdio_ireg & DN_LD_HOST_INT_STATUS) { 2003 bitmap = (u32) card->mp_regs[reg->wr_bitmap_l]; 2004 bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8; 2005 if (card->supports_sdio_new_mode) { 2006 bitmap |= 2007 ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16; 2008 bitmap |= 2009 ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24; 2010 } 2011 card->mp_wr_bitmap = bitmap; 2012 2013 mwifiex_dbg(adapter, INTR, 2014 "int: DNLD: wr_bitmap=0x%x\n", 2015 card->mp_wr_bitmap); 2016 if (adapter->data_sent && 2017 (card->mp_wr_bitmap & card->mp_data_port_mask)) { 2018 mwifiex_dbg(adapter, INTR, 2019 "info: <--- Tx DONE Interrupt --->\n"); 2020 adapter->data_sent = false; 2021 } 2022 } 2023 2024 /* As firmware will not generate download ready interrupt if the port 2025 updated is command port only, cmd_sent should be done for any SDIO 2026 interrupt. */ 2027 if (card->has_control_mask && adapter->cmd_sent) { 2028 /* Check if firmware has attach buffer at command port and 2029 update just that in wr_bit_map. */ 2030 card->mp_wr_bitmap |= 2031 (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK; 2032 if (card->mp_wr_bitmap & CTRL_PORT_MASK) 2033 adapter->cmd_sent = false; 2034 } 2035 2036 mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n", 2037 adapter->cmd_sent, adapter->data_sent); 2038 if (sdio_ireg & UP_LD_HOST_INT_STATUS) { 2039 bitmap = (u32) card->mp_regs[reg->rd_bitmap_l]; 2040 bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8; 2041 if (card->supports_sdio_new_mode) { 2042 bitmap |= 2043 ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16; 2044 bitmap |= 2045 ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24; 2046 } 2047 card->mp_rd_bitmap = bitmap; 2048 mwifiex_dbg(adapter, INTR, 2049 "int: UPLD: rd_bitmap=0x%x\n", 2050 card->mp_rd_bitmap); 2051 2052 while (true) { 2053 ret = mwifiex_get_rd_port(adapter, &port); 2054 if (ret) { 2055 mwifiex_dbg(adapter, INFO, 2056 "info: no more rd_port available\n"); 2057 break; 2058 } 2059 len_reg_l = reg->rd_len_p0_l + (port << 1); 2060 len_reg_u = reg->rd_len_p0_u + (port << 1); 2061 rx_len = ((u16) card->mp_regs[len_reg_u]) << 8; 2062 rx_len |= (u16) card->mp_regs[len_reg_l]; 2063 mwifiex_dbg(adapter, INFO, 2064 "info: RX: port=%d rx_len=%u\n", 2065 port, rx_len); 2066 rx_blocks = 2067 (rx_len + MWIFIEX_SDIO_BLOCK_SIZE - 2068 1) / MWIFIEX_SDIO_BLOCK_SIZE; 2069 if (rx_len <= adapter->intf_hdr_len || 2070 (card->mpa_rx.enabled && 2071 ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) > 2072 card->mpa_rx.buf_size))) { 2073 mwifiex_dbg(adapter, ERROR, 2074 "invalid rx_len=%d\n", 2075 rx_len); 2076 return -1; 2077 } 2078 2079 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE); 2080 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", 2081 rx_len); 2082 2083 if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len, 2084 port)) { 2085 mwifiex_dbg(adapter, ERROR, 2086 "card_to_host_mpa failed: int status=%#x\n", 2087 sdio_ireg); 2088 goto term_cmd; 2089 } 2090 } 2091 } 2092 2093 return 0; 2094 2095 term_cmd: 2096 /* terminate cmd */ 2097 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 2098 mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n"); 2099 else 2100 mwifiex_dbg(adapter, INFO, 2101 "info: CFG reg val = %d\n", cr); 2102 2103 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04))) 2104 mwifiex_dbg(adapter, ERROR, 2105 "write CFG reg failed\n"); 2106 else 2107 mwifiex_dbg(adapter, INFO, "info: write success\n"); 2108 2109 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr)) 2110 mwifiex_dbg(adapter, ERROR, 2111 "read CFG reg failed\n"); 2112 else 2113 mwifiex_dbg(adapter, INFO, 2114 "info: CFG reg val =%x\n", cr); 2115 2116 return -1; 2117 } 2118 2119 /* 2120 * This function aggregates transmission buffers in driver and downloads 2121 * the aggregated packet to card. 2122 * 2123 * The individual packets are aggregated by copying into an aggregation 2124 * buffer and then downloaded to the card. Previous unsent packets in the 2125 * aggregation buffer are pre-copied first before new packets are added. 2126 * Aggregation is done till there is space left in the aggregation buffer, 2127 * or till new packets are available. 2128 * 2129 * The function will only download the packet to the card when aggregation 2130 * stops, otherwise it will just aggregate the packet in aggregation buffer 2131 * and return. 2132 */ 2133 static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter, 2134 u8 *payload, u32 pkt_len, u32 port, 2135 u32 next_pkt_len) 2136 { 2137 struct sdio_mmc_card *card = adapter->card; 2138 int ret = 0; 2139 s32 f_send_aggr_buf = 0; 2140 s32 f_send_cur_buf = 0; 2141 s32 f_precopy_cur_buf = 0; 2142 s32 f_postcopy_cur_buf = 0; 2143 u32 mport; 2144 int index; 2145 2146 if (!card->mpa_tx.enabled || 2147 (card->has_control_mask && (port == CTRL_PORT)) || 2148 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) { 2149 mwifiex_dbg(adapter, WARN, 2150 "info: %s: tx aggregation disabled\n", 2151 __func__); 2152 2153 f_send_cur_buf = 1; 2154 goto tx_curr_single; 2155 } 2156 2157 if (next_pkt_len) { 2158 /* More pkt in TX queue */ 2159 mwifiex_dbg(adapter, INFO, 2160 "info: %s: more packets in queue.\n", 2161 __func__); 2162 2163 if (MP_TX_AGGR_IN_PROGRESS(card)) { 2164 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) { 2165 f_precopy_cur_buf = 1; 2166 2167 if (!(card->mp_wr_bitmap & 2168 (1 << card->curr_wr_port)) || 2169 !MP_TX_AGGR_BUF_HAS_ROOM( 2170 card, pkt_len + next_pkt_len)) 2171 f_send_aggr_buf = 1; 2172 } else { 2173 /* No room in Aggr buf, send it */ 2174 f_send_aggr_buf = 1; 2175 2176 if (!(card->mp_wr_bitmap & 2177 (1 << card->curr_wr_port))) 2178 f_send_cur_buf = 1; 2179 else 2180 f_postcopy_cur_buf = 1; 2181 } 2182 } else { 2183 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) && 2184 (card->mp_wr_bitmap & (1 << card->curr_wr_port))) 2185 f_precopy_cur_buf = 1; 2186 else 2187 f_send_cur_buf = 1; 2188 } 2189 } else { 2190 /* Last pkt in TX queue */ 2191 mwifiex_dbg(adapter, INFO, 2192 "info: %s: Last packet in Tx Queue.\n", 2193 __func__); 2194 2195 if (MP_TX_AGGR_IN_PROGRESS(card)) { 2196 /* some packs in Aggr buf already */ 2197 f_send_aggr_buf = 1; 2198 2199 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) 2200 f_precopy_cur_buf = 1; 2201 else 2202 /* No room in Aggr buf, send it */ 2203 f_send_cur_buf = 1; 2204 } else { 2205 f_send_cur_buf = 1; 2206 } 2207 } 2208 2209 if (f_precopy_cur_buf) { 2210 mwifiex_dbg(adapter, DATA, 2211 "data: %s: precopy current buffer\n", 2212 __func__); 2213 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 2214 2215 if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) || 2216 mp_tx_aggr_port_limit_reached(card)) 2217 /* No more pkts allowed in Aggr buf, send it */ 2218 f_send_aggr_buf = 1; 2219 } 2220 2221 if (f_send_aggr_buf) { 2222 mwifiex_dbg(adapter, DATA, 2223 "data: %s: send aggr buffer: %d %d\n", 2224 __func__, card->mpa_tx.start_port, 2225 card->mpa_tx.ports); 2226 if (card->supports_sdio_new_mode) { 2227 u32 port_count; 2228 int i; 2229 2230 for (i = 0, port_count = 0; i < card->max_ports; i++) 2231 if (card->mpa_tx.ports & BIT(i)) 2232 port_count++; 2233 2234 /* Writing data from "start_port + 0" to "start_port + 2235 * port_count -1", so decrease the count by 1 2236 */ 2237 port_count--; 2238 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 2239 (port_count << 8)) + card->mpa_tx.start_port; 2240 } else { 2241 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE | 2242 (card->mpa_tx.ports << 4)) + 2243 card->mpa_tx.start_port; 2244 } 2245 2246 if (card->mpa_tx.pkt_cnt == 1) 2247 mport = adapter->ioport + card->mpa_tx.start_port; 2248 2249 ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf, 2250 card->mpa_tx.buf_len, mport); 2251 2252 /* Save the last multi port tx aggreagation info to debug log */ 2253 index = adapter->dbg.last_sdio_mp_index; 2254 index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM; 2255 adapter->dbg.last_sdio_mp_index = index; 2256 adapter->dbg.last_mp_wr_ports[index] = mport; 2257 adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap; 2258 adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len; 2259 adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port; 2260 2261 MP_TX_AGGR_BUF_RESET(card); 2262 } 2263 2264 tx_curr_single: 2265 if (f_send_cur_buf) { 2266 mwifiex_dbg(adapter, DATA, 2267 "data: %s: send current buffer %d\n", 2268 __func__, port); 2269 ret = mwifiex_write_data_to_card(adapter, payload, pkt_len, 2270 adapter->ioport + port); 2271 } 2272 2273 if (f_postcopy_cur_buf) { 2274 mwifiex_dbg(adapter, DATA, 2275 "data: %s: postcopy current buffer\n", 2276 __func__); 2277 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port); 2278 } 2279 2280 return ret; 2281 } 2282 2283 /* 2284 * This function downloads data from driver to card. 2285 * 2286 * Both commands and data packets are transferred to the card by this 2287 * function. 2288 * 2289 * This function adds the SDIO specific header to the front of the buffer 2290 * before transferring. The header contains the length of the packet and 2291 * the type. The firmware handles the packets based upon this set type. 2292 */ 2293 static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter, 2294 u8 type, struct sk_buff *skb, 2295 struct mwifiex_tx_param *tx_param) 2296 { 2297 struct sdio_mmc_card *card = adapter->card; 2298 int ret; 2299 u32 buf_block_len; 2300 u32 blk_size; 2301 u32 port = CTRL_PORT; 2302 u8 *payload = (u8 *)skb->data; 2303 u32 pkt_len = skb->len; 2304 2305 /* Allocate buffer and copy payload */ 2306 blk_size = MWIFIEX_SDIO_BLOCK_SIZE; 2307 buf_block_len = (pkt_len + blk_size - 1) / blk_size; 2308 put_unaligned_le16((u16)pkt_len, payload + 0); 2309 put_unaligned_le16((u32)type, payload + 2); 2310 2311 2312 /* 2313 * This is SDIO specific header 2314 * u16 length, 2315 * u16 type (MWIFIEX_TYPE_DATA = 0, MWIFIEX_TYPE_CMD = 1, 2316 * MWIFIEX_TYPE_EVENT = 3) 2317 */ 2318 if (type == MWIFIEX_TYPE_DATA) { 2319 ret = mwifiex_get_wr_port_data(adapter, &port); 2320 if (ret) { 2321 mwifiex_dbg(adapter, ERROR, 2322 "%s: no wr_port available\n", 2323 __func__); 2324 return ret; 2325 } 2326 } else { 2327 adapter->cmd_sent = true; 2328 /* Type must be MWIFIEX_TYPE_CMD */ 2329 2330 if (pkt_len <= adapter->intf_hdr_len || 2331 pkt_len > MWIFIEX_UPLD_SIZE) 2332 mwifiex_dbg(adapter, ERROR, 2333 "%s: payload=%p, nb=%d\n", 2334 __func__, payload, pkt_len); 2335 2336 if (card->supports_sdio_new_mode) 2337 port = CMD_PORT_SLCT; 2338 } 2339 2340 /* Transfer data to card */ 2341 pkt_len = buf_block_len * blk_size; 2342 2343 if (tx_param) 2344 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 2345 port, tx_param->next_pkt_len 2346 ); 2347 else 2348 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len, 2349 port, 0); 2350 2351 if (ret) { 2352 if (type == MWIFIEX_TYPE_CMD) 2353 adapter->cmd_sent = false; 2354 if (type == MWIFIEX_TYPE_DATA) { 2355 adapter->data_sent = false; 2356 /* restore curr_wr_port in error cases */ 2357 card->curr_wr_port = port; 2358 card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port); 2359 } 2360 } else { 2361 if (type == MWIFIEX_TYPE_DATA) { 2362 if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port))) 2363 adapter->data_sent = true; 2364 else 2365 adapter->data_sent = false; 2366 } 2367 } 2368 2369 return ret; 2370 } 2371 2372 /* 2373 * This function allocates the MPA Tx and Rx buffers. 2374 */ 2375 static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter, 2376 u32 mpa_tx_buf_size, u32 mpa_rx_buf_size) 2377 { 2378 struct sdio_mmc_card *card = adapter->card; 2379 u32 rx_buf_size; 2380 int ret = 0; 2381 2382 card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL); 2383 if (!card->mpa_tx.buf) { 2384 ret = -1; 2385 goto error; 2386 } 2387 2388 card->mpa_tx.buf_size = mpa_tx_buf_size; 2389 2390 rx_buf_size = max_t(u32, mpa_rx_buf_size, 2391 (u32)SDIO_MAX_AGGR_BUF_SIZE); 2392 card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL); 2393 if (!card->mpa_rx.buf) { 2394 ret = -1; 2395 goto error; 2396 } 2397 2398 card->mpa_rx.buf_size = rx_buf_size; 2399 2400 error: 2401 if (ret) { 2402 kfree(card->mpa_tx.buf); 2403 kfree(card->mpa_rx.buf); 2404 card->mpa_tx.buf_size = 0; 2405 card->mpa_rx.buf_size = 0; 2406 card->mpa_tx.buf = NULL; 2407 card->mpa_rx.buf = NULL; 2408 } 2409 2410 return ret; 2411 } 2412 2413 /* 2414 * This function unregisters the SDIO device. 2415 * 2416 * The SDIO IRQ is released, the function is disabled and driver 2417 * data is set to null. 2418 */ 2419 static void 2420 mwifiex_unregister_dev(struct mwifiex_adapter *adapter) 2421 { 2422 struct sdio_mmc_card *card = adapter->card; 2423 2424 if (adapter->card) { 2425 card->adapter = NULL; 2426 sdio_claim_host(card->func); 2427 sdio_disable_func(card->func); 2428 sdio_release_host(card->func); 2429 } 2430 } 2431 2432 /* 2433 * This function registers the SDIO device. 2434 * 2435 * SDIO IRQ is claimed, block size is set and driver data is initialized. 2436 */ 2437 static int mwifiex_register_dev(struct mwifiex_adapter *adapter) 2438 { 2439 int ret; 2440 struct sdio_mmc_card *card = adapter->card; 2441 struct sdio_func *func = card->func; 2442 2443 /* save adapter pointer in card */ 2444 card->adapter = adapter; 2445 adapter->tx_buf_size = card->tx_buf_size; 2446 2447 sdio_claim_host(func); 2448 2449 /* Set block size */ 2450 ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 2451 sdio_release_host(func); 2452 if (ret) { 2453 mwifiex_dbg(adapter, ERROR, 2454 "cannot set SDIO block size\n"); 2455 return ret; 2456 } 2457 2458 strcpy(adapter->fw_name, card->firmware); 2459 if (card->fw_dump_enh) { 2460 adapter->mem_type_mapping_tbl = generic_mem_type_map; 2461 adapter->num_mem_types = 1; 2462 } else { 2463 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl; 2464 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl); 2465 } 2466 2467 return 0; 2468 } 2469 2470 /* 2471 * This function initializes the SDIO driver. 2472 * 2473 * The following initializations steps are followed - 2474 * - Read the Host interrupt status register to acknowledge 2475 * the first interrupt got from bootloader 2476 * - Disable host interrupt mask register 2477 * - Get SDIO port 2478 * - Initialize SDIO variables in card 2479 * - Allocate MP registers 2480 * - Allocate MPA Tx and Rx buffers 2481 */ 2482 static int mwifiex_init_sdio(struct mwifiex_adapter *adapter) 2483 { 2484 struct sdio_mmc_card *card = adapter->card; 2485 const struct mwifiex_sdio_card_reg *reg = card->reg; 2486 int ret; 2487 u8 sdio_ireg; 2488 2489 sdio_set_drvdata(card->func, card); 2490 2491 /* 2492 * Read the host_int_status_reg for ACK the first interrupt got 2493 * from the bootloader. If we don't do this we get a interrupt 2494 * as soon as we register the irq. 2495 */ 2496 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 2497 2498 /* Get SDIO ioport */ 2499 mwifiex_init_sdio_ioport(adapter); 2500 2501 /* Initialize SDIO variables in card */ 2502 card->mp_rd_bitmap = 0; 2503 card->mp_wr_bitmap = 0; 2504 card->curr_rd_port = reg->start_rd_port; 2505 card->curr_wr_port = reg->start_wr_port; 2506 2507 card->mp_data_port_mask = reg->data_port_mask; 2508 2509 card->mpa_tx.buf_len = 0; 2510 card->mpa_tx.pkt_cnt = 0; 2511 card->mpa_tx.start_port = 0; 2512 2513 card->mpa_tx.enabled = 1; 2514 card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2515 2516 card->mpa_rx.buf_len = 0; 2517 card->mpa_rx.pkt_cnt = 0; 2518 card->mpa_rx.start_port = 0; 2519 2520 card->mpa_rx.enabled = 1; 2521 card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit; 2522 2523 /* Allocate buffers for SDIO MP-A */ 2524 card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL); 2525 if (!card->mp_regs) 2526 return -ENOMEM; 2527 2528 /* Allocate skb pointer buffers */ 2529 card->mpa_rx.skb_arr = kcalloc(card->mp_agg_pkt_limit, sizeof(void *), 2530 GFP_KERNEL); 2531 if (!card->mpa_rx.skb_arr) { 2532 kfree(card->mp_regs); 2533 return -ENOMEM; 2534 } 2535 2536 card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit, 2537 sizeof(*card->mpa_rx.len_arr), 2538 GFP_KERNEL); 2539 if (!card->mpa_rx.len_arr) { 2540 kfree(card->mp_regs); 2541 kfree(card->mpa_rx.skb_arr); 2542 return -ENOMEM; 2543 } 2544 2545 ret = mwifiex_alloc_sdio_mpa_buffers(adapter, 2546 card->mp_tx_agg_buf_size, 2547 card->mp_rx_agg_buf_size); 2548 2549 /* Allocate 32k MPA Tx/Rx buffers if 64k memory allocation fails */ 2550 if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX || 2551 card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) { 2552 /* Disable rx single port aggregation */ 2553 adapter->host_disable_sdio_rx_aggr = true; 2554 2555 ret = mwifiex_alloc_sdio_mpa_buffers 2556 (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K, 2557 MWIFIEX_MP_AGGR_BUF_SIZE_32K); 2558 if (ret) { 2559 /* Disable multi port aggregation */ 2560 card->mpa_tx.enabled = 0; 2561 card->mpa_rx.enabled = 0; 2562 } 2563 } 2564 2565 adapter->auto_tdls = card->can_auto_tdls; 2566 adapter->ext_scan = card->can_ext_scan; 2567 return 0; 2568 } 2569 2570 /* 2571 * This function resets the MPA Tx and Rx buffers. 2572 */ 2573 static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter) 2574 { 2575 struct sdio_mmc_card *card = adapter->card; 2576 2577 MP_TX_AGGR_BUF_RESET(card); 2578 MP_RX_AGGR_BUF_RESET(card); 2579 } 2580 2581 /* 2582 * This function cleans up the allocated card buffers. 2583 * 2584 * The following are freed by this function - 2585 * - MP registers 2586 * - MPA Tx buffer 2587 * - MPA Rx buffer 2588 */ 2589 static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter) 2590 { 2591 struct sdio_mmc_card *card = adapter->card; 2592 2593 cancel_work_sync(&card->work); 2594 2595 kfree(card->mp_regs); 2596 kfree(card->mpa_rx.skb_arr); 2597 kfree(card->mpa_rx.len_arr); 2598 kfree(card->mpa_tx.buf); 2599 kfree(card->mpa_rx.buf); 2600 } 2601 2602 /* 2603 * This function updates the MP end port in card. 2604 */ 2605 static void 2606 mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port) 2607 { 2608 struct sdio_mmc_card *card = adapter->card; 2609 const struct mwifiex_sdio_card_reg *reg = card->reg; 2610 int i; 2611 2612 card->mp_end_port = port; 2613 2614 card->mp_data_port_mask = reg->data_port_mask; 2615 2616 if (reg->start_wr_port) { 2617 for (i = 1; i <= card->max_ports - card->mp_end_port; i++) 2618 card->mp_data_port_mask &= 2619 ~(1 << (card->max_ports - i)); 2620 } 2621 2622 card->curr_wr_port = reg->start_wr_port; 2623 2624 mwifiex_dbg(adapter, CMD, 2625 "cmd: mp_end_port %d, data port mask 0x%x\n", 2626 port, card->mp_data_port_mask); 2627 } 2628 2629 static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter) 2630 { 2631 struct sdio_mmc_card *card = adapter->card; 2632 struct sdio_func *func = card->func; 2633 int ret; 2634 2635 /* Prepare the adapter for the reset. */ 2636 mwifiex_shutdown_sw(adapter); 2637 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags); 2638 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags); 2639 2640 /* Run a HW reset of the SDIO interface. */ 2641 sdio_claim_host(func); 2642 ret = mmc_hw_reset(func->card); 2643 sdio_release_host(func); 2644 2645 switch (ret) { 2646 case 1: 2647 dev_dbg(&func->dev, "SDIO HW reset asynchronous\n"); 2648 complete_all(adapter->fw_done); 2649 break; 2650 case 0: 2651 ret = mwifiex_reinit_sw(adapter); 2652 if (ret) 2653 dev_err(&func->dev, "reinit failed: %d\n", ret); 2654 break; 2655 default: 2656 dev_err(&func->dev, "SDIO HW reset failed: %d\n", ret); 2657 break; 2658 } 2659 } 2660 2661 /* This function read/write firmware */ 2662 static enum 2663 rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter, 2664 u8 doneflag) 2665 { 2666 struct sdio_mmc_card *card = adapter->card; 2667 int ret, tries; 2668 u8 ctrl_data = 0; 2669 2670 sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2671 card->reg->fw_dump_ctrl, &ret); 2672 if (ret) { 2673 mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n"); 2674 return RDWR_STATUS_FAILURE; 2675 } 2676 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2677 ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl, 2678 &ret); 2679 if (ret) { 2680 mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2681 return RDWR_STATUS_FAILURE; 2682 } 2683 if (ctrl_data == FW_DUMP_DONE) 2684 break; 2685 if (doneflag && ctrl_data == doneflag) 2686 return RDWR_STATUS_DONE; 2687 if (ctrl_data != card->reg->fw_dump_host_ready) { 2688 mwifiex_dbg(adapter, WARN, 2689 "The ctrl reg was changed, re-try again\n"); 2690 sdio_writeb(card->func, card->reg->fw_dump_host_ready, 2691 card->reg->fw_dump_ctrl, &ret); 2692 if (ret) { 2693 mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2694 return RDWR_STATUS_FAILURE; 2695 } 2696 } 2697 usleep_range(100, 200); 2698 } 2699 if (ctrl_data == card->reg->fw_dump_host_ready) { 2700 mwifiex_dbg(adapter, ERROR, 2701 "Fail to pull ctrl_data\n"); 2702 return RDWR_STATUS_FAILURE; 2703 } 2704 2705 return RDWR_STATUS_SUCCESS; 2706 } 2707 2708 /* This function dump firmware memory to file */ 2709 static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter) 2710 { 2711 struct sdio_mmc_card *card = adapter->card; 2712 int ret = 0; 2713 unsigned int reg, reg_start, reg_end; 2714 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0; 2715 enum rdwr_status stat; 2716 u32 memory_size; 2717 2718 if (!card->can_dump_fw) 2719 return; 2720 2721 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) { 2722 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2723 2724 if (entry->mem_ptr) { 2725 vfree(entry->mem_ptr); 2726 entry->mem_ptr = NULL; 2727 } 2728 entry->mem_size = 0; 2729 } 2730 2731 mwifiex_pm_wakeup_card(adapter); 2732 sdio_claim_host(card->func); 2733 2734 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2735 2736 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2737 if (stat == RDWR_STATUS_FAILURE) 2738 goto done; 2739 2740 reg = card->reg->fw_dump_start; 2741 /* Read the number of the memories which will dump */ 2742 dump_num = sdio_readb(card->func, reg, &ret); 2743 if (ret) { 2744 mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n"); 2745 goto done; 2746 } 2747 2748 /* Read the length of every memory which will dump */ 2749 for (idx = 0; idx < dump_num; idx++) { 2750 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx]; 2751 2752 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2753 if (stat == RDWR_STATUS_FAILURE) 2754 goto done; 2755 2756 memory_size = 0; 2757 reg = card->reg->fw_dump_start; 2758 for (i = 0; i < 4; i++) { 2759 read_reg = sdio_readb(card->func, reg, &ret); 2760 if (ret) { 2761 mwifiex_dbg(adapter, ERROR, "SDIO read err\n"); 2762 goto done; 2763 } 2764 memory_size |= (read_reg << i*8); 2765 reg++; 2766 } 2767 2768 if (memory_size == 0) { 2769 mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n"); 2770 ret = mwifiex_write_reg(adapter, 2771 card->reg->fw_dump_ctrl, 2772 FW_DUMP_READ_DONE); 2773 if (ret) { 2774 mwifiex_dbg(adapter, ERROR, "SDIO write err\n"); 2775 return; 2776 } 2777 break; 2778 } 2779 2780 mwifiex_dbg(adapter, DUMP, 2781 "%s_SIZE=0x%x\n", entry->mem_name, memory_size); 2782 entry->mem_ptr = vmalloc(memory_size + 1); 2783 entry->mem_size = memory_size; 2784 if (!entry->mem_ptr) { 2785 mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n", 2786 entry->mem_name); 2787 goto done; 2788 } 2789 dbg_ptr = entry->mem_ptr; 2790 end_ptr = dbg_ptr + memory_size; 2791 2792 doneflag = entry->done_flag; 2793 mwifiex_dbg(adapter, DUMP, 2794 "Start %s output, please wait...\n", 2795 entry->mem_name); 2796 2797 do { 2798 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag); 2799 if (stat == RDWR_STATUS_FAILURE) 2800 goto done; 2801 2802 reg_start = card->reg->fw_dump_start; 2803 reg_end = card->reg->fw_dump_end; 2804 for (reg = reg_start; reg <= reg_end; reg++) { 2805 *dbg_ptr = sdio_readb(card->func, reg, &ret); 2806 if (ret) { 2807 mwifiex_dbg(adapter, ERROR, 2808 "SDIO read err\n"); 2809 goto done; 2810 } 2811 if (dbg_ptr < end_ptr) 2812 dbg_ptr++; 2813 else 2814 mwifiex_dbg(adapter, ERROR, 2815 "Allocated buf not enough\n"); 2816 } 2817 2818 if (stat != RDWR_STATUS_DONE) 2819 continue; 2820 2821 mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n", 2822 entry->mem_name, dbg_ptr - entry->mem_ptr); 2823 break; 2824 } while (1); 2825 } 2826 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2827 2828 done: 2829 sdio_release_host(card->func); 2830 } 2831 2832 static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter) 2833 { 2834 struct sdio_mmc_card *card = adapter->card; 2835 struct memory_type_mapping *entry = &generic_mem_type_map[0]; 2836 unsigned int reg, reg_start, reg_end; 2837 u8 start_flag = 0, done_flag = 0; 2838 u8 *dbg_ptr, *end_ptr; 2839 enum rdwr_status stat; 2840 int ret = -1, tries; 2841 2842 if (!card->fw_dump_enh) 2843 return; 2844 2845 if (entry->mem_ptr) { 2846 vfree(entry->mem_ptr); 2847 entry->mem_ptr = NULL; 2848 } 2849 entry->mem_size = 0; 2850 2851 mwifiex_pm_wakeup_card(adapter); 2852 sdio_claim_host(card->func); 2853 2854 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n"); 2855 2856 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2857 if (stat == RDWR_STATUS_FAILURE) 2858 goto done; 2859 2860 reg_start = card->reg->fw_dump_start; 2861 reg_end = card->reg->fw_dump_end; 2862 for (reg = reg_start; reg <= reg_end; reg++) { 2863 for (tries = 0; tries < MAX_POLL_TRIES; tries++) { 2864 start_flag = sdio_readb(card->func, reg, &ret); 2865 if (ret) { 2866 mwifiex_dbg(adapter, ERROR, 2867 "SDIO read err\n"); 2868 goto done; 2869 } 2870 if (start_flag == 0) 2871 break; 2872 if (tries == MAX_POLL_TRIES) { 2873 mwifiex_dbg(adapter, ERROR, 2874 "FW not ready to dump\n"); 2875 ret = -1; 2876 goto done; 2877 } 2878 } 2879 usleep_range(100, 200); 2880 } 2881 2882 entry->mem_ptr = vmalloc(0xf0000 + 1); 2883 if (!entry->mem_ptr) { 2884 ret = -1; 2885 goto done; 2886 } 2887 dbg_ptr = entry->mem_ptr; 2888 entry->mem_size = 0xf0000; 2889 end_ptr = dbg_ptr + entry->mem_size; 2890 2891 done_flag = entry->done_flag; 2892 mwifiex_dbg(adapter, DUMP, 2893 "Start %s output, please wait...\n", entry->mem_name); 2894 2895 while (true) { 2896 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag); 2897 if (stat == RDWR_STATUS_FAILURE) 2898 goto done; 2899 for (reg = reg_start; reg <= reg_end; reg++) { 2900 *dbg_ptr = sdio_readb(card->func, reg, &ret); 2901 if (ret) { 2902 mwifiex_dbg(adapter, ERROR, 2903 "SDIO read err\n"); 2904 goto done; 2905 } 2906 dbg_ptr++; 2907 if (dbg_ptr >= end_ptr) { 2908 u8 *tmp_ptr; 2909 2910 tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1); 2911 if (!tmp_ptr) 2912 goto done; 2913 2914 memcpy(tmp_ptr, entry->mem_ptr, 2915 entry->mem_size); 2916 vfree(entry->mem_ptr); 2917 entry->mem_ptr = tmp_ptr; 2918 tmp_ptr = NULL; 2919 dbg_ptr = entry->mem_ptr + entry->mem_size; 2920 entry->mem_size += 0x4000; 2921 end_ptr = entry->mem_ptr + entry->mem_size; 2922 } 2923 } 2924 if (stat == RDWR_STATUS_DONE) { 2925 entry->mem_size = dbg_ptr - entry->mem_ptr; 2926 mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n", 2927 entry->mem_name, entry->mem_size); 2928 ret = 0; 2929 break; 2930 } 2931 } 2932 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n"); 2933 2934 done: 2935 if (ret) { 2936 mwifiex_dbg(adapter, ERROR, "firmware dump failed\n"); 2937 if (entry->mem_ptr) { 2938 vfree(entry->mem_ptr); 2939 entry->mem_ptr = NULL; 2940 } 2941 entry->mem_size = 0; 2942 } 2943 sdio_release_host(card->func); 2944 } 2945 2946 static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter) 2947 { 2948 struct sdio_mmc_card *card = adapter->card; 2949 2950 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE); 2951 if (!adapter->devdump_data) { 2952 mwifiex_dbg(adapter, ERROR, 2953 "vzalloc devdump data failure!\n"); 2954 return; 2955 } 2956 2957 mwifiex_drv_info_dump(adapter); 2958 if (card->fw_dump_enh) 2959 mwifiex_sdio_generic_fw_dump(adapter); 2960 else 2961 mwifiex_sdio_fw_dump(adapter); 2962 mwifiex_prepare_fw_dump_info(adapter); 2963 mwifiex_upload_device_dump(adapter); 2964 } 2965 2966 static void mwifiex_sdio_work(struct work_struct *work) 2967 { 2968 struct sdio_mmc_card *card = 2969 container_of(work, struct sdio_mmc_card, work); 2970 2971 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2972 &card->work_flags)) 2973 mwifiex_sdio_device_dump_work(card->adapter); 2974 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, 2975 &card->work_flags)) 2976 mwifiex_sdio_card_reset_work(card->adapter); 2977 } 2978 2979 /* This function resets the card */ 2980 static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter) 2981 { 2982 struct sdio_mmc_card *card = adapter->card; 2983 2984 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags)) 2985 schedule_work(&card->work); 2986 } 2987 2988 /* This function dumps FW information */ 2989 static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter) 2990 { 2991 struct sdio_mmc_card *card = adapter->card; 2992 2993 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, 2994 &card->work_flags)) 2995 schedule_work(&card->work); 2996 } 2997 2998 /* Function to dump SDIO function registers and SDIO scratch registers in case 2999 * of FW crash 3000 */ 3001 static int 3002 mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf) 3003 { 3004 char *p = drv_buf; 3005 struct sdio_mmc_card *cardp = adapter->card; 3006 int ret = 0; 3007 u8 count, func, data, index = 0, size = 0; 3008 u8 reg, reg_start, reg_end; 3009 char buf[256], *ptr; 3010 3011 if (!p) 3012 return 0; 3013 3014 mwifiex_dbg(adapter, MSG, "SDIO register dump start\n"); 3015 3016 mwifiex_pm_wakeup_card(adapter); 3017 3018 sdio_claim_host(cardp->func); 3019 3020 for (count = 0; count < 5; count++) { 3021 memset(buf, 0, sizeof(buf)); 3022 ptr = buf; 3023 3024 switch (count) { 3025 case 0: 3026 /* Read the registers of SDIO function0 */ 3027 func = count; 3028 reg_start = 0; 3029 reg_end = 9; 3030 break; 3031 case 1: 3032 /* Read the registers of SDIO function1 */ 3033 func = count; 3034 reg_start = cardp->reg->func1_dump_reg_start; 3035 reg_end = cardp->reg->func1_dump_reg_end; 3036 break; 3037 case 2: 3038 index = 0; 3039 func = 1; 3040 reg_start = cardp->reg->func1_spec_reg_table[index++]; 3041 size = cardp->reg->func1_spec_reg_num; 3042 reg_end = cardp->reg->func1_spec_reg_table[size-1]; 3043 break; 3044 default: 3045 /* Read the scratch registers of SDIO function1 */ 3046 if (count == 4) 3047 mdelay(100); 3048 func = 1; 3049 reg_start = cardp->reg->func1_scratch_reg; 3050 reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE; 3051 } 3052 3053 if (count != 2) 3054 ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ", 3055 func, reg_start, reg_end); 3056 else 3057 ptr += sprintf(ptr, "SDIO Func%d: ", func); 3058 3059 for (reg = reg_start; reg <= reg_end;) { 3060 if (func == 0) 3061 data = sdio_f0_readb(cardp->func, reg, &ret); 3062 else 3063 data = sdio_readb(cardp->func, reg, &ret); 3064 3065 if (count == 2) 3066 ptr += sprintf(ptr, "(%#x) ", reg); 3067 if (!ret) { 3068 ptr += sprintf(ptr, "%02x ", data); 3069 } else { 3070 ptr += sprintf(ptr, "ERR"); 3071 break; 3072 } 3073 3074 if (count == 2 && reg < reg_end) 3075 reg = cardp->reg->func1_spec_reg_table[index++]; 3076 else 3077 reg++; 3078 } 3079 3080 mwifiex_dbg(adapter, MSG, "%s\n", buf); 3081 p += sprintf(p, "%s\n", buf); 3082 } 3083 3084 sdio_release_host(cardp->func); 3085 3086 mwifiex_dbg(adapter, MSG, "SDIO register dump end\n"); 3087 3088 return p - drv_buf; 3089 } 3090 3091 /* sdio device/function initialization, code is extracted 3092 * from init_if handler and register_dev handler. 3093 */ 3094 static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter) 3095 { 3096 struct sdio_mmc_card *card = adapter->card; 3097 u8 sdio_ireg; 3098 3099 sdio_claim_host(card->func); 3100 sdio_enable_func(card->func); 3101 sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE); 3102 sdio_release_host(card->func); 3103 3104 /* tx_buf_size might be changed to 3584 by firmware during 3105 * data transfer, we will reset to default size. 3106 */ 3107 adapter->tx_buf_size = card->tx_buf_size; 3108 3109 /* Read the host_int_status_reg for ACK the first interrupt got 3110 * from the bootloader. If we don't do this we get a interrupt 3111 * as soon as we register the irq. 3112 */ 3113 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg); 3114 3115 mwifiex_init_sdio_ioport(adapter); 3116 } 3117 3118 static struct mwifiex_if_ops sdio_ops = { 3119 .init_if = mwifiex_init_sdio, 3120 .cleanup_if = mwifiex_cleanup_sdio, 3121 .check_fw_status = mwifiex_check_fw_status, 3122 .check_winner_status = mwifiex_check_winner_status, 3123 .prog_fw = mwifiex_prog_fw_w_helper, 3124 .register_dev = mwifiex_register_dev, 3125 .unregister_dev = mwifiex_unregister_dev, 3126 .enable_int = mwifiex_sdio_enable_host_int, 3127 .disable_int = mwifiex_sdio_disable_host_int, 3128 .process_int_status = mwifiex_process_int_status, 3129 .host_to_card = mwifiex_sdio_host_to_card, 3130 .wakeup = mwifiex_pm_wakeup_card, 3131 .wakeup_complete = mwifiex_pm_wakeup_card_complete, 3132 3133 /* SDIO specific */ 3134 .update_mp_end_port = mwifiex_update_mp_end_port, 3135 .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf, 3136 .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete, 3137 .event_complete = mwifiex_sdio_event_complete, 3138 .dnld_fw = mwifiex_sdio_dnld_fw, 3139 .card_reset = mwifiex_sdio_card_reset, 3140 .reg_dump = mwifiex_sdio_reg_dump, 3141 .device_dump = mwifiex_sdio_device_dump, 3142 .deaggr_pkt = mwifiex_deaggr_sdio_pkt, 3143 .up_dev = mwifiex_sdio_up_dev, 3144 }; 3145 3146 module_driver(mwifiex_sdio, sdio_register_driver, sdio_unregister_driver); 3147 3148 MODULE_AUTHOR("Marvell International Ltd."); 3149 MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION); 3150 MODULE_VERSION(SDIO_VERSION); 3151 MODULE_LICENSE("GPL v2"); 3152 MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME); 3153 MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME); 3154 MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME); 3155 MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME); 3156 MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME); 3157 MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME); 3158 MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME); 3159 MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME); 3160