1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/firmware.h> 5 #include "mt76_connac2_mac.h" 6 #include "mt76_connac_mcu.h" 7 8 int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) 9 { 10 struct { 11 __le32 option; 12 __le32 addr; 13 } req = { 14 .option = cpu_to_le32(option), 15 .addr = cpu_to_le32(addr), 16 }; 17 18 return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req, 19 sizeof(req), true); 20 } 21 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware); 22 23 int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get) 24 { 25 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE; 26 struct { 27 __le32 op; 28 } req = { 29 .op = cpu_to_le32(op), 30 }; 31 32 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL), 33 &req, sizeof(req), true); 34 } 35 EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl); 36 37 int mt76_connac_mcu_start_patch(struct mt76_dev *dev) 38 { 39 struct { 40 u8 check_crc; 41 u8 reserved[3]; 42 } req = { 43 .check_crc = 0, 44 }; 45 46 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ), 47 &req, sizeof(req), true); 48 } 49 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch); 50 51 #define MCU_PATCH_ADDRESS 0x200000 52 53 int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 54 u32 mode) 55 { 56 struct { 57 __le32 addr; 58 __le32 len; 59 __le32 mode; 60 } req = { 61 .addr = cpu_to_le32(addr), 62 .len = cpu_to_le32(len), 63 .mode = cpu_to_le32(mode), 64 }; 65 int cmd; 66 67 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) || 68 (is_mt7921(dev) && addr == 0x900000) || 69 (is_mt7996(dev) && addr == 0x900000)) 70 cmd = MCU_CMD(PATCH_START_REQ); 71 else 72 cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ); 73 74 return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true); 75 } 76 EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download); 77 78 int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy) 79 { 80 int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0; 81 struct mt76_connac_mcu_channel_domain { 82 u8 alpha2[4]; /* regulatory_request.alpha2 */ 83 u8 bw_2g; /* BW_20_40M 0 84 * BW_20M 1 85 * BW_20_40_80M 2 86 * BW_20_40_80_160M 3 87 * BW_20_40_80_8080M 4 88 */ 89 u8 bw_5g; 90 u8 bw_6g; 91 u8 pad; 92 u8 n_2ch; 93 u8 n_5ch; 94 u8 n_6ch; 95 u8 pad2; 96 } __packed hdr = { 97 .bw_2g = 0, 98 .bw_5g = 3, /* BW_20_40_80_160M */ 99 .bw_6g = 3, 100 }; 101 struct mt76_connac_mcu_chan { 102 __le16 hw_value; 103 __le16 pad; 104 __le32 flags; 105 } __packed channel; 106 struct mt76_dev *dev = phy->dev; 107 struct ieee80211_channel *chan; 108 struct sk_buff *skb; 109 110 n_max_channels = phy->sband_2g.sband.n_channels + 111 phy->sband_5g.sband.n_channels + 112 phy->sband_6g.sband.n_channels; 113 len = sizeof(hdr) + n_max_channels * sizeof(channel); 114 115 skb = mt76_mcu_msg_alloc(dev, NULL, len); 116 if (!skb) 117 return -ENOMEM; 118 119 skb_reserve(skb, sizeof(hdr)); 120 121 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) { 122 chan = &phy->sband_2g.sband.channels[i]; 123 if (chan->flags & IEEE80211_CHAN_DISABLED) 124 continue; 125 126 channel.hw_value = cpu_to_le16(chan->hw_value); 127 channel.flags = cpu_to_le32(chan->flags); 128 channel.pad = 0; 129 130 skb_put_data(skb, &channel, sizeof(channel)); 131 n_2ch++; 132 } 133 for (i = 0; i < phy->sband_5g.sband.n_channels; i++) { 134 chan = &phy->sband_5g.sband.channels[i]; 135 if (chan->flags & IEEE80211_CHAN_DISABLED) 136 continue; 137 138 channel.hw_value = cpu_to_le16(chan->hw_value); 139 channel.flags = cpu_to_le32(chan->flags); 140 channel.pad = 0; 141 142 skb_put_data(skb, &channel, sizeof(channel)); 143 n_5ch++; 144 } 145 for (i = 0; i < phy->sband_6g.sband.n_channels; i++) { 146 chan = &phy->sband_6g.sband.channels[i]; 147 if (chan->flags & IEEE80211_CHAN_DISABLED) 148 continue; 149 150 channel.hw_value = cpu_to_le16(chan->hw_value); 151 channel.flags = cpu_to_le32(chan->flags); 152 channel.pad = 0; 153 154 skb_put_data(skb, &channel, sizeof(channel)); 155 n_6ch++; 156 } 157 158 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2)); 159 memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2)); 160 hdr.n_2ch = n_2ch; 161 hdr.n_5ch = n_5ch; 162 hdr.n_6ch = n_6ch; 163 164 memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 165 166 return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN), 167 false); 168 } 169 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain); 170 171 int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 172 bool hdr_trans) 173 { 174 struct { 175 u8 enable; 176 u8 band; 177 u8 rsv[2]; 178 } __packed req_mac = { 179 .enable = enable, 180 .band = band, 181 }; 182 183 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac, 184 sizeof(req_mac), true); 185 } 186 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable); 187 188 int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif) 189 { 190 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 191 struct { 192 u8 bss_idx; 193 u8 ps_state; /* 0: device awake 194 * 1: static power save 195 * 2: dynamic power saving 196 */ 197 } req = { 198 .bss_idx = mvif->idx, 199 .ps_state = vif->cfg.ps ? 2 : 0, 200 }; 201 202 if (vif->type != NL80211_IFTYPE_STATION) 203 return -EOPNOTSUPP; 204 205 return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE), 206 &req, sizeof(req), false); 207 } 208 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps); 209 210 int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band) 211 { 212 struct { 213 u8 prot_idx; 214 u8 band; 215 u8 rsv[2]; 216 __le32 len_thresh; 217 __le32 pkt_thresh; 218 } __packed req = { 219 .prot_idx = 1, 220 .band = band, 221 .len_thresh = cpu_to_le32(val), 222 .pkt_thresh = cpu_to_le32(0x2), 223 }; 224 225 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req, 226 sizeof(req), true); 227 } 228 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh); 229 230 void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 231 struct ieee80211_vif *vif) 232 { 233 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 234 struct mt76_connac_beacon_loss_event *event = priv; 235 236 if (mvif->idx != event->bss_idx) 237 return; 238 239 if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER)) 240 return; 241 242 ieee80211_beacon_loss(vif); 243 } 244 EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter); 245 246 struct tlv * 247 mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len, 248 void *sta_ntlv, void *sta_wtbl) 249 { 250 struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv; 251 struct tlv *sta_hdr = sta_wtbl; 252 struct tlv *ptlv, tlv = { 253 .tag = cpu_to_le16(tag), 254 .len = cpu_to_le16(len), 255 }; 256 u16 ntlv; 257 258 ptlv = skb_put(skb, len); 259 memcpy(ptlv, &tlv, sizeof(tlv)); 260 261 ntlv = le16_to_cpu(ntlv_hdr->tlv_num); 262 ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1); 263 264 if (sta_hdr) { 265 len += le16_to_cpu(sta_hdr->len); 266 sta_hdr->len = cpu_to_le16(len); 267 } 268 269 return ptlv; 270 } 271 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv); 272 273 struct sk_buff * 274 __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, 275 struct mt76_wcid *wcid, int len) 276 { 277 struct sta_req_hdr hdr = { 278 .bss_idx = mvif->idx, 279 .muar_idx = wcid ? mvif->omac_idx : 0, 280 .is_tlv_append = 1, 281 }; 282 struct sk_buff *skb; 283 284 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 285 &hdr.wlan_idx_hi); 286 skb = mt76_mcu_msg_alloc(dev, NULL, len); 287 if (!skb) 288 return ERR_PTR(-ENOMEM); 289 290 skb_put_data(skb, &hdr, sizeof(hdr)); 291 292 return skb; 293 } 294 EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req); 295 296 struct wtbl_req_hdr * 297 mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 298 int cmd, void *sta_wtbl, struct sk_buff **skb) 299 { 300 struct tlv *sta_hdr = sta_wtbl; 301 struct wtbl_req_hdr hdr = { 302 .operation = cmd, 303 }; 304 struct sk_buff *nskb = *skb; 305 306 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 307 &hdr.wlan_idx_hi); 308 if (!nskb) { 309 nskb = mt76_mcu_msg_alloc(dev, NULL, 310 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE); 311 if (!nskb) 312 return ERR_PTR(-ENOMEM); 313 314 *skb = nskb; 315 } 316 317 if (sta_hdr) 318 le16_add_cpu(&sta_hdr->len, sizeof(hdr)); 319 320 return skb_put_data(nskb, &hdr, sizeof(hdr)); 321 } 322 EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req); 323 324 void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 325 struct ieee80211_vif *vif) 326 { 327 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 328 u8 omac_idx = mvif->omac_idx; 329 struct bss_info_omac *omac; 330 struct tlv *tlv; 331 u32 type = 0; 332 333 switch (vif->type) { 334 case NL80211_IFTYPE_MONITOR: 335 case NL80211_IFTYPE_MESH_POINT: 336 case NL80211_IFTYPE_AP: 337 if (vif->p2p) 338 type = CONNECTION_P2P_GO; 339 else 340 type = CONNECTION_INFRA_AP; 341 break; 342 case NL80211_IFTYPE_STATION: 343 if (vif->p2p) 344 type = CONNECTION_P2P_GC; 345 else 346 type = CONNECTION_INFRA_STA; 347 break; 348 case NL80211_IFTYPE_ADHOC: 349 type = CONNECTION_IBSS_ADHOC; 350 break; 351 default: 352 WARN_ON(1); 353 break; 354 } 355 356 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); 357 358 omac = (struct bss_info_omac *)tlv; 359 omac->conn_type = cpu_to_le32(type); 360 omac->omac_idx = mvif->omac_idx; 361 omac->band_idx = mvif->band_idx; 362 omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx; 363 } 364 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv); 365 366 void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, 367 struct ieee80211_vif *vif, 368 struct ieee80211_sta *sta, 369 bool enable, bool newly) 370 { 371 struct sta_rec_basic *basic; 372 struct tlv *tlv; 373 int conn_type; 374 375 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic)); 376 377 basic = (struct sta_rec_basic *)tlv; 378 basic->extra_info = cpu_to_le16(EXTRA_INFO_VER); 379 380 if (enable) { 381 if (newly) 382 basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW); 383 basic->conn_state = CONN_STATE_PORT_SECURE; 384 } else { 385 basic->conn_state = CONN_STATE_DISCONNECT; 386 } 387 388 if (!sta) { 389 basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC); 390 eth_broadcast_addr(basic->peer_addr); 391 return; 392 } 393 394 switch (vif->type) { 395 case NL80211_IFTYPE_MESH_POINT: 396 case NL80211_IFTYPE_AP: 397 if (vif->p2p) 398 conn_type = CONNECTION_P2P_GC; 399 else 400 conn_type = CONNECTION_INFRA_STA; 401 basic->conn_type = cpu_to_le32(conn_type); 402 basic->aid = cpu_to_le16(sta->aid); 403 break; 404 case NL80211_IFTYPE_STATION: 405 if (vif->p2p) 406 conn_type = CONNECTION_P2P_GO; 407 else 408 conn_type = CONNECTION_INFRA_AP; 409 basic->conn_type = cpu_to_le32(conn_type); 410 basic->aid = cpu_to_le16(vif->cfg.aid); 411 break; 412 case NL80211_IFTYPE_ADHOC: 413 basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 414 basic->aid = cpu_to_le16(sta->aid); 415 break; 416 default: 417 WARN_ON(1); 418 break; 419 } 420 421 memcpy(basic->peer_addr, sta->addr, ETH_ALEN); 422 basic->qos = sta->wme; 423 } 424 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv); 425 426 void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 427 struct ieee80211_sta *sta) 428 { 429 struct sta_rec_uapsd *uapsd; 430 struct tlv *tlv; 431 432 if (vif->type != NL80211_IFTYPE_AP || !sta->wme) 433 return; 434 435 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd)); 436 uapsd = (struct sta_rec_uapsd *)tlv; 437 438 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) { 439 uapsd->dac_map |= BIT(3); 440 uapsd->tac_map |= BIT(3); 441 } 442 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) { 443 uapsd->dac_map |= BIT(2); 444 uapsd->tac_map |= BIT(2); 445 } 446 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) { 447 uapsd->dac_map |= BIT(1); 448 uapsd->tac_map |= BIT(1); 449 } 450 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) { 451 uapsd->dac_map |= BIT(0); 452 uapsd->tac_map |= BIT(0); 453 } 454 uapsd->max_sp = sta->max_sp; 455 } 456 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd); 457 458 void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 459 struct ieee80211_vif *vif, 460 struct mt76_wcid *wcid, 461 void *sta_wtbl, void *wtbl_tlv) 462 { 463 struct wtbl_hdr_trans *htr; 464 struct tlv *tlv; 465 466 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS, 467 sizeof(*htr), 468 wtbl_tlv, sta_wtbl); 469 htr = (struct wtbl_hdr_trans *)tlv; 470 htr->no_rx_trans = true; 471 472 if (vif->type == NL80211_IFTYPE_STATION) 473 htr->to_ds = true; 474 else 475 htr->from_ds = true; 476 477 if (!wcid) 478 return; 479 480 htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 481 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 482 htr->to_ds = true; 483 htr->from_ds = true; 484 } 485 } 486 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv); 487 488 int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 489 struct ieee80211_vif *vif, 490 struct mt76_wcid *wcid, int cmd) 491 { 492 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 493 struct wtbl_req_hdr *wtbl_hdr; 494 struct tlv *sta_wtbl; 495 struct sk_buff *skb; 496 497 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 498 if (IS_ERR(skb)) 499 return PTR_ERR(skb); 500 501 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 502 sizeof(struct tlv)); 503 504 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, 505 sta_wtbl, &skb); 506 if (IS_ERR(wtbl_hdr)) 507 return PTR_ERR(wtbl_hdr); 508 509 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr); 510 511 return mt76_mcu_skb_send_msg(dev, skb, cmd, true); 512 } 513 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans); 514 515 int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 516 struct ieee80211_vif *vif, 517 struct ieee80211_sta *sta) 518 { 519 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 520 struct wtbl_req_hdr *wtbl_hdr; 521 struct sk_buff *skb = NULL; 522 523 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL, 524 &skb); 525 if (IS_ERR(wtbl_hdr)) 526 return PTR_ERR(wtbl_hdr); 527 528 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr); 529 530 return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true); 531 } 532 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans); 533 534 void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, 535 struct sk_buff *skb, 536 struct ieee80211_vif *vif, 537 struct ieee80211_sta *sta, 538 void *sta_wtbl, void *wtbl_tlv) 539 { 540 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 541 struct wtbl_generic *generic; 542 struct wtbl_rx *rx; 543 struct wtbl_spe *spe; 544 struct tlv *tlv; 545 546 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC, 547 sizeof(*generic), 548 wtbl_tlv, sta_wtbl); 549 550 generic = (struct wtbl_generic *)tlv; 551 552 if (sta) { 553 if (vif->type == NL80211_IFTYPE_STATION) 554 generic->partial_aid = cpu_to_le16(vif->cfg.aid); 555 else 556 generic->partial_aid = cpu_to_le16(sta->aid); 557 memcpy(generic->peer_addr, sta->addr, ETH_ALEN); 558 generic->muar_idx = mvif->omac_idx; 559 generic->qos = sta->wme; 560 } else { 561 if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION) 562 memcpy(generic->peer_addr, vif->bss_conf.bssid, 563 ETH_ALEN); 564 else 565 eth_broadcast_addr(generic->peer_addr); 566 567 generic->muar_idx = 0xe; 568 } 569 570 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx), 571 wtbl_tlv, sta_wtbl); 572 573 rx = (struct wtbl_rx *)tlv; 574 rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1; 575 rx->rca2 = 1; 576 rx->rv = 1; 577 578 if (!is_connac_v1(dev)) 579 return; 580 581 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe), 582 wtbl_tlv, sta_wtbl); 583 spe = (struct wtbl_spe *)tlv; 584 spe->spe_idx = 24; 585 } 586 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv); 587 588 static void 589 mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, 590 struct ieee80211_vif *vif) 591 { 592 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 593 struct sta_rec_amsdu *amsdu; 594 struct tlv *tlv; 595 596 if (vif->type != NL80211_IFTYPE_AP && 597 vif->type != NL80211_IFTYPE_STATION) 598 return; 599 600 if (!sta->deflink.agg.max_amsdu_len) 601 return; 602 603 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 604 amsdu = (struct sta_rec_amsdu *)tlv; 605 amsdu->max_amsdu_num = 8; 606 amsdu->amsdu_en = true; 607 amsdu->max_mpdu_size = sta->deflink.agg.max_amsdu_len >= 608 IEEE80211_MAX_MPDU_LEN_VHT_7991; 609 610 wcid->amsdu = true; 611 } 612 613 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 614 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 615 static void 616 mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 617 { 618 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap; 619 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 620 struct sta_rec_he *he; 621 struct tlv *tlv; 622 u32 cap = 0; 623 624 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); 625 626 he = (struct sta_rec_he *)tlv; 627 628 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE) 629 cap |= STA_REC_HE_CAP_HTC; 630 631 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR) 632 cap |= STA_REC_HE_CAP_BSR; 633 634 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL) 635 cap |= STA_REC_HE_CAP_OM; 636 637 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU) 638 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU; 639 640 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR) 641 cap |= STA_REC_HE_CAP_BQR; 642 643 if (elem->phy_cap_info[0] & 644 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G | 645 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G)) 646 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT; 647 648 if (elem->phy_cap_info[1] & 649 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD) 650 cap |= STA_REC_HE_CAP_LDPC; 651 652 if (elem->phy_cap_info[1] & 653 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US) 654 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI; 655 656 if (elem->phy_cap_info[2] & 657 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US) 658 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI; 659 660 if (elem->phy_cap_info[2] & 661 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ) 662 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC; 663 664 if (elem->phy_cap_info[2] & 665 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) 666 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC; 667 668 if (elem->phy_cap_info[6] & 669 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE) 670 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE; 671 672 if (elem->phy_cap_info[7] & 673 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI) 674 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI; 675 676 if (elem->phy_cap_info[7] & 677 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ) 678 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC; 679 680 if (elem->phy_cap_info[7] & 681 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ) 682 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC; 683 684 if (elem->phy_cap_info[8] & 685 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI) 686 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI; 687 688 if (elem->phy_cap_info[8] & 689 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI) 690 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI; 691 692 if (elem->phy_cap_info[9] & 693 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK) 694 cap |= STA_REC_HE_CAP_TRIG_CQI_FK; 695 696 if (elem->phy_cap_info[9] & 697 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU) 698 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242; 699 700 if (elem->phy_cap_info[9] & 701 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU) 702 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242; 703 704 he->he_cap = cpu_to_le32(cap); 705 706 switch (sta->deflink.bandwidth) { 707 case IEEE80211_STA_RX_BW_160: 708 if (elem->phy_cap_info[0] & 709 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 710 he->max_nss_mcs[CMD_HE_MCS_BW8080] = 711 he_cap->he_mcs_nss_supp.rx_mcs_80p80; 712 713 he->max_nss_mcs[CMD_HE_MCS_BW160] = 714 he_cap->he_mcs_nss_supp.rx_mcs_160; 715 fallthrough; 716 default: 717 he->max_nss_mcs[CMD_HE_MCS_BW80] = 718 he_cap->he_mcs_nss_supp.rx_mcs_80; 719 break; 720 } 721 722 he->t_frame_dur = 723 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 724 he->max_ampdu_exp = 725 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]); 726 727 he->bw_set = 728 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]); 729 he->device_class = 730 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]); 731 he->punc_pream_rx = 732 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 733 734 he->dcm_tx_mode = 735 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]); 736 he->dcm_tx_max_nss = 737 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]); 738 he->dcm_rx_mode = 739 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]); 740 he->dcm_rx_max_nss = 741 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]); 742 he->dcm_rx_max_nss = 743 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]); 744 745 he->pkt_ext = 2; 746 } 747 748 static void 749 mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta) 750 { 751 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap; 752 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 753 struct sta_rec_he_v2 *he; 754 struct tlv *tlv; 755 756 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 757 758 he = (struct sta_rec_he_v2 *)tlv; 759 memcpy(he->he_phy_cap, elem->phy_cap_info, sizeof(he->he_phy_cap)); 760 memcpy(he->he_mac_cap, elem->mac_cap_info, sizeof(he->he_mac_cap)); 761 762 switch (sta->deflink.bandwidth) { 763 case IEEE80211_STA_RX_BW_160: 764 if (elem->phy_cap_info[0] & 765 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 766 he->max_nss_mcs[CMD_HE_MCS_BW8080] = 767 he_cap->he_mcs_nss_supp.rx_mcs_80p80; 768 769 he->max_nss_mcs[CMD_HE_MCS_BW160] = 770 he_cap->he_mcs_nss_supp.rx_mcs_160; 771 fallthrough; 772 default: 773 he->max_nss_mcs[CMD_HE_MCS_BW80] = 774 he_cap->he_mcs_nss_supp.rx_mcs_80; 775 break; 776 } 777 778 he->pkt_ext = IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US; 779 } 780 781 static u8 782 mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif, 783 enum nl80211_band band, struct ieee80211_sta *sta) 784 { 785 struct ieee80211_sta_ht_cap *ht_cap; 786 struct ieee80211_sta_vht_cap *vht_cap; 787 const struct ieee80211_sta_he_cap *he_cap; 788 u8 mode = 0; 789 790 if (sta) { 791 ht_cap = &sta->deflink.ht_cap; 792 vht_cap = &sta->deflink.vht_cap; 793 he_cap = &sta->deflink.he_cap; 794 } else { 795 struct ieee80211_supported_band *sband; 796 797 sband = mphy->hw->wiphy->bands[band]; 798 ht_cap = &sband->ht_cap; 799 vht_cap = &sband->vht_cap; 800 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); 801 } 802 803 if (band == NL80211_BAND_2GHZ) { 804 mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP; 805 806 if (ht_cap->ht_supported) 807 mode |= PHY_TYPE_BIT_HT; 808 809 if (he_cap && he_cap->has_he) 810 mode |= PHY_TYPE_BIT_HE; 811 } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) { 812 mode |= PHY_TYPE_BIT_OFDM; 813 814 if (ht_cap->ht_supported) 815 mode |= PHY_TYPE_BIT_HT; 816 817 if (vht_cap->vht_supported) 818 mode |= PHY_TYPE_BIT_VHT; 819 820 if (he_cap && he_cap->has_he) 821 mode |= PHY_TYPE_BIT_HE; 822 } 823 824 return mode; 825 } 826 827 void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 828 struct ieee80211_sta *sta, 829 struct ieee80211_vif *vif, 830 u8 rcpi, u8 sta_state) 831 { 832 struct cfg80211_chan_def *chandef = &mphy->chandef; 833 enum nl80211_band band = chandef->chan->band; 834 struct mt76_dev *dev = mphy->dev; 835 struct sta_rec_ra_info *ra_info; 836 struct sta_rec_state *state; 837 struct sta_rec_phy *phy; 838 struct tlv *tlv; 839 u16 supp_rates; 840 841 /* starec ht */ 842 if (sta->deflink.ht_cap.ht_supported) { 843 struct sta_rec_ht *ht; 844 845 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 846 ht = (struct sta_rec_ht *)tlv; 847 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 848 } 849 850 /* starec vht */ 851 if (sta->deflink.vht_cap.vht_supported) { 852 struct sta_rec_vht *vht; 853 int len; 854 855 len = is_mt7921(dev) ? sizeof(*vht) : sizeof(*vht) - 4; 856 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len); 857 vht = (struct sta_rec_vht *)tlv; 858 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 859 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 860 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 861 } 862 863 /* starec uapsd */ 864 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 865 866 if (!is_mt7921(dev)) 867 return; 868 869 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he) 870 mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif); 871 872 /* starec he */ 873 if (sta->deflink.he_cap.has_he) { 874 mt76_connac_mcu_sta_he_tlv(skb, sta); 875 mt76_connac_mcu_sta_he_tlv_v2(skb, sta); 876 if (band == NL80211_BAND_6GHZ && 877 sta_state == MT76_STA_INFO_STATE_ASSOC) { 878 struct sta_rec_he_6g_capa *he_6g_capa; 879 880 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, 881 sizeof(*he_6g_capa)); 882 he_6g_capa = (struct sta_rec_he_6g_capa *)tlv; 883 he_6g_capa->capa = sta->deflink.he_6ghz_capa.capa; 884 } 885 } 886 887 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); 888 phy = (struct sta_rec_phy *)tlv; 889 phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, sta); 890 phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates); 891 phy->rcpi = rcpi; 892 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, 893 sta->deflink.ht_cap.ampdu_factor) | 894 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, 895 sta->deflink.ht_cap.ampdu_density); 896 897 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info)); 898 ra_info = (struct sta_rec_ra_info *)tlv; 899 900 supp_rates = sta->deflink.supp_rates[band]; 901 if (band == NL80211_BAND_2GHZ) 902 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) | 903 FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf); 904 else 905 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates); 906 907 ra_info->legacy = cpu_to_le16(supp_rates); 908 909 if (sta->deflink.ht_cap.ht_supported) 910 memcpy(ra_info->rx_mcs_bitmask, 911 sta->deflink.ht_cap.mcs.rx_mask, 912 HT_MCS_MASK_NUM); 913 914 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state)); 915 state = (struct sta_rec_state *)tlv; 916 state->state = sta_state; 917 918 if (sta->deflink.vht_cap.vht_supported) { 919 state->vht_opmode = sta->deflink.bandwidth; 920 state->vht_opmode |= (sta->deflink.rx_nss - 1) << 921 IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT; 922 } 923 } 924 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv); 925 926 void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 927 struct ieee80211_sta *sta, 928 void *sta_wtbl, void *wtbl_tlv) 929 { 930 struct wtbl_smps *smps; 931 struct tlv *tlv; 932 933 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps), 934 wtbl_tlv, sta_wtbl); 935 smps = (struct wtbl_smps *)tlv; 936 smps->smps = (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC); 937 } 938 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv); 939 940 void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 941 struct ieee80211_sta *sta, void *sta_wtbl, 942 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc) 943 { 944 struct wtbl_ht *ht = NULL; 945 struct tlv *tlv; 946 u32 flags = 0; 947 948 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_6ghz_capa.capa) { 949 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht), 950 wtbl_tlv, sta_wtbl); 951 ht = (struct wtbl_ht *)tlv; 952 ht->ldpc = ht_ldpc && 953 !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING); 954 955 if (sta->deflink.ht_cap.ht_supported) { 956 ht->af = sta->deflink.ht_cap.ampdu_factor; 957 ht->mm = sta->deflink.ht_cap.ampdu_density; 958 } else { 959 ht->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 960 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 961 ht->mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 962 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 963 } 964 965 ht->ht = true; 966 } 967 968 if (sta->deflink.vht_cap.vht_supported || sta->deflink.he_6ghz_capa.capa) { 969 struct wtbl_vht *vht; 970 u8 af; 971 972 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT, 973 sizeof(*vht), wtbl_tlv, 974 sta_wtbl); 975 vht = (struct wtbl_vht *)tlv; 976 vht->ldpc = vht_ldpc && 977 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); 978 vht->vht = true; 979 980 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 981 sta->deflink.vht_cap.cap); 982 if (ht) 983 ht->af = max(ht->af, af); 984 } 985 986 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv); 987 988 if (is_connac_v1(dev) && sta->deflink.ht_cap.ht_supported) { 989 /* sgi */ 990 u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 991 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 992 struct wtbl_raw *raw; 993 994 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA, 995 sizeof(*raw), wtbl_tlv, 996 sta_wtbl); 997 998 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 999 flags |= MT_WTBL_W5_SHORT_GI_20; 1000 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1001 flags |= MT_WTBL_W5_SHORT_GI_40; 1002 1003 if (sta->deflink.vht_cap.vht_supported) { 1004 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1005 flags |= MT_WTBL_W5_SHORT_GI_80; 1006 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1007 flags |= MT_WTBL_W5_SHORT_GI_160; 1008 } 1009 raw = (struct wtbl_raw *)tlv; 1010 raw->val = cpu_to_le32(flags); 1011 raw->msk = cpu_to_le32(~msk); 1012 raw->wtbl_idx = 1; 1013 raw->dw = 5; 1014 } 1015 } 1016 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv); 1017 1018 int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 1019 struct mt76_sta_cmd_info *info) 1020 { 1021 struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv; 1022 struct mt76_dev *dev = phy->dev; 1023 struct wtbl_req_hdr *wtbl_hdr; 1024 struct tlv *sta_wtbl; 1025 struct sk_buff *skb; 1026 1027 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid); 1028 if (IS_ERR(skb)) 1029 return PTR_ERR(skb); 1030 1031 if (info->sta || !info->offload_fw) 1032 mt76_connac_mcu_sta_basic_tlv(skb, info->vif, info->sta, 1033 info->enable, info->newly); 1034 if (info->sta && info->enable) 1035 mt76_connac_mcu_sta_tlv(phy, skb, info->sta, 1036 info->vif, info->rcpi, 1037 info->state); 1038 1039 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1040 sizeof(struct tlv)); 1041 1042 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid, 1043 WTBL_RESET_AND_SET, 1044 sta_wtbl, &skb); 1045 if (IS_ERR(wtbl_hdr)) 1046 return PTR_ERR(wtbl_hdr); 1047 1048 if (info->enable) { 1049 mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif, 1050 info->sta, sta_wtbl, 1051 wtbl_hdr); 1052 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid, 1053 sta_wtbl, wtbl_hdr); 1054 if (info->sta) 1055 mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta, 1056 sta_wtbl, wtbl_hdr, 1057 true, true); 1058 } 1059 1060 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true); 1061 } 1062 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd); 1063 1064 void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1065 struct ieee80211_ampdu_params *params, 1066 bool enable, bool tx, void *sta_wtbl, 1067 void *wtbl_tlv) 1068 { 1069 struct wtbl_ba *ba; 1070 struct tlv *tlv; 1071 1072 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba), 1073 wtbl_tlv, sta_wtbl); 1074 1075 ba = (struct wtbl_ba *)tlv; 1076 ba->tid = params->tid; 1077 1078 if (tx) { 1079 ba->ba_type = MT_BA_TYPE_ORIGINATOR; 1080 ba->sn = enable ? cpu_to_le16(params->ssn) : 0; 1081 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; 1082 ba->ba_en = enable; 1083 } else { 1084 memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN); 1085 ba->ba_type = MT_BA_TYPE_RECIPIENT; 1086 ba->rst_ba_tid = params->tid; 1087 ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; 1088 ba->rst_ba_sb = 1; 1089 } 1090 1091 if (!is_connac_v1(dev)) { 1092 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; 1093 return; 1094 } 1095 1096 if (enable && tx) { 1097 static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 1098 int i; 1099 1100 for (i = 7; i > 0; i--) { 1101 if (params->buf_size >= ba_range[i]) 1102 break; 1103 } 1104 ba->ba_winsize_idx = i; 1105 } 1106 } 1107 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv); 1108 1109 int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1110 struct ieee80211_vif *vif, 1111 struct mt76_wcid *wcid, 1112 bool enable) 1113 { 1114 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1115 struct mt76_dev *dev = phy->dev; 1116 struct { 1117 struct { 1118 u8 omac_idx; 1119 u8 band_idx; 1120 __le16 pad; 1121 } __packed hdr; 1122 struct req_tlv { 1123 __le16 tag; 1124 __le16 len; 1125 u8 active; 1126 u8 pad; 1127 u8 omac_addr[ETH_ALEN]; 1128 } __packed tlv; 1129 } dev_req = { 1130 .hdr = { 1131 .omac_idx = mvif->omac_idx, 1132 .band_idx = mvif->band_idx, 1133 }, 1134 .tlv = { 1135 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1136 .len = cpu_to_le16(sizeof(struct req_tlv)), 1137 .active = enable, 1138 }, 1139 }; 1140 struct { 1141 struct { 1142 u8 bss_idx; 1143 u8 pad[3]; 1144 } __packed hdr; 1145 struct mt76_connac_bss_basic_tlv basic; 1146 } basic_req = { 1147 .hdr = { 1148 .bss_idx = mvif->idx, 1149 }, 1150 .basic = { 1151 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1152 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)), 1153 .omac_idx = mvif->omac_idx, 1154 .band_idx = mvif->band_idx, 1155 .wmm_idx = mvif->wmm_idx, 1156 .active = enable, 1157 .bmc_tx_wlan_idx = cpu_to_le16(wcid->idx), 1158 .sta_idx = cpu_to_le16(wcid->idx), 1159 .conn_state = 1, 1160 }, 1161 }; 1162 int err, idx, cmd, len; 1163 void *data; 1164 1165 switch (vif->type) { 1166 case NL80211_IFTYPE_MESH_POINT: 1167 case NL80211_IFTYPE_MONITOR: 1168 case NL80211_IFTYPE_AP: 1169 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 1170 break; 1171 case NL80211_IFTYPE_STATION: 1172 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 1173 break; 1174 case NL80211_IFTYPE_ADHOC: 1175 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1176 break; 1177 default: 1178 WARN_ON(1); 1179 break; 1180 } 1181 1182 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1183 basic_req.basic.hw_bss_idx = idx; 1184 1185 memcpy(dev_req.tlv.omac_addr, vif->addr, ETH_ALEN); 1186 1187 cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE); 1188 data = enable ? (void *)&dev_req : (void *)&basic_req; 1189 len = enable ? sizeof(dev_req) : sizeof(basic_req); 1190 1191 err = mt76_mcu_send_msg(dev, cmd, data, len, true); 1192 if (err < 0) 1193 return err; 1194 1195 cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE); 1196 data = enable ? (void *)&basic_req : (void *)&dev_req; 1197 len = enable ? sizeof(basic_req) : sizeof(dev_req); 1198 1199 return mt76_mcu_send_msg(dev, cmd, data, len, true); 1200 } 1201 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev); 1202 1203 void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1204 struct ieee80211_ampdu_params *params, 1205 bool enable, bool tx) 1206 { 1207 struct sta_rec_ba *ba; 1208 struct tlv *tlv; 1209 1210 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1211 1212 ba = (struct sta_rec_ba *)tlv; 1213 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1214 ba->winsize = cpu_to_le16(params->buf_size); 1215 ba->ssn = cpu_to_le16(params->ssn); 1216 ba->ba_en = enable << params->tid; 1217 ba->amsdu = params->amsdu; 1218 ba->tid = params->tid; 1219 } 1220 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv); 1221 1222 int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb) 1223 { 1224 if (!mtk_wed_device_active(&dev->mmio.wed)) 1225 return 0; 1226 1227 return mtk_wed_device_update_msg(&dev->mmio.wed, WED_WO_STA_REC, 1228 skb->data, skb->len); 1229 } 1230 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_wed_update); 1231 1232 int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, 1233 struct ieee80211_ampdu_params *params, 1234 int cmd, bool enable, bool tx) 1235 { 1236 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1237 struct wtbl_req_hdr *wtbl_hdr; 1238 struct tlv *sta_wtbl; 1239 struct sk_buff *skb; 1240 int ret; 1241 1242 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 1243 if (IS_ERR(skb)) 1244 return PTR_ERR(skb); 1245 1246 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1247 sizeof(struct tlv)); 1248 1249 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, 1250 sta_wtbl, &skb); 1251 if (IS_ERR(wtbl_hdr)) 1252 return PTR_ERR(wtbl_hdr); 1253 1254 mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl, 1255 wtbl_hdr); 1256 1257 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 1258 if (ret) 1259 return ret; 1260 1261 ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true); 1262 if (ret) 1263 return ret; 1264 1265 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 1266 if (IS_ERR(skb)) 1267 return PTR_ERR(skb); 1268 1269 mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx); 1270 1271 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 1272 if (ret) 1273 return ret; 1274 1275 return mt76_mcu_skb_send_msg(dev, skb, cmd, true); 1276 } 1277 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba); 1278 1279 u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1280 enum nl80211_band band, struct ieee80211_sta *sta) 1281 { 1282 struct mt76_dev *dev = phy->dev; 1283 const struct ieee80211_sta_he_cap *he_cap; 1284 struct ieee80211_sta_vht_cap *vht_cap; 1285 struct ieee80211_sta_ht_cap *ht_cap; 1286 u8 mode = 0; 1287 1288 if (is_connac_v1(dev)) 1289 return 0x38; 1290 1291 if (sta) { 1292 ht_cap = &sta->deflink.ht_cap; 1293 vht_cap = &sta->deflink.vht_cap; 1294 he_cap = &sta->deflink.he_cap; 1295 } else { 1296 struct ieee80211_supported_band *sband; 1297 1298 sband = phy->hw->wiphy->bands[band]; 1299 ht_cap = &sband->ht_cap; 1300 vht_cap = &sband->vht_cap; 1301 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); 1302 } 1303 1304 if (band == NL80211_BAND_2GHZ) { 1305 mode |= PHY_MODE_B | PHY_MODE_G; 1306 1307 if (ht_cap->ht_supported) 1308 mode |= PHY_MODE_GN; 1309 1310 if (he_cap && he_cap->has_he) 1311 mode |= PHY_MODE_AX_24G; 1312 } else if (band == NL80211_BAND_5GHZ) { 1313 mode |= PHY_MODE_A; 1314 1315 if (ht_cap->ht_supported) 1316 mode |= PHY_MODE_AN; 1317 1318 if (vht_cap->vht_supported) 1319 mode |= PHY_MODE_AC; 1320 1321 if (he_cap && he_cap->has_he) 1322 mode |= PHY_MODE_AX_5G; 1323 } else if (band == NL80211_BAND_6GHZ) { 1324 mode |= PHY_MODE_A | PHY_MODE_AN | 1325 PHY_MODE_AC | PHY_MODE_AX_5G; 1326 } 1327 1328 return mode; 1329 } 1330 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode); 1331 1332 u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, 1333 enum nl80211_band band) 1334 { 1335 const struct ieee80211_sta_eht_cap *eht_cap; 1336 struct ieee80211_supported_band *sband; 1337 u8 mode = 0; 1338 1339 if (band == NL80211_BAND_6GHZ) 1340 mode |= PHY_MODE_AX_6G; 1341 1342 sband = phy->hw->wiphy->bands[band]; 1343 eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type); 1344 1345 if (!eht_cap || !eht_cap->has_eht) 1346 return mode; 1347 1348 switch (band) { 1349 case NL80211_BAND_6GHZ: 1350 mode |= PHY_MODE_BE_6G; 1351 break; 1352 case NL80211_BAND_5GHZ: 1353 mode |= PHY_MODE_BE_5G; 1354 break; 1355 case NL80211_BAND_2GHZ: 1356 mode |= PHY_MODE_BE_24G; 1357 break; 1358 default: 1359 break; 1360 } 1361 1362 return mode; 1363 } 1364 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext); 1365 1366 const struct ieee80211_sta_he_cap * 1367 mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) 1368 { 1369 enum nl80211_band band = phy->chandef.chan->band; 1370 struct ieee80211_supported_band *sband; 1371 1372 sband = phy->hw->wiphy->bands[band]; 1373 1374 return ieee80211_get_he_iftype_cap(sband, vif->type); 1375 } 1376 EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap); 1377 1378 const struct ieee80211_sta_eht_cap * 1379 mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) 1380 { 1381 enum nl80211_band band = phy->chandef.chan->band; 1382 struct ieee80211_supported_band *sband; 1383 1384 sband = phy->hw->wiphy->bands[band]; 1385 1386 return ieee80211_get_eht_iftype_cap(sband, vif->type); 1387 } 1388 EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap); 1389 1390 #define DEFAULT_HE_PE_DURATION 4 1391 #define DEFAULT_HE_DURATION_RTS_THRES 1023 1392 static void 1393 mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif, 1394 struct tlv *tlv) 1395 { 1396 const struct ieee80211_sta_he_cap *cap; 1397 struct bss_info_uni_he *he; 1398 1399 cap = mt76_connac_get_he_phy_cap(phy, vif); 1400 1401 he = (struct bss_info_uni_he *)tlv; 1402 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 1403 if (!he->he_pe_duration) 1404 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 1405 1406 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 1407 if (!he->he_rts_thres) 1408 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 1409 1410 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 1411 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 1412 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 1413 } 1414 1415 int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, struct mt76_vif *mvif, 1416 struct ieee80211_chanctx_conf *ctx) 1417 { 1418 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 1419 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2; 1420 enum nl80211_band band = chandef->chan->band; 1421 struct mt76_dev *mdev = phy->dev; 1422 struct { 1423 struct { 1424 u8 bss_idx; 1425 u8 pad[3]; 1426 } __packed hdr; 1427 struct rlm_tlv { 1428 __le16 tag; 1429 __le16 len; 1430 u8 control_channel; 1431 u8 center_chan; 1432 u8 center_chan2; 1433 u8 bw; 1434 u8 tx_streams; 1435 u8 rx_streams; 1436 u8 short_st; 1437 u8 ht_op_info; 1438 u8 sco; 1439 u8 band; 1440 u8 pad[2]; 1441 } __packed rlm; 1442 } __packed rlm_req = { 1443 .hdr = { 1444 .bss_idx = mvif->idx, 1445 }, 1446 .rlm = { 1447 .tag = cpu_to_le16(UNI_BSS_INFO_RLM), 1448 .len = cpu_to_le16(sizeof(struct rlm_tlv)), 1449 .control_channel = chandef->chan->hw_value, 1450 .center_chan = ieee80211_frequency_to_channel(freq1), 1451 .center_chan2 = ieee80211_frequency_to_channel(freq2), 1452 .tx_streams = hweight8(phy->antenna_mask), 1453 .ht_op_info = 4, /* set HT 40M allowed */ 1454 .rx_streams = phy->chainmask, 1455 .short_st = true, 1456 .band = band, 1457 }, 1458 }; 1459 1460 switch (chandef->width) { 1461 case NL80211_CHAN_WIDTH_40: 1462 rlm_req.rlm.bw = CMD_CBW_40MHZ; 1463 break; 1464 case NL80211_CHAN_WIDTH_80: 1465 rlm_req.rlm.bw = CMD_CBW_80MHZ; 1466 break; 1467 case NL80211_CHAN_WIDTH_80P80: 1468 rlm_req.rlm.bw = CMD_CBW_8080MHZ; 1469 break; 1470 case NL80211_CHAN_WIDTH_160: 1471 rlm_req.rlm.bw = CMD_CBW_160MHZ; 1472 break; 1473 case NL80211_CHAN_WIDTH_5: 1474 rlm_req.rlm.bw = CMD_CBW_5MHZ; 1475 break; 1476 case NL80211_CHAN_WIDTH_10: 1477 rlm_req.rlm.bw = CMD_CBW_10MHZ; 1478 break; 1479 case NL80211_CHAN_WIDTH_20_NOHT: 1480 case NL80211_CHAN_WIDTH_20: 1481 default: 1482 rlm_req.rlm.bw = CMD_CBW_20MHZ; 1483 rlm_req.rlm.ht_op_info = 0; 1484 break; 1485 } 1486 1487 if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan) 1488 rlm_req.rlm.sco = 1; /* SCA */ 1489 else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan) 1490 rlm_req.rlm.sco = 3; /* SCB */ 1491 1492 return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req, 1493 sizeof(rlm_req), true); 1494 } 1495 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_set_chctx); 1496 1497 int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1498 struct ieee80211_vif *vif, 1499 struct mt76_wcid *wcid, 1500 bool enable, 1501 struct ieee80211_chanctx_conf *ctx) 1502 { 1503 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1504 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 1505 enum nl80211_band band = chandef->chan->band; 1506 struct mt76_dev *mdev = phy->dev; 1507 struct { 1508 struct { 1509 u8 bss_idx; 1510 u8 pad[3]; 1511 } __packed hdr; 1512 struct mt76_connac_bss_basic_tlv basic; 1513 struct mt76_connac_bss_qos_tlv qos; 1514 } basic_req = { 1515 .hdr = { 1516 .bss_idx = mvif->idx, 1517 }, 1518 .basic = { 1519 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1520 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)), 1521 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int), 1522 .dtim_period = vif->bss_conf.dtim_period, 1523 .omac_idx = mvif->omac_idx, 1524 .band_idx = mvif->band_idx, 1525 .wmm_idx = mvif->wmm_idx, 1526 .active = true, /* keep bss deactivated */ 1527 .phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL), 1528 }, 1529 .qos = { 1530 .tag = cpu_to_le16(UNI_BSS_INFO_QBSS), 1531 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)), 1532 .qos = vif->bss_conf.qos, 1533 }, 1534 }; 1535 int err, conn_type; 1536 u8 idx, basic_phy; 1537 1538 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1539 basic_req.basic.hw_bss_idx = idx; 1540 if (band == NL80211_BAND_6GHZ) 1541 basic_req.basic.phymode_ext = PHY_MODE_AX_6G; 1542 1543 basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL); 1544 basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy); 1545 1546 switch (vif->type) { 1547 case NL80211_IFTYPE_MESH_POINT: 1548 case NL80211_IFTYPE_AP: 1549 if (vif->p2p) 1550 conn_type = CONNECTION_P2P_GO; 1551 else 1552 conn_type = CONNECTION_INFRA_AP; 1553 basic_req.basic.conn_type = cpu_to_le32(conn_type); 1554 /* Fully active/deactivate BSS network in AP mode only */ 1555 basic_req.basic.active = enable; 1556 break; 1557 case NL80211_IFTYPE_STATION: 1558 if (vif->p2p) 1559 conn_type = CONNECTION_P2P_GC; 1560 else 1561 conn_type = CONNECTION_INFRA_STA; 1562 basic_req.basic.conn_type = cpu_to_le32(conn_type); 1563 break; 1564 case NL80211_IFTYPE_ADHOC: 1565 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1566 break; 1567 default: 1568 WARN_ON(1); 1569 break; 1570 } 1571 1572 memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN); 1573 basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx); 1574 basic_req.basic.sta_idx = cpu_to_le16(wcid->idx); 1575 basic_req.basic.conn_state = !enable; 1576 1577 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req, 1578 sizeof(basic_req), true); 1579 if (err < 0) 1580 return err; 1581 1582 if (vif->bss_conf.he_support) { 1583 struct { 1584 struct { 1585 u8 bss_idx; 1586 u8 pad[3]; 1587 } __packed hdr; 1588 struct bss_info_uni_he he; 1589 struct bss_info_uni_bss_color bss_color; 1590 } he_req = { 1591 .hdr = { 1592 .bss_idx = mvif->idx, 1593 }, 1594 .he = { 1595 .tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC), 1596 .len = cpu_to_le16(sizeof(struct bss_info_uni_he)), 1597 }, 1598 .bss_color = { 1599 .tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR), 1600 .len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)), 1601 .enable = 0, 1602 .bss_color = 0, 1603 }, 1604 }; 1605 1606 if (enable) { 1607 he_req.bss_color.enable = 1608 vif->bss_conf.he_bss_color.enabled; 1609 he_req.bss_color.bss_color = 1610 vif->bss_conf.he_bss_color.color; 1611 } 1612 1613 mt76_connac_mcu_uni_bss_he_tlv(phy, vif, 1614 (struct tlv *)&he_req.he); 1615 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), 1616 &he_req, sizeof(he_req), true); 1617 if (err < 0) 1618 return err; 1619 } 1620 1621 return mt76_connac_mcu_uni_set_chctx(phy, mvif, ctx); 1622 } 1623 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss); 1624 1625 #define MT76_CONNAC_SCAN_CHANNEL_TIME 60 1626 int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1627 struct ieee80211_scan_request *scan_req) 1628 { 1629 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1630 struct cfg80211_scan_request *sreq = &scan_req->req; 1631 int n_ssids = 0, err, i, duration; 1632 int ext_channels_num = max_t(int, sreq->n_channels - 32, 0); 1633 struct ieee80211_channel **scan_list = sreq->channels; 1634 struct mt76_dev *mdev = phy->dev; 1635 struct mt76_connac_mcu_scan_channel *chan; 1636 struct mt76_connac_hw_scan_req *req; 1637 struct sk_buff *skb; 1638 1639 if (test_bit(MT76_HW_SCANNING, &phy->state)) 1640 return -EBUSY; 1641 1642 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req)); 1643 if (!skb) 1644 return -ENOMEM; 1645 1646 set_bit(MT76_HW_SCANNING, &phy->state); 1647 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f; 1648 1649 req = (struct mt76_connac_hw_scan_req *)skb_put(skb, sizeof(*req)); 1650 1651 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; 1652 req->bss_idx = mvif->idx; 1653 req->scan_type = sreq->n_ssids ? 1 : 0; 1654 req->probe_req_num = sreq->n_ssids ? 2 : 0; 1655 req->version = 1; 1656 1657 for (i = 0; i < sreq->n_ssids; i++) { 1658 if (!sreq->ssids[i].ssid_len) 1659 continue; 1660 1661 req->ssids[i].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len); 1662 memcpy(req->ssids[i].ssid, sreq->ssids[i].ssid, 1663 sreq->ssids[i].ssid_len); 1664 n_ssids++; 1665 } 1666 req->ssid_type = n_ssids ? BIT(2) : BIT(0); 1667 req->ssid_type_ext = n_ssids ? BIT(0) : 0; 1668 req->ssids_num = n_ssids; 1669 1670 duration = is_mt7921(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME; 1671 /* increase channel time for passive scan */ 1672 if (!sreq->n_ssids) 1673 duration *= 2; 1674 req->timeout_value = cpu_to_le16(sreq->n_channels * duration); 1675 req->channel_min_dwell_time = cpu_to_le16(duration); 1676 req->channel_dwell_time = cpu_to_le16(duration); 1677 1678 req->channels_num = min_t(u8, sreq->n_channels, 32); 1679 req->ext_channels_num = min_t(u8, ext_channels_num, 32); 1680 for (i = 0; i < req->channels_num + req->ext_channels_num; i++) { 1681 if (i >= 32) 1682 chan = &req->ext_channels[i - 32]; 1683 else 1684 chan = &req->channels[i]; 1685 1686 switch (scan_list[i]->band) { 1687 case NL80211_BAND_2GHZ: 1688 chan->band = 1; 1689 break; 1690 case NL80211_BAND_6GHZ: 1691 chan->band = 3; 1692 break; 1693 default: 1694 chan->band = 2; 1695 break; 1696 } 1697 chan->channel_num = scan_list[i]->hw_value; 1698 } 1699 req->channel_type = sreq->n_channels ? 4 : 0; 1700 1701 if (sreq->ie_len > 0) { 1702 memcpy(req->ies, sreq->ie, sreq->ie_len); 1703 req->ies_len = cpu_to_le16(sreq->ie_len); 1704 } 1705 1706 if (is_mt7921(phy->dev)) 1707 req->scan_func |= SCAN_FUNC_SPLIT_SCAN; 1708 1709 memcpy(req->bssid, sreq->bssid, ETH_ALEN); 1710 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1711 get_random_mask_addr(req->random_mac, sreq->mac_addr, 1712 sreq->mac_addr_mask); 1713 req->scan_func |= SCAN_FUNC_RANDOM_MAC; 1714 } 1715 1716 err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN), 1717 false); 1718 if (err < 0) 1719 clear_bit(MT76_HW_SCANNING, &phy->state); 1720 1721 return err; 1722 } 1723 EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan); 1724 1725 int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1726 struct ieee80211_vif *vif) 1727 { 1728 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1729 struct { 1730 u8 seq_num; 1731 u8 is_ext_channel; 1732 u8 rsv[2]; 1733 } __packed req = { 1734 .seq_num = mvif->scan_seq_num, 1735 }; 1736 1737 if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) { 1738 struct cfg80211_scan_info info = { 1739 .aborted = true, 1740 }; 1741 1742 ieee80211_scan_completed(phy->hw, &info); 1743 } 1744 1745 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN), 1746 &req, sizeof(req), false); 1747 } 1748 EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan); 1749 1750 int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1751 struct ieee80211_vif *vif, 1752 struct cfg80211_sched_scan_request *sreq) 1753 { 1754 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 1755 struct ieee80211_channel **scan_list = sreq->channels; 1756 struct mt76_connac_mcu_scan_channel *chan; 1757 struct mt76_connac_sched_scan_req *req; 1758 struct mt76_dev *mdev = phy->dev; 1759 struct cfg80211_match_set *match; 1760 struct cfg80211_ssid *ssid; 1761 struct sk_buff *skb; 1762 int i; 1763 1764 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len); 1765 if (!skb) 1766 return -ENOMEM; 1767 1768 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f; 1769 1770 req = (struct mt76_connac_sched_scan_req *)skb_put(skb, sizeof(*req)); 1771 req->version = 1; 1772 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; 1773 1774 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1775 u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac 1776 : req->mt7921.random_mac; 1777 1778 req->scan_func = 1; 1779 get_random_mask_addr(addr, sreq->mac_addr, 1780 sreq->mac_addr_mask); 1781 } 1782 if (is_mt7921(phy->dev)) { 1783 req->mt7921.bss_idx = mvif->idx; 1784 req->mt7921.delay = cpu_to_le32(sreq->delay); 1785 } 1786 1787 req->ssids_num = sreq->n_ssids; 1788 for (i = 0; i < req->ssids_num; i++) { 1789 ssid = &sreq->ssids[i]; 1790 memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len); 1791 req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len); 1792 } 1793 1794 req->match_num = sreq->n_match_sets; 1795 for (i = 0; i < req->match_num; i++) { 1796 match = &sreq->match_sets[i]; 1797 memcpy(req->match[i].ssid, match->ssid.ssid, 1798 match->ssid.ssid_len); 1799 req->match[i].rssi_th = cpu_to_le32(match->rssi_thold); 1800 req->match[i].ssid_len = match->ssid.ssid_len; 1801 } 1802 1803 req->channel_type = sreq->n_channels ? 4 : 0; 1804 req->channels_num = min_t(u8, sreq->n_channels, 64); 1805 for (i = 0; i < req->channels_num; i++) { 1806 chan = &req->channels[i]; 1807 1808 switch (scan_list[i]->band) { 1809 case NL80211_BAND_2GHZ: 1810 chan->band = 1; 1811 break; 1812 case NL80211_BAND_6GHZ: 1813 chan->band = 3; 1814 break; 1815 default: 1816 chan->band = 2; 1817 break; 1818 } 1819 chan->channel_num = scan_list[i]->hw_value; 1820 } 1821 1822 req->intervals_num = sreq->n_scan_plans; 1823 for (i = 0; i < req->intervals_num; i++) 1824 req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval); 1825 1826 if (sreq->ie_len > 0) { 1827 req->ie_len = cpu_to_le16(sreq->ie_len); 1828 memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len); 1829 } 1830 1831 return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ), 1832 false); 1833 } 1834 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req); 1835 1836 int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 1837 struct ieee80211_vif *vif, 1838 bool enable) 1839 { 1840 struct { 1841 u8 active; /* 0: enabled 1: disabled */ 1842 u8 rsv[3]; 1843 } __packed req = { 1844 .active = !enable, 1845 }; 1846 1847 if (enable) 1848 set_bit(MT76_HW_SCHED_SCANNING, &phy->state); 1849 else 1850 clear_bit(MT76_HW_SCHED_SCANNING, &phy->state); 1851 1852 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE), 1853 &req, sizeof(req), false); 1854 } 1855 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable); 1856 1857 int mt76_connac_mcu_chip_config(struct mt76_dev *dev) 1858 { 1859 struct mt76_connac_config req = { 1860 .resp_type = 0, 1861 }; 1862 1863 memcpy(req.data, "assert", 7); 1864 1865 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG), 1866 &req, sizeof(req), false); 1867 } 1868 EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config); 1869 1870 int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable) 1871 { 1872 struct mt76_connac_config req = { 1873 .resp_type = 0, 1874 }; 1875 1876 snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable); 1877 1878 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG), 1879 &req, sizeof(req), false); 1880 } 1881 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep); 1882 1883 int mt76_connac_sta_state_dp(struct mt76_dev *dev, 1884 enum ieee80211_sta_state old_state, 1885 enum ieee80211_sta_state new_state) 1886 { 1887 if ((old_state == IEEE80211_STA_ASSOC && 1888 new_state == IEEE80211_STA_AUTHORIZED) || 1889 (old_state == IEEE80211_STA_NONE && 1890 new_state == IEEE80211_STA_NOTEXIST)) 1891 mt76_connac_mcu_set_deep_sleep(dev, true); 1892 1893 if ((old_state == IEEE80211_STA_NOTEXIST && 1894 new_state == IEEE80211_STA_NONE) || 1895 (old_state == IEEE80211_STA_AUTHORIZED && 1896 new_state == IEEE80211_STA_ASSOC)) 1897 mt76_connac_mcu_set_deep_sleep(dev, false); 1898 1899 return 0; 1900 } 1901 EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp); 1902 1903 void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 1904 struct mt76_connac_coredump *coredump) 1905 { 1906 spin_lock_bh(&dev->lock); 1907 __skb_queue_tail(&coredump->msg_list, skb); 1908 spin_unlock_bh(&dev->lock); 1909 1910 coredump->last_activity = jiffies; 1911 1912 queue_delayed_work(dev->wq, &coredump->work, 1913 MT76_CONNAC_COREDUMP_TIMEOUT); 1914 } 1915 EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event); 1916 1917 static void mt76_connac_mcu_parse_tx_resource(struct mt76_dev *dev, 1918 struct sk_buff *skb) 1919 { 1920 struct mt76_sdio *sdio = &dev->sdio; 1921 struct mt76_connac_tx_resource { 1922 __le32 version; 1923 __le32 pse_data_quota; 1924 __le32 pse_mcu_quota; 1925 __le32 ple_data_quota; 1926 __le32 ple_mcu_quota; 1927 __le16 pse_page_size; 1928 __le16 ple_page_size; 1929 u8 pp_padding; 1930 u8 pad[3]; 1931 } __packed * tx_res; 1932 1933 tx_res = (struct mt76_connac_tx_resource *)skb->data; 1934 sdio->sched.pse_data_quota = le32_to_cpu(tx_res->pse_data_quota); 1935 sdio->sched.pse_mcu_quota = le32_to_cpu(tx_res->pse_mcu_quota); 1936 sdio->sched.ple_data_quota = le32_to_cpu(tx_res->ple_data_quota); 1937 sdio->sched.pse_page_size = le16_to_cpu(tx_res->pse_page_size); 1938 sdio->sched.deficit = tx_res->pp_padding; 1939 } 1940 1941 static void mt76_connac_mcu_parse_phy_cap(struct mt76_dev *dev, 1942 struct sk_buff *skb) 1943 { 1944 struct mt76_connac_phy_cap { 1945 u8 ht; 1946 u8 vht; 1947 u8 _5g; 1948 u8 max_bw; 1949 u8 nss; 1950 u8 dbdc; 1951 u8 tx_ldpc; 1952 u8 rx_ldpc; 1953 u8 tx_stbc; 1954 u8 rx_stbc; 1955 u8 hw_path; 1956 u8 he; 1957 } __packed * cap; 1958 1959 enum { 1960 WF0_24G, 1961 WF0_5G 1962 }; 1963 1964 cap = (struct mt76_connac_phy_cap *)skb->data; 1965 1966 dev->phy.antenna_mask = BIT(cap->nss) - 1; 1967 dev->phy.chainmask = dev->phy.antenna_mask; 1968 dev->phy.cap.has_2ghz = cap->hw_path & BIT(WF0_24G); 1969 dev->phy.cap.has_5ghz = cap->hw_path & BIT(WF0_5G); 1970 } 1971 1972 int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy) 1973 { 1974 struct mt76_connac_cap_hdr { 1975 __le16 n_element; 1976 u8 rsv[2]; 1977 } __packed * hdr; 1978 struct sk_buff *skb; 1979 int ret, i; 1980 1981 ret = mt76_mcu_send_and_get_msg(phy->dev, MCU_CE_CMD(GET_NIC_CAPAB), 1982 NULL, 0, true, &skb); 1983 if (ret) 1984 return ret; 1985 1986 hdr = (struct mt76_connac_cap_hdr *)skb->data; 1987 if (skb->len < sizeof(*hdr)) { 1988 ret = -EINVAL; 1989 goto out; 1990 } 1991 1992 skb_pull(skb, sizeof(*hdr)); 1993 1994 for (i = 0; i < le16_to_cpu(hdr->n_element); i++) { 1995 struct tlv_hdr { 1996 __le32 type; 1997 __le32 len; 1998 } __packed * tlv = (struct tlv_hdr *)skb->data; 1999 int len; 2000 2001 if (skb->len < sizeof(*tlv)) 2002 break; 2003 2004 skb_pull(skb, sizeof(*tlv)); 2005 2006 len = le32_to_cpu(tlv->len); 2007 if (skb->len < len) 2008 break; 2009 2010 switch (le32_to_cpu(tlv->type)) { 2011 case MT_NIC_CAP_6G: 2012 phy->cap.has_6ghz = skb->data[0]; 2013 break; 2014 case MT_NIC_CAP_MAC_ADDR: 2015 memcpy(phy->macaddr, (void *)skb->data, ETH_ALEN); 2016 break; 2017 case MT_NIC_CAP_PHY: 2018 mt76_connac_mcu_parse_phy_cap(phy->dev, skb); 2019 break; 2020 case MT_NIC_CAP_TX_RESOURCE: 2021 if (mt76_is_sdio(phy->dev)) 2022 mt76_connac_mcu_parse_tx_resource(phy->dev, 2023 skb); 2024 break; 2025 default: 2026 break; 2027 } 2028 skb_pull(skb, len); 2029 } 2030 out: 2031 dev_kfree_skb(skb); 2032 2033 return ret; 2034 } 2035 EXPORT_SYMBOL_GPL(mt76_connac_mcu_get_nic_capability); 2036 2037 static void 2038 mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku, 2039 struct mt76_power_limits *limits, 2040 enum nl80211_band band) 2041 { 2042 int max_power = is_mt7921(dev) ? 127 : 63; 2043 int i, offset = sizeof(limits->cck); 2044 2045 memset(sku, max_power, MT_SKU_POWER_LIMIT); 2046 2047 if (band == NL80211_BAND_2GHZ) { 2048 /* cck */ 2049 memcpy(sku, limits->cck, sizeof(limits->cck)); 2050 } 2051 2052 /* ofdm */ 2053 memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm)); 2054 offset += sizeof(limits->ofdm); 2055 2056 /* ht */ 2057 for (i = 0; i < 2; i++) { 2058 memcpy(&sku[offset], limits->mcs[i], 8); 2059 offset += 8; 2060 } 2061 sku[offset++] = limits->mcs[0][0]; 2062 2063 /* vht */ 2064 for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) { 2065 memcpy(&sku[offset], limits->mcs[i], 2066 ARRAY_SIZE(limits->mcs[i])); 2067 offset += 12; 2068 } 2069 2070 if (!is_mt7921(dev)) 2071 return; 2072 2073 /* he */ 2074 for (i = 0; i < ARRAY_SIZE(limits->ru); i++) { 2075 memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i])); 2076 offset += ARRAY_SIZE(limits->ru[i]); 2077 } 2078 } 2079 2080 static s8 mt76_connac_get_ch_power(struct mt76_phy *phy, 2081 struct ieee80211_channel *chan, 2082 s8 target_power) 2083 { 2084 struct mt76_dev *dev = phy->dev; 2085 struct ieee80211_supported_band *sband; 2086 int i; 2087 2088 switch (chan->band) { 2089 case NL80211_BAND_2GHZ: 2090 sband = &phy->sband_2g.sband; 2091 break; 2092 case NL80211_BAND_5GHZ: 2093 sband = &phy->sband_5g.sband; 2094 break; 2095 case NL80211_BAND_6GHZ: 2096 sband = &phy->sband_6g.sband; 2097 break; 2098 default: 2099 return target_power; 2100 } 2101 2102 for (i = 0; i < sband->n_channels; i++) { 2103 struct ieee80211_channel *ch = &sband->channels[i]; 2104 2105 if (ch->hw_value == chan->hw_value) { 2106 if (!(ch->flags & IEEE80211_CHAN_DISABLED)) { 2107 int power = 2 * ch->max_reg_power; 2108 2109 if (is_mt7663(dev) && (power > 63 || power < -64)) 2110 power = 63; 2111 target_power = min_t(s8, power, target_power); 2112 } 2113 break; 2114 } 2115 } 2116 2117 return target_power; 2118 } 2119 2120 static int 2121 mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy, 2122 enum nl80211_band band) 2123 { 2124 struct mt76_dev *dev = phy->dev; 2125 int sku_len, batch_len = is_mt7921(dev) ? 8 : 16; 2126 static const u8 chan_list_2ghz[] = { 2127 1, 2, 3, 4, 5, 6, 7, 2128 8, 9, 10, 11, 12, 13, 14 2129 }; 2130 static const u8 chan_list_5ghz[] = { 2131 36, 38, 40, 42, 44, 46, 48, 2132 50, 52, 54, 56, 58, 60, 62, 2133 64, 100, 102, 104, 106, 108, 110, 2134 112, 114, 116, 118, 120, 122, 124, 2135 126, 128, 132, 134, 136, 138, 140, 2136 142, 144, 149, 151, 153, 155, 157, 2137 159, 161, 165 2138 }; 2139 static const u8 chan_list_6ghz[] = { 2140 1, 3, 5, 7, 9, 11, 13, 2141 15, 17, 19, 21, 23, 25, 27, 2142 29, 33, 35, 37, 39, 41, 43, 2143 45, 47, 49, 51, 53, 55, 57, 2144 59, 61, 65, 67, 69, 71, 73, 2145 75, 77, 79, 81, 83, 85, 87, 2146 89, 91, 93, 97, 99, 101, 103, 2147 105, 107, 109, 111, 113, 115, 117, 2148 119, 121, 123, 125, 129, 131, 133, 2149 135, 137, 139, 141, 143, 145, 147, 2150 149, 151, 153, 155, 157, 161, 163, 2151 165, 167, 169, 171, 173, 175, 177, 2152 179, 181, 183, 185, 187, 189, 193, 2153 195, 197, 199, 201, 203, 205, 207, 2154 209, 211, 213, 215, 217, 219, 221, 2155 225, 227, 229, 233 2156 }; 2157 int i, n_chan, batch_size, idx = 0, tx_power, last_ch; 2158 struct mt76_connac_sku_tlv sku_tlbv; 2159 struct mt76_power_limits limits; 2160 const u8 *ch_list; 2161 2162 sku_len = is_mt7921(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92; 2163 tx_power = 2 * phy->hw->conf.power_level; 2164 if (!tx_power) 2165 tx_power = 127; 2166 2167 if (band == NL80211_BAND_2GHZ) { 2168 n_chan = ARRAY_SIZE(chan_list_2ghz); 2169 ch_list = chan_list_2ghz; 2170 } else if (band == NL80211_BAND_6GHZ) { 2171 n_chan = ARRAY_SIZE(chan_list_6ghz); 2172 ch_list = chan_list_6ghz; 2173 } else { 2174 n_chan = ARRAY_SIZE(chan_list_5ghz); 2175 ch_list = chan_list_5ghz; 2176 } 2177 batch_size = DIV_ROUND_UP(n_chan, batch_len); 2178 2179 if (phy->cap.has_6ghz) 2180 last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1]; 2181 else if (phy->cap.has_5ghz) 2182 last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1]; 2183 else 2184 last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1]; 2185 2186 for (i = 0; i < batch_size; i++) { 2187 struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {}; 2188 int j, err, msg_len, num_ch; 2189 struct sk_buff *skb; 2190 2191 num_ch = i == batch_size - 1 ? n_chan % batch_len : batch_len; 2192 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv); 2193 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len); 2194 if (!skb) 2195 return -ENOMEM; 2196 2197 skb_reserve(skb, sizeof(tx_power_tlv)); 2198 2199 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2)); 2200 memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2)); 2201 tx_power_tlv.n_chan = num_ch; 2202 2203 switch (band) { 2204 case NL80211_BAND_2GHZ: 2205 tx_power_tlv.band = 1; 2206 break; 2207 case NL80211_BAND_6GHZ: 2208 tx_power_tlv.band = 3; 2209 break; 2210 default: 2211 tx_power_tlv.band = 2; 2212 break; 2213 } 2214 2215 for (j = 0; j < num_ch; j++, idx++) { 2216 struct ieee80211_channel chan = { 2217 .hw_value = ch_list[idx], 2218 .band = band, 2219 }; 2220 s8 reg_power, sar_power; 2221 2222 reg_power = mt76_connac_get_ch_power(phy, &chan, 2223 tx_power); 2224 sar_power = mt76_get_sar_power(phy, &chan, reg_power); 2225 2226 mt76_get_rate_power_limits(phy, &chan, &limits, 2227 sar_power); 2228 2229 tx_power_tlv.last_msg = ch_list[idx] == last_ch; 2230 sku_tlbv.channel = ch_list[idx]; 2231 2232 mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit, 2233 &limits, band); 2234 skb_put_data(skb, &sku_tlbv, sku_len); 2235 } 2236 __skb_push(skb, sizeof(tx_power_tlv)); 2237 memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv)); 2238 2239 err = mt76_mcu_skb_send_msg(dev, skb, 2240 MCU_CE_CMD(SET_RATE_TX_POWER), 2241 false); 2242 if (err < 0) 2243 return err; 2244 } 2245 2246 return 0; 2247 } 2248 2249 int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy) 2250 { 2251 int err; 2252 2253 if (phy->cap.has_2ghz) { 2254 err = mt76_connac_mcu_rate_txpower_band(phy, 2255 NL80211_BAND_2GHZ); 2256 if (err < 0) 2257 return err; 2258 } 2259 if (phy->cap.has_5ghz) { 2260 err = mt76_connac_mcu_rate_txpower_band(phy, 2261 NL80211_BAND_5GHZ); 2262 if (err < 0) 2263 return err; 2264 } 2265 if (phy->cap.has_6ghz) { 2266 err = mt76_connac_mcu_rate_txpower_band(phy, 2267 NL80211_BAND_6GHZ); 2268 if (err < 0) 2269 return err; 2270 } 2271 2272 return 0; 2273 } 2274 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower); 2275 2276 int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 2277 struct mt76_vif *vif, 2278 struct ieee80211_bss_conf *info) 2279 { 2280 struct ieee80211_vif *mvif = container_of(info, struct ieee80211_vif, 2281 bss_conf); 2282 struct sk_buff *skb; 2283 int i, len = min_t(int, mvif->cfg.arp_addr_cnt, 2284 IEEE80211_BSS_ARP_ADDR_LIST_LEN); 2285 struct { 2286 struct { 2287 u8 bss_idx; 2288 u8 pad[3]; 2289 } __packed hdr; 2290 struct mt76_connac_arpns_tlv arp; 2291 } req_hdr = { 2292 .hdr = { 2293 .bss_idx = vif->idx, 2294 }, 2295 .arp = { 2296 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP), 2297 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)), 2298 .ips_num = len, 2299 .mode = 2, /* update */ 2300 .option = 1, 2301 }, 2302 }; 2303 2304 skb = mt76_mcu_msg_alloc(dev, NULL, 2305 sizeof(req_hdr) + len * sizeof(__be32)); 2306 if (!skb) 2307 return -ENOMEM; 2308 2309 skb_put_data(skb, &req_hdr, sizeof(req_hdr)); 2310 for (i = 0; i < len; i++) 2311 skb_put_data(skb, &mvif->cfg.arp_addr_list[i], sizeof(__be32)); 2312 2313 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true); 2314 } 2315 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter); 2316 2317 int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 2318 struct ieee80211_vif *vif) 2319 { 2320 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2321 int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow; 2322 struct mt76_phy *phy = hw->priv; 2323 struct { 2324 __le32 ct_win; 2325 u8 bss_idx; 2326 u8 rsv[3]; 2327 } __packed req = { 2328 .ct_win = cpu_to_le32(ct_window), 2329 .bss_idx = mvif->idx, 2330 }; 2331 2332 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS), 2333 &req, sizeof(req), false); 2334 } 2335 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps); 2336 2337 #ifdef CONFIG_PM 2338 2339 const struct wiphy_wowlan_support mt76_connac_wowlan_support = { 2340 .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT | 2341 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT, 2342 .n_patterns = 1, 2343 .pattern_min_len = 1, 2344 .pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN, 2345 .max_nd_match_sets = 10, 2346 }; 2347 EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support); 2348 2349 static void 2350 mt76_connac_mcu_key_iter(struct ieee80211_hw *hw, 2351 struct ieee80211_vif *vif, 2352 struct ieee80211_sta *sta, 2353 struct ieee80211_key_conf *key, 2354 void *data) 2355 { 2356 struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data; 2357 u32 cipher; 2358 2359 if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC && 2360 key->cipher != WLAN_CIPHER_SUITE_CCMP && 2361 key->cipher != WLAN_CIPHER_SUITE_TKIP) 2362 return; 2363 2364 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 2365 cipher = BIT(3); 2366 else 2367 cipher = BIT(4); 2368 2369 /* we are assuming here to have a single pairwise key */ 2370 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) { 2371 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 2372 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1); 2373 else 2374 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2); 2375 2376 gtk_tlv->pairwise_cipher = cpu_to_le32(cipher); 2377 gtk_tlv->keyid = key->keyidx; 2378 } else { 2379 gtk_tlv->group_cipher = cpu_to_le32(cipher); 2380 } 2381 } 2382 2383 int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 2384 struct ieee80211_vif *vif, 2385 struct cfg80211_gtk_rekey_data *key) 2386 { 2387 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2388 struct mt76_connac_gtk_rekey_tlv *gtk_tlv; 2389 struct mt76_phy *phy = hw->priv; 2390 struct sk_buff *skb; 2391 struct { 2392 u8 bss_idx; 2393 u8 pad[3]; 2394 } __packed hdr = { 2395 .bss_idx = mvif->idx, 2396 }; 2397 2398 skb = mt76_mcu_msg_alloc(phy->dev, NULL, 2399 sizeof(hdr) + sizeof(*gtk_tlv)); 2400 if (!skb) 2401 return -ENOMEM; 2402 2403 skb_put_data(skb, &hdr, sizeof(hdr)); 2404 gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put(skb, 2405 sizeof(*gtk_tlv)); 2406 gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY); 2407 gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv)); 2408 gtk_tlv->rekey_mode = 2; 2409 gtk_tlv->option = 1; 2410 2411 rcu_read_lock(); 2412 ieee80211_iter_keys_rcu(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv); 2413 rcu_read_unlock(); 2414 2415 memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN); 2416 memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN); 2417 memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN); 2418 2419 return mt76_mcu_skb_send_msg(phy->dev, skb, 2420 MCU_UNI_CMD(OFFLOAD), true); 2421 } 2422 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey); 2423 2424 static int 2425 mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif, 2426 bool suspend) 2427 { 2428 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2429 struct { 2430 struct { 2431 u8 bss_idx; 2432 u8 pad[3]; 2433 } __packed hdr; 2434 struct mt76_connac_arpns_tlv arpns; 2435 } req = { 2436 .hdr = { 2437 .bss_idx = mvif->idx, 2438 }, 2439 .arpns = { 2440 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP), 2441 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)), 2442 .mode = suspend, 2443 }, 2444 }; 2445 2446 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req, 2447 sizeof(req), true); 2448 } 2449 2450 static int 2451 mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif, 2452 bool suspend) 2453 { 2454 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2455 struct { 2456 struct { 2457 u8 bss_idx; 2458 u8 pad[3]; 2459 } __packed hdr; 2460 struct mt76_connac_gtk_rekey_tlv gtk_tlv; 2461 } __packed req = { 2462 .hdr = { 2463 .bss_idx = mvif->idx, 2464 }, 2465 .gtk_tlv = { 2466 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY), 2467 .len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)), 2468 .rekey_mode = !suspend, 2469 }, 2470 }; 2471 2472 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req, 2473 sizeof(req), true); 2474 } 2475 2476 static int 2477 mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev, 2478 struct ieee80211_vif *vif, 2479 bool enable, u8 mdtim, 2480 bool wow_suspend) 2481 { 2482 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2483 struct { 2484 struct { 2485 u8 bss_idx; 2486 u8 pad[3]; 2487 } __packed hdr; 2488 struct mt76_connac_suspend_tlv suspend_tlv; 2489 } req = { 2490 .hdr = { 2491 .bss_idx = mvif->idx, 2492 }, 2493 .suspend_tlv = { 2494 .tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING), 2495 .len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)), 2496 .enable = enable, 2497 .mdtim = mdtim, 2498 .wow_suspend = wow_suspend, 2499 }, 2500 }; 2501 2502 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req, 2503 sizeof(req), true); 2504 } 2505 2506 static int 2507 mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev, 2508 struct ieee80211_vif *vif, 2509 u8 index, bool enable, 2510 struct cfg80211_pkt_pattern *pattern) 2511 { 2512 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2513 struct mt76_connac_wow_pattern_tlv *ptlv; 2514 struct sk_buff *skb; 2515 struct req_hdr { 2516 u8 bss_idx; 2517 u8 pad[3]; 2518 } __packed hdr = { 2519 .bss_idx = mvif->idx, 2520 }; 2521 2522 skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv)); 2523 if (!skb) 2524 return -ENOMEM; 2525 2526 skb_put_data(skb, &hdr, sizeof(hdr)); 2527 ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put(skb, sizeof(*ptlv)); 2528 ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN); 2529 ptlv->len = cpu_to_le16(sizeof(*ptlv)); 2530 ptlv->data_len = pattern->pattern_len; 2531 ptlv->enable = enable; 2532 ptlv->index = index; 2533 2534 memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len); 2535 memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8)); 2536 2537 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true); 2538 } 2539 2540 static int 2541 mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif, 2542 bool suspend, struct cfg80211_wowlan *wowlan) 2543 { 2544 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2545 struct mt76_dev *dev = phy->dev; 2546 struct { 2547 struct { 2548 u8 bss_idx; 2549 u8 pad[3]; 2550 } __packed hdr; 2551 struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv; 2552 struct mt76_connac_wow_gpio_param_tlv gpio_tlv; 2553 } req = { 2554 .hdr = { 2555 .bss_idx = mvif->idx, 2556 }, 2557 .wow_ctrl_tlv = { 2558 .tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL), 2559 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)), 2560 .cmd = suspend ? 1 : 2, 2561 }, 2562 .gpio_tlv = { 2563 .tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM), 2564 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)), 2565 .gpio_pin = 0xff, /* follow fw about GPIO pin */ 2566 }, 2567 }; 2568 2569 if (wowlan->magic_pkt) 2570 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC; 2571 if (wowlan->disconnect) 2572 req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT | 2573 UNI_WOW_DETECT_TYPE_BCN_LOST); 2574 if (wowlan->nd_config) { 2575 mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config); 2576 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT; 2577 mt76_connac_mcu_sched_scan_enable(phy, vif, suspend); 2578 } 2579 if (wowlan->n_patterns) 2580 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP; 2581 2582 if (mt76_is_mmio(dev)) 2583 req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE; 2584 else if (mt76_is_usb(dev)) 2585 req.wow_ctrl_tlv.wakeup_hif = WOW_USB; 2586 else if (mt76_is_sdio(dev)) 2587 req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO; 2588 2589 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req, 2590 sizeof(req), true); 2591 } 2592 2593 int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend) 2594 { 2595 struct { 2596 struct { 2597 u8 hif_type; /* 0x0: HIF_SDIO 2598 * 0x1: HIF_USB 2599 * 0x2: HIF_PCIE 2600 */ 2601 u8 pad[3]; 2602 } __packed hdr; 2603 struct hif_suspend_tlv { 2604 __le16 tag; 2605 __le16 len; 2606 u8 suspend; 2607 } __packed hif_suspend; 2608 } req = { 2609 .hif_suspend = { 2610 .tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */ 2611 .len = cpu_to_le16(sizeof(struct hif_suspend_tlv)), 2612 .suspend = suspend, 2613 }, 2614 }; 2615 2616 if (mt76_is_mmio(dev)) 2617 req.hdr.hif_type = 2; 2618 else if (mt76_is_usb(dev)) 2619 req.hdr.hif_type = 1; 2620 else if (mt76_is_sdio(dev)) 2621 req.hdr.hif_type = 0; 2622 2623 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req, 2624 sizeof(req), true); 2625 } 2626 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend); 2627 2628 void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 2629 struct ieee80211_vif *vif) 2630 { 2631 struct mt76_phy *phy = priv; 2632 bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state); 2633 struct ieee80211_hw *hw = phy->hw; 2634 struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config; 2635 int i; 2636 2637 mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend); 2638 mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend); 2639 2640 mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true); 2641 2642 for (i = 0; i < wowlan->n_patterns; i++) 2643 mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend, 2644 &wowlan->patterns[i]); 2645 mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan); 2646 } 2647 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter); 2648 #endif /* CONFIG_PM */ 2649 2650 u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset) 2651 { 2652 struct { 2653 __le32 addr; 2654 __le32 val; 2655 } __packed req = { 2656 .addr = cpu_to_le32(offset), 2657 }; 2658 2659 return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req, 2660 sizeof(req), true); 2661 } 2662 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr); 2663 2664 void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val) 2665 { 2666 struct { 2667 __le32 addr; 2668 __le32 val; 2669 } __packed req = { 2670 .addr = cpu_to_le32(offset), 2671 .val = cpu_to_le32(val), 2672 }; 2673 2674 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req, 2675 sizeof(req), false); 2676 } 2677 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr); 2678 2679 static int 2680 mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf, 2681 struct sk_buff *skb, 2682 struct ieee80211_key_conf *key, 2683 enum set_key_cmd cmd) 2684 { 2685 struct sta_rec_sec *sec; 2686 u32 len = sizeof(*sec); 2687 struct tlv *tlv; 2688 2689 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2690 sec = (struct sta_rec_sec *)tlv; 2691 sec->add = cmd; 2692 2693 if (cmd == SET_KEY) { 2694 struct sec_key *sec_key; 2695 u8 cipher; 2696 2697 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2698 if (cipher == MCU_CIPHER_NONE) 2699 return -EOPNOTSUPP; 2700 2701 sec_key = &sec->key[0]; 2702 sec_key->cipher_len = sizeof(*sec_key); 2703 2704 if (cipher == MCU_CIPHER_BIP_CMAC_128) { 2705 sec_key->cipher_id = MCU_CIPHER_AES_CCMP; 2706 sec_key->key_id = sta_key_conf->keyidx; 2707 sec_key->key_len = 16; 2708 memcpy(sec_key->key, sta_key_conf->key, 16); 2709 2710 sec_key = &sec->key[1]; 2711 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; 2712 sec_key->cipher_len = sizeof(*sec_key); 2713 sec_key->key_len = 16; 2714 memcpy(sec_key->key, key->key, 16); 2715 sec->n_cipher = 2; 2716 } else { 2717 sec_key->cipher_id = cipher; 2718 sec_key->key_id = key->keyidx; 2719 sec_key->key_len = key->keylen; 2720 memcpy(sec_key->key, key->key, key->keylen); 2721 2722 if (cipher == MCU_CIPHER_TKIP) { 2723 /* Rx/Tx MIC keys are swapped */ 2724 memcpy(sec_key->key + 16, key->key + 24, 8); 2725 memcpy(sec_key->key + 24, key->key + 16, 8); 2726 } 2727 2728 /* store key_conf for BIP batch update */ 2729 if (cipher == MCU_CIPHER_AES_CCMP) { 2730 memcpy(sta_key_conf->key, key->key, key->keylen); 2731 sta_key_conf->keyidx = key->keyidx; 2732 } 2733 2734 len -= sizeof(*sec_key); 2735 sec->n_cipher = 1; 2736 } 2737 } else { 2738 len -= sizeof(sec->key); 2739 sec->n_cipher = 0; 2740 } 2741 sec->len = cpu_to_le16(len); 2742 2743 return 0; 2744 } 2745 2746 int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2747 struct mt76_connac_sta_key_conf *sta_key_conf, 2748 struct ieee80211_key_conf *key, int mcu_cmd, 2749 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2750 { 2751 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2752 struct sk_buff *skb; 2753 int ret; 2754 2755 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 2756 if (IS_ERR(skb)) 2757 return PTR_ERR(skb); 2758 2759 ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd); 2760 if (ret) 2761 return ret; 2762 2763 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 2764 if (ret) 2765 return ret; 2766 2767 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2768 } 2769 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key); 2770 2771 /* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */ 2772 #define BCN_TX_ESTIMATE_TIME (4096 + 20) 2773 void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif) 2774 { 2775 struct bss_info_ext_bss *ext; 2776 int ext_bss_idx, tsf_offset; 2777 struct tlv *tlv; 2778 2779 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 2780 if (ext_bss_idx < 0) 2781 return; 2782 2783 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); 2784 2785 ext = (struct bss_info_ext_bss *)tlv; 2786 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 2787 ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); 2788 } 2789 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv); 2790 2791 int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 2792 struct ieee80211_vif *vif, 2793 struct ieee80211_sta *sta, 2794 struct mt76_phy *phy, u16 wlan_idx, 2795 bool enable) 2796 { 2797 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 2798 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA; 2799 struct bss_info_basic *bss; 2800 struct tlv *tlv; 2801 2802 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); 2803 bss = (struct bss_info_basic *)tlv; 2804 2805 switch (vif->type) { 2806 case NL80211_IFTYPE_MESH_POINT: 2807 case NL80211_IFTYPE_MONITOR: 2808 break; 2809 case NL80211_IFTYPE_AP: 2810 if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) { 2811 u8 bssid_id = vif->bss_conf.bssid_indicator; 2812 struct wiphy *wiphy = phy->hw->wiphy; 2813 2814 if (bssid_id > ilog2(wiphy->mbssid_max_interfaces)) 2815 return -EINVAL; 2816 2817 bss->non_tx_bssid = vif->bss_conf.bssid_index; 2818 bss->max_bssid = bssid_id; 2819 } 2820 break; 2821 case NL80211_IFTYPE_STATION: 2822 if (enable) { 2823 rcu_read_lock(); 2824 if (!sta) 2825 sta = ieee80211_find_sta(vif, 2826 vif->bss_conf.bssid); 2827 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 2828 if (sta) { 2829 struct mt76_wcid *wcid; 2830 2831 wcid = (struct mt76_wcid *)sta->drv_priv; 2832 wlan_idx = wcid->idx; 2833 } 2834 rcu_read_unlock(); 2835 } 2836 break; 2837 case NL80211_IFTYPE_ADHOC: 2838 type = NETWORK_IBSS; 2839 break; 2840 default: 2841 WARN_ON(1); 2842 break; 2843 } 2844 2845 bss->network_type = cpu_to_le32(type); 2846 bss->bmc_wcid_lo = to_wcid_lo(wlan_idx); 2847 bss->bmc_wcid_hi = to_wcid_hi(wlan_idx); 2848 bss->wmm_idx = mvif->wmm_idx; 2849 bss->active = enable; 2850 bss->cipher = mvif->cipher; 2851 2852 if (vif->type != NL80211_IFTYPE_MONITOR) { 2853 struct cfg80211_chan_def *chandef = &phy->chandef; 2854 2855 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 2856 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 2857 bss->dtim_period = vif->bss_conf.dtim_period; 2858 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif, 2859 chandef->chan->band, NULL); 2860 } else { 2861 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 2862 } 2863 2864 return 0; 2865 } 2866 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv); 2867 2868 #define ENTER_PM_STATE 1 2869 #define EXIT_PM_STATE 2 2870 int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter) 2871 { 2872 struct { 2873 u8 pm_number; 2874 u8 pm_state; 2875 u8 bssid[ETH_ALEN]; 2876 u8 dtim_period; 2877 u8 wlan_idx_lo; 2878 __le16 bcn_interval; 2879 __le32 aid; 2880 __le32 rx_filter; 2881 u8 band_idx; 2882 u8 wlan_idx_hi; 2883 u8 rsv[2]; 2884 __le32 feature; 2885 u8 omac_idx; 2886 u8 wmm_idx; 2887 u8 bcn_loss_cnt; 2888 u8 bcn_sp_duration; 2889 } __packed req = { 2890 .pm_number = 5, 2891 .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE, 2892 .band_idx = band, 2893 }; 2894 2895 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req, 2896 sizeof(req), true); 2897 } 2898 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm); 2899 2900 int mt76_connac_mcu_restart(struct mt76_dev *dev) 2901 { 2902 struct { 2903 u8 power_mode; 2904 u8 rsv[3]; 2905 } req = { 2906 .power_mode = 1, 2907 }; 2908 2909 return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req, 2910 sizeof(req), false); 2911 } 2912 EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart); 2913 2914 int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 2915 u8 rx_sel, u8 val) 2916 { 2917 struct { 2918 u8 ctrl; 2919 u8 rdd_idx; 2920 u8 rdd_rx_sel; 2921 u8 val; 2922 u8 rsv[4]; 2923 } __packed req = { 2924 .ctrl = cmd, 2925 .rdd_idx = index, 2926 .rdd_rx_sel = rx_sel, 2927 .val = val, 2928 }; 2929 2930 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req, 2931 sizeof(req), true); 2932 } 2933 EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd); 2934 2935 static int 2936 mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev, 2937 const struct mt76_connac2_fw_trailer *hdr, 2938 const u8 *data, bool is_wa) 2939 { 2940 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 2941 u32 override = 0, option = 0; 2942 2943 for (i = 0; i < hdr->n_region; i++) { 2944 const struct mt76_connac2_fw_region *region; 2945 u32 len, addr, mode; 2946 int err; 2947 2948 region = (const void *)((const u8 *)hdr - 2949 (hdr->n_region - i) * sizeof(*region)); 2950 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set, 2951 is_wa); 2952 len = le32_to_cpu(region->len); 2953 addr = le32_to_cpu(region->addr); 2954 2955 if (region->feature_set & FW_FEATURE_NON_DL) 2956 goto next; 2957 2958 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2959 override = addr; 2960 2961 err = mt76_connac_mcu_init_download(dev, addr, len, mode); 2962 if (err) { 2963 dev_err(dev->dev, "Download request failed\n"); 2964 return err; 2965 } 2966 2967 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 2968 data + offset, len, max_len); 2969 if (err) { 2970 dev_err(dev->dev, "Failed to send firmware.\n"); 2971 return err; 2972 } 2973 2974 next: 2975 offset += len; 2976 } 2977 2978 if (override) 2979 option |= FW_START_OVERRIDE; 2980 if (is_wa) 2981 option |= FW_START_WORKING_PDA_CR4; 2982 2983 return mt76_connac_mcu_start_firmware(dev, override, option); 2984 } 2985 2986 int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 2987 const char *fw_wa) 2988 { 2989 const struct mt76_connac2_fw_trailer *hdr; 2990 const struct firmware *fw; 2991 int ret; 2992 2993 ret = request_firmware(&fw, fw_wm, dev->dev); 2994 if (ret) 2995 return ret; 2996 2997 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2998 dev_err(dev->dev, "Invalid firmware\n"); 2999 ret = -EINVAL; 3000 goto out; 3001 } 3002 3003 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3004 dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n", 3005 hdr->fw_ver, hdr->build_date); 3006 3007 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false); 3008 if (ret) { 3009 dev_err(dev->dev, "Failed to start WM firmware\n"); 3010 goto out; 3011 } 3012 3013 snprintf(dev->hw->wiphy->fw_version, 3014 sizeof(dev->hw->wiphy->fw_version), 3015 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3016 3017 release_firmware(fw); 3018 3019 if (!fw_wa) 3020 return 0; 3021 3022 ret = request_firmware(&fw, fw_wa, dev->dev); 3023 if (ret) 3024 return ret; 3025 3026 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3027 dev_err(dev->dev, "Invalid firmware\n"); 3028 ret = -EINVAL; 3029 goto out; 3030 } 3031 3032 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3033 dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n", 3034 hdr->fw_ver, hdr->build_date); 3035 3036 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true); 3037 if (ret) { 3038 dev_err(dev->dev, "Failed to start WA firmware\n"); 3039 goto out; 3040 } 3041 3042 snprintf(dev->hw->wiphy->fw_version, 3043 sizeof(dev->hw->wiphy->fw_version), 3044 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3045 3046 out: 3047 release_firmware(fw); 3048 3049 return ret; 3050 } 3051 EXPORT_SYMBOL_GPL(mt76_connac2_load_ram); 3052 3053 static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info) 3054 { 3055 u32 mode = DL_MODE_NEED_RSP; 3056 3057 if (!is_mt7921(dev) || info == PATCH_SEC_NOT_SUPPORT) 3058 return mode; 3059 3060 switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) { 3061 case PATCH_SEC_ENC_TYPE_PLAIN: 3062 break; 3063 case PATCH_SEC_ENC_TYPE_AES: 3064 mode |= DL_MODE_ENCRYPT; 3065 mode |= FIELD_PREP(DL_MODE_KEY_IDX, 3066 (info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX; 3067 mode |= DL_MODE_RESET_SEC_IV; 3068 break; 3069 case PATCH_SEC_ENC_TYPE_SCRAMBLE: 3070 mode |= DL_MODE_ENCRYPT; 3071 mode |= DL_CONFIG_ENCRY_MODE_SEL; 3072 mode |= DL_MODE_RESET_SEC_IV; 3073 break; 3074 default: 3075 dev_err(dev->dev, "Encryption type not support!\n"); 3076 } 3077 3078 return mode; 3079 } 3080 3081 int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name) 3082 { 3083 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 3084 const struct mt76_connac2_patch_hdr *hdr; 3085 const struct firmware *fw = NULL; 3086 3087 sem = mt76_connac_mcu_patch_sem_ctrl(dev, true); 3088 switch (sem) { 3089 case PATCH_IS_DL: 3090 return 0; 3091 case PATCH_NOT_DL_SEM_SUCCESS: 3092 break; 3093 default: 3094 dev_err(dev->dev, "Failed to get patch semaphore\n"); 3095 return -EAGAIN; 3096 } 3097 3098 ret = request_firmware(&fw, fw_name, dev->dev); 3099 if (ret) 3100 goto out; 3101 3102 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3103 dev_err(dev->dev, "Invalid firmware\n"); 3104 ret = -EINVAL; 3105 goto out; 3106 } 3107 3108 hdr = (const void *)fw->data; 3109 dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 3110 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 3111 3112 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 3113 struct mt76_connac2_patch_sec *sec; 3114 u32 len, addr, mode; 3115 const u8 *dl; 3116 u32 sec_info; 3117 3118 sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec)); 3119 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 3120 PATCH_SEC_TYPE_INFO) { 3121 ret = -EINVAL; 3122 goto out; 3123 } 3124 3125 addr = be32_to_cpu(sec->info.addr); 3126 len = be32_to_cpu(sec->info.len); 3127 dl = fw->data + be32_to_cpu(sec->offs); 3128 sec_info = be32_to_cpu(sec->info.sec_key_idx); 3129 mode = mt76_connac2_get_data_mode(dev, sec_info); 3130 3131 ret = mt76_connac_mcu_init_download(dev, addr, len, mode); 3132 if (ret) { 3133 dev_err(dev->dev, "Download request failed\n"); 3134 goto out; 3135 } 3136 3137 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3138 dl, len, max_len); 3139 if (ret) { 3140 dev_err(dev->dev, "Failed to send patch\n"); 3141 goto out; 3142 } 3143 } 3144 3145 ret = mt76_connac_mcu_start_patch(dev); 3146 if (ret) 3147 dev_err(dev->dev, "Failed to start patch\n"); 3148 3149 out: 3150 sem = mt76_connac_mcu_patch_sem_ctrl(dev, false); 3151 switch (sem) { 3152 case PATCH_REL_SEM_SUCCESS: 3153 break; 3154 default: 3155 ret = -EAGAIN; 3156 dev_err(dev->dev, "Failed to release patch semaphore\n"); 3157 break; 3158 } 3159 3160 release_firmware(fw); 3161 3162 return ret; 3163 } 3164 EXPORT_SYMBOL_GPL(mt76_connac2_load_patch); 3165 3166 int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb, 3167 int cmd, int *wait_seq) 3168 { 3169 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 3170 struct mt76_connac2_mcu_uni_txd *uni_txd; 3171 struct mt76_connac2_mcu_txd *mcu_txd; 3172 __le32 *txd; 3173 u32 val; 3174 u8 seq; 3175 3176 /* TODO: make dynamic based on msg type */ 3177 dev->mcu.timeout = 20 * HZ; 3178 3179 seq = ++dev->mcu.msg_seq & 0xf; 3180 if (!seq) 3181 seq = ++dev->mcu.msg_seq & 0xf; 3182 3183 if (cmd == MCU_CMD(FW_SCATTER)) 3184 goto exit; 3185 3186 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 3187 txd = (__le32 *)skb_push(skb, txd_len); 3188 3189 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 3190 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 3191 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 3192 txd[0] = cpu_to_le32(val); 3193 3194 val = MT_TXD1_LONG_FORMAT | 3195 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 3196 txd[1] = cpu_to_le32(val); 3197 3198 if (cmd & __MCU_CMD_FIELD_UNI) { 3199 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 3200 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 3201 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 3202 uni_txd->cid = cpu_to_le16(mcu_cmd); 3203 uni_txd->s2d_index = MCU_S2D_H2N; 3204 uni_txd->pkt_type = MCU_PKT_ID; 3205 uni_txd->seq = seq; 3206 3207 goto exit; 3208 } 3209 3210 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 3211 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 3212 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 3213 MT_TX_MCU_PORT_RX_Q0)); 3214 mcu_txd->pkt_type = MCU_PKT_ID; 3215 mcu_txd->seq = seq; 3216 mcu_txd->cid = mcu_cmd; 3217 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 3218 3219 if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) { 3220 if (cmd & __MCU_CMD_FIELD_QUERY) 3221 mcu_txd->set_query = MCU_Q_QUERY; 3222 else 3223 mcu_txd->set_query = MCU_Q_SET; 3224 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid; 3225 } else { 3226 mcu_txd->set_query = MCU_Q_NA; 3227 } 3228 3229 if (cmd & __MCU_CMD_FIELD_WA) 3230 mcu_txd->s2d_index = MCU_S2D_H2C; 3231 else 3232 mcu_txd->s2d_index = MCU_S2D_H2N; 3233 3234 exit: 3235 if (wait_seq) 3236 *wait_seq = seq; 3237 3238 return 0; 3239 } 3240 EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message); 3241 3242 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); 3243 MODULE_LICENSE("Dual BSD/GPL"); 3244