1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #ifndef __MT7915_H 5 #define __MT7915_H 6 7 #include <linux/interrupt.h> 8 #include <linux/ktime.h> 9 #include "../mt76_connac.h" 10 #include "regs.h" 11 12 #define MT7915_MAX_INTERFACES 19 13 #define MT7915_WTBL_SIZE 288 14 #define MT7916_WTBL_SIZE 544 15 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1) 16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \ 17 MT7915_MAX_INTERFACES) 18 19 #define MT7915_WATCHDOG_TIME (HZ / 10) 20 #define MT7915_RESET_TIMEOUT (30 * HZ) 21 22 #define MT7915_TX_RING_SIZE 2048 23 #define MT7915_TX_MCU_RING_SIZE 256 24 #define MT7915_TX_FWDL_RING_SIZE 128 25 26 #define MT7915_RX_RING_SIZE 1536 27 #define MT7915_RX_MCU_RING_SIZE 512 28 29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin" 30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin" 31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin" 32 33 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin" 34 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin" 35 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin" 36 37 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin" 38 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin" 39 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin" 40 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin" 41 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin" 42 43 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin" 44 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin" 45 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin" 46 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin" 47 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin" 48 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin" 49 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin" 50 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin" 51 52 #define MT7915_EEPROM_SIZE 3584 53 #define MT7916_EEPROM_SIZE 4096 54 55 #define MT7915_EEPROM_BLOCK_SIZE 16 56 #define MT7915_TOKEN_SIZE 8192 57 58 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 59 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 60 61 #define MT7915_THERMAL_THROTTLE_MAX 100 62 #define MT7915_CDEV_THROTTLE_MAX 99 63 64 #define MT7915_SKU_RATE_NUM 161 65 66 #define MT7915_MAX_TWT_AGRT 16 67 #define MT7915_MAX_STA_TWT_AGRT 8 68 #define MT7915_MIN_TWT_DUR 64 69 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2) 70 71 #define MT7915_WED_RX_TOKEN_SIZE 12288 72 73 struct mt7915_vif; 74 struct mt7915_sta; 75 struct mt7915_dfs_pulse; 76 struct mt7915_dfs_pattern; 77 78 enum mt7915_txq_id { 79 MT7915_TXQ_FWDL = 16, 80 MT7915_TXQ_MCU_WM, 81 MT7915_TXQ_BAND0, 82 MT7915_TXQ_BAND1, 83 MT7915_TXQ_MCU_WA, 84 }; 85 86 enum mt7915_rxq_id { 87 MT7915_RXQ_BAND0 = 0, 88 MT7915_RXQ_BAND1, 89 MT7915_RXQ_MCU_WM = 0, 90 MT7915_RXQ_MCU_WA, 91 MT7915_RXQ_MCU_WA_EXT, 92 }; 93 94 enum mt7916_rxq_id { 95 MT7916_RXQ_MCU_WM = 0, 96 MT7916_RXQ_MCU_WA, 97 MT7916_RXQ_MCU_WA_MAIN, 98 MT7916_RXQ_MCU_WA_EXT, 99 MT7916_RXQ_BAND0, 100 MT7916_RXQ_BAND1, 101 }; 102 103 struct mt7915_twt_flow { 104 struct list_head list; 105 u64 start_tsf; 106 u64 tsf; 107 u32 duration; 108 u16 wcid; 109 __le16 mantissa; 110 u8 exp; 111 u8 table_id; 112 u8 id; 113 u8 protection:1; 114 u8 flowtype:1; 115 u8 trigger:1; 116 u8 sched:1; 117 }; 118 119 DECLARE_EWMA(avg_signal, 10, 8) 120 121 struct mt7915_sta { 122 struct mt76_wcid wcid; /* must be first */ 123 124 struct mt7915_vif *vif; 125 126 struct list_head poll_list; 127 struct list_head rc_list; 128 u32 airtime_ac[8]; 129 130 int ack_signal; 131 struct ewma_avg_signal avg_ack_signal; 132 133 unsigned long changed; 134 unsigned long jiffies; 135 unsigned long ampdu_state; 136 struct mt76_connac_sta_key_conf bip; 137 138 struct { 139 u8 flowid_mask; 140 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT]; 141 } twt; 142 }; 143 144 struct mt7915_vif_cap { 145 bool ht_ldpc:1; 146 bool vht_ldpc:1; 147 bool he_ldpc:1; 148 bool vht_su_ebfer:1; 149 bool vht_su_ebfee:1; 150 bool vht_mu_ebfer:1; 151 bool vht_mu_ebfee:1; 152 bool he_su_ebfer:1; 153 bool he_su_ebfee:1; 154 bool he_mu_ebfer:1; 155 }; 156 157 struct mt7915_vif { 158 struct mt76_vif mt76; /* must be first */ 159 160 struct mt7915_vif_cap cap; 161 struct mt7915_sta sta; 162 struct mt7915_phy *phy; 163 164 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 165 struct cfg80211_bitrate_mask bitrate_mask; 166 }; 167 168 /* per-phy stats. */ 169 struct mib_stats { 170 u32 ack_fail_cnt; 171 u32 fcs_err_cnt; 172 u32 rts_cnt; 173 u32 rts_retries_cnt; 174 u32 ba_miss_cnt; 175 u32 tx_bf_cnt; 176 u32 tx_mu_mpdu_cnt; 177 u32 tx_mu_acked_mpdu_cnt; 178 u32 tx_su_acked_mpdu_cnt; 179 u32 tx_bf_ibf_ppdu_cnt; 180 u32 tx_bf_ebf_ppdu_cnt; 181 182 u32 tx_bf_rx_fb_all_cnt; 183 u32 tx_bf_rx_fb_he_cnt; 184 u32 tx_bf_rx_fb_vht_cnt; 185 u32 tx_bf_rx_fb_ht_cnt; 186 187 u32 tx_bf_rx_fb_bw; /* value of last sample, not cumulative */ 188 u32 tx_bf_rx_fb_nc_cnt; 189 u32 tx_bf_rx_fb_nr_cnt; 190 u32 tx_bf_fb_cpl_cnt; 191 u32 tx_bf_fb_trig_cnt; 192 193 u32 tx_ampdu_cnt; 194 u32 tx_stop_q_empty_cnt; 195 u32 tx_mpdu_attempts_cnt; 196 u32 tx_mpdu_success_cnt; 197 u32 tx_pkt_ebf_cnt; 198 u32 tx_pkt_ibf_cnt; 199 200 u32 tx_rwp_fail_cnt; 201 u32 tx_rwp_need_cnt; 202 203 /* rx stats */ 204 u32 rx_fifo_full_cnt; 205 u32 channel_idle_cnt; 206 u32 primary_cca_busy_time; 207 u32 secondary_cca_busy_time; 208 u32 primary_energy_detect_time; 209 u32 cck_mdrdy_time; 210 u32 ofdm_mdrdy_time; 211 u32 green_mdrdy_time; 212 u32 rx_vector_mismatch_cnt; 213 u32 rx_delimiter_fail_cnt; 214 u32 rx_mrdy_cnt; 215 u32 rx_len_mismatch_cnt; 216 u32 rx_mpdu_cnt; 217 u32 rx_ampdu_cnt; 218 u32 rx_ampdu_bytes_cnt; 219 u32 rx_ampdu_valid_subframe_cnt; 220 u32 rx_ampdu_valid_subframe_bytes_cnt; 221 u32 rx_pfdrop_cnt; 222 u32 rx_vec_queue_overflow_drop_cnt; 223 u32 rx_ba_cnt; 224 225 u32 tx_amsdu[8]; 226 u32 tx_amsdu_cnt; 227 }; 228 229 /* crash-dump */ 230 struct mt7915_crash_data { 231 guid_t guid; 232 struct timespec64 timestamp; 233 234 u8 *memdump_buf; 235 size_t memdump_buf_len; 236 }; 237 238 struct mt7915_hif { 239 struct list_head list; 240 241 struct device *dev; 242 void __iomem *regs; 243 int irq; 244 }; 245 246 struct mt7915_phy { 247 struct mt76_phy *mt76; 248 struct mt7915_dev *dev; 249 250 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 251 252 struct ieee80211_vif *monitor_vif; 253 254 struct thermal_cooling_device *cdev; 255 u8 cdev_state; 256 u8 throttle_state; 257 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */ 258 259 u32 rxfilter; 260 u64 omac_mask; 261 262 u16 noise; 263 264 s16 coverage_class; 265 u8 slottime; 266 267 u8 rdd_state; 268 269 u32 trb_ts; 270 271 u32 rx_ampdu_ts; 272 u32 ampdu_ref; 273 274 struct mib_stats mib; 275 struct mt76_channel_state state_ts; 276 277 #ifdef CONFIG_NL80211_TESTMODE 278 struct { 279 u32 *reg_backup; 280 281 s32 last_freq_offset; 282 u8 last_rcpi[4]; 283 s8 last_ib_rssi[4]; 284 s8 last_wb_rssi[4]; 285 u8 last_snr; 286 287 u8 spe_idx; 288 } test; 289 #endif 290 }; 291 292 struct mt7915_dev { 293 union { /* must be first */ 294 struct mt76_dev mt76; 295 struct mt76_phy mphy; 296 }; 297 298 struct mt7915_hif *hif2; 299 struct mt7915_reg_desc reg; 300 u8 q_id[MT7915_MAX_QUEUE]; 301 u32 q_int_mask[MT7915_MAX_QUEUE]; 302 u32 wfdma_mask; 303 304 const struct mt76_bus_ops *bus_ops; 305 struct tasklet_struct irq_tasklet; 306 struct mt7915_phy phy; 307 308 /* monitor rx chain configured channel */ 309 struct cfg80211_chan_def rdd2_chandef; 310 struct mt7915_phy *rdd2_phy; 311 312 u16 chainmask; 313 u16 chainshift; 314 u32 hif_idx; 315 316 struct work_struct init_work; 317 struct work_struct rc_work; 318 struct work_struct dump_work; 319 struct work_struct reset_work; 320 wait_queue_head_t reset_wait; 321 322 struct { 323 u32 state; 324 u32 wa_reset_count; 325 u32 wm_reset_count; 326 bool hw_full_reset:1; 327 bool hw_init_done:1; 328 bool restart:1; 329 } recovery; 330 331 /* protects coredump data */ 332 struct mutex dump_mutex; 333 #ifdef CONFIG_DEV_COREDUMP 334 struct { 335 struct mt7915_crash_data *crash_data; 336 } coredump; 337 #endif 338 339 struct list_head sta_rc_list; 340 struct list_head sta_poll_list; 341 struct list_head twt_list; 342 spinlock_t sta_poll_lock; 343 344 u32 hw_pattern; 345 346 bool dbdc_support; 347 bool flash_mode; 348 bool muru_debug; 349 bool ibf; 350 351 struct dentry *debugfs_dir; 352 struct rchan *relay_fwlog; 353 354 void *cal; 355 356 struct { 357 u8 debug_wm; 358 u8 debug_wa; 359 u8 debug_bin; 360 } fw; 361 362 struct { 363 u16 table_mask; 364 u8 n_agrt; 365 } twt; 366 367 struct reset_control *rstc; 368 void __iomem *dcm; 369 void __iomem *sku; 370 }; 371 372 enum { 373 WFDMA0 = 0x0, 374 WFDMA1, 375 WFDMA_EXT, 376 __MT_WFDMA_MAX, 377 }; 378 379 enum { 380 MT_RX_SEL0, 381 MT_RX_SEL1, 382 MT_RX_SEL2, /* monitor chain */ 383 }; 384 385 enum mt7915_rdd_cmd { 386 RDD_STOP, 387 RDD_START, 388 RDD_DET_MODE, 389 RDD_RADAR_EMULATE, 390 RDD_START_TXQ = 20, 391 RDD_SET_WF_ANT = 30, 392 RDD_CAC_START = 50, 393 RDD_CAC_END, 394 RDD_NORMAL_START, 395 RDD_DISABLE_DFS_CAL, 396 RDD_PULSE_DBG, 397 RDD_READ_PULSE, 398 RDD_RESUME_BF, 399 RDD_IRQ_OFF, 400 }; 401 402 static inline struct mt7915_phy * 403 mt7915_hw_phy(struct ieee80211_hw *hw) 404 { 405 struct mt76_phy *phy = hw->priv; 406 407 return phy->priv; 408 } 409 410 static inline struct mt7915_dev * 411 mt7915_hw_dev(struct ieee80211_hw *hw) 412 { 413 struct mt76_phy *phy = hw->priv; 414 415 return container_of(phy->dev, struct mt7915_dev, mt76); 416 } 417 418 static inline struct mt7915_phy * 419 mt7915_ext_phy(struct mt7915_dev *dev) 420 { 421 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1]; 422 423 if (!phy) 424 return NULL; 425 426 return phy->priv; 427 } 428 429 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku) 430 { 431 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK; 432 433 if (!is_mt7986(&dev->mt76)) 434 return 0; 435 436 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask; 437 } 438 439 extern const struct ieee80211_ops mt7915_ops; 440 extern const struct mt76_testmode_ops mt7915_testmode_ops; 441 extern struct pci_driver mt7915_pci_driver; 442 extern struct pci_driver mt7915_hif_driver; 443 extern struct platform_driver mt7986_wmac_driver; 444 445 #ifdef CONFIG_MT7986_WMAC 446 int mt7986_wmac_enable(struct mt7915_dev *dev); 447 void mt7986_wmac_disable(struct mt7915_dev *dev); 448 #else 449 static inline int mt7986_wmac_enable(struct mt7915_dev *dev) 450 { 451 return 0; 452 } 453 454 static inline void mt7986_wmac_disable(struct mt7915_dev *dev) 455 { 456 } 457 #endif 458 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, 459 void __iomem *mem_base, u32 device_id); 460 void mt7915_wfsys_reset(struct mt7915_dev *dev); 461 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance); 462 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif); 463 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id); 464 465 int mt7915_register_device(struct mt7915_dev *dev); 466 void mt7915_unregister_device(struct mt7915_dev *dev); 467 int mt7915_eeprom_init(struct mt7915_dev *dev); 468 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, 469 struct mt7915_phy *phy); 470 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, 471 struct ieee80211_channel *chan, 472 u8 chain_idx); 473 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band); 474 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2); 475 void mt7915_dma_prefetch(struct mt7915_dev *dev); 476 void mt7915_dma_cleanup(struct mt7915_dev *dev); 477 int mt7915_dma_reset(struct mt7915_dev *dev, bool force); 478 int mt7915_txbf_init(struct mt7915_dev *dev); 479 void mt7915_init_txpower(struct mt7915_dev *dev, 480 struct ieee80211_supported_band *sband); 481 void mt7915_reset(struct mt7915_dev *dev); 482 int mt7915_run(struct ieee80211_hw *hw); 483 int mt7915_mcu_init(struct mt7915_dev *dev); 484 int mt7915_mcu_init_firmware(struct mt7915_dev *dev); 485 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, 486 struct mt7915_vif *mvif, 487 struct mt7915_twt_flow *flow, 488 int cmd); 489 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy, 490 struct ieee80211_vif *vif, bool enable); 491 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 492 struct ieee80211_vif *vif, int enable); 493 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 494 struct ieee80211_sta *sta, bool enable); 495 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 496 struct ieee80211_ampdu_params *params, 497 bool add); 498 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 499 struct ieee80211_ampdu_params *params, 500 bool add); 501 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, 502 struct cfg80211_he_bss_color *he_bss_color); 503 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 504 int enable, u32 changed); 505 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif, 506 struct ieee80211_he_obss_pd *he_obss_pd); 507 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 508 struct ieee80211_sta *sta, bool changed); 509 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 510 struct ieee80211_sta *sta); 511 int mt7915_set_channel(struct mt7915_phy *phy); 512 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd); 513 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif); 514 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req); 515 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, 516 struct ieee80211_vif *vif, 517 struct ieee80211_sta *sta, 518 void *data, u32 field); 519 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev); 520 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset); 521 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num); 522 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, 523 bool hdr_trans); 524 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, 525 u8 en); 526 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); 527 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); 528 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy); 529 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len); 530 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower); 531 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy, 532 struct ieee80211_vif *vif, 533 struct ieee80211_sta *sta, s8 txpower); 534 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action); 535 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val); 536 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 537 const struct mt7915_dfs_pulse *pulse); 538 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 539 const struct mt7915_dfs_pattern *pattern); 540 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val); 541 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev); 542 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy); 543 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch); 544 int mt7915_mcu_get_temperature(struct mt7915_phy *phy); 545 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state); 546 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, 547 struct ieee80211_sta *sta, struct rate_info *rate); 548 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, 549 struct cfg80211_chan_def *chandef); 550 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set); 551 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); 552 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); 553 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); 554 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); 555 void mt7915_mcu_exit(struct mt7915_dev *dev); 556 557 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) 558 { 559 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE; 560 } 561 562 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev) 563 { 564 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE; 565 } 566 567 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg, 568 u32 clear, u32 set); 569 570 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask) 571 { 572 if (dev->hif2) 573 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask); 574 else 575 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 576 577 tasklet_schedule(&dev->irq_tasklet); 578 } 579 580 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask) 581 { 582 if (dev->hif2) 583 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0); 584 else 585 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 586 } 587 588 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset, 589 size_t len); 590 591 void mt7915_mac_init(struct mt7915_dev *dev); 592 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw); 593 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); 594 void mt7915_mac_reset_counters(struct mt7915_phy *phy); 595 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); 596 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy); 597 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev, 598 struct ieee80211_vif *vif, bool enable); 599 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 600 struct sk_buff *skb, struct mt76_wcid *wcid, int pid, 601 struct ieee80211_key_conf *key, 602 enum mt76_txq_id qid, u32 changed); 603 void mt7915_mac_set_timing(struct mt7915_phy *phy); 604 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 605 struct ieee80211_sta *sta); 606 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 607 struct ieee80211_sta *sta); 608 void mt7915_mac_work(struct work_struct *work); 609 void mt7915_mac_reset_work(struct work_struct *work); 610 void mt7915_mac_dump_work(struct work_struct *work); 611 void mt7915_mac_sta_rc_work(struct work_struct *work); 612 void mt7915_mac_update_stats(struct mt7915_phy *phy); 613 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev, 614 struct mt7915_sta *msta, 615 u8 flowid); 616 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw, 617 struct ieee80211_sta *sta, 618 struct ieee80211_twt_setup *twt); 619 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 620 enum mt76_txq_id qid, struct mt76_wcid *wcid, 621 struct ieee80211_sta *sta, 622 struct mt76_tx_info *tx_info); 623 void mt7915_tx_token_put(struct mt7915_dev *dev); 624 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 625 struct sk_buff *skb, u32 *info); 626 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len); 627 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 628 void mt7915_stats_work(struct work_struct *work); 629 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force); 630 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy); 631 void mt7915_set_stream_he_caps(struct mt7915_phy *phy); 632 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy); 633 void mt7915_update_channel(struct mt76_phy *mphy); 634 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable); 635 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy, void *ms); 636 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev); 637 int mt7915_init_debugfs(struct mt7915_phy *phy); 638 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len); 639 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len); 640 #ifdef CONFIG_MAC80211_DEBUGFS 641 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 642 struct ieee80211_sta *sta, struct dentry *dir); 643 #endif 644 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, 645 bool pci, int *irq); 646 647 #endif 648