1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009-2014  Realtek Corporation.*/
3 
4 #ifndef __RTL92E__FW__H__
5 #define __RTL92E__FW__H__
6 
7 #define FW_8192C_SIZE				0x8000
8 #define FW_8192C_START_ADDRESS			0x1000
9 #define FW_8192C_END_ADDRESS			0x5FFF
10 #define FW_8192C_PAGE_SIZE			4096
11 #define FW_8192C_POLLING_DELAY			5
12 #define FW_8192C_POLLING_TIMEOUT_COUNT		3000
13 
14 #define IS_FW_HEADER_EXIST(_pfwhdr)	\
15 	((le16_to_cpu(_pfwhdr->signature) & 0xFFF0) == 0x92E0)
16 #define USE_OLD_WOWLAN_DEBUG_FW 0
17 
18 #define H2C_92E_RSVDPAGE_LOC_LEN		5
19 #define H2C_92E_PWEMODE_LENGTH			7
20 #define H2C_92E_JOINBSSRPT_LENGTH		1
21 #define H2C_92E_AP_OFFLOAD_LENGTH		3
22 #define H2C_92E_WOWLAN_LENGTH			3
23 #define H2C_92E_KEEP_ALIVE_CTRL_LENGTH		3
24 #if (USE_OLD_WOWLAN_DEBUG_FW == 0)
25 #define H2C_92E_REMOTE_WAKE_CTRL_LEN		1
26 #else
27 #define H2C_92E_REMOTE_WAKE_CTRL_LEN		3
28 #endif
29 #define H2C_92E_AOAC_GLOBAL_INFO_LEN		2
30 #define H2C_92E_AOAC_RSVDPAGE_LOC_LEN		7
31 
32 /* Fw PS state for RPWM.
33 *BIT[2:0] = HW state
34 *BIT[3] = Protocol PS state,  1: register active state, 0: register sleep state
35 *BIT[4] = sub-state
36 */
37 #define	FW_PS_RF_ON		BIT(2)
38 #define	FW_PS_REGISTER_ACTIVE	BIT(3)
39 
40 #define	FW_PS_ACK		BIT(6)
41 #define	FW_PS_TOGGLE		BIT(7)
42 
43  /* 92E RPWM value*/
44  /* BIT[0] = 1: 32k, 0: 40M*/
45 #define	FW_PS_CLOCK_OFF		BIT(0)		/* 32k */
46 #define	FW_PS_CLOCK_ON		0		/* 40M */
47 
48 #define	FW_PS_STATE_MASK		(0x0F)
49 #define	FW_PS_STATE_HW_MASK		(0x07)
50 #define	FW_PS_STATE_INT_MASK		(0x3F)
51 
52 #define	FW_PS_STATE(x)			(FW_PS_STATE_MASK & (x))
53 
54 #define	FW_PS_STATE_ALL_ON_92E		(FW_PS_CLOCK_ON)
55 #define	FW_PS_STATE_RF_ON_92E		(FW_PS_CLOCK_ON)
56 #define	FW_PS_STATE_RF_OFF_92E		(FW_PS_CLOCK_ON)
57 #define	FW_PS_STATE_RF_OFF_LOW_PWR	(FW_PS_CLOCK_OFF)
58 
59 /* For 92E H2C PwrMode Cmd ID 5.*/
60 #define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
61 #define	FW_PWR_STATE_RF_OFF	0
62 
63 #define	FW_PS_IS_ACK(x)		((x) & FW_PS_ACK)
64 
65 #define	IS_IN_LOW_POWER_STATE_92E(__state)		\
66 	(FW_PS_STATE(__state) == FW_PS_CLOCK_OFF)
67 
68 #define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
69 #define	FW_PWR_STATE_RF_OFF	0
70 
71 enum rtl8192e_h2c_cmd {
72 	H2C_92E_RSVDPAGE = 0,
73 	H2C_92E_MSRRPT = 1,
74 	H2C_92E_SCAN = 2,
75 	H2C_92E_KEEP_ALIVE_CTRL = 3,
76 	H2C_92E_DISCONNECT_DECISION = 4,
77 #if (USE_OLD_WOWLAN_DEBUG_FW == 1)
78 	H2C_92E_WO_WLAN = 5,
79 #endif
80 	H2C_92E_INIT_OFFLOAD = 6,
81 #if (USE_OLD_WOWLAN_DEBUG_FW == 1)
82 	H2C_92E_REMOTE_WAKE_CTRL = 7,
83 #endif
84 	H2C_92E_AP_OFFLOAD = 8,
85 	H2C_92E_BCN_RSVDPAGE = 9,
86 	H2C_92E_PROBERSP_RSVDPAGE = 10,
87 
88 	H2C_92E_SETPWRMODE = 0x20,
89 	H2C_92E_PS_TUNING_PARA = 0x21,
90 	H2C_92E_PS_TUNING_PARA2 = 0x22,
91 	H2C_92E_PS_LPS_PARA = 0x23,
92 	H2C_92E_P2P_PS_OFFLOAD = 024,
93 
94 #if (USE_OLD_WOWLAN_DEBUG_FW == 0)
95 	H2C_92E_WO_WLAN = 0x80,
96 	H2C_92E_REMOTE_WAKE_CTRL = 0x81,
97 	H2C_92E_AOAC_GLOBAL_INFO = 0x82,
98 	H2C_92E_AOAC_RSVDPAGE = 0x83,
99 #endif
100 	H2C_92E_RA_MASK = 0x40,
101 	H2C_92E_RSSI_REPORT = 0x42,
102 	H2C_92E_SELECTIVE_SUSPEND_ROF_CMD,
103 	H2C_92E_P2P_PS_MODE,
104 	H2C_92E_PSD_RESULT,
105 	/*Not defined CTW CMD for P2P yet*/
106 	H2C_92E_P2P_PS_CTW_CMD,
107 	MAX_92E_H2CCMD
108 };
109 
110 #define pagenum_128(_len)	\
111 	(u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0))
112 
113 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val)			\
114 	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
115 #define SET_H2CCMD_PWRMODE_PARM_RLBM(__cmd, __val)			\
116 	SET_BITS_TO_LE_1BYTE((__cmd)+1, 0, 4, __val)
117 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__cmd, __val)		\
118 	SET_BITS_TO_LE_1BYTE((__cmd)+1, 4, 4, __val)
119 #define SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(__cmd, __val)	\
120 	SET_BITS_TO_LE_1BYTE((__cmd)+2, 0, 8, __val)
121 #define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__cmd, __val)	\
122 	SET_BITS_TO_LE_1BYTE((__cmd)+3, 0, 8, __val)
123 #define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__cmd, __val)		\
124 	SET_BITS_TO_LE_1BYTE((__cmd)+4, 0, 8, __val)
125 #define SET_H2CCMD_PWRMODE_PARM_BYTE5(__cmd, __val)		\
126 	SET_BITS_TO_LE_1BYTE((__cmd) + 5, 0, 8, __val)
127 #define GET_92E_H2CCMD_PWRMODE_PARM_MODE(__cmd)			\
128 	LE_BITS_TO_1BYTE(__cmd, 0, 8)
129 
130 #define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val)		\
131 	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
132 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val)		\
133 	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
134 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val)		\
135 	SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
136 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val)		\
137 	SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
138 #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val)		\
139 	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 8, __val)
140 #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val)	\
141 	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val)
142 
143 /* _MEDIA_STATUS_RPT_PARM_CMD1 */
144 #define SET_H2CCMD_MSRRPT_PARM_OPMODE(__cmd, __val)		\
145 	SET_BITS_TO_LE_1BYTE(__cmd, 0, 1, __val)
146 #define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__cmd, __val)		\
147 	SET_BITS_TO_LE_1BYTE(__cmd, 1, 1, __val)
148 #define SET_H2CCMD_MSRRPT_PARM_MACID(__cmd, __val)		\
149 	SET_BITS_TO_LE_1BYTE(__cmd+1, 0, 8, __val)
150 #define SET_H2CCMD_MSRRPT_PARM_MACID_END(__cmd, __val)		\
151 	SET_BITS_TO_LE_1BYTE(__cmd+2, 0, 8, __val)
152 
153 int rtl92ee_download_fw(struct ieee80211_hw *hw, bool buse_wake_on_wlan_fw);
154 void rtl92ee_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
155 			  u32 cmd_len, u8 *cmdbuffer);
156 void rtl92ee_firmware_selfreset(struct ieee80211_hw *hw);
157 void rtl92ee_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
158 void rtl92ee_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus);
159 void rtl92ee_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
160 void rtl92ee_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
161 void rtl92ee_c2h_ra_report_handler(struct ieee80211_hw *hw,
162 				   u8 *cmd_buf, u8 cmd_len);
163 #endif
164