1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2020 Realtek Corporation 3 */ 4 #include <linux/ip.h> 5 #include <linux/udp.h> 6 7 #include "cam.h" 8 #include "coex.h" 9 #include "core.h" 10 #include "efuse.h" 11 #include "fw.h" 12 #include "mac.h" 13 #include "phy.h" 14 #include "ps.h" 15 #include "reg.h" 16 #include "sar.h" 17 #include "ser.h" 18 #include "txrx.h" 19 #include "util.h" 20 21 static bool rtw89_disable_ps_mode; 22 module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644); 23 MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode"); 24 25 #define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band) \ 26 { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, } 27 #define RTW89_DEF_CHAN_2G(_freq, _hw_val) \ 28 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ) 29 #define RTW89_DEF_CHAN_5G(_freq, _hw_val) \ 30 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ) 31 #define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \ 32 RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ) 33 #define RTW89_DEF_CHAN_6G(_freq, _hw_val) \ 34 RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ) 35 36 static struct ieee80211_channel rtw89_channels_2ghz[] = { 37 RTW89_DEF_CHAN_2G(2412, 1), 38 RTW89_DEF_CHAN_2G(2417, 2), 39 RTW89_DEF_CHAN_2G(2422, 3), 40 RTW89_DEF_CHAN_2G(2427, 4), 41 RTW89_DEF_CHAN_2G(2432, 5), 42 RTW89_DEF_CHAN_2G(2437, 6), 43 RTW89_DEF_CHAN_2G(2442, 7), 44 RTW89_DEF_CHAN_2G(2447, 8), 45 RTW89_DEF_CHAN_2G(2452, 9), 46 RTW89_DEF_CHAN_2G(2457, 10), 47 RTW89_DEF_CHAN_2G(2462, 11), 48 RTW89_DEF_CHAN_2G(2467, 12), 49 RTW89_DEF_CHAN_2G(2472, 13), 50 RTW89_DEF_CHAN_2G(2484, 14), 51 }; 52 53 static struct ieee80211_channel rtw89_channels_5ghz[] = { 54 RTW89_DEF_CHAN_5G(5180, 36), 55 RTW89_DEF_CHAN_5G(5200, 40), 56 RTW89_DEF_CHAN_5G(5220, 44), 57 RTW89_DEF_CHAN_5G(5240, 48), 58 RTW89_DEF_CHAN_5G(5260, 52), 59 RTW89_DEF_CHAN_5G(5280, 56), 60 RTW89_DEF_CHAN_5G(5300, 60), 61 RTW89_DEF_CHAN_5G(5320, 64), 62 RTW89_DEF_CHAN_5G(5500, 100), 63 RTW89_DEF_CHAN_5G(5520, 104), 64 RTW89_DEF_CHAN_5G(5540, 108), 65 RTW89_DEF_CHAN_5G(5560, 112), 66 RTW89_DEF_CHAN_5G(5580, 116), 67 RTW89_DEF_CHAN_5G(5600, 120), 68 RTW89_DEF_CHAN_5G(5620, 124), 69 RTW89_DEF_CHAN_5G(5640, 128), 70 RTW89_DEF_CHAN_5G(5660, 132), 71 RTW89_DEF_CHAN_5G(5680, 136), 72 RTW89_DEF_CHAN_5G(5700, 140), 73 RTW89_DEF_CHAN_5G(5720, 144), 74 RTW89_DEF_CHAN_5G(5745, 149), 75 RTW89_DEF_CHAN_5G(5765, 153), 76 RTW89_DEF_CHAN_5G(5785, 157), 77 RTW89_DEF_CHAN_5G(5805, 161), 78 RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165), 79 }; 80 81 static struct ieee80211_channel rtw89_channels_6ghz[] = { 82 RTW89_DEF_CHAN_6G(5955, 1), 83 RTW89_DEF_CHAN_6G(5975, 5), 84 RTW89_DEF_CHAN_6G(5995, 9), 85 RTW89_DEF_CHAN_6G(6015, 13), 86 RTW89_DEF_CHAN_6G(6035, 17), 87 RTW89_DEF_CHAN_6G(6055, 21), 88 RTW89_DEF_CHAN_6G(6075, 25), 89 RTW89_DEF_CHAN_6G(6095, 29), 90 RTW89_DEF_CHAN_6G(6115, 33), 91 RTW89_DEF_CHAN_6G(6135, 37), 92 RTW89_DEF_CHAN_6G(6155, 41), 93 RTW89_DEF_CHAN_6G(6175, 45), 94 RTW89_DEF_CHAN_6G(6195, 49), 95 RTW89_DEF_CHAN_6G(6215, 53), 96 RTW89_DEF_CHAN_6G(6235, 57), 97 RTW89_DEF_CHAN_6G(6255, 61), 98 RTW89_DEF_CHAN_6G(6275, 65), 99 RTW89_DEF_CHAN_6G(6295, 69), 100 RTW89_DEF_CHAN_6G(6315, 73), 101 RTW89_DEF_CHAN_6G(6335, 77), 102 RTW89_DEF_CHAN_6G(6355, 81), 103 RTW89_DEF_CHAN_6G(6375, 85), 104 RTW89_DEF_CHAN_6G(6395, 89), 105 RTW89_DEF_CHAN_6G(6415, 93), 106 RTW89_DEF_CHAN_6G(6435, 97), 107 RTW89_DEF_CHAN_6G(6455, 101), 108 RTW89_DEF_CHAN_6G(6475, 105), 109 RTW89_DEF_CHAN_6G(6495, 109), 110 RTW89_DEF_CHAN_6G(6515, 113), 111 RTW89_DEF_CHAN_6G(6535, 117), 112 RTW89_DEF_CHAN_6G(6555, 121), 113 RTW89_DEF_CHAN_6G(6575, 125), 114 RTW89_DEF_CHAN_6G(6595, 129), 115 RTW89_DEF_CHAN_6G(6615, 133), 116 RTW89_DEF_CHAN_6G(6635, 137), 117 RTW89_DEF_CHAN_6G(6655, 141), 118 RTW89_DEF_CHAN_6G(6675, 145), 119 RTW89_DEF_CHAN_6G(6695, 149), 120 RTW89_DEF_CHAN_6G(6715, 153), 121 RTW89_DEF_CHAN_6G(6735, 157), 122 RTW89_DEF_CHAN_6G(6755, 161), 123 RTW89_DEF_CHAN_6G(6775, 165), 124 RTW89_DEF_CHAN_6G(6795, 169), 125 RTW89_DEF_CHAN_6G(6815, 173), 126 RTW89_DEF_CHAN_6G(6835, 177), 127 RTW89_DEF_CHAN_6G(6855, 181), 128 RTW89_DEF_CHAN_6G(6875, 185), 129 RTW89_DEF_CHAN_6G(6895, 189), 130 RTW89_DEF_CHAN_6G(6915, 193), 131 RTW89_DEF_CHAN_6G(6935, 197), 132 RTW89_DEF_CHAN_6G(6955, 201), 133 RTW89_DEF_CHAN_6G(6975, 205), 134 RTW89_DEF_CHAN_6G(6995, 209), 135 RTW89_DEF_CHAN_6G(7015, 213), 136 RTW89_DEF_CHAN_6G(7035, 217), 137 RTW89_DEF_CHAN_6G(7055, 221), 138 RTW89_DEF_CHAN_6G(7075, 225), 139 RTW89_DEF_CHAN_6G(7095, 229), 140 RTW89_DEF_CHAN_6G(7115, 233), 141 }; 142 143 static struct ieee80211_rate rtw89_bitrates[] = { 144 { .bitrate = 10, .hw_value = 0x00, }, 145 { .bitrate = 20, .hw_value = 0x01, }, 146 { .bitrate = 55, .hw_value = 0x02, }, 147 { .bitrate = 110, .hw_value = 0x03, }, 148 { .bitrate = 60, .hw_value = 0x04, }, 149 { .bitrate = 90, .hw_value = 0x05, }, 150 { .bitrate = 120, .hw_value = 0x06, }, 151 { .bitrate = 180, .hw_value = 0x07, }, 152 { .bitrate = 240, .hw_value = 0x08, }, 153 { .bitrate = 360, .hw_value = 0x09, }, 154 { .bitrate = 480, .hw_value = 0x0a, }, 155 { .bitrate = 540, .hw_value = 0x0b, }, 156 }; 157 158 u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate) 159 { 160 struct ieee80211_rate rate; 161 162 if (unlikely(rpt_rate >= ARRAY_SIZE(rtw89_bitrates))) { 163 rtw89_info(rtwdev, "invalid rpt rate %d\n", rpt_rate); 164 return 0; 165 } 166 167 rate = rtw89_bitrates[rpt_rate]; 168 169 return rate.bitrate; 170 } 171 172 static struct ieee80211_supported_band rtw89_sband_2ghz = { 173 .band = NL80211_BAND_2GHZ, 174 .channels = rtw89_channels_2ghz, 175 .n_channels = ARRAY_SIZE(rtw89_channels_2ghz), 176 .bitrates = rtw89_bitrates, 177 .n_bitrates = ARRAY_SIZE(rtw89_bitrates), 178 .ht_cap = {0}, 179 .vht_cap = {0}, 180 }; 181 182 static struct ieee80211_supported_band rtw89_sband_5ghz = { 183 .band = NL80211_BAND_5GHZ, 184 .channels = rtw89_channels_5ghz, 185 .n_channels = ARRAY_SIZE(rtw89_channels_5ghz), 186 187 /* 5G has no CCK rates, 1M/2M/5.5M/11M */ 188 .bitrates = rtw89_bitrates + 4, 189 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, 190 .ht_cap = {0}, 191 .vht_cap = {0}, 192 }; 193 194 static struct ieee80211_supported_band rtw89_sband_6ghz = { 195 .band = NL80211_BAND_6GHZ, 196 .channels = rtw89_channels_6ghz, 197 .n_channels = ARRAY_SIZE(rtw89_channels_6ghz), 198 199 /* 6G has no CCK rates, 1M/2M/5.5M/11M */ 200 .bitrates = rtw89_bitrates + 4, 201 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, 202 }; 203 204 static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev, 205 struct rtw89_traffic_stats *stats, 206 struct sk_buff *skb, bool tx) 207 { 208 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 209 210 if (!ieee80211_is_data(hdr->frame_control)) 211 return; 212 213 if (is_broadcast_ether_addr(hdr->addr1) || 214 is_multicast_ether_addr(hdr->addr1)) 215 return; 216 217 if (tx) { 218 stats->tx_cnt++; 219 stats->tx_unicast += skb->len; 220 } else { 221 stats->rx_cnt++; 222 stats->rx_unicast += skb->len; 223 } 224 } 225 226 static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef, 227 struct rtw89_channel_params *chan_param) 228 { 229 struct ieee80211_channel *channel = chandef->chan; 230 enum nl80211_chan_width width = chandef->width; 231 u32 primary_freq, center_freq; 232 u8 center_chan; 233 u8 bandwidth = RTW89_CHANNEL_WIDTH_20; 234 u8 primary_chan_idx = 0; 235 u32 offset; 236 u8 band; 237 u8 subband; 238 239 center_chan = channel->hw_value; 240 primary_freq = channel->center_freq; 241 center_freq = chandef->center_freq1; 242 243 switch (width) { 244 case NL80211_CHAN_WIDTH_20_NOHT: 245 case NL80211_CHAN_WIDTH_20: 246 bandwidth = RTW89_CHANNEL_WIDTH_20; 247 primary_chan_idx = RTW89_SC_DONT_CARE; 248 break; 249 case NL80211_CHAN_WIDTH_40: 250 bandwidth = RTW89_CHANNEL_WIDTH_40; 251 if (primary_freq > center_freq) { 252 primary_chan_idx = RTW89_SC_20_UPPER; 253 center_chan -= 2; 254 } else { 255 primary_chan_idx = RTW89_SC_20_LOWER; 256 center_chan += 2; 257 } 258 break; 259 case NL80211_CHAN_WIDTH_80: 260 case NL80211_CHAN_WIDTH_160: 261 bandwidth = nl_to_rtw89_bandwidth(width); 262 if (primary_freq > center_freq) { 263 offset = (primary_freq - center_freq - 10) / 20; 264 primary_chan_idx = RTW89_SC_20_UPPER + offset * 2; 265 center_chan -= 2 + offset * 4; 266 } else { 267 offset = (center_freq - primary_freq - 10) / 20; 268 primary_chan_idx = RTW89_SC_20_LOWER + offset * 2; 269 center_chan += 2 + offset * 4; 270 } 271 break; 272 default: 273 center_chan = 0; 274 break; 275 } 276 277 switch (channel->band) { 278 default: 279 case NL80211_BAND_2GHZ: 280 band = RTW89_BAND_2G; 281 break; 282 case NL80211_BAND_5GHZ: 283 band = RTW89_BAND_5G; 284 break; 285 case NL80211_BAND_6GHZ: 286 band = RTW89_BAND_6G; 287 break; 288 } 289 290 switch (band) { 291 default: 292 case RTW89_BAND_2G: 293 switch (center_chan) { 294 default: 295 case 1 ... 14: 296 subband = RTW89_CH_2G; 297 break; 298 } 299 break; 300 case RTW89_BAND_5G: 301 switch (center_chan) { 302 default: 303 case 36 ... 64: 304 subband = RTW89_CH_5G_BAND_1; 305 break; 306 case 100 ... 144: 307 subband = RTW89_CH_5G_BAND_3; 308 break; 309 case 149 ... 177: 310 subband = RTW89_CH_5G_BAND_4; 311 break; 312 } 313 break; 314 case RTW89_BAND_6G: 315 switch (center_chan) { 316 default: 317 case 1 ... 29: 318 subband = RTW89_CH_6G_BAND_IDX0; 319 break; 320 case 33 ... 61: 321 subband = RTW89_CH_6G_BAND_IDX1; 322 break; 323 case 65 ... 93: 324 subband = RTW89_CH_6G_BAND_IDX2; 325 break; 326 case 97 ... 125: 327 subband = RTW89_CH_6G_BAND_IDX3; 328 break; 329 case 129 ... 157: 330 subband = RTW89_CH_6G_BAND_IDX4; 331 break; 332 case 161 ... 189: 333 subband = RTW89_CH_6G_BAND_IDX5; 334 break; 335 case 193 ... 221: 336 subband = RTW89_CH_6G_BAND_IDX6; 337 break; 338 case 225 ... 253: 339 subband = RTW89_CH_6G_BAND_IDX7; 340 break; 341 } 342 break; 343 } 344 345 chan_param->center_chan = center_chan; 346 chan_param->center_freq = center_freq; 347 chan_param->primary_chan = channel->hw_value; 348 chan_param->bandwidth = bandwidth; 349 chan_param->pri_ch_idx = primary_chan_idx; 350 chan_param->band_type = band; 351 chan_param->subband_type = subband; 352 } 353 354 void rtw89_set_channel(struct rtw89_dev *rtwdev) 355 { 356 struct ieee80211_hw *hw = rtwdev->hw; 357 const struct rtw89_chip_info *chip = rtwdev->chip; 358 struct rtw89_hal *hal = &rtwdev->hal; 359 struct rtw89_channel_params ch_param; 360 struct rtw89_channel_help_params bak; 361 u8 center_chan, bandwidth; 362 bool band_changed; 363 364 rtw89_get_channel_params(&hw->conf.chandef, &ch_param); 365 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 366 return; 367 368 center_chan = ch_param.center_chan; 369 bandwidth = ch_param.bandwidth; 370 band_changed = hal->current_band_type != ch_param.band_type || 371 hal->current_channel == 0; 372 373 hal->current_band_width = bandwidth; 374 hal->current_channel = center_chan; 375 hal->current_freq = ch_param.center_freq; 376 hal->prev_primary_channel = hal->current_primary_channel; 377 hal->prev_band_type = hal->current_band_type; 378 hal->current_primary_channel = ch_param.primary_chan; 379 hal->current_band_type = ch_param.band_type; 380 hal->current_subband = ch_param.subband_type; 381 382 rtw89_chip_set_channel_prepare(rtwdev, &bak); 383 384 chip->ops->set_channel(rtwdev, &ch_param); 385 386 rtw89_chip_set_txpwr(rtwdev); 387 388 rtw89_chip_set_channel_done(rtwdev, &bak); 389 390 if (band_changed) { 391 rtw89_btc_ntfy_switch_band(rtwdev, RTW89_PHY_0, hal->current_band_type); 392 rtw89_chip_rfk_band_changed(rtwdev); 393 } 394 } 395 396 static enum rtw89_core_tx_type 397 rtw89_core_get_tx_type(struct rtw89_dev *rtwdev, 398 struct sk_buff *skb) 399 { 400 struct ieee80211_hdr *hdr = (void *)skb->data; 401 __le16 fc = hdr->frame_control; 402 403 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc)) 404 return RTW89_CORE_TX_TYPE_MGMT; 405 406 return RTW89_CORE_TX_TYPE_DATA; 407 } 408 409 static void 410 rtw89_core_tx_update_ampdu_info(struct rtw89_dev *rtwdev, 411 struct rtw89_core_tx_request *tx_req, u8 tid) 412 { 413 struct ieee80211_sta *sta = tx_req->sta; 414 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 415 struct rtw89_sta *rtwsta; 416 u8 ampdu_num; 417 418 if (!sta) { 419 rtw89_warn(rtwdev, "cannot set ampdu info without sta\n"); 420 return; 421 } 422 423 rtwsta = (struct rtw89_sta *)sta->drv_priv; 424 425 ampdu_num = (u8)((rtwsta->ampdu_params[tid].agg_num ? 426 rtwsta->ampdu_params[tid].agg_num : 427 4 << sta->ht_cap.ampdu_factor) - 1); 428 429 desc_info->agg_en = true; 430 desc_info->ampdu_density = sta->ht_cap.ampdu_density; 431 desc_info->ampdu_num = ampdu_num; 432 } 433 434 static void 435 rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev, 436 struct rtw89_core_tx_request *tx_req) 437 { 438 struct ieee80211_vif *vif = tx_req->vif; 439 struct ieee80211_sta *sta = tx_req->sta; 440 struct ieee80211_tx_info *info; 441 struct ieee80211_key_conf *key; 442 struct rtw89_vif *rtwvif; 443 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); 444 struct rtw89_addr_cam_entry *addr_cam; 445 struct rtw89_sec_cam_entry *sec_cam; 446 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 447 struct sk_buff *skb = tx_req->skb; 448 u8 sec_type = RTW89_SEC_KEY_TYPE_NONE; 449 450 if (!vif) { 451 rtw89_warn(rtwdev, "cannot set sec key without vif\n"); 452 return; 453 } 454 455 rtwvif = (struct rtw89_vif *)vif->drv_priv; 456 addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta); 457 458 info = IEEE80211_SKB_CB(skb); 459 key = info->control.hw_key; 460 sec_cam = addr_cam->sec_entries[key->hw_key_idx]; 461 if (!sec_cam) { 462 rtw89_warn(rtwdev, "sec cam entry is empty\n"); 463 return; 464 } 465 466 switch (key->cipher) { 467 case WLAN_CIPHER_SUITE_WEP40: 468 sec_type = RTW89_SEC_KEY_TYPE_WEP40; 469 break; 470 case WLAN_CIPHER_SUITE_WEP104: 471 sec_type = RTW89_SEC_KEY_TYPE_WEP104; 472 break; 473 case WLAN_CIPHER_SUITE_TKIP: 474 sec_type = RTW89_SEC_KEY_TYPE_TKIP; 475 break; 476 case WLAN_CIPHER_SUITE_CCMP: 477 sec_type = RTW89_SEC_KEY_TYPE_CCMP128; 478 break; 479 case WLAN_CIPHER_SUITE_CCMP_256: 480 sec_type = RTW89_SEC_KEY_TYPE_CCMP256; 481 break; 482 case WLAN_CIPHER_SUITE_GCMP: 483 sec_type = RTW89_SEC_KEY_TYPE_GCMP128; 484 break; 485 case WLAN_CIPHER_SUITE_GCMP_256: 486 sec_type = RTW89_SEC_KEY_TYPE_GCMP256; 487 break; 488 default: 489 rtw89_warn(rtwdev, "key cipher not supported %d\n", key->cipher); 490 return; 491 } 492 493 desc_info->sec_en = true; 494 desc_info->sec_type = sec_type; 495 desc_info->sec_cam_idx = sec_cam->sec_cam_idx; 496 } 497 498 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev, 499 struct rtw89_core_tx_request *tx_req) 500 { 501 struct sk_buff *skb = tx_req->skb; 502 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 503 struct ieee80211_vif *vif = tx_info->control.vif; 504 struct rtw89_hal *hal = &rtwdev->hal; 505 u16 lowest_rate = hal->current_band_type == RTW89_BAND_2G ? 506 RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6; 507 508 if (!vif || !vif->bss_conf.basic_rates || !tx_req->sta) 509 return lowest_rate; 510 511 return __ffs(vif->bss_conf.basic_rates) + lowest_rate; 512 } 513 514 static void 515 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev, 516 struct rtw89_core_tx_request *tx_req) 517 { 518 struct ieee80211_vif *vif = tx_req->vif; 519 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 520 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 521 u8 qsel, ch_dma; 522 523 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT; 524 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 525 526 desc_info->qsel = qsel; 527 desc_info->ch_dma = ch_dma; 528 desc_info->port = desc_info->hiq ? rtwvif->port : 0; 529 desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL; 530 desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE; 531 532 /* fixed data rate for mgmt frames */ 533 desc_info->en_wd_info = true; 534 desc_info->use_rate = true; 535 desc_info->dis_data_fb = true; 536 desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req); 537 538 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 539 "tx mgmt frame with rate 0x%x on channel %d (bw %d)\n", 540 desc_info->data_rate, rtwdev->hal.current_channel, 541 rtwdev->hal.current_band_width); 542 } 543 544 static void 545 rtw89_core_tx_update_h2c_info(struct rtw89_dev *rtwdev, 546 struct rtw89_core_tx_request *tx_req) 547 { 548 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 549 550 desc_info->is_bmc = false; 551 desc_info->wd_page = false; 552 desc_info->ch_dma = RTW89_DMA_H2C; 553 } 554 555 static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc) 556 { 557 static const u8 rtw89_bandwidth_to_om[] = { 558 [RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20, 559 [RTW89_CHANNEL_WIDTH_40] = HTC_OM_CHANNEL_WIDTH_40, 560 [RTW89_CHANNEL_WIDTH_80] = HTC_OM_CHANNEL_WIDTH_80, 561 [RTW89_CHANNEL_WIDTH_160] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80, 562 [RTW89_CHANNEL_WIDTH_80_80] = HTC_OM_CHANNEL_WIDTH_160_OR_80_80, 563 }; 564 const struct rtw89_chip_info *chip = rtwdev->chip; 565 struct rtw89_hal *hal = &rtwdev->hal; 566 u8 om_bandwidth; 567 568 if (!chip->dis_2g_40m_ul_ofdma || 569 hal->current_band_type != RTW89_BAND_2G || 570 hal->current_band_width != RTW89_CHANNEL_WIDTH_40) 571 return; 572 573 om_bandwidth = hal->current_band_width < ARRAY_SIZE(rtw89_bandwidth_to_om) ? 574 rtw89_bandwidth_to_om[hal->current_band_width] : 0; 575 *htc = le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) | 576 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_OM, RTW89_HTC_MASK_CTL_ID) | 577 le32_encode_bits(hal->rx_nss - 1, RTW89_HTC_MASK_HTC_OM_RX_NSS) | 578 le32_encode_bits(om_bandwidth, RTW89_HTC_MASK_HTC_OM_CH_WIDTH) | 579 le32_encode_bits(1, RTW89_HTC_MASK_HTC_OM_UL_MU_DIS) | 580 le32_encode_bits(hal->tx_nss - 1, RTW89_HTC_MASK_HTC_OM_TX_NSTS) | 581 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_ER_SU_DIS) | 582 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR) | 583 le32_encode_bits(0, RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS); 584 } 585 586 static bool 587 __rtw89_core_tx_check_he_qos_htc(struct rtw89_dev *rtwdev, 588 struct rtw89_core_tx_request *tx_req, 589 enum btc_pkt_type pkt_type) 590 { 591 struct ieee80211_sta *sta = tx_req->sta; 592 struct sk_buff *skb = tx_req->skb; 593 struct ieee80211_hdr *hdr = (void *)skb->data; 594 __le16 fc = hdr->frame_control; 595 596 /* AP IOT issue with EAPoL, ARP and DHCP */ 597 if (pkt_type < PACKET_MAX) 598 return false; 599 600 if (!sta || !sta->he_cap.has_he) 601 return false; 602 603 if (!ieee80211_is_data_qos(fc)) 604 return false; 605 606 if (skb_headroom(skb) < IEEE80211_HT_CTL_LEN) 607 return false; 608 609 return true; 610 } 611 612 static void 613 __rtw89_core_tx_adjust_he_qos_htc(struct rtw89_dev *rtwdev, 614 struct rtw89_core_tx_request *tx_req) 615 { 616 struct ieee80211_sta *sta = tx_req->sta; 617 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 618 struct sk_buff *skb = tx_req->skb; 619 struct ieee80211_hdr *hdr = (void *)skb->data; 620 __le16 fc = hdr->frame_control; 621 void *data; 622 __le32 *htc; 623 u8 *qc; 624 int hdr_len; 625 626 hdr_len = ieee80211_has_a4(fc) ? 32 : 26; 627 data = skb_push(skb, IEEE80211_HT_CTL_LEN); 628 memmove(data, data + IEEE80211_HT_CTL_LEN, hdr_len); 629 630 hdr = data; 631 htc = data + hdr_len; 632 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_ORDER); 633 *htc = rtwsta->htc_template ? rtwsta->htc_template : 634 le32_encode_bits(RTW89_HTC_VARIANT_HE, RTW89_HTC_MASK_VARIANT) | 635 le32_encode_bits(RTW89_HTC_VARIANT_HE_CID_CAS, RTW89_HTC_MASK_CTL_ID); 636 637 qc = data + hdr_len - IEEE80211_QOS_CTL_LEN; 638 qc[0] |= IEEE80211_QOS_CTL_EOSP; 639 } 640 641 static void 642 rtw89_core_tx_update_he_qos_htc(struct rtw89_dev *rtwdev, 643 struct rtw89_core_tx_request *tx_req, 644 enum btc_pkt_type pkt_type) 645 { 646 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 647 struct ieee80211_vif *vif = tx_req->vif; 648 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 649 650 if (!__rtw89_core_tx_check_he_qos_htc(rtwdev, tx_req, pkt_type)) 651 goto desc_bk; 652 653 __rtw89_core_tx_adjust_he_qos_htc(rtwdev, tx_req); 654 655 desc_info->pkt_size += IEEE80211_HT_CTL_LEN; 656 desc_info->a_ctrl_bsr = true; 657 658 desc_bk: 659 if (!rtwvif || rtwvif->last_a_ctrl == desc_info->a_ctrl_bsr) 660 return; 661 662 rtwvif->last_a_ctrl = desc_info->a_ctrl_bsr; 663 desc_info->bk = true; 664 } 665 666 static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev, 667 struct rtw89_core_tx_request *tx_req) 668 { 669 struct ieee80211_vif *vif = tx_req->vif; 670 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 671 struct ieee80211_sta *sta = tx_req->sta; 672 struct rtw89_sta *rtwsta; 673 674 if (!sta) 675 return rtwvif->mac_id; 676 677 rtwsta = (struct rtw89_sta *)sta->drv_priv; 678 return rtwsta->mac_id; 679 } 680 681 static void 682 rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, 683 struct rtw89_core_tx_request *tx_req) 684 { 685 struct ieee80211_vif *vif = tx_req->vif; 686 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 687 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; 688 struct rtw89_hal *hal = &rtwdev->hal; 689 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 690 struct sk_buff *skb = tx_req->skb; 691 u8 tid, tid_indicate; 692 u8 qsel, ch_dma; 693 694 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; 695 tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid); 696 qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid); 697 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 698 699 desc_info->ch_dma = ch_dma; 700 desc_info->tid_indicate = tid_indicate; 701 desc_info->qsel = qsel; 702 desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req); 703 desc_info->port = desc_info->hiq ? rtwvif->port : 0; 704 705 /* enable wd_info for AMPDU */ 706 desc_info->en_wd_info = true; 707 708 if (IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU) 709 rtw89_core_tx_update_ampdu_info(rtwdev, tx_req, tid); 710 if (IEEE80211_SKB_CB(skb)->control.hw_key) 711 rtw89_core_tx_update_sec_key(rtwdev, tx_req); 712 713 if (rate_pattern->enable) 714 desc_info->data_retry_lowest_rate = rate_pattern->rate; 715 else if (hal->current_band_type == RTW89_BAND_2G) 716 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1; 717 else 718 desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6; 719 } 720 721 static enum btc_pkt_type 722 rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev, 723 struct rtw89_core_tx_request *tx_req) 724 { 725 struct sk_buff *skb = tx_req->skb; 726 struct udphdr *udphdr; 727 728 if (IEEE80211_SKB_CB(skb)->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO) { 729 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.eapol_notify_work); 730 return PACKET_EAPOL; 731 } 732 733 if (skb->protocol == htons(ETH_P_ARP)) { 734 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.arp_notify_work); 735 return PACKET_ARP; 736 } 737 738 if (skb->protocol == htons(ETH_P_IP) && 739 ip_hdr(skb)->protocol == IPPROTO_UDP) { 740 udphdr = udp_hdr(skb); 741 if (((udphdr->source == htons(67) && udphdr->dest == htons(68)) || 742 (udphdr->source == htons(68) && udphdr->dest == htons(67))) && 743 skb->len > 282) { 744 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.dhcp_notify_work); 745 return PACKET_DHCP; 746 } 747 } 748 749 if (skb->protocol == htons(ETH_P_IP) && 750 ip_hdr(skb)->protocol == IPPROTO_ICMP) { 751 ieee80211_queue_work(rtwdev->hw, &rtwdev->btc.icmp_notify_work); 752 return PACKET_ICMP; 753 } 754 755 return PACKET_MAX; 756 } 757 758 static void 759 rtw89_core_tx_wake(struct rtw89_dev *rtwdev, 760 struct rtw89_core_tx_request *tx_req) 761 { 762 if (!rtwdev->fw.tx_wake) 763 return; 764 765 if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags)) 766 return; 767 768 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT) 769 return; 770 771 rtw89_mac_notify_wake(rtwdev); 772 } 773 774 static void 775 rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev, 776 struct rtw89_core_tx_request *tx_req) 777 { 778 struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; 779 struct sk_buff *skb = tx_req->skb; 780 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 781 struct ieee80211_hdr *hdr = (void *)skb->data; 782 enum rtw89_core_tx_type tx_type; 783 enum btc_pkt_type pkt_type; 784 bool is_bmc; 785 u16 seq; 786 787 seq = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; 788 if (tx_req->tx_type != RTW89_CORE_TX_TYPE_FWCMD) { 789 tx_type = rtw89_core_get_tx_type(rtwdev, skb); 790 tx_req->tx_type = tx_type; 791 } 792 is_bmc = (is_broadcast_ether_addr(hdr->addr1) || 793 is_multicast_ether_addr(hdr->addr1)); 794 795 desc_info->seq = seq; 796 desc_info->pkt_size = skb->len; 797 desc_info->is_bmc = is_bmc; 798 desc_info->wd_page = true; 799 desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM; 800 801 switch (tx_req->tx_type) { 802 case RTW89_CORE_TX_TYPE_MGMT: 803 rtw89_core_tx_update_mgmt_info(rtwdev, tx_req); 804 break; 805 case RTW89_CORE_TX_TYPE_DATA: 806 rtw89_core_tx_update_data_info(rtwdev, tx_req); 807 pkt_type = rtw89_core_tx_btc_spec_pkt_notify(rtwdev, tx_req); 808 rtw89_core_tx_update_he_qos_htc(rtwdev, tx_req, pkt_type); 809 break; 810 case RTW89_CORE_TX_TYPE_FWCMD: 811 rtw89_core_tx_update_h2c_info(rtwdev, tx_req); 812 break; 813 } 814 } 815 816 void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel) 817 { 818 u8 ch_dma; 819 820 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 821 822 rtw89_hci_tx_kick_off(rtwdev, ch_dma); 823 } 824 825 int rtw89_h2c_tx(struct rtw89_dev *rtwdev, 826 struct sk_buff *skb, bool fwdl) 827 { 828 struct rtw89_core_tx_request tx_req = {0}; 829 u32 cnt; 830 int ret; 831 832 tx_req.skb = skb; 833 tx_req.tx_type = RTW89_CORE_TX_TYPE_FWCMD; 834 if (fwdl) 835 tx_req.desc_info.fw_dl = true; 836 837 rtw89_core_tx_update_desc_info(rtwdev, &tx_req); 838 839 if (!fwdl) 840 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "H2C: ", skb->data, skb->len); 841 842 cnt = rtw89_hci_check_and_reclaim_tx_resource(rtwdev, RTW89_TXCH_CH12); 843 if (cnt == 0) { 844 rtw89_err(rtwdev, "no tx fwcmd resource\n"); 845 return -ENOSPC; 846 } 847 848 ret = rtw89_hci_tx_write(rtwdev, &tx_req); 849 if (ret) { 850 rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); 851 return ret; 852 } 853 rtw89_hci_tx_kick_off(rtwdev, RTW89_TXCH_CH12); 854 855 return 0; 856 } 857 858 int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, 859 struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel) 860 { 861 struct rtw89_core_tx_request tx_req = {0}; 862 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 863 int ret; 864 865 tx_req.skb = skb; 866 tx_req.sta = sta; 867 tx_req.vif = vif; 868 869 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true); 870 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true); 871 rtw89_core_tx_update_desc_info(rtwdev, &tx_req); 872 rtw89_core_tx_wake(rtwdev, &tx_req); 873 874 ret = rtw89_hci_tx_write(rtwdev, &tx_req); 875 if (ret) { 876 rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); 877 return ret; 878 } 879 880 if (qsel) 881 *qsel = tx_req.desc_info.qsel; 882 883 return 0; 884 } 885 886 static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info) 887 { 888 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) | 889 FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) | 890 FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) | 891 FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) | 892 FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) | 893 FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) | 894 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) | 895 FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode); 896 897 return cpu_to_le32(dword); 898 } 899 900 static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info) 901 { 902 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) | 903 FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) | 904 FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) | 905 FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id); 906 907 return cpu_to_le32(dword); 908 } 909 910 static __le32 rtw89_build_txwd_body3(struct rtw89_tx_desc_info *desc_info) 911 { 912 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) | 913 FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) | 914 FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk); 915 916 return cpu_to_le32(dword); 917 } 918 919 static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info) 920 { 921 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) | 922 FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) | 923 FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) | 924 FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port); 925 926 return cpu_to_le32(dword); 927 } 928 929 static __le32 rtw89_build_txwd_info1(struct rtw89_tx_desc_info *desc_info) 930 { 931 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) | 932 FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) | 933 FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE, 934 desc_info->data_retry_lowest_rate); 935 936 return cpu_to_le32(dword); 937 } 938 939 static __le32 rtw89_build_txwd_info2(struct rtw89_tx_desc_info *desc_info) 940 { 941 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) | 942 FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) | 943 FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) | 944 FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx); 945 946 return cpu_to_le32(dword); 947 } 948 949 static __le32 rtw89_build_txwd_info4(struct rtw89_tx_desc_info *desc_info) 950 { 951 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) | 952 FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1); 953 954 return cpu_to_le32(dword); 955 } 956 957 void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev, 958 struct rtw89_tx_desc_info *desc_info, 959 void *txdesc) 960 { 961 struct rtw89_txwd_body *txwd_body = (struct rtw89_txwd_body *)txdesc; 962 struct rtw89_txwd_info *txwd_info; 963 964 txwd_body->dword0 = rtw89_build_txwd_body0(desc_info); 965 txwd_body->dword2 = rtw89_build_txwd_body2(desc_info); 966 txwd_body->dword3 = rtw89_build_txwd_body3(desc_info); 967 968 if (!desc_info->en_wd_info) 969 return; 970 971 txwd_info = (struct rtw89_txwd_info *)(txwd_body + 1); 972 txwd_info->dword0 = rtw89_build_txwd_info0(desc_info); 973 txwd_info->dword1 = rtw89_build_txwd_info1(desc_info); 974 txwd_info->dword2 = rtw89_build_txwd_info2(desc_info); 975 txwd_info->dword4 = rtw89_build_txwd_info4(desc_info); 976 977 } 978 EXPORT_SYMBOL(rtw89_core_fill_txdesc); 979 980 static int rtw89_core_rx_process_mac_ppdu(struct rtw89_dev *rtwdev, 981 struct sk_buff *skb, 982 struct rtw89_rx_phy_ppdu *phy_ppdu) 983 { 984 bool rx_cnt_valid = false; 985 u8 plcp_size = 0; 986 u8 usr_num = 0; 987 u8 *phy_sts; 988 989 rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data); 990 plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3; 991 usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data); 992 if (usr_num > RTW89_PPDU_MAX_USR) { 993 rtw89_warn(rtwdev, "Invalid user number in mac info\n"); 994 return -EINVAL; 995 } 996 997 phy_sts = skb->data + RTW89_PPDU_MAC_INFO_SIZE; 998 phy_sts += usr_num * RTW89_PPDU_MAC_INFO_USR_SIZE; 999 /* 8-byte alignment */ 1000 if (usr_num & BIT(0)) 1001 phy_sts += RTW89_PPDU_MAC_INFO_USR_SIZE; 1002 if (rx_cnt_valid) 1003 phy_sts += RTW89_PPDU_MAC_RX_CNT_SIZE; 1004 phy_sts += plcp_size; 1005 1006 phy_ppdu->buf = phy_sts; 1007 phy_ppdu->len = skb->data + skb->len - phy_sts; 1008 1009 return 0; 1010 } 1011 1012 static void rtw89_core_rx_process_phy_ppdu_iter(void *data, 1013 struct ieee80211_sta *sta) 1014 { 1015 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1016 struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data; 1017 1018 if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self) 1019 ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg); 1020 } 1021 1022 #define VAR_LEN 0xff 1023 #define VAR_LEN_UNIT 8 1024 static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr) 1025 { 1026 static const u8 physts_ie_len_tab[32] = { 1027 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN, 1028 VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, VAR_LEN, 16, 24, VAR_LEN, 1029 VAR_LEN, VAR_LEN, 0, 24, 24, 24, 24, 32, 32, 32, 32 1030 }; 1031 u16 ie_len; 1032 u8 ie; 1033 1034 ie = RTW89_GET_PHY_STS_IE_TYPE(addr); 1035 if (physts_ie_len_tab[ie] != VAR_LEN) 1036 ie_len = physts_ie_len_tab[ie]; 1037 else 1038 ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT; 1039 1040 return ie_len; 1041 } 1042 1043 static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr, 1044 struct rtw89_rx_phy_ppdu *phy_ppdu) 1045 { 1046 s16 cfo; 1047 1048 phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr); 1049 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) 1050 return; 1051 /* sign conversion for S(12,2) */ 1052 cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_CFO(addr), 11); 1053 rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); 1054 } 1055 1056 static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr, 1057 struct rtw89_rx_phy_ppdu *phy_ppdu) 1058 { 1059 u8 ie; 1060 1061 ie = RTW89_GET_PHY_STS_IE_TYPE(addr); 1062 switch (ie) { 1063 case RTW89_PHYSTS_IE01_CMN_OFDM: 1064 rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu); 1065 break; 1066 default: 1067 break; 1068 } 1069 1070 return 0; 1071 } 1072 1073 static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu) 1074 { 1075 s8 *rssi = phy_ppdu->rssi; 1076 u8 *buf = phy_ppdu->buf; 1077 1078 phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf); 1079 phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf); 1080 rssi[RF_PATH_A] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_A(buf)); 1081 rssi[RF_PATH_B] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_B(buf)); 1082 rssi[RF_PATH_C] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_C(buf)); 1083 rssi[RF_PATH_D] = RTW89_RSSI_RAW_TO_DBM(RTW89_GET_PHY_STS_RSSI_D(buf)); 1084 } 1085 1086 static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev, 1087 struct rtw89_rx_phy_ppdu *phy_ppdu) 1088 { 1089 if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) { 1090 rtw89_warn(rtwdev, "phy ppdu len mismatch\n"); 1091 return -EINVAL; 1092 } 1093 rtw89_core_update_phy_ppdu(phy_ppdu); 1094 ieee80211_iterate_stations_atomic(rtwdev->hw, 1095 rtw89_core_rx_process_phy_ppdu_iter, 1096 phy_ppdu); 1097 1098 return 0; 1099 } 1100 1101 static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev, 1102 struct rtw89_rx_phy_ppdu *phy_ppdu) 1103 { 1104 u16 ie_len; 1105 u8 *pos, *end; 1106 1107 /* mark invalid reports and bypass them */ 1108 if (phy_ppdu->ie < RTW89_CCK_PKT) 1109 return -EINVAL; 1110 1111 pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; 1112 end = (u8 *)phy_ppdu->buf + phy_ppdu->len; 1113 while (pos < end) { 1114 ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos); 1115 rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu); 1116 pos += ie_len; 1117 if (pos > end || ie_len == 0) { 1118 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 1119 "phy status parse failed\n"); 1120 return -EINVAL; 1121 } 1122 } 1123 1124 return 0; 1125 } 1126 1127 static void rtw89_core_rx_process_phy_sts(struct rtw89_dev *rtwdev, 1128 struct rtw89_rx_phy_ppdu *phy_ppdu) 1129 { 1130 int ret; 1131 1132 ret = rtw89_core_rx_parse_phy_sts(rtwdev, phy_ppdu); 1133 if (ret) 1134 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n"); 1135 else 1136 phy_ppdu->valid = true; 1137 } 1138 1139 static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev, 1140 const struct rtw89_rx_desc_info *desc_info, 1141 bool rx_status) 1142 { 1143 switch (desc_info->gi_ltf) { 1144 case RTW89_GILTF_SGI_4XHE08: 1145 case RTW89_GILTF_2XHE08: 1146 case RTW89_GILTF_1XHE08: 1147 return NL80211_RATE_INFO_HE_GI_0_8; 1148 case RTW89_GILTF_2XHE16: 1149 case RTW89_GILTF_1XHE16: 1150 return NL80211_RATE_INFO_HE_GI_1_6; 1151 case RTW89_GILTF_LGI_4XHE32: 1152 return NL80211_RATE_INFO_HE_GI_3_2; 1153 default: 1154 rtw89_warn(rtwdev, "invalid gi_ltf=%d", desc_info->gi_ltf); 1155 return rx_status ? NL80211_RATE_INFO_HE_GI_3_2 : U8_MAX; 1156 } 1157 } 1158 1159 static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev, 1160 struct rtw89_rx_desc_info *desc_info, 1161 struct ieee80211_rx_status *status) 1162 { 1163 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1164 u8 data_rate_mode, bw, rate_idx = MASKBYTE0, gi_ltf; 1165 u16 data_rate; 1166 bool ret; 1167 1168 data_rate = desc_info->data_rate; 1169 data_rate_mode = GET_DATA_RATE_MODE(data_rate); 1170 if (data_rate_mode == DATA_RATE_MODE_NON_HT) { 1171 rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate); 1172 /* rate_idx is still hardware value here */ 1173 } else if (data_rate_mode == DATA_RATE_MODE_HT) { 1174 rate_idx = GET_DATA_RATE_HT_IDX(data_rate); 1175 } else if (data_rate_mode == DATA_RATE_MODE_VHT) { 1176 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 1177 } else if (data_rate_mode == DATA_RATE_MODE_HE) { 1178 rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 1179 } else { 1180 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); 1181 } 1182 1183 bw = rtw89_hw_to_rate_info_bw(desc_info->bw); 1184 gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false); 1185 ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt && 1186 status->rate_idx == rate_idx && 1187 status->he_gi == gi_ltf && 1188 status->bw == bw; 1189 1190 return ret; 1191 } 1192 1193 struct rtw89_vif_rx_stats_iter_data { 1194 struct rtw89_dev *rtwdev; 1195 struct rtw89_rx_phy_ppdu *phy_ppdu; 1196 struct rtw89_rx_desc_info *desc_info; 1197 struct sk_buff *skb; 1198 const u8 *bssid; 1199 }; 1200 1201 static void rtw89_vif_rx_stats_iter(void *data, u8 *mac, 1202 struct ieee80211_vif *vif) 1203 { 1204 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1205 struct rtw89_vif_rx_stats_iter_data *iter_data = data; 1206 struct rtw89_dev *rtwdev = iter_data->rtwdev; 1207 struct rtw89_pkt_stat *pkt_stat = &rtwdev->phystat.cur_pkt_stat; 1208 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; 1209 struct sk_buff *skb = iter_data->skb; 1210 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1211 const u8 *bssid = iter_data->bssid; 1212 1213 if (!ether_addr_equal(vif->bss_conf.bssid, bssid)) 1214 return; 1215 1216 if (ieee80211_is_beacon(hdr->frame_control)) 1217 pkt_stat->beacon_nr++; 1218 1219 if (!ether_addr_equal(vif->addr, hdr->addr1)) 1220 return; 1221 1222 if (desc_info->data_rate < RTW89_HW_RATE_NR) 1223 pkt_stat->rx_rate_cnt[desc_info->data_rate]++; 1224 1225 rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, false); 1226 } 1227 1228 static void rtw89_core_rx_stats(struct rtw89_dev *rtwdev, 1229 struct rtw89_rx_phy_ppdu *phy_ppdu, 1230 struct rtw89_rx_desc_info *desc_info, 1231 struct sk_buff *skb) 1232 { 1233 struct rtw89_vif_rx_stats_iter_data iter_data; 1234 1235 rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, false); 1236 1237 iter_data.rtwdev = rtwdev; 1238 iter_data.phy_ppdu = phy_ppdu; 1239 iter_data.desc_info = desc_info; 1240 iter_data.skb = skb; 1241 iter_data.bssid = get_hdr_bssid((struct ieee80211_hdr *)skb->data); 1242 rtw89_iterate_vifs_bh(rtwdev, rtw89_vif_rx_stats_iter, &iter_data); 1243 } 1244 1245 static void rtw89_correct_cck_chan(struct rtw89_dev *rtwdev, 1246 struct ieee80211_rx_status *status) 1247 { 1248 u16 chan = rtwdev->hal.prev_primary_channel; 1249 u8 band = chan <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; 1250 1251 if (status->band != NL80211_BAND_2GHZ && 1252 status->encoding == RX_ENC_LEGACY && 1253 status->rate_idx < RTW89_HW_RATE_OFDM6) { 1254 status->freq = ieee80211_channel_to_frequency(chan, band); 1255 status->band = band; 1256 } 1257 } 1258 1259 static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status) 1260 { 1261 if (rx_status->band == NL80211_BAND_2GHZ || 1262 rx_status->encoding != RX_ENC_LEGACY) 1263 return; 1264 1265 /* Some control frames' freq(ACKs in this case) are reported wrong due 1266 * to FW notify timing, set to lowest rate to prevent overflow. 1267 */ 1268 if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) { 1269 rx_status->rate_idx = 0; 1270 return; 1271 } 1272 1273 /* No 4 CCK rates for non-2G */ 1274 rx_status->rate_idx -= 4; 1275 } 1276 1277 static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev, 1278 struct rtw89_rx_phy_ppdu *phy_ppdu, 1279 struct rtw89_rx_desc_info *desc_info, 1280 struct sk_buff *skb_ppdu, 1281 struct ieee80211_rx_status *rx_status) 1282 { 1283 rtw89_core_hw_to_sband_rate(rx_status); 1284 rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); 1285 ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); 1286 rtwdev->napi_budget_countdown--; 1287 } 1288 1289 static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev, 1290 struct rtw89_rx_phy_ppdu *phy_ppdu, 1291 struct rtw89_rx_desc_info *desc_info, 1292 struct sk_buff *skb) 1293 { 1294 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1295 int curr = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band]; 1296 struct sk_buff *skb_ppdu = NULL, *tmp; 1297 struct ieee80211_rx_status *rx_status; 1298 1299 if (curr > RTW89_MAX_PPDU_CNT) 1300 return; 1301 1302 skb_queue_walk_safe(&rtwdev->ppdu_sts.rx_queue[band], skb_ppdu, tmp) { 1303 skb_unlink(skb_ppdu, &rtwdev->ppdu_sts.rx_queue[band]); 1304 rx_status = IEEE80211_SKB_RXCB(skb_ppdu); 1305 if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status)) 1306 rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status); 1307 rtw89_correct_cck_chan(rtwdev, rx_status); 1308 rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status); 1309 } 1310 } 1311 1312 static void rtw89_core_rx_process_ppdu_sts(struct rtw89_dev *rtwdev, 1313 struct rtw89_rx_desc_info *desc_info, 1314 struct sk_buff *skb) 1315 { 1316 struct rtw89_rx_phy_ppdu phy_ppdu = {.buf = skb->data, .valid = false, 1317 .len = skb->len, 1318 .to_self = desc_info->addr1_match, 1319 .rate = desc_info->data_rate, 1320 .mac_id = desc_info->mac_id}; 1321 int ret; 1322 1323 if (desc_info->mac_info_valid) 1324 rtw89_core_rx_process_mac_ppdu(rtwdev, skb, &phy_ppdu); 1325 ret = rtw89_core_rx_process_phy_ppdu(rtwdev, &phy_ppdu); 1326 if (ret) 1327 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "process ppdu failed\n"); 1328 1329 rtw89_core_rx_process_phy_sts(rtwdev, &phy_ppdu); 1330 rtw89_core_rx_pending_skb(rtwdev, &phy_ppdu, desc_info, skb); 1331 dev_kfree_skb_any(skb); 1332 } 1333 1334 static void rtw89_core_rx_process_report(struct rtw89_dev *rtwdev, 1335 struct rtw89_rx_desc_info *desc_info, 1336 struct sk_buff *skb) 1337 { 1338 switch (desc_info->pkt_type) { 1339 case RTW89_CORE_RX_TYPE_C2H: 1340 rtw89_fw_c2h_irqsafe(rtwdev, skb); 1341 break; 1342 case RTW89_CORE_RX_TYPE_PPDU_STAT: 1343 rtw89_core_rx_process_ppdu_sts(rtwdev, desc_info, skb); 1344 break; 1345 default: 1346 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "unhandled pkt_type=%d\n", 1347 desc_info->pkt_type); 1348 dev_kfree_skb_any(skb); 1349 break; 1350 } 1351 } 1352 1353 void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev, 1354 struct rtw89_rx_desc_info *desc_info, 1355 u8 *data, u32 data_offset) 1356 { 1357 struct rtw89_rxdesc_short *rxd_s; 1358 struct rtw89_rxdesc_long *rxd_l; 1359 u8 shift_len, drv_info_len; 1360 1361 rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset); 1362 desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s); 1363 desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s); 1364 desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s); 1365 desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s); 1366 desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s); 1367 desc_info->bw = RTW89_GET_RXWD_BW(rxd_s); 1368 desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s); 1369 desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s); 1370 desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s); 1371 desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s); 1372 desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s); 1373 desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s); 1374 desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s); 1375 desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s); 1376 desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s); 1377 desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s); 1378 desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s); 1379 desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s); 1380 1381 shift_len = desc_info->shift << 1; /* 2-byte unit */ 1382 drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */ 1383 desc_info->offset = data_offset + shift_len + drv_info_len; 1384 desc_info->ready = true; 1385 1386 if (!desc_info->long_rxdesc) 1387 return; 1388 1389 rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset); 1390 desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l); 1391 desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l); 1392 desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l); 1393 desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l); 1394 desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l); 1395 desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l); 1396 } 1397 EXPORT_SYMBOL(rtw89_core_query_rxdesc); 1398 1399 struct rtw89_core_iter_rx_status { 1400 struct rtw89_dev *rtwdev; 1401 struct ieee80211_rx_status *rx_status; 1402 struct rtw89_rx_desc_info *desc_info; 1403 u8 mac_id; 1404 }; 1405 1406 static 1407 void rtw89_core_stats_sta_rx_status_iter(void *data, struct ieee80211_sta *sta) 1408 { 1409 struct rtw89_core_iter_rx_status *iter_data = 1410 (struct rtw89_core_iter_rx_status *)data; 1411 struct ieee80211_rx_status *rx_status = iter_data->rx_status; 1412 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 1413 struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; 1414 u8 mac_id = iter_data->mac_id; 1415 1416 if (mac_id != rtwsta->mac_id) 1417 return; 1418 1419 rtwsta->rx_status = *rx_status; 1420 rtwsta->rx_hw_rate = desc_info->data_rate; 1421 } 1422 1423 static void rtw89_core_stats_sta_rx_status(struct rtw89_dev *rtwdev, 1424 struct rtw89_rx_desc_info *desc_info, 1425 struct ieee80211_rx_status *rx_status) 1426 { 1427 struct rtw89_core_iter_rx_status iter_data; 1428 1429 if (!desc_info->addr1_match || !desc_info->long_rxdesc) 1430 return; 1431 1432 if (desc_info->frame_type != RTW89_RX_TYPE_DATA) 1433 return; 1434 1435 iter_data.rtwdev = rtwdev; 1436 iter_data.rx_status = rx_status; 1437 iter_data.desc_info = desc_info; 1438 iter_data.mac_id = desc_info->mac_id; 1439 ieee80211_iterate_stations_atomic(rtwdev->hw, 1440 rtw89_core_stats_sta_rx_status_iter, 1441 &iter_data); 1442 } 1443 1444 static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev, 1445 struct rtw89_rx_desc_info *desc_info, 1446 struct ieee80211_rx_status *rx_status) 1447 { 1448 struct ieee80211_hw *hw = rtwdev->hw; 1449 struct rtw89_hal *hal = &rtwdev->hal; 1450 u16 data_rate; 1451 u8 data_rate_mode; 1452 1453 /* currently using single PHY */ 1454 rx_status->freq = hw->conf.chandef.chan->center_freq; 1455 rx_status->band = hw->conf.chandef.chan->band; 1456 1457 if (rtwdev->scanning && rtwdev->fw.scan_offload) { 1458 rx_status->freq = 1459 ieee80211_channel_to_frequency(hal->current_channel, 1460 hal->current_band_type); 1461 rx_status->band = rtwdev->hal.current_band_type; 1462 } 1463 1464 if (desc_info->icv_err || desc_info->crc32_err) 1465 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 1466 1467 if (desc_info->hw_dec && 1468 !(desc_info->sw_dec || desc_info->icv_err)) 1469 rx_status->flag |= RX_FLAG_DECRYPTED; 1470 1471 rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw); 1472 1473 data_rate = desc_info->data_rate; 1474 data_rate_mode = GET_DATA_RATE_MODE(data_rate); 1475 if (data_rate_mode == DATA_RATE_MODE_NON_HT) { 1476 rx_status->encoding = RX_ENC_LEGACY; 1477 rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate); 1478 /* convert rate_idx after we get the correct band */ 1479 } else if (data_rate_mode == DATA_RATE_MODE_HT) { 1480 rx_status->encoding = RX_ENC_HT; 1481 rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate); 1482 if (desc_info->gi_ltf) 1483 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1484 } else if (data_rate_mode == DATA_RATE_MODE_VHT) { 1485 rx_status->encoding = RX_ENC_VHT; 1486 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 1487 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1; 1488 if (desc_info->gi_ltf) 1489 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1490 } else if (data_rate_mode == DATA_RATE_MODE_HE) { 1491 rx_status->encoding = RX_ENC_HE; 1492 rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate); 1493 rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1; 1494 } else { 1495 rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); 1496 } 1497 1498 /* he_gi is used to match ppdu, so we always fill it. */ 1499 rx_status->he_gi = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, true); 1500 rx_status->flag |= RX_FLAG_MACTIME_START; 1501 rx_status->mactime = desc_info->free_run_cnt; 1502 1503 rtw89_core_stats_sta_rx_status(rtwdev, desc_info, rx_status); 1504 } 1505 1506 static enum rtw89_ps_mode rtw89_update_ps_mode(struct rtw89_dev *rtwdev) 1507 { 1508 const struct rtw89_chip_info *chip = rtwdev->chip; 1509 1510 if (rtw89_disable_ps_mode || !chip->ps_mode_supported) 1511 return RTW89_PS_MODE_NONE; 1512 1513 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) 1514 return RTW89_PS_MODE_PWR_GATED; 1515 1516 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED)) 1517 return RTW89_PS_MODE_CLK_GATED; 1518 1519 if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_RFOFF)) 1520 return RTW89_PS_MODE_RFOFF; 1521 1522 return RTW89_PS_MODE_NONE; 1523 } 1524 1525 static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev, 1526 struct rtw89_rx_desc_info *desc_info) 1527 { 1528 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts; 1529 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1530 struct ieee80211_rx_status *rx_status; 1531 struct sk_buff *skb_ppdu, *tmp; 1532 1533 skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) { 1534 skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]); 1535 rx_status = IEEE80211_SKB_RXCB(skb_ppdu); 1536 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status); 1537 } 1538 } 1539 1540 void rtw89_core_rx(struct rtw89_dev *rtwdev, 1541 struct rtw89_rx_desc_info *desc_info, 1542 struct sk_buff *skb) 1543 { 1544 struct ieee80211_rx_status *rx_status; 1545 struct rtw89_ppdu_sts_info *ppdu_sts = &rtwdev->ppdu_sts; 1546 u8 ppdu_cnt = desc_info->ppdu_cnt; 1547 u8 band = desc_info->bb_sel ? RTW89_PHY_1 : RTW89_PHY_0; 1548 1549 if (desc_info->pkt_type != RTW89_CORE_RX_TYPE_WIFI) { 1550 rtw89_core_rx_process_report(rtwdev, desc_info, skb); 1551 return; 1552 } 1553 1554 if (ppdu_sts->curr_rx_ppdu_cnt[band] != ppdu_cnt) { 1555 rtw89_core_flush_ppdu_rx_queue(rtwdev, desc_info); 1556 ppdu_sts->curr_rx_ppdu_cnt[band] = ppdu_cnt; 1557 } 1558 1559 rx_status = IEEE80211_SKB_RXCB(skb); 1560 memset(rx_status, 0, sizeof(*rx_status)); 1561 rtw89_core_update_rx_status(rtwdev, desc_info, rx_status); 1562 if (desc_info->long_rxdesc && 1563 BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP) 1564 skb_queue_tail(&ppdu_sts->rx_queue[band], skb); 1565 else 1566 rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status); 1567 } 1568 EXPORT_SYMBOL(rtw89_core_rx); 1569 1570 void rtw89_core_napi_start(struct rtw89_dev *rtwdev) 1571 { 1572 if (test_and_set_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) 1573 return; 1574 1575 napi_enable(&rtwdev->napi); 1576 } 1577 EXPORT_SYMBOL(rtw89_core_napi_start); 1578 1579 void rtw89_core_napi_stop(struct rtw89_dev *rtwdev) 1580 { 1581 if (!test_and_clear_bit(RTW89_FLAG_NAPI_RUNNING, rtwdev->flags)) 1582 return; 1583 1584 napi_synchronize(&rtwdev->napi); 1585 napi_disable(&rtwdev->napi); 1586 } 1587 EXPORT_SYMBOL(rtw89_core_napi_stop); 1588 1589 void rtw89_core_napi_init(struct rtw89_dev *rtwdev) 1590 { 1591 init_dummy_netdev(&rtwdev->netdev); 1592 netif_napi_add(&rtwdev->netdev, &rtwdev->napi, 1593 rtwdev->hci.ops->napi_poll, NAPI_POLL_WEIGHT); 1594 } 1595 EXPORT_SYMBOL(rtw89_core_napi_init); 1596 1597 void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev) 1598 { 1599 rtw89_core_napi_stop(rtwdev); 1600 netif_napi_del(&rtwdev->napi); 1601 } 1602 EXPORT_SYMBOL(rtw89_core_napi_deinit); 1603 1604 static void rtw89_core_ba_work(struct work_struct *work) 1605 { 1606 struct rtw89_dev *rtwdev = 1607 container_of(work, struct rtw89_dev, ba_work); 1608 struct rtw89_txq *rtwtxq, *tmp; 1609 int ret; 1610 1611 spin_lock_bh(&rtwdev->ba_lock); 1612 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) { 1613 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1614 struct ieee80211_sta *sta = txq->sta; 1615 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 1616 u8 tid = txq->tid; 1617 1618 if (!sta) { 1619 rtw89_warn(rtwdev, "cannot start BA without sta\n"); 1620 goto skip_ba_work; 1621 } 1622 1623 if (rtwsta->disassoc) { 1624 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 1625 "cannot start BA with disassoc sta\n"); 1626 goto skip_ba_work; 1627 } 1628 1629 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 1630 if (ret) { 1631 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 1632 "failed to setup BA session for %pM:%2d: %d\n", 1633 sta->addr, tid, ret); 1634 if (ret == -EINVAL) 1635 set_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags); 1636 } 1637 skip_ba_work: 1638 list_del_init(&rtwtxq->list); 1639 } 1640 spin_unlock_bh(&rtwdev->ba_lock); 1641 } 1642 1643 static void rtw89_core_free_sta_pending_ba(struct rtw89_dev *rtwdev, 1644 struct ieee80211_sta *sta) 1645 { 1646 struct rtw89_txq *rtwtxq, *tmp; 1647 1648 spin_lock_bh(&rtwdev->ba_lock); 1649 list_for_each_entry_safe(rtwtxq, tmp, &rtwdev->ba_list, list) { 1650 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1651 1652 if (sta == txq->sta) 1653 list_del_init(&rtwtxq->list); 1654 } 1655 spin_unlock_bh(&rtwdev->ba_lock); 1656 } 1657 1658 static void rtw89_core_txq_check_agg(struct rtw89_dev *rtwdev, 1659 struct rtw89_txq *rtwtxq, 1660 struct sk_buff *skb) 1661 { 1662 struct ieee80211_hw *hw = rtwdev->hw; 1663 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1664 struct ieee80211_sta *sta = txq->sta; 1665 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 1666 1667 if (unlikely(skb_get_queue_mapping(skb) == IEEE80211_AC_VO)) 1668 return; 1669 1670 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE))) 1671 return; 1672 1673 if (unlikely(!sta)) 1674 return; 1675 1676 if (unlikely(test_bit(RTW89_TXQ_F_BLOCK_BA, &rtwtxq->flags))) 1677 return; 1678 1679 if (test_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags)) { 1680 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_CTL_AMPDU; 1681 return; 1682 } 1683 1684 spin_lock_bh(&rtwdev->ba_lock); 1685 if (!rtwsta->disassoc && list_empty(&rtwtxq->list)) { 1686 list_add_tail(&rtwtxq->list, &rtwdev->ba_list); 1687 ieee80211_queue_work(hw, &rtwdev->ba_work); 1688 } 1689 spin_unlock_bh(&rtwdev->ba_lock); 1690 } 1691 1692 static void rtw89_core_txq_push(struct rtw89_dev *rtwdev, 1693 struct rtw89_txq *rtwtxq, 1694 unsigned long frame_cnt, 1695 unsigned long byte_cnt) 1696 { 1697 struct ieee80211_txq *txq = rtw89_txq_to_txq(rtwtxq); 1698 struct ieee80211_vif *vif = txq->vif; 1699 struct ieee80211_sta *sta = txq->sta; 1700 struct sk_buff *skb; 1701 unsigned long i; 1702 int ret; 1703 1704 rcu_read_lock(); 1705 for (i = 0; i < frame_cnt; i++) { 1706 skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq); 1707 if (!skb) { 1708 rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n"); 1709 goto out; 1710 } 1711 rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb); 1712 ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL); 1713 if (ret) { 1714 rtw89_err(rtwdev, "failed to push txq: %d\n", ret); 1715 ieee80211_free_txskb(rtwdev->hw, skb); 1716 break; 1717 } 1718 } 1719 out: 1720 rcu_read_unlock(); 1721 } 1722 1723 static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid) 1724 { 1725 u8 qsel, ch_dma; 1726 1727 qsel = rtw89_core_get_qsel(rtwdev, tid); 1728 ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); 1729 1730 return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma); 1731 } 1732 1733 static bool rtw89_core_txq_agg_wait(struct rtw89_dev *rtwdev, 1734 struct ieee80211_txq *txq, 1735 unsigned long *frame_cnt, 1736 bool *sched_txq, bool *reinvoke) 1737 { 1738 struct rtw89_txq *rtwtxq = (struct rtw89_txq *)txq->drv_priv; 1739 struct ieee80211_sta *sta = txq->sta; 1740 struct rtw89_sta *rtwsta = sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 1741 1742 if (!sta || rtwsta->max_agg_wait <= 0) 1743 return false; 1744 1745 if (rtwdev->stats.tx_tfc_lv <= RTW89_TFC_MID) 1746 return false; 1747 1748 if (*frame_cnt > 1) { 1749 *frame_cnt -= 1; 1750 *sched_txq = true; 1751 *reinvoke = true; 1752 rtwtxq->wait_cnt = 1; 1753 return false; 1754 } 1755 1756 if (*frame_cnt == 1 && rtwtxq->wait_cnt < rtwsta->max_agg_wait) { 1757 *reinvoke = true; 1758 rtwtxq->wait_cnt++; 1759 return true; 1760 } 1761 1762 rtwtxq->wait_cnt = 0; 1763 return false; 1764 } 1765 1766 static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinvoke) 1767 { 1768 struct ieee80211_hw *hw = rtwdev->hw; 1769 struct ieee80211_txq *txq; 1770 struct rtw89_txq *rtwtxq; 1771 unsigned long frame_cnt; 1772 unsigned long byte_cnt; 1773 u32 tx_resource; 1774 bool sched_txq; 1775 1776 ieee80211_txq_schedule_start(hw, ac); 1777 while ((txq = ieee80211_next_txq(hw, ac))) { 1778 rtwtxq = (struct rtw89_txq *)txq->drv_priv; 1779 tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid); 1780 sched_txq = false; 1781 1782 ieee80211_txq_get_depth(txq, &frame_cnt, &byte_cnt); 1783 if (rtw89_core_txq_agg_wait(rtwdev, txq, &frame_cnt, &sched_txq, reinvoke)) { 1784 ieee80211_return_txq(hw, txq, true); 1785 continue; 1786 } 1787 frame_cnt = min_t(unsigned long, frame_cnt, tx_resource); 1788 rtw89_core_txq_push(rtwdev, rtwtxq, frame_cnt, byte_cnt); 1789 ieee80211_return_txq(hw, txq, sched_txq); 1790 if (frame_cnt != 0) 1791 rtw89_core_tx_kick_off(rtwdev, rtw89_core_get_qsel(rtwdev, txq->tid)); 1792 } 1793 ieee80211_txq_schedule_end(hw, ac); 1794 } 1795 1796 static void rtw89_ips_work(struct work_struct *work) 1797 { 1798 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, 1799 ips_work); 1800 1801 mutex_lock(&rtwdev->mutex); 1802 rtw89_enter_ips(rtwdev); 1803 mutex_unlock(&rtwdev->mutex); 1804 } 1805 1806 static void rtw89_core_txq_work(struct work_struct *w) 1807 { 1808 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work); 1809 bool reinvoke = false; 1810 u8 ac; 1811 1812 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) 1813 rtw89_core_txq_schedule(rtwdev, ac, &reinvoke); 1814 1815 if (reinvoke) { 1816 /* reinvoke to process the last frame */ 1817 mod_delayed_work(rtwdev->txq_wq, &rtwdev->txq_reinvoke_work, 1); 1818 } 1819 } 1820 1821 static void rtw89_core_txq_reinvoke_work(struct work_struct *w) 1822 { 1823 struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, 1824 txq_reinvoke_work.work); 1825 1826 queue_work(rtwdev->txq_wq, &rtwdev->txq_work); 1827 } 1828 1829 static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev, 1830 u32 throughput, u64 cnt) 1831 { 1832 if (cnt < 100) 1833 return RTW89_TFC_IDLE; 1834 if (throughput > 50) 1835 return RTW89_TFC_HIGH; 1836 if (throughput > 10) 1837 return RTW89_TFC_MID; 1838 if (throughput > 2) 1839 return RTW89_TFC_LOW; 1840 return RTW89_TFC_ULTRA_LOW; 1841 } 1842 1843 static bool rtw89_traffic_stats_calc(struct rtw89_dev *rtwdev, 1844 struct rtw89_traffic_stats *stats) 1845 { 1846 enum rtw89_tfc_lv tx_tfc_lv = stats->tx_tfc_lv; 1847 enum rtw89_tfc_lv rx_tfc_lv = stats->rx_tfc_lv; 1848 1849 stats->tx_throughput_raw = (u32)(stats->tx_unicast >> RTW89_TP_SHIFT); 1850 stats->rx_throughput_raw = (u32)(stats->rx_unicast >> RTW89_TP_SHIFT); 1851 1852 ewma_tp_add(&stats->tx_ewma_tp, stats->tx_throughput_raw); 1853 ewma_tp_add(&stats->rx_ewma_tp, stats->rx_throughput_raw); 1854 1855 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 1856 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 1857 stats->tx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->tx_throughput, 1858 stats->tx_cnt); 1859 stats->rx_tfc_lv = rtw89_get_traffic_level(rtwdev, stats->rx_throughput, 1860 stats->rx_cnt); 1861 stats->tx_avg_len = stats->tx_cnt ? 1862 DIV_ROUND_DOWN_ULL(stats->tx_unicast, stats->tx_cnt) : 0; 1863 stats->rx_avg_len = stats->rx_cnt ? 1864 DIV_ROUND_DOWN_ULL(stats->rx_unicast, stats->rx_cnt) : 0; 1865 1866 stats->tx_unicast = 0; 1867 stats->rx_unicast = 0; 1868 stats->tx_cnt = 0; 1869 stats->rx_cnt = 0; 1870 1871 if (tx_tfc_lv != stats->tx_tfc_lv || rx_tfc_lv != stats->rx_tfc_lv) 1872 return true; 1873 1874 return false; 1875 } 1876 1877 static bool rtw89_traffic_stats_track(struct rtw89_dev *rtwdev) 1878 { 1879 struct rtw89_vif *rtwvif; 1880 bool tfc_changed; 1881 1882 tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats); 1883 rtw89_for_each_rtwvif(rtwdev, rtwvif) 1884 rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats); 1885 1886 return tfc_changed; 1887 } 1888 1889 static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) 1890 { 1891 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) 1892 return; 1893 1894 if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE && 1895 rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE) 1896 rtw89_enter_lps(rtwdev, rtwvif->mac_id); 1897 } 1898 1899 static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev) 1900 { 1901 struct rtw89_vif *rtwvif; 1902 1903 rtw89_for_each_rtwvif(rtwdev, rtwvif) 1904 rtw89_vif_enter_lps(rtwdev, rtwvif); 1905 } 1906 1907 void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, 1908 struct rtw89_traffic_stats *stats) 1909 { 1910 stats->tx_unicast = 0; 1911 stats->rx_unicast = 0; 1912 stats->tx_cnt = 0; 1913 stats->rx_cnt = 0; 1914 ewma_tp_init(&stats->tx_ewma_tp); 1915 ewma_tp_init(&stats->rx_ewma_tp); 1916 } 1917 1918 static void rtw89_track_work(struct work_struct *work) 1919 { 1920 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, 1921 track_work.work); 1922 bool tfc_changed; 1923 1924 mutex_lock(&rtwdev->mutex); 1925 1926 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) 1927 goto out; 1928 1929 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, 1930 RTW89_TRACK_WORK_PERIOD); 1931 1932 tfc_changed = rtw89_traffic_stats_track(rtwdev); 1933 if (rtwdev->scanning) 1934 goto out; 1935 1936 rtw89_leave_lps(rtwdev); 1937 1938 if (tfc_changed) { 1939 rtw89_hci_recalc_int_mit(rtwdev); 1940 rtw89_btc_ntfy_wl_sta(rtwdev); 1941 } 1942 rtw89_mac_bf_monitor_track(rtwdev); 1943 rtw89_phy_stat_track(rtwdev); 1944 rtw89_phy_env_monitor_track(rtwdev); 1945 rtw89_phy_dig(rtwdev); 1946 rtw89_chip_rfk_track(rtwdev); 1947 rtw89_phy_ra_update(rtwdev); 1948 rtw89_phy_cfo_track(rtwdev); 1949 1950 if (rtwdev->lps_enabled && !rtwdev->btc.lps) 1951 rtw89_enter_lps_track(rtwdev); 1952 1953 out: 1954 mutex_unlock(&rtwdev->mutex); 1955 } 1956 1957 u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size) 1958 { 1959 unsigned long bit; 1960 1961 bit = find_first_zero_bit(addr, size); 1962 if (bit < size) 1963 set_bit(bit, addr); 1964 1965 return bit; 1966 } 1967 1968 void rtw89_core_release_bit_map(unsigned long *addr, u8 bit) 1969 { 1970 clear_bit(bit, addr); 1971 } 1972 1973 void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits) 1974 { 1975 bitmap_zero(addr, nbits); 1976 } 1977 1978 int rtw89_core_acquire_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx) 1979 { 1980 struct rtw89_ba_cam_entry *entry; 1981 u8 idx; 1982 1983 idx = rtw89_core_acquire_bit_map(rtwsta->ba_cam_map, RTW89_BA_CAM_NUM); 1984 if (idx == RTW89_BA_CAM_NUM) { 1985 /* allocate a static BA CAM to tid=0, so replace the existing 1986 * one if BA CAM is full. Hardware will process the original tid 1987 * automatically. 1988 */ 1989 if (tid != 0) 1990 return -ENOSPC; 1991 1992 idx = 0; 1993 } 1994 1995 entry = &rtwsta->ba_cam_entry[idx]; 1996 entry->tid = tid; 1997 *cam_idx = idx; 1998 1999 return 0; 2000 } 2001 2002 int rtw89_core_release_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx) 2003 { 2004 struct rtw89_ba_cam_entry *entry; 2005 int i; 2006 2007 for (i = 0; i < RTW89_BA_CAM_NUM; i++) { 2008 if (!test_bit(i, rtwsta->ba_cam_map)) 2009 continue; 2010 2011 entry = &rtwsta->ba_cam_entry[i]; 2012 if (entry->tid != tid) 2013 continue; 2014 2015 rtw89_core_release_bit_map(rtwsta->ba_cam_map, i); 2016 *cam_idx = i; 2017 return 0; 2018 } 2019 2020 return -ENOENT; 2021 } 2022 2023 #define RTW89_TYPE_MAPPING(_type) \ 2024 case NL80211_IFTYPE_ ## _type: \ 2025 rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \ 2026 break 2027 void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc) 2028 { 2029 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2030 2031 switch (vif->type) { 2032 RTW89_TYPE_MAPPING(ADHOC); 2033 RTW89_TYPE_MAPPING(STATION); 2034 RTW89_TYPE_MAPPING(AP); 2035 RTW89_TYPE_MAPPING(MONITOR); 2036 RTW89_TYPE_MAPPING(MESH_POINT); 2037 default: 2038 WARN_ON(1); 2039 break; 2040 } 2041 2042 switch (vif->type) { 2043 case NL80211_IFTYPE_AP: 2044 case NL80211_IFTYPE_MESH_POINT: 2045 rtwvif->net_type = RTW89_NET_TYPE_AP_MODE; 2046 rtwvif->self_role = RTW89_SELF_ROLE_AP; 2047 break; 2048 case NL80211_IFTYPE_ADHOC: 2049 rtwvif->net_type = RTW89_NET_TYPE_AD_HOC; 2050 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; 2051 break; 2052 case NL80211_IFTYPE_STATION: 2053 if (assoc) { 2054 rtwvif->net_type = RTW89_NET_TYPE_INFRA; 2055 rtwvif->trigger = vif->bss_conf.he_support; 2056 } else { 2057 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK; 2058 rtwvif->trigger = false; 2059 } 2060 rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; 2061 rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL; 2062 break; 2063 default: 2064 WARN_ON(1); 2065 break; 2066 } 2067 } 2068 2069 int rtw89_core_sta_add(struct rtw89_dev *rtwdev, 2070 struct ieee80211_vif *vif, 2071 struct ieee80211_sta *sta) 2072 { 2073 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2074 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 2075 int i; 2076 2077 rtwsta->rtwvif = rtwvif; 2078 rtwsta->prev_rssi = 0; 2079 2080 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 2081 rtw89_core_txq_init(rtwdev, sta->txq[i]); 2082 2083 ewma_rssi_init(&rtwsta->avg_rssi); 2084 2085 if (vif->type == NL80211_IFTYPE_STATION) { 2086 /* for station mode, assign the mac_id from itself */ 2087 rtwsta->mac_id = rtwvif->mac_id; 2088 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, 2089 BTC_ROLE_MSTS_STA_CONN_START); 2090 rtw89_chip_rfk_channel(rtwdev); 2091 } else if (vif->type == NL80211_IFTYPE_AP) { 2092 rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map, 2093 RTW89_MAX_MAC_ID_NUM); 2094 } 2095 2096 return 0; 2097 } 2098 2099 int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev, 2100 struct ieee80211_vif *vif, 2101 struct ieee80211_sta *sta) 2102 { 2103 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 2104 2105 rtwdev->total_sta_assoc--; 2106 rtwsta->disassoc = true; 2107 2108 return 0; 2109 } 2110 2111 int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, 2112 struct ieee80211_vif *vif, 2113 struct ieee80211_sta *sta) 2114 { 2115 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2116 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 2117 int ret; 2118 2119 rtw89_mac_bf_monitor_calc(rtwdev, sta, true); 2120 rtw89_mac_bf_disassoc(rtwdev, vif, sta); 2121 rtw89_core_free_sta_pending_ba(rtwdev, sta); 2122 if (vif->type == NL80211_IFTYPE_AP) 2123 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam); 2124 2125 if (vif->type == NL80211_IFTYPE_STATION) 2126 rtw89_vif_type_mapping(vif, false); 2127 2128 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); 2129 if (ret) { 2130 rtw89_warn(rtwdev, "failed to send h2c cmac table\n"); 2131 return ret; 2132 } 2133 2134 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, true); 2135 if (ret) { 2136 rtw89_warn(rtwdev, "failed to send h2c join info\n"); 2137 return ret; 2138 } 2139 2140 if (vif->type == NL80211_IFTYPE_AP) { 2141 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_REMOVE); 2142 if (ret) { 2143 rtw89_warn(rtwdev, "failed to send h2c role info\n"); 2144 return ret; 2145 } 2146 } 2147 2148 /* update cam aid mac_id net_type */ 2149 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); 2150 if (ret) { 2151 rtw89_warn(rtwdev, "failed to send h2c cam\n"); 2152 return ret; 2153 } 2154 2155 return ret; 2156 } 2157 2158 int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, 2159 struct ieee80211_vif *vif, 2160 struct ieee80211_sta *sta) 2161 { 2162 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2163 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 2164 int ret; 2165 2166 if (vif->type == NL80211_IFTYPE_AP) { 2167 ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false); 2168 if (ret) { 2169 rtw89_warn(rtwdev, "failed to send h2c macid pause\n"); 2170 return ret; 2171 } 2172 2173 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_CREATE); 2174 if (ret) { 2175 rtw89_warn(rtwdev, "failed to send h2c role info\n"); 2176 return ret; 2177 } 2178 2179 ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, &rtwvif->bssid_cam); 2180 if (ret) { 2181 rtw89_warn(rtwdev, "failed to send h2c init addr cam\n"); 2182 return ret; 2183 } 2184 } 2185 2186 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); 2187 if (ret) { 2188 rtw89_warn(rtwdev, "failed to send h2c cmac table\n"); 2189 return ret; 2190 } 2191 2192 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, false); 2193 if (ret) { 2194 rtw89_warn(rtwdev, "failed to send h2c join info\n"); 2195 return ret; 2196 } 2197 2198 /* update cam aid mac_id net_type */ 2199 rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); 2200 if (ret) { 2201 rtw89_warn(rtwdev, "failed to send h2c cam\n"); 2202 return ret; 2203 } 2204 2205 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwsta->mac_id); 2206 if (ret) { 2207 rtw89_warn(rtwdev, "failed to send h2c general packet\n"); 2208 return ret; 2209 } 2210 2211 rtwdev->total_sta_assoc++; 2212 rtw89_phy_ra_assoc(rtwdev, sta); 2213 rtw89_mac_bf_assoc(rtwdev, vif, sta); 2214 rtw89_mac_bf_monitor_calc(rtwdev, sta, false); 2215 2216 if (vif->type == NL80211_IFTYPE_STATION) { 2217 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, 2218 BTC_ROLE_MSTS_STA_CONN_END); 2219 rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); 2220 } 2221 2222 return ret; 2223 } 2224 2225 int rtw89_core_sta_remove(struct rtw89_dev *rtwdev, 2226 struct ieee80211_vif *vif, 2227 struct ieee80211_sta *sta) 2228 { 2229 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2230 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; 2231 2232 if (vif->type == NL80211_IFTYPE_STATION) 2233 rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, 2234 BTC_ROLE_MSTS_STA_DIS_CONN); 2235 else if (vif->type == NL80211_IFTYPE_AP) 2236 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id); 2237 2238 return 0; 2239 } 2240 2241 static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev, 2242 struct ieee80211_sta_ht_cap *ht_cap) 2243 { 2244 static const __le16 highest[RF_PATH_MAX] = { 2245 cpu_to_le16(150), cpu_to_le16(300), cpu_to_le16(450), cpu_to_le16(600), 2246 }; 2247 struct rtw89_hal *hal = &rtwdev->hal; 2248 u8 nss = hal->rx_nss; 2249 int i; 2250 2251 ht_cap->ht_supported = true; 2252 ht_cap->cap = 0; 2253 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 2254 IEEE80211_HT_CAP_MAX_AMSDU | 2255 IEEE80211_HT_CAP_TX_STBC | 2256 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 2257 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 2258 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 2259 IEEE80211_HT_CAP_DSSSCCK40 | 2260 IEEE80211_HT_CAP_SGI_40; 2261 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 2262 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; 2263 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2264 for (i = 0; i < nss; i++) 2265 ht_cap->mcs.rx_mask[i] = 0xFF; 2266 ht_cap->mcs.rx_mask[4] = 0x01; 2267 ht_cap->mcs.rx_highest = highest[nss - 1]; 2268 } 2269 2270 static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev, 2271 struct ieee80211_sta_vht_cap *vht_cap) 2272 { 2273 static const __le16 highest_bw80[RF_PATH_MAX] = { 2274 cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733), 2275 }; 2276 static const __le16 highest_bw160[RF_PATH_MAX] = { 2277 cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467), 2278 }; 2279 const struct rtw89_chip_info *chip = rtwdev->chip; 2280 const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80; 2281 struct rtw89_hal *hal = &rtwdev->hal; 2282 u16 tx_mcs_map = 0, rx_mcs_map = 0; 2283 u8 sts_cap = 3; 2284 int i; 2285 2286 for (i = 0; i < 8; i++) { 2287 if (i < hal->tx_nss) 2288 tx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); 2289 else 2290 tx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); 2291 if (i < hal->rx_nss) 2292 rx_mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2); 2293 else 2294 rx_mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2); 2295 } 2296 2297 vht_cap->vht_supported = true; 2298 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 2299 IEEE80211_VHT_CAP_SHORT_GI_80 | 2300 IEEE80211_VHT_CAP_RXSTBC_1 | 2301 IEEE80211_VHT_CAP_HTC_VHT | 2302 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 2303 0; 2304 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 2305 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 2306 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 2307 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 2308 vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; 2309 if (chip->support_bw160) 2310 vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ | 2311 IEEE80211_VHT_CAP_SHORT_GI_160; 2312 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map); 2313 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map); 2314 vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1]; 2315 vht_cap->vht_mcs.tx_highest = highest[hal->tx_nss - 1]; 2316 } 2317 2318 #define RTW89_SBAND_IFTYPES_NR 2 2319 2320 static void rtw89_init_he_cap(struct rtw89_dev *rtwdev, 2321 enum nl80211_band band, 2322 struct ieee80211_supported_band *sband) 2323 { 2324 const struct rtw89_chip_info *chip = rtwdev->chip; 2325 struct rtw89_hal *hal = &rtwdev->hal; 2326 struct ieee80211_sband_iftype_data *iftype_data; 2327 bool no_ng16 = (chip->chip_id == RTL8852A && hal->cv == CHIP_CBV) || 2328 (chip->chip_id == RTL8852B && hal->cv == CHIP_CAV); 2329 u16 mcs_map = 0; 2330 int i; 2331 int nss = hal->rx_nss; 2332 int idx = 0; 2333 2334 iftype_data = kcalloc(RTW89_SBAND_IFTYPES_NR, sizeof(*iftype_data), GFP_KERNEL); 2335 if (!iftype_data) 2336 return; 2337 2338 for (i = 0; i < 8; i++) { 2339 if (i < nss) 2340 mcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2); 2341 else 2342 mcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2); 2343 } 2344 2345 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 2346 struct ieee80211_sta_he_cap *he_cap; 2347 u8 *mac_cap_info; 2348 u8 *phy_cap_info; 2349 2350 switch (i) { 2351 case NL80211_IFTYPE_STATION: 2352 case NL80211_IFTYPE_AP: 2353 break; 2354 default: 2355 continue; 2356 } 2357 2358 if (idx >= RTW89_SBAND_IFTYPES_NR) { 2359 rtw89_warn(rtwdev, "run out of iftype_data\n"); 2360 break; 2361 } 2362 2363 iftype_data[idx].types_mask = BIT(i); 2364 he_cap = &iftype_data[idx].he_cap; 2365 mac_cap_info = he_cap->he_cap_elem.mac_cap_info; 2366 phy_cap_info = he_cap->he_cap_elem.phy_cap_info; 2367 2368 he_cap->has_he = true; 2369 if (i == NL80211_IFTYPE_AP) 2370 mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE; 2371 if (i == NL80211_IFTYPE_STATION) 2372 mac_cap_info[1] = IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 2373 mac_cap_info[2] = IEEE80211_HE_MAC_CAP2_ALL_ACK | 2374 IEEE80211_HE_MAC_CAP2_BSR; 2375 mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_2; 2376 if (i == NL80211_IFTYPE_AP) 2377 mac_cap_info[3] |= IEEE80211_HE_MAC_CAP3_OMI_CONTROL; 2378 mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_OPS | 2379 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 2380 if (i == NL80211_IFTYPE_STATION) 2381 mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX; 2382 if (band == NL80211_BAND_2GHZ) { 2383 phy_cap_info[0] = 2384 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 2385 } else { 2386 phy_cap_info[0] = 2387 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G; 2388 if (chip->support_bw160) 2389 phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 2390 } 2391 phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 2392 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD | 2393 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 2394 phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 2395 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 2396 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | 2397 IEEE80211_HE_PHY_CAP2_DOPPLER_TX; 2398 phy_cap_info[3] = IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_16_QAM; 2399 if (i == NL80211_IFTYPE_STATION) 2400 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_16_QAM | 2401 IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_2; 2402 if (i == NL80211_IFTYPE_AP) 2403 phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU; 2404 phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 2405 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4; 2406 phy_cap_info[5] = no_ng16 ? 0 : 2407 IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK | 2408 IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK; 2409 phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 2410 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU | 2411 IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 2412 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE; 2413 phy_cap_info[7] = IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 2414 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI | 2415 IEEE80211_HE_PHY_CAP7_MAX_NC_1; 2416 phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | 2417 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI | 2418 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996; 2419 if (chip->support_bw160) 2420 phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 2421 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU; 2422 phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 2423 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 2424 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 2425 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB | 2426 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, 2427 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); 2428 if (i == NL80211_IFTYPE_STATION) 2429 phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; 2430 he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map); 2431 he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map); 2432 if (chip->support_bw160) { 2433 he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map); 2434 he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map); 2435 } 2436 2437 if (band == NL80211_BAND_6GHZ) { 2438 __le16 capa; 2439 2440 capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE, 2441 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | 2442 le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, 2443 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | 2444 le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, 2445 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 2446 iftype_data[idx].he_6ghz_capa.capa = capa; 2447 } 2448 2449 idx++; 2450 } 2451 2452 sband->iftype_data = iftype_data; 2453 sband->n_iftype_data = idx; 2454 } 2455 2456 static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev) 2457 { 2458 struct ieee80211_hw *hw = rtwdev->hw; 2459 struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL; 2460 struct ieee80211_supported_band *sband_6ghz = NULL; 2461 u32 size = sizeof(struct ieee80211_supported_band); 2462 u8 support_bands = rtwdev->chip->support_bands; 2463 2464 if (support_bands & BIT(NL80211_BAND_2GHZ)) { 2465 sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL); 2466 if (!sband_2ghz) 2467 goto err; 2468 rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap); 2469 rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz); 2470 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz; 2471 } 2472 2473 if (support_bands & BIT(NL80211_BAND_5GHZ)) { 2474 sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL); 2475 if (!sband_5ghz) 2476 goto err; 2477 rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap); 2478 rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap); 2479 rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz); 2480 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz; 2481 } 2482 2483 if (support_bands & BIT(NL80211_BAND_6GHZ)) { 2484 sband_6ghz = kmemdup(&rtw89_sband_6ghz, size, GFP_KERNEL); 2485 if (!sband_6ghz) 2486 goto err; 2487 rtw89_init_he_cap(rtwdev, NL80211_BAND_6GHZ, sband_6ghz); 2488 hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz; 2489 } 2490 2491 return 0; 2492 2493 err: 2494 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; 2495 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; 2496 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL; 2497 if (sband_2ghz) 2498 kfree(sband_2ghz->iftype_data); 2499 if (sband_5ghz) 2500 kfree(sband_5ghz->iftype_data); 2501 if (sband_6ghz) 2502 kfree(sband_6ghz->iftype_data); 2503 kfree(sband_2ghz); 2504 kfree(sband_5ghz); 2505 kfree(sband_6ghz); 2506 return -ENOMEM; 2507 } 2508 2509 static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev) 2510 { 2511 struct ieee80211_hw *hw = rtwdev->hw; 2512 2513 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data); 2514 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data); 2515 if (hw->wiphy->bands[NL80211_BAND_6GHZ]) 2516 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data); 2517 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 2518 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 2519 kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]); 2520 hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; 2521 hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; 2522 hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL; 2523 } 2524 2525 static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev) 2526 { 2527 int i; 2528 2529 for (i = 0; i < RTW89_PHY_MAX; i++) 2530 skb_queue_head_init(&rtwdev->ppdu_sts.rx_queue[i]); 2531 for (i = 0; i < RTW89_PHY_MAX; i++) 2532 rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX; 2533 } 2534 2535 void rtw89_core_update_beacon_work(struct work_struct *work) 2536 { 2537 struct rtw89_dev *rtwdev; 2538 struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif, 2539 update_beacon_work); 2540 2541 if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE) 2542 return; 2543 2544 rtwdev = rtwvif->rtwdev; 2545 mutex_lock(&rtwdev->mutex); 2546 rtw89_fw_h2c_update_beacon(rtwdev, rtwvif); 2547 mutex_unlock(&rtwdev->mutex); 2548 } 2549 2550 int rtw89_core_start(struct rtw89_dev *rtwdev) 2551 { 2552 int ret; 2553 2554 rtwdev->mac.qta_mode = RTW89_QTA_SCC; 2555 ret = rtw89_mac_init(rtwdev); 2556 if (ret) { 2557 rtw89_err(rtwdev, "mac init fail, ret:%d\n", ret); 2558 return ret; 2559 } 2560 2561 rtw89_btc_ntfy_poweron(rtwdev); 2562 2563 /* efuse process */ 2564 2565 /* pre-config BB/RF, BB reset/RFC reset */ 2566 rtw89_mac_disable_bb_rf(rtwdev); 2567 rtw89_mac_enable_bb_rf(rtwdev); 2568 rtw89_phy_init_bb_reg(rtwdev); 2569 rtw89_phy_init_rf_reg(rtwdev); 2570 2571 rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL); 2572 2573 rtw89_phy_dm_init(rtwdev); 2574 2575 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); 2576 rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0); 2577 2578 ret = rtw89_hci_start(rtwdev); 2579 if (ret) { 2580 rtw89_err(rtwdev, "failed to start hci\n"); 2581 return ret; 2582 } 2583 2584 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, 2585 RTW89_TRACK_WORK_PERIOD); 2586 2587 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags); 2588 2589 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_ON); 2590 rtw89_fw_h2c_fw_log(rtwdev, rtwdev->fw.fw_log_enable); 2591 2592 return 0; 2593 } 2594 2595 void rtw89_core_stop(struct rtw89_dev *rtwdev) 2596 { 2597 struct rtw89_btc *btc = &rtwdev->btc; 2598 2599 /* Prvent to stop twice; enter_ips and ops_stop */ 2600 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) 2601 return; 2602 2603 rtw89_btc_ntfy_radio_state(rtwdev, BTC_RFCTRL_WL_OFF); 2604 2605 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags); 2606 2607 mutex_unlock(&rtwdev->mutex); 2608 2609 cancel_work_sync(&rtwdev->c2h_work); 2610 cancel_work_sync(&btc->eapol_notify_work); 2611 cancel_work_sync(&btc->arp_notify_work); 2612 cancel_work_sync(&btc->dhcp_notify_work); 2613 cancel_work_sync(&btc->icmp_notify_work); 2614 cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work); 2615 cancel_delayed_work_sync(&rtwdev->track_work); 2616 cancel_delayed_work_sync(&rtwdev->coex_act1_work); 2617 cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work); 2618 cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work); 2619 cancel_delayed_work_sync(&rtwdev->cfo_track_work); 2620 2621 mutex_lock(&rtwdev->mutex); 2622 2623 rtw89_btc_ntfy_poweroff(rtwdev); 2624 rtw89_hci_flush_queues(rtwdev, BIT(rtwdev->hw->queues) - 1, true); 2625 rtw89_mac_flush_txq(rtwdev, BIT(rtwdev->hw->queues) - 1, true); 2626 rtw89_hci_stop(rtwdev); 2627 rtw89_hci_deinit(rtwdev); 2628 rtw89_mac_pwr_off(rtwdev); 2629 rtw89_hci_reset(rtwdev); 2630 } 2631 2632 int rtw89_core_init(struct rtw89_dev *rtwdev) 2633 { 2634 struct rtw89_btc *btc = &rtwdev->btc; 2635 int ret; 2636 u8 band; 2637 2638 INIT_LIST_HEAD(&rtwdev->ba_list); 2639 INIT_LIST_HEAD(&rtwdev->rtwvifs_list); 2640 INIT_LIST_HEAD(&rtwdev->early_h2c_list); 2641 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 2642 if (!(rtwdev->chip->support_bands & BIT(band))) 2643 continue; 2644 INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]); 2645 } 2646 INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); 2647 INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); 2648 INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); 2649 INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work); 2650 INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work); 2651 INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work); 2652 INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work); 2653 INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work); 2654 rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); 2655 spin_lock_init(&rtwdev->ba_lock); 2656 spin_lock_init(&rtwdev->rpwm_lock); 2657 mutex_init(&rtwdev->mutex); 2658 mutex_init(&rtwdev->rf_mutex); 2659 rtwdev->total_sta_assoc = 0; 2660 2661 INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); 2662 INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); 2663 skb_queue_head_init(&rtwdev->c2h_queue); 2664 rtw89_core_ppdu_sts_init(rtwdev); 2665 rtw89_traffic_stats_init(rtwdev, &rtwdev->stats); 2666 2667 rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev); 2668 rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR; 2669 2670 INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work); 2671 INIT_WORK(&btc->arp_notify_work, rtw89_btc_ntfy_arp_packet_work); 2672 INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work); 2673 INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work); 2674 2675 ret = rtw89_load_firmware(rtwdev); 2676 if (ret) { 2677 rtw89_warn(rtwdev, "no firmware loaded\n"); 2678 return ret; 2679 } 2680 rtw89_ser_init(rtwdev); 2681 2682 return 0; 2683 } 2684 EXPORT_SYMBOL(rtw89_core_init); 2685 2686 void rtw89_core_deinit(struct rtw89_dev *rtwdev) 2687 { 2688 rtw89_ser_deinit(rtwdev); 2689 rtw89_unload_firmware(rtwdev); 2690 rtw89_fw_free_all_early_h2c(rtwdev); 2691 2692 destroy_workqueue(rtwdev->txq_wq); 2693 mutex_destroy(&rtwdev->rf_mutex); 2694 mutex_destroy(&rtwdev->mutex); 2695 } 2696 EXPORT_SYMBOL(rtw89_core_deinit); 2697 2698 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 2699 const u8 *mac_addr, bool hw_scan) 2700 { 2701 struct rtw89_hal *hal = &rtwdev->hal; 2702 2703 rtwdev->scanning = true; 2704 rtw89_leave_lps(rtwdev); 2705 if (hw_scan && rtwvif->net_type == RTW89_NET_TYPE_NO_LINK) 2706 rtw89_leave_ips(rtwdev); 2707 2708 ether_addr_copy(rtwvif->mac_addr, mac_addr); 2709 rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, hal->current_band_type); 2710 rtw89_chip_rfk_scan(rtwdev, true); 2711 rtw89_hci_recalc_int_mit(rtwdev); 2712 2713 rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr); 2714 } 2715 2716 void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, 2717 struct ieee80211_vif *vif, bool hw_scan) 2718 { 2719 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2720 2721 ether_addr_copy(rtwvif->mac_addr, vif->addr); 2722 rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL); 2723 2724 rtw89_chip_rfk_scan(rtwdev, false); 2725 rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0); 2726 2727 rtwdev->scanning = false; 2728 rtwdev->dig.bypass_dig = true; 2729 if (hw_scan && rtwvif->net_type == RTW89_NET_TYPE_NO_LINK) 2730 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); 2731 } 2732 2733 static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev) 2734 { 2735 const struct rtw89_chip_info *chip = rtwdev->chip; 2736 u8 cv; 2737 2738 cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK); 2739 if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) { 2740 if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD) 2741 cv = CHIP_CAV; 2742 else 2743 cv = CHIP_CBV; 2744 } 2745 2746 rtwdev->hal.cv = cv; 2747 } 2748 2749 static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev) 2750 { 2751 rtwdev->hal.support_cckpd = 2752 !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) && 2753 !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV); 2754 } 2755 2756 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev) 2757 { 2758 int ret; 2759 2760 ret = rtw89_mac_partial_init(rtwdev); 2761 if (ret) 2762 return ret; 2763 2764 ret = rtw89_parse_efuse_map(rtwdev); 2765 if (ret) 2766 return ret; 2767 2768 ret = rtw89_parse_phycap_map(rtwdev); 2769 if (ret) 2770 return ret; 2771 2772 ret = rtw89_mac_setup_phycap(rtwdev); 2773 if (ret) 2774 return ret; 2775 2776 rtw89_core_setup_phycap(rtwdev); 2777 2778 rtw89_mac_pwr_off(rtwdev); 2779 2780 return 0; 2781 } 2782 2783 static int rtw89_chip_board_info_setup(struct rtw89_dev *rtwdev) 2784 { 2785 rtw89_chip_fem_setup(rtwdev); 2786 2787 return 0; 2788 } 2789 2790 int rtw89_chip_info_setup(struct rtw89_dev *rtwdev) 2791 { 2792 int ret; 2793 2794 rtw89_read_chip_ver(rtwdev); 2795 2796 ret = rtw89_wait_firmware_completion(rtwdev); 2797 if (ret) { 2798 rtw89_err(rtwdev, "failed to wait firmware completion\n"); 2799 return ret; 2800 } 2801 2802 ret = rtw89_fw_recognize(rtwdev); 2803 if (ret) { 2804 rtw89_err(rtwdev, "failed to recognize firmware\n"); 2805 return ret; 2806 } 2807 2808 ret = rtw89_chip_efuse_info_setup(rtwdev); 2809 if (ret) 2810 return ret; 2811 2812 ret = rtw89_chip_board_info_setup(rtwdev); 2813 if (ret) 2814 return ret; 2815 2816 return 0; 2817 } 2818 EXPORT_SYMBOL(rtw89_chip_info_setup); 2819 2820 static int rtw89_core_register_hw(struct rtw89_dev *rtwdev) 2821 { 2822 struct ieee80211_hw *hw = rtwdev->hw; 2823 struct rtw89_efuse *efuse = &rtwdev->efuse; 2824 int ret; 2825 int tx_headroom = IEEE80211_HT_CTL_LEN; 2826 2827 hw->vif_data_size = sizeof(struct rtw89_vif); 2828 hw->sta_data_size = sizeof(struct rtw89_sta); 2829 hw->txq_data_size = sizeof(struct rtw89_txq); 2830 2831 SET_IEEE80211_PERM_ADDR(hw, efuse->addr); 2832 2833 hw->extra_tx_headroom = tx_headroom; 2834 hw->queues = IEEE80211_NUM_ACS; 2835 hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM; 2836 hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM; 2837 2838 ieee80211_hw_set(hw, SIGNAL_DBM); 2839 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 2840 ieee80211_hw_set(hw, MFP_CAPABLE); 2841 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 2842 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 2843 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 2844 ieee80211_hw_set(hw, TX_AMSDU); 2845 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 2846 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 2847 ieee80211_hw_set(hw, SUPPORTS_PS); 2848 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 2849 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 2850 2851 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 2852 BIT(NL80211_IFTYPE_AP); 2853 hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1; 2854 hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1; 2855 2856 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 2857 2858 hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID; 2859 hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN; 2860 2861 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 2862 2863 ret = rtw89_core_set_supported_band(rtwdev); 2864 if (ret) { 2865 rtw89_err(rtwdev, "failed to set supported band\n"); 2866 return ret; 2867 } 2868 2869 hw->wiphy->reg_notifier = rtw89_regd_notifier; 2870 hw->wiphy->sar_capa = &rtw89_sar_capa; 2871 2872 ret = ieee80211_register_hw(hw); 2873 if (ret) { 2874 rtw89_err(rtwdev, "failed to register hw\n"); 2875 goto err; 2876 } 2877 2878 ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier); 2879 if (ret) { 2880 rtw89_err(rtwdev, "failed to init regd\n"); 2881 goto err; 2882 } 2883 2884 return 0; 2885 2886 err: 2887 return ret; 2888 } 2889 2890 static void rtw89_core_unregister_hw(struct rtw89_dev *rtwdev) 2891 { 2892 struct ieee80211_hw *hw = rtwdev->hw; 2893 2894 ieee80211_unregister_hw(hw); 2895 rtw89_core_clr_supported_band(rtwdev); 2896 } 2897 2898 int rtw89_core_register(struct rtw89_dev *rtwdev) 2899 { 2900 int ret; 2901 2902 ret = rtw89_core_register_hw(rtwdev); 2903 if (ret) { 2904 rtw89_err(rtwdev, "failed to register core hw\n"); 2905 return ret; 2906 } 2907 2908 rtw89_debugfs_init(rtwdev); 2909 2910 return 0; 2911 } 2912 EXPORT_SYMBOL(rtw89_core_register); 2913 2914 void rtw89_core_unregister(struct rtw89_dev *rtwdev) 2915 { 2916 rtw89_core_unregister_hw(rtwdev); 2917 } 2918 EXPORT_SYMBOL(rtw89_core_unregister); 2919 2920 MODULE_AUTHOR("Realtek Corporation"); 2921 MODULE_DESCRIPTION("Realtek 802.11ax wireless core module"); 2922 MODULE_LICENSE("Dual BSD/GPL"); 2923