1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 }; 42 43 unsigned int admin_timeout = 60; 44 module_param(admin_timeout, uint, 0644); 45 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 46 EXPORT_SYMBOL_GPL(admin_timeout); 47 48 unsigned int nvme_io_timeout = 30; 49 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 50 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 51 EXPORT_SYMBOL_GPL(nvme_io_timeout); 52 53 static unsigned char shutdown_timeout = 5; 54 module_param(shutdown_timeout, byte, 0644); 55 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 56 57 static u8 nvme_max_retries = 5; 58 module_param_named(max_retries, nvme_max_retries, byte, 0644); 59 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 60 61 static unsigned long default_ps_max_latency_us = 100000; 62 module_param(default_ps_max_latency_us, ulong, 0644); 63 MODULE_PARM_DESC(default_ps_max_latency_us, 64 "max power saving latency for new devices; use PM QOS to change per device"); 65 66 static bool force_apst; 67 module_param(force_apst, bool, 0644); 68 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 69 70 static unsigned long apst_primary_timeout_ms = 100; 71 module_param(apst_primary_timeout_ms, ulong, 0644); 72 MODULE_PARM_DESC(apst_primary_timeout_ms, 73 "primary APST timeout in ms"); 74 75 static unsigned long apst_secondary_timeout_ms = 2000; 76 module_param(apst_secondary_timeout_ms, ulong, 0644); 77 MODULE_PARM_DESC(apst_secondary_timeout_ms, 78 "secondary APST timeout in ms"); 79 80 static unsigned long apst_primary_latency_tol_us = 15000; 81 module_param(apst_primary_latency_tol_us, ulong, 0644); 82 MODULE_PARM_DESC(apst_primary_latency_tol_us, 83 "primary APST latency tolerance in us"); 84 85 static unsigned long apst_secondary_latency_tol_us = 100000; 86 module_param(apst_secondary_latency_tol_us, ulong, 0644); 87 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 88 "secondary APST latency tolerance in us"); 89 90 /* 91 * nvme_wq - hosts nvme related works that are not reset or delete 92 * nvme_reset_wq - hosts nvme reset works 93 * nvme_delete_wq - hosts nvme delete works 94 * 95 * nvme_wq will host works such as scan, aen handling, fw activation, 96 * keep-alive, periodic reconnects etc. nvme_reset_wq 97 * runs reset works which also flush works hosted on nvme_wq for 98 * serialization purposes. nvme_delete_wq host controller deletion 99 * works which flush reset works for serialization. 100 */ 101 struct workqueue_struct *nvme_wq; 102 EXPORT_SYMBOL_GPL(nvme_wq); 103 104 struct workqueue_struct *nvme_reset_wq; 105 EXPORT_SYMBOL_GPL(nvme_reset_wq); 106 107 struct workqueue_struct *nvme_delete_wq; 108 EXPORT_SYMBOL_GPL(nvme_delete_wq); 109 110 static LIST_HEAD(nvme_subsystems); 111 static DEFINE_MUTEX(nvme_subsystems_lock); 112 113 static DEFINE_IDA(nvme_instance_ida); 114 static dev_t nvme_ctrl_base_chr_devt; 115 static struct class *nvme_class; 116 static struct class *nvme_subsys_class; 117 118 static DEFINE_IDA(nvme_ns_chr_minor_ida); 119 static dev_t nvme_ns_chr_devt; 120 static struct class *nvme_ns_chr_class; 121 122 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 123 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 124 unsigned nsid); 125 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 126 struct nvme_command *cmd); 127 128 void nvme_queue_scan(struct nvme_ctrl *ctrl) 129 { 130 /* 131 * Only new queue scan work when admin and IO queues are both alive 132 */ 133 if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) 134 queue_work(nvme_wq, &ctrl->scan_work); 135 } 136 137 /* 138 * Use this function to proceed with scheduling reset_work for a controller 139 * that had previously been set to the resetting state. This is intended for 140 * code paths that can't be interrupted by other reset attempts. A hot removal 141 * may prevent this from succeeding. 142 */ 143 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 144 { 145 if (ctrl->state != NVME_CTRL_RESETTING) 146 return -EBUSY; 147 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 148 return -EBUSY; 149 return 0; 150 } 151 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 152 153 static void nvme_failfast_work(struct work_struct *work) 154 { 155 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 156 struct nvme_ctrl, failfast_work); 157 158 if (ctrl->state != NVME_CTRL_CONNECTING) 159 return; 160 161 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 162 dev_info(ctrl->device, "failfast expired\n"); 163 nvme_kick_requeue_lists(ctrl); 164 } 165 166 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 167 { 168 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 169 return; 170 171 schedule_delayed_work(&ctrl->failfast_work, 172 ctrl->opts->fast_io_fail_tmo * HZ); 173 } 174 175 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 176 { 177 if (!ctrl->opts) 178 return; 179 180 cancel_delayed_work_sync(&ctrl->failfast_work); 181 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 182 } 183 184 185 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 186 { 187 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 188 return -EBUSY; 189 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 190 return -EBUSY; 191 return 0; 192 } 193 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 194 195 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 196 { 197 int ret; 198 199 ret = nvme_reset_ctrl(ctrl); 200 if (!ret) { 201 flush_work(&ctrl->reset_work); 202 if (ctrl->state != NVME_CTRL_LIVE) 203 ret = -ENETRESET; 204 } 205 206 return ret; 207 } 208 209 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 210 { 211 dev_info(ctrl->device, 212 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 213 214 flush_work(&ctrl->reset_work); 215 nvme_stop_ctrl(ctrl); 216 nvme_remove_namespaces(ctrl); 217 ctrl->ops->delete_ctrl(ctrl); 218 nvme_uninit_ctrl(ctrl); 219 } 220 221 static void nvme_delete_ctrl_work(struct work_struct *work) 222 { 223 struct nvme_ctrl *ctrl = 224 container_of(work, struct nvme_ctrl, delete_work); 225 226 nvme_do_delete_ctrl(ctrl); 227 } 228 229 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 230 { 231 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 232 return -EBUSY; 233 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 234 return -EBUSY; 235 return 0; 236 } 237 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 238 239 static void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 240 { 241 /* 242 * Keep a reference until nvme_do_delete_ctrl() complete, 243 * since ->delete_ctrl can free the controller. 244 */ 245 nvme_get_ctrl(ctrl); 246 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 247 nvme_do_delete_ctrl(ctrl); 248 nvme_put_ctrl(ctrl); 249 } 250 251 static blk_status_t nvme_error_status(u16 status) 252 { 253 switch (status & 0x7ff) { 254 case NVME_SC_SUCCESS: 255 return BLK_STS_OK; 256 case NVME_SC_CAP_EXCEEDED: 257 return BLK_STS_NOSPC; 258 case NVME_SC_LBA_RANGE: 259 case NVME_SC_CMD_INTERRUPTED: 260 case NVME_SC_NS_NOT_READY: 261 return BLK_STS_TARGET; 262 case NVME_SC_BAD_ATTRIBUTES: 263 case NVME_SC_ONCS_NOT_SUPPORTED: 264 case NVME_SC_INVALID_OPCODE: 265 case NVME_SC_INVALID_FIELD: 266 case NVME_SC_INVALID_NS: 267 return BLK_STS_NOTSUPP; 268 case NVME_SC_WRITE_FAULT: 269 case NVME_SC_READ_ERROR: 270 case NVME_SC_UNWRITTEN_BLOCK: 271 case NVME_SC_ACCESS_DENIED: 272 case NVME_SC_READ_ONLY: 273 case NVME_SC_COMPARE_FAILED: 274 return BLK_STS_MEDIUM; 275 case NVME_SC_GUARD_CHECK: 276 case NVME_SC_APPTAG_CHECK: 277 case NVME_SC_REFTAG_CHECK: 278 case NVME_SC_INVALID_PI: 279 return BLK_STS_PROTECTION; 280 case NVME_SC_RESERVATION_CONFLICT: 281 return BLK_STS_NEXUS; 282 case NVME_SC_HOST_PATH_ERROR: 283 return BLK_STS_TRANSPORT; 284 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 285 return BLK_STS_ZONE_ACTIVE_RESOURCE; 286 case NVME_SC_ZONE_TOO_MANY_OPEN: 287 return BLK_STS_ZONE_OPEN_RESOURCE; 288 default: 289 return BLK_STS_IOERR; 290 } 291 } 292 293 static void nvme_retry_req(struct request *req) 294 { 295 unsigned long delay = 0; 296 u16 crd; 297 298 /* The mask and shift result must be <= 3 */ 299 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 300 if (crd) 301 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 302 303 nvme_req(req)->retries++; 304 blk_mq_requeue_request(req, false); 305 blk_mq_delay_kick_requeue_list(req->q, delay); 306 } 307 308 static void nvme_log_error(struct request *req) 309 { 310 struct nvme_ns *ns = req->q->queuedata; 311 struct nvme_request *nr = nvme_req(req); 312 313 if (ns) { 314 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 315 ns->disk ? ns->disk->disk_name : "?", 316 nvme_get_opcode_str(nr->cmd->common.opcode), 317 nr->cmd->common.opcode, 318 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 319 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 320 nvme_get_error_status_str(nr->status), 321 nr->status >> 8 & 7, /* Status Code Type */ 322 nr->status & 0xff, /* Status Code */ 323 nr->status & NVME_SC_MORE ? "MORE " : "", 324 nr->status & NVME_SC_DNR ? "DNR " : ""); 325 return; 326 } 327 328 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 329 dev_name(nr->ctrl->device), 330 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 331 nr->cmd->common.opcode, 332 nvme_get_error_status_str(nr->status), 333 nr->status >> 8 & 7, /* Status Code Type */ 334 nr->status & 0xff, /* Status Code */ 335 nr->status & NVME_SC_MORE ? "MORE " : "", 336 nr->status & NVME_SC_DNR ? "DNR " : ""); 337 } 338 339 enum nvme_disposition { 340 COMPLETE, 341 RETRY, 342 FAILOVER, 343 AUTHENTICATE, 344 }; 345 346 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 347 { 348 if (likely(nvme_req(req)->status == 0)) 349 return COMPLETE; 350 351 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 352 return AUTHENTICATE; 353 354 if (blk_noretry_request(req) || 355 (nvme_req(req)->status & NVME_SC_DNR) || 356 nvme_req(req)->retries >= nvme_max_retries) 357 return COMPLETE; 358 359 if (req->cmd_flags & REQ_NVME_MPATH) { 360 if (nvme_is_path_error(nvme_req(req)->status) || 361 blk_queue_dying(req->q)) 362 return FAILOVER; 363 } else { 364 if (blk_queue_dying(req->q)) 365 return COMPLETE; 366 } 367 368 return RETRY; 369 } 370 371 static inline void nvme_end_req_zoned(struct request *req) 372 { 373 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 374 req_op(req) == REQ_OP_ZONE_APPEND) 375 req->__sector = nvme_lba_to_sect(req->q->queuedata, 376 le64_to_cpu(nvme_req(req)->result.u64)); 377 } 378 379 static inline void nvme_end_req(struct request *req) 380 { 381 blk_status_t status = nvme_error_status(nvme_req(req)->status); 382 383 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 384 nvme_log_error(req); 385 nvme_end_req_zoned(req); 386 nvme_trace_bio_complete(req); 387 blk_mq_end_request(req, status); 388 } 389 390 void nvme_complete_rq(struct request *req) 391 { 392 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 393 394 trace_nvme_complete_rq(req); 395 nvme_cleanup_cmd(req); 396 397 if (ctrl->kas) 398 ctrl->comp_seen = true; 399 400 switch (nvme_decide_disposition(req)) { 401 case COMPLETE: 402 nvme_end_req(req); 403 return; 404 case RETRY: 405 nvme_retry_req(req); 406 return; 407 case FAILOVER: 408 nvme_failover_req(req); 409 return; 410 case AUTHENTICATE: 411 #ifdef CONFIG_NVME_AUTH 412 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 413 nvme_retry_req(req); 414 #else 415 nvme_end_req(req); 416 #endif 417 return; 418 } 419 } 420 EXPORT_SYMBOL_GPL(nvme_complete_rq); 421 422 void nvme_complete_batch_req(struct request *req) 423 { 424 trace_nvme_complete_rq(req); 425 nvme_cleanup_cmd(req); 426 nvme_end_req_zoned(req); 427 } 428 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 429 430 /* 431 * Called to unwind from ->queue_rq on a failed command submission so that the 432 * multipathing code gets called to potentially failover to another path. 433 * The caller needs to unwind all transport specific resource allocations and 434 * must return propagate the return value. 435 */ 436 blk_status_t nvme_host_path_error(struct request *req) 437 { 438 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 439 blk_mq_set_request_complete(req); 440 nvme_complete_rq(req); 441 return BLK_STS_OK; 442 } 443 EXPORT_SYMBOL_GPL(nvme_host_path_error); 444 445 bool nvme_cancel_request(struct request *req, void *data) 446 { 447 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 448 "Cancelling I/O %d", req->tag); 449 450 /* don't abort one completed request */ 451 if (blk_mq_request_completed(req)) 452 return true; 453 454 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 455 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 456 blk_mq_complete_request(req); 457 return true; 458 } 459 EXPORT_SYMBOL_GPL(nvme_cancel_request); 460 461 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 462 { 463 if (ctrl->tagset) { 464 blk_mq_tagset_busy_iter(ctrl->tagset, 465 nvme_cancel_request, ctrl); 466 blk_mq_tagset_wait_completed_request(ctrl->tagset); 467 } 468 } 469 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 470 471 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 472 { 473 if (ctrl->admin_tagset) { 474 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 475 nvme_cancel_request, ctrl); 476 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 477 } 478 } 479 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 480 481 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 482 enum nvme_ctrl_state new_state) 483 { 484 enum nvme_ctrl_state old_state; 485 unsigned long flags; 486 bool changed = false; 487 488 spin_lock_irqsave(&ctrl->lock, flags); 489 490 old_state = ctrl->state; 491 switch (new_state) { 492 case NVME_CTRL_LIVE: 493 switch (old_state) { 494 case NVME_CTRL_NEW: 495 case NVME_CTRL_RESETTING: 496 case NVME_CTRL_CONNECTING: 497 changed = true; 498 fallthrough; 499 default: 500 break; 501 } 502 break; 503 case NVME_CTRL_RESETTING: 504 switch (old_state) { 505 case NVME_CTRL_NEW: 506 case NVME_CTRL_LIVE: 507 changed = true; 508 fallthrough; 509 default: 510 break; 511 } 512 break; 513 case NVME_CTRL_CONNECTING: 514 switch (old_state) { 515 case NVME_CTRL_NEW: 516 case NVME_CTRL_RESETTING: 517 changed = true; 518 fallthrough; 519 default: 520 break; 521 } 522 break; 523 case NVME_CTRL_DELETING: 524 switch (old_state) { 525 case NVME_CTRL_LIVE: 526 case NVME_CTRL_RESETTING: 527 case NVME_CTRL_CONNECTING: 528 changed = true; 529 fallthrough; 530 default: 531 break; 532 } 533 break; 534 case NVME_CTRL_DELETING_NOIO: 535 switch (old_state) { 536 case NVME_CTRL_DELETING: 537 case NVME_CTRL_DEAD: 538 changed = true; 539 fallthrough; 540 default: 541 break; 542 } 543 break; 544 case NVME_CTRL_DEAD: 545 switch (old_state) { 546 case NVME_CTRL_DELETING: 547 changed = true; 548 fallthrough; 549 default: 550 break; 551 } 552 break; 553 default: 554 break; 555 } 556 557 if (changed) { 558 ctrl->state = new_state; 559 wake_up_all(&ctrl->state_wq); 560 } 561 562 spin_unlock_irqrestore(&ctrl->lock, flags); 563 if (!changed) 564 return false; 565 566 if (ctrl->state == NVME_CTRL_LIVE) { 567 if (old_state == NVME_CTRL_CONNECTING) 568 nvme_stop_failfast_work(ctrl); 569 nvme_kick_requeue_lists(ctrl); 570 } else if (ctrl->state == NVME_CTRL_CONNECTING && 571 old_state == NVME_CTRL_RESETTING) { 572 nvme_start_failfast_work(ctrl); 573 } 574 return changed; 575 } 576 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 577 578 /* 579 * Returns true for sink states that can't ever transition back to live. 580 */ 581 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 582 { 583 switch (ctrl->state) { 584 case NVME_CTRL_NEW: 585 case NVME_CTRL_LIVE: 586 case NVME_CTRL_RESETTING: 587 case NVME_CTRL_CONNECTING: 588 return false; 589 case NVME_CTRL_DELETING: 590 case NVME_CTRL_DELETING_NOIO: 591 case NVME_CTRL_DEAD: 592 return true; 593 default: 594 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 595 return true; 596 } 597 } 598 599 /* 600 * Waits for the controller state to be resetting, or returns false if it is 601 * not possible to ever transition to that state. 602 */ 603 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 604 { 605 wait_event(ctrl->state_wq, 606 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 607 nvme_state_terminal(ctrl)); 608 return ctrl->state == NVME_CTRL_RESETTING; 609 } 610 EXPORT_SYMBOL_GPL(nvme_wait_reset); 611 612 static void nvme_free_ns_head(struct kref *ref) 613 { 614 struct nvme_ns_head *head = 615 container_of(ref, struct nvme_ns_head, ref); 616 617 nvme_mpath_remove_disk(head); 618 ida_free(&head->subsys->ns_ida, head->instance); 619 cleanup_srcu_struct(&head->srcu); 620 nvme_put_subsystem(head->subsys); 621 kfree(head); 622 } 623 624 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 625 { 626 return kref_get_unless_zero(&head->ref); 627 } 628 629 void nvme_put_ns_head(struct nvme_ns_head *head) 630 { 631 kref_put(&head->ref, nvme_free_ns_head); 632 } 633 634 static void nvme_free_ns(struct kref *kref) 635 { 636 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 637 638 put_disk(ns->disk); 639 nvme_put_ns_head(ns->head); 640 nvme_put_ctrl(ns->ctrl); 641 kfree(ns); 642 } 643 644 static inline bool nvme_get_ns(struct nvme_ns *ns) 645 { 646 return kref_get_unless_zero(&ns->kref); 647 } 648 649 void nvme_put_ns(struct nvme_ns *ns) 650 { 651 kref_put(&ns->kref, nvme_free_ns); 652 } 653 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 654 655 static inline void nvme_clear_nvme_request(struct request *req) 656 { 657 nvme_req(req)->status = 0; 658 nvme_req(req)->retries = 0; 659 nvme_req(req)->flags = 0; 660 req->rq_flags |= RQF_DONTPREP; 661 } 662 663 /* initialize a passthrough request */ 664 void nvme_init_request(struct request *req, struct nvme_command *cmd) 665 { 666 if (req->q->queuedata) 667 req->timeout = NVME_IO_TIMEOUT; 668 else /* no queuedata implies admin queue */ 669 req->timeout = NVME_ADMIN_TIMEOUT; 670 671 /* passthru commands should let the driver set the SGL flags */ 672 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 673 674 req->cmd_flags |= REQ_FAILFAST_DRIVER; 675 if (req->mq_hctx->type == HCTX_TYPE_POLL) 676 req->cmd_flags |= REQ_POLLED; 677 nvme_clear_nvme_request(req); 678 req->rq_flags |= RQF_QUIET; 679 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 680 } 681 EXPORT_SYMBOL_GPL(nvme_init_request); 682 683 /* 684 * For something we're not in a state to send to the device the default action 685 * is to busy it and retry it after the controller state is recovered. However, 686 * if the controller is deleting or if anything is marked for failfast or 687 * nvme multipath it is immediately failed. 688 * 689 * Note: commands used to initialize the controller will be marked for failfast. 690 * Note: nvme cli/ioctl commands are marked for failfast. 691 */ 692 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 693 struct request *rq) 694 { 695 if (ctrl->state != NVME_CTRL_DELETING_NOIO && 696 ctrl->state != NVME_CTRL_DELETING && 697 ctrl->state != NVME_CTRL_DEAD && 698 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 699 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 700 return BLK_STS_RESOURCE; 701 return nvme_host_path_error(rq); 702 } 703 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 704 705 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 706 bool queue_live) 707 { 708 struct nvme_request *req = nvme_req(rq); 709 710 /* 711 * currently we have a problem sending passthru commands 712 * on the admin_q if the controller is not LIVE because we can't 713 * make sure that they are going out after the admin connect, 714 * controller enable and/or other commands in the initialization 715 * sequence. until the controller will be LIVE, fail with 716 * BLK_STS_RESOURCE so that they will be rescheduled. 717 */ 718 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 719 return false; 720 721 if (ctrl->ops->flags & NVME_F_FABRICS) { 722 /* 723 * Only allow commands on a live queue, except for the connect 724 * command, which is require to set the queue live in the 725 * appropinquate states. 726 */ 727 switch (ctrl->state) { 728 case NVME_CTRL_CONNECTING: 729 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 730 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 731 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 732 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 733 return true; 734 break; 735 default: 736 break; 737 case NVME_CTRL_DEAD: 738 return false; 739 } 740 } 741 742 return queue_live; 743 } 744 EXPORT_SYMBOL_GPL(__nvme_check_ready); 745 746 static inline void nvme_setup_flush(struct nvme_ns *ns, 747 struct nvme_command *cmnd) 748 { 749 memset(cmnd, 0, sizeof(*cmnd)); 750 cmnd->common.opcode = nvme_cmd_flush; 751 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 752 } 753 754 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 755 struct nvme_command *cmnd) 756 { 757 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 758 struct nvme_dsm_range *range; 759 struct bio *bio; 760 761 /* 762 * Some devices do not consider the DSM 'Number of Ranges' field when 763 * determining how much data to DMA. Always allocate memory for maximum 764 * number of segments to prevent device reading beyond end of buffer. 765 */ 766 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 767 768 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 769 if (!range) { 770 /* 771 * If we fail allocation our range, fallback to the controller 772 * discard page. If that's also busy, it's safe to return 773 * busy, as we know we can make progress once that's freed. 774 */ 775 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 776 return BLK_STS_RESOURCE; 777 778 range = page_address(ns->ctrl->discard_page); 779 } 780 781 __rq_for_each_bio(bio, req) { 782 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 783 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 784 785 if (n < segments) { 786 range[n].cattr = cpu_to_le32(0); 787 range[n].nlb = cpu_to_le32(nlb); 788 range[n].slba = cpu_to_le64(slba); 789 } 790 n++; 791 } 792 793 if (WARN_ON_ONCE(n != segments)) { 794 if (virt_to_page(range) == ns->ctrl->discard_page) 795 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 796 else 797 kfree(range); 798 return BLK_STS_IOERR; 799 } 800 801 memset(cmnd, 0, sizeof(*cmnd)); 802 cmnd->dsm.opcode = nvme_cmd_dsm; 803 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 804 cmnd->dsm.nr = cpu_to_le32(segments - 1); 805 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 806 807 req->special_vec.bv_page = virt_to_page(range); 808 req->special_vec.bv_offset = offset_in_page(range); 809 req->special_vec.bv_len = alloc_size; 810 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 811 812 return BLK_STS_OK; 813 } 814 815 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 816 struct request *req) 817 { 818 u32 upper, lower; 819 u64 ref48; 820 821 /* both rw and write zeroes share the same reftag format */ 822 switch (ns->guard_type) { 823 case NVME_NVM_NS_16B_GUARD: 824 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 825 break; 826 case NVME_NVM_NS_64B_GUARD: 827 ref48 = ext_pi_ref_tag(req); 828 lower = lower_32_bits(ref48); 829 upper = upper_32_bits(ref48); 830 831 cmnd->rw.reftag = cpu_to_le32(lower); 832 cmnd->rw.cdw3 = cpu_to_le32(upper); 833 break; 834 default: 835 break; 836 } 837 } 838 839 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 840 struct request *req, struct nvme_command *cmnd) 841 { 842 memset(cmnd, 0, sizeof(*cmnd)); 843 844 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 845 return nvme_setup_discard(ns, req, cmnd); 846 847 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 848 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 849 cmnd->write_zeroes.slba = 850 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 851 cmnd->write_zeroes.length = 852 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 853 854 if (nvme_ns_has_pi(ns)) { 855 cmnd->write_zeroes.control = cpu_to_le16(NVME_RW_PRINFO_PRACT); 856 857 switch (ns->pi_type) { 858 case NVME_NS_DPS_PI_TYPE1: 859 case NVME_NS_DPS_PI_TYPE2: 860 nvme_set_ref_tag(ns, cmnd, req); 861 break; 862 } 863 } 864 865 return BLK_STS_OK; 866 } 867 868 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 869 struct request *req, struct nvme_command *cmnd, 870 enum nvme_opcode op) 871 { 872 u16 control = 0; 873 u32 dsmgmt = 0; 874 875 if (req->cmd_flags & REQ_FUA) 876 control |= NVME_RW_FUA; 877 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 878 control |= NVME_RW_LR; 879 880 if (req->cmd_flags & REQ_RAHEAD) 881 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 882 883 cmnd->rw.opcode = op; 884 cmnd->rw.flags = 0; 885 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 886 cmnd->rw.cdw2 = 0; 887 cmnd->rw.cdw3 = 0; 888 cmnd->rw.metadata = 0; 889 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 890 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 891 cmnd->rw.reftag = 0; 892 cmnd->rw.apptag = 0; 893 cmnd->rw.appmask = 0; 894 895 if (ns->ms) { 896 /* 897 * If formated with metadata, the block layer always provides a 898 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 899 * we enable the PRACT bit for protection information or set the 900 * namespace capacity to zero to prevent any I/O. 901 */ 902 if (!blk_integrity_rq(req)) { 903 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 904 return BLK_STS_NOTSUPP; 905 control |= NVME_RW_PRINFO_PRACT; 906 } 907 908 switch (ns->pi_type) { 909 case NVME_NS_DPS_PI_TYPE3: 910 control |= NVME_RW_PRINFO_PRCHK_GUARD; 911 break; 912 case NVME_NS_DPS_PI_TYPE1: 913 case NVME_NS_DPS_PI_TYPE2: 914 control |= NVME_RW_PRINFO_PRCHK_GUARD | 915 NVME_RW_PRINFO_PRCHK_REF; 916 if (op == nvme_cmd_zone_append) 917 control |= NVME_RW_APPEND_PIREMAP; 918 nvme_set_ref_tag(ns, cmnd, req); 919 break; 920 } 921 } 922 923 cmnd->rw.control = cpu_to_le16(control); 924 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 925 return 0; 926 } 927 928 void nvme_cleanup_cmd(struct request *req) 929 { 930 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 931 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 932 933 if (req->special_vec.bv_page == ctrl->discard_page) 934 clear_bit_unlock(0, &ctrl->discard_page_busy); 935 else 936 kfree(bvec_virt(&req->special_vec)); 937 } 938 } 939 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 940 941 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 942 { 943 struct nvme_command *cmd = nvme_req(req)->cmd; 944 blk_status_t ret = BLK_STS_OK; 945 946 if (!(req->rq_flags & RQF_DONTPREP)) 947 nvme_clear_nvme_request(req); 948 949 switch (req_op(req)) { 950 case REQ_OP_DRV_IN: 951 case REQ_OP_DRV_OUT: 952 /* these are setup prior to execution in nvme_init_request() */ 953 break; 954 case REQ_OP_FLUSH: 955 nvme_setup_flush(ns, cmd); 956 break; 957 case REQ_OP_ZONE_RESET_ALL: 958 case REQ_OP_ZONE_RESET: 959 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 960 break; 961 case REQ_OP_ZONE_OPEN: 962 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 963 break; 964 case REQ_OP_ZONE_CLOSE: 965 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 966 break; 967 case REQ_OP_ZONE_FINISH: 968 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 969 break; 970 case REQ_OP_WRITE_ZEROES: 971 ret = nvme_setup_write_zeroes(ns, req, cmd); 972 break; 973 case REQ_OP_DISCARD: 974 ret = nvme_setup_discard(ns, req, cmd); 975 break; 976 case REQ_OP_READ: 977 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 978 break; 979 case REQ_OP_WRITE: 980 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 981 break; 982 case REQ_OP_ZONE_APPEND: 983 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 984 break; 985 default: 986 WARN_ON_ONCE(1); 987 return BLK_STS_IOERR; 988 } 989 990 cmd->common.command_id = nvme_cid(req); 991 trace_nvme_setup_cmd(req, cmd); 992 return ret; 993 } 994 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 995 996 /* 997 * Return values: 998 * 0: success 999 * >0: nvme controller's cqe status response 1000 * <0: kernel error in lieu of controller response 1001 */ 1002 static int nvme_execute_rq(struct request *rq, bool at_head) 1003 { 1004 blk_status_t status; 1005 1006 status = blk_execute_rq(rq, at_head); 1007 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1008 return -EINTR; 1009 if (nvme_req(rq)->status) 1010 return nvme_req(rq)->status; 1011 return blk_status_to_errno(status); 1012 } 1013 1014 /* 1015 * Returns 0 on success. If the result is negative, it's a Linux error code; 1016 * if the result is positive, it's an NVM Express status code 1017 */ 1018 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1019 union nvme_result *result, void *buffer, unsigned bufflen, 1020 int qid, int at_head, blk_mq_req_flags_t flags) 1021 { 1022 struct request *req; 1023 int ret; 1024 1025 if (qid == NVME_QID_ANY) 1026 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1027 else 1028 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1029 qid - 1); 1030 1031 if (IS_ERR(req)) 1032 return PTR_ERR(req); 1033 nvme_init_request(req, cmd); 1034 1035 if (buffer && bufflen) { 1036 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1037 if (ret) 1038 goto out; 1039 } 1040 1041 ret = nvme_execute_rq(req, at_head); 1042 if (result && ret >= 0) 1043 *result = nvme_req(req)->result; 1044 out: 1045 blk_mq_free_request(req); 1046 return ret; 1047 } 1048 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1049 1050 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1051 void *buffer, unsigned bufflen) 1052 { 1053 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1054 NVME_QID_ANY, 0, 0); 1055 } 1056 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1057 1058 static u32 nvme_known_admin_effects(u8 opcode) 1059 { 1060 switch (opcode) { 1061 case nvme_admin_format_nvm: 1062 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_NCC | 1063 NVME_CMD_EFFECTS_CSE_MASK; 1064 case nvme_admin_sanitize_nvm: 1065 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK; 1066 default: 1067 break; 1068 } 1069 return 0; 1070 } 1071 1072 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1073 { 1074 u32 effects = 0; 1075 1076 if (ns) { 1077 if (ns->head->effects) 1078 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1079 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1080 dev_warn_once(ctrl->device, 1081 "IO command:%02x has unhandled effects:%08x\n", 1082 opcode, effects); 1083 return 0; 1084 } 1085 1086 if (ctrl->effects) 1087 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1088 effects |= nvme_known_admin_effects(opcode); 1089 1090 return effects; 1091 } 1092 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1093 1094 static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1095 u8 opcode) 1096 { 1097 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1098 1099 /* 1100 * For simplicity, IO to all namespaces is quiesced even if the command 1101 * effects say only one namespace is affected. 1102 */ 1103 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1104 mutex_lock(&ctrl->scan_lock); 1105 mutex_lock(&ctrl->subsys->lock); 1106 nvme_mpath_start_freeze(ctrl->subsys); 1107 nvme_mpath_wait_freeze(ctrl->subsys); 1108 nvme_start_freeze(ctrl); 1109 nvme_wait_freeze(ctrl); 1110 } 1111 return effects; 1112 } 1113 1114 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects, 1115 struct nvme_command *cmd, int status) 1116 { 1117 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1118 nvme_unfreeze(ctrl); 1119 nvme_mpath_unfreeze(ctrl->subsys); 1120 mutex_unlock(&ctrl->subsys->lock); 1121 nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); 1122 mutex_unlock(&ctrl->scan_lock); 1123 } 1124 if (effects & NVME_CMD_EFFECTS_CCC) 1125 nvme_init_ctrl_finish(ctrl); 1126 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1127 nvme_queue_scan(ctrl); 1128 flush_work(&ctrl->scan_work); 1129 } 1130 1131 switch (cmd->common.opcode) { 1132 case nvme_admin_set_features: 1133 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1134 case NVME_FEAT_KATO: 1135 /* 1136 * Keep alive commands interval on the host should be 1137 * updated when KATO is modified by Set Features 1138 * commands. 1139 */ 1140 if (!status) 1141 nvme_update_keep_alive(ctrl, cmd); 1142 break; 1143 default: 1144 break; 1145 } 1146 break; 1147 default: 1148 break; 1149 } 1150 } 1151 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1152 1153 int nvme_execute_passthru_rq(struct request *rq, u32 *effects) 1154 { 1155 struct nvme_command *cmd = nvme_req(rq)->cmd; 1156 struct nvme_ctrl *ctrl = nvme_req(rq)->ctrl; 1157 struct nvme_ns *ns = rq->q->queuedata; 1158 1159 *effects = nvme_passthru_start(ctrl, ns, cmd->common.opcode); 1160 return nvme_execute_rq(rq, false); 1161 } 1162 EXPORT_SYMBOL_NS_GPL(nvme_execute_passthru_rq, NVME_TARGET_PASSTHRU); 1163 1164 /* 1165 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1166 * 1167 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1168 * accounting for transport roundtrip times [..]. 1169 */ 1170 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1171 { 1172 queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ / 2); 1173 } 1174 1175 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1176 blk_status_t status) 1177 { 1178 struct nvme_ctrl *ctrl = rq->end_io_data; 1179 unsigned long flags; 1180 bool startka = false; 1181 1182 blk_mq_free_request(rq); 1183 1184 if (status) { 1185 dev_err(ctrl->device, 1186 "failed nvme_keep_alive_end_io error=%d\n", 1187 status); 1188 return RQ_END_IO_NONE; 1189 } 1190 1191 ctrl->comp_seen = false; 1192 spin_lock_irqsave(&ctrl->lock, flags); 1193 if (ctrl->state == NVME_CTRL_LIVE || 1194 ctrl->state == NVME_CTRL_CONNECTING) 1195 startka = true; 1196 spin_unlock_irqrestore(&ctrl->lock, flags); 1197 if (startka) 1198 nvme_queue_keep_alive_work(ctrl); 1199 return RQ_END_IO_NONE; 1200 } 1201 1202 static void nvme_keep_alive_work(struct work_struct *work) 1203 { 1204 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1205 struct nvme_ctrl, ka_work); 1206 bool comp_seen = ctrl->comp_seen; 1207 struct request *rq; 1208 1209 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1210 dev_dbg(ctrl->device, 1211 "reschedule traffic based keep-alive timer\n"); 1212 ctrl->comp_seen = false; 1213 nvme_queue_keep_alive_work(ctrl); 1214 return; 1215 } 1216 1217 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1218 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1219 if (IS_ERR(rq)) { 1220 /* allocation failure, reset the controller */ 1221 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1222 nvme_reset_ctrl(ctrl); 1223 return; 1224 } 1225 nvme_init_request(rq, &ctrl->ka_cmd); 1226 1227 rq->timeout = ctrl->kato * HZ; 1228 rq->end_io = nvme_keep_alive_end_io; 1229 rq->end_io_data = ctrl; 1230 blk_execute_rq_nowait(rq, false); 1231 } 1232 1233 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1234 { 1235 if (unlikely(ctrl->kato == 0)) 1236 return; 1237 1238 nvme_queue_keep_alive_work(ctrl); 1239 } 1240 1241 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1242 { 1243 if (unlikely(ctrl->kato == 0)) 1244 return; 1245 1246 cancel_delayed_work_sync(&ctrl->ka_work); 1247 } 1248 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1249 1250 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1251 struct nvme_command *cmd) 1252 { 1253 unsigned int new_kato = 1254 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1255 1256 dev_info(ctrl->device, 1257 "keep alive interval updated from %u ms to %u ms\n", 1258 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1259 1260 nvme_stop_keep_alive(ctrl); 1261 ctrl->kato = new_kato; 1262 nvme_start_keep_alive(ctrl); 1263 } 1264 1265 /* 1266 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1267 * flag, thus sending any new CNS opcodes has a big chance of not working. 1268 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1269 * (but not for any later version). 1270 */ 1271 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1272 { 1273 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1274 return ctrl->vs < NVME_VS(1, 2, 0); 1275 return ctrl->vs < NVME_VS(1, 1, 0); 1276 } 1277 1278 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1279 { 1280 struct nvme_command c = { }; 1281 int error; 1282 1283 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1284 c.identify.opcode = nvme_admin_identify; 1285 c.identify.cns = NVME_ID_CNS_CTRL; 1286 1287 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1288 if (!*id) 1289 return -ENOMEM; 1290 1291 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1292 sizeof(struct nvme_id_ctrl)); 1293 if (error) 1294 kfree(*id); 1295 return error; 1296 } 1297 1298 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1299 struct nvme_ns_id_desc *cur, bool *csi_seen) 1300 { 1301 const char *warn_str = "ctrl returned bogus length:"; 1302 void *data = cur; 1303 1304 switch (cur->nidt) { 1305 case NVME_NIDT_EUI64: 1306 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1307 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1308 warn_str, cur->nidl); 1309 return -1; 1310 } 1311 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1312 return NVME_NIDT_EUI64_LEN; 1313 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1314 return NVME_NIDT_EUI64_LEN; 1315 case NVME_NIDT_NGUID: 1316 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1317 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1318 warn_str, cur->nidl); 1319 return -1; 1320 } 1321 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1322 return NVME_NIDT_NGUID_LEN; 1323 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1324 return NVME_NIDT_NGUID_LEN; 1325 case NVME_NIDT_UUID: 1326 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1327 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1328 warn_str, cur->nidl); 1329 return -1; 1330 } 1331 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1332 return NVME_NIDT_UUID_LEN; 1333 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1334 return NVME_NIDT_UUID_LEN; 1335 case NVME_NIDT_CSI: 1336 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1337 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1338 warn_str, cur->nidl); 1339 return -1; 1340 } 1341 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1342 *csi_seen = true; 1343 return NVME_NIDT_CSI_LEN; 1344 default: 1345 /* Skip unknown types */ 1346 return cur->nidl; 1347 } 1348 } 1349 1350 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1351 struct nvme_ns_info *info) 1352 { 1353 struct nvme_command c = { }; 1354 bool csi_seen = false; 1355 int status, pos, len; 1356 void *data; 1357 1358 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1359 return 0; 1360 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1361 return 0; 1362 1363 c.identify.opcode = nvme_admin_identify; 1364 c.identify.nsid = cpu_to_le32(info->nsid); 1365 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1366 1367 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1368 if (!data) 1369 return -ENOMEM; 1370 1371 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1372 NVME_IDENTIFY_DATA_SIZE); 1373 if (status) { 1374 dev_warn(ctrl->device, 1375 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1376 info->nsid, status); 1377 goto free_data; 1378 } 1379 1380 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1381 struct nvme_ns_id_desc *cur = data + pos; 1382 1383 if (cur->nidl == 0) 1384 break; 1385 1386 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1387 if (len < 0) 1388 break; 1389 1390 len += sizeof(*cur); 1391 } 1392 1393 if (nvme_multi_css(ctrl) && !csi_seen) { 1394 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1395 info->nsid); 1396 status = -EINVAL; 1397 } 1398 1399 free_data: 1400 kfree(data); 1401 return status; 1402 } 1403 1404 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1405 struct nvme_id_ns **id) 1406 { 1407 struct nvme_command c = { }; 1408 int error; 1409 1410 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1411 c.identify.opcode = nvme_admin_identify; 1412 c.identify.nsid = cpu_to_le32(nsid); 1413 c.identify.cns = NVME_ID_CNS_NS; 1414 1415 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1416 if (!*id) 1417 return -ENOMEM; 1418 1419 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1420 if (error) { 1421 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1422 goto out_free_id; 1423 } 1424 1425 error = NVME_SC_INVALID_NS | NVME_SC_DNR; 1426 if ((*id)->ncap == 0) /* namespace not allocated or attached */ 1427 goto out_free_id; 1428 return 0; 1429 1430 out_free_id: 1431 kfree(*id); 1432 return error; 1433 } 1434 1435 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1436 struct nvme_ns_info *info) 1437 { 1438 struct nvme_ns_ids *ids = &info->ids; 1439 struct nvme_id_ns *id; 1440 int ret; 1441 1442 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1443 if (ret) 1444 return ret; 1445 info->anagrpid = id->anagrpid; 1446 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1447 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1448 info->is_ready = true; 1449 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1450 dev_info(ctrl->device, 1451 "Ignoring bogus Namespace Identifiers\n"); 1452 } else { 1453 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1454 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1455 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1456 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1457 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1458 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1459 } 1460 kfree(id); 1461 return 0; 1462 } 1463 1464 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1465 struct nvme_ns_info *info) 1466 { 1467 struct nvme_id_ns_cs_indep *id; 1468 struct nvme_command c = { 1469 .identify.opcode = nvme_admin_identify, 1470 .identify.nsid = cpu_to_le32(info->nsid), 1471 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1472 }; 1473 int ret; 1474 1475 id = kmalloc(sizeof(*id), GFP_KERNEL); 1476 if (!id) 1477 return -ENOMEM; 1478 1479 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1480 if (!ret) { 1481 info->anagrpid = id->anagrpid; 1482 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1483 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1484 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1485 } 1486 kfree(id); 1487 return ret; 1488 } 1489 1490 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1491 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1492 { 1493 union nvme_result res = { 0 }; 1494 struct nvme_command c = { }; 1495 int ret; 1496 1497 c.features.opcode = op; 1498 c.features.fid = cpu_to_le32(fid); 1499 c.features.dword11 = cpu_to_le32(dword11); 1500 1501 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1502 buffer, buflen, NVME_QID_ANY, 0, 0); 1503 if (ret >= 0 && result) 1504 *result = le32_to_cpu(res.u32); 1505 return ret; 1506 } 1507 1508 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1509 unsigned int dword11, void *buffer, size_t buflen, 1510 u32 *result) 1511 { 1512 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1513 buflen, result); 1514 } 1515 EXPORT_SYMBOL_GPL(nvme_set_features); 1516 1517 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1518 unsigned int dword11, void *buffer, size_t buflen, 1519 u32 *result) 1520 { 1521 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1522 buflen, result); 1523 } 1524 EXPORT_SYMBOL_GPL(nvme_get_features); 1525 1526 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1527 { 1528 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1529 u32 result; 1530 int status, nr_io_queues; 1531 1532 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1533 &result); 1534 if (status < 0) 1535 return status; 1536 1537 /* 1538 * Degraded controllers might return an error when setting the queue 1539 * count. We still want to be able to bring them online and offer 1540 * access to the admin queue, as that might be only way to fix them up. 1541 */ 1542 if (status > 0) { 1543 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1544 *count = 0; 1545 } else { 1546 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1547 *count = min(*count, nr_io_queues); 1548 } 1549 1550 return 0; 1551 } 1552 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1553 1554 #define NVME_AEN_SUPPORTED \ 1555 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1556 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1557 1558 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1559 { 1560 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1561 int status; 1562 1563 if (!supported_aens) 1564 return; 1565 1566 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1567 NULL, 0, &result); 1568 if (status) 1569 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1570 supported_aens); 1571 1572 queue_work(nvme_wq, &ctrl->async_event_work); 1573 } 1574 1575 static int nvme_ns_open(struct nvme_ns *ns) 1576 { 1577 1578 /* should never be called due to GENHD_FL_HIDDEN */ 1579 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1580 goto fail; 1581 if (!nvme_get_ns(ns)) 1582 goto fail; 1583 if (!try_module_get(ns->ctrl->ops->module)) 1584 goto fail_put_ns; 1585 1586 return 0; 1587 1588 fail_put_ns: 1589 nvme_put_ns(ns); 1590 fail: 1591 return -ENXIO; 1592 } 1593 1594 static void nvme_ns_release(struct nvme_ns *ns) 1595 { 1596 1597 module_put(ns->ctrl->ops->module); 1598 nvme_put_ns(ns); 1599 } 1600 1601 static int nvme_open(struct block_device *bdev, fmode_t mode) 1602 { 1603 return nvme_ns_open(bdev->bd_disk->private_data); 1604 } 1605 1606 static void nvme_release(struct gendisk *disk, fmode_t mode) 1607 { 1608 nvme_ns_release(disk->private_data); 1609 } 1610 1611 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1612 { 1613 /* some standard values */ 1614 geo->heads = 1 << 6; 1615 geo->sectors = 1 << 5; 1616 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1617 return 0; 1618 } 1619 1620 #ifdef CONFIG_BLK_DEV_INTEGRITY 1621 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1622 u32 max_integrity_segments) 1623 { 1624 struct blk_integrity integrity = { }; 1625 1626 switch (ns->pi_type) { 1627 case NVME_NS_DPS_PI_TYPE3: 1628 switch (ns->guard_type) { 1629 case NVME_NVM_NS_16B_GUARD: 1630 integrity.profile = &t10_pi_type3_crc; 1631 integrity.tag_size = sizeof(u16) + sizeof(u32); 1632 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1633 break; 1634 case NVME_NVM_NS_64B_GUARD: 1635 integrity.profile = &ext_pi_type3_crc64; 1636 integrity.tag_size = sizeof(u16) + 6; 1637 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1638 break; 1639 default: 1640 integrity.profile = NULL; 1641 break; 1642 } 1643 break; 1644 case NVME_NS_DPS_PI_TYPE1: 1645 case NVME_NS_DPS_PI_TYPE2: 1646 switch (ns->guard_type) { 1647 case NVME_NVM_NS_16B_GUARD: 1648 integrity.profile = &t10_pi_type1_crc; 1649 integrity.tag_size = sizeof(u16); 1650 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1651 break; 1652 case NVME_NVM_NS_64B_GUARD: 1653 integrity.profile = &ext_pi_type1_crc64; 1654 integrity.tag_size = sizeof(u16); 1655 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1656 break; 1657 default: 1658 integrity.profile = NULL; 1659 break; 1660 } 1661 break; 1662 default: 1663 integrity.profile = NULL; 1664 break; 1665 } 1666 1667 integrity.tuple_size = ns->ms; 1668 blk_integrity_register(disk, &integrity); 1669 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1670 } 1671 #else 1672 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1673 u32 max_integrity_segments) 1674 { 1675 } 1676 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1677 1678 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1679 { 1680 struct nvme_ctrl *ctrl = ns->ctrl; 1681 struct request_queue *queue = disk->queue; 1682 u32 size = queue_logical_block_size(queue); 1683 1684 if (ctrl->max_discard_sectors == 0) { 1685 blk_queue_max_discard_sectors(queue, 0); 1686 return; 1687 } 1688 1689 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1690 NVME_DSM_MAX_RANGES); 1691 1692 queue->limits.discard_granularity = size; 1693 1694 /* If discard is already enabled, don't reset queue limits */ 1695 if (queue->limits.max_discard_sectors) 1696 return; 1697 1698 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1699 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1700 1701 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1702 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1703 1704 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1705 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1706 } 1707 1708 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1709 { 1710 return uuid_equal(&a->uuid, &b->uuid) && 1711 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1712 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1713 a->csi == b->csi; 1714 } 1715 1716 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1717 { 1718 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1719 unsigned lbaf = nvme_lbaf_index(id->flbas); 1720 struct nvme_ctrl *ctrl = ns->ctrl; 1721 struct nvme_command c = { }; 1722 struct nvme_id_ns_nvm *nvm; 1723 int ret = 0; 1724 u32 elbaf; 1725 1726 ns->pi_size = 0; 1727 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1728 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1729 ns->pi_size = sizeof(struct t10_pi_tuple); 1730 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1731 goto set_pi; 1732 } 1733 1734 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1735 if (!nvm) 1736 return -ENOMEM; 1737 1738 c.identify.opcode = nvme_admin_identify; 1739 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1740 c.identify.cns = NVME_ID_CNS_CS_NS; 1741 c.identify.csi = NVME_CSI_NVM; 1742 1743 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1744 if (ret) 1745 goto free_data; 1746 1747 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1748 1749 /* no support for storage tag formats right now */ 1750 if (nvme_elbaf_sts(elbaf)) 1751 goto free_data; 1752 1753 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1754 switch (ns->guard_type) { 1755 case NVME_NVM_NS_64B_GUARD: 1756 ns->pi_size = sizeof(struct crc64_pi_tuple); 1757 break; 1758 case NVME_NVM_NS_16B_GUARD: 1759 ns->pi_size = sizeof(struct t10_pi_tuple); 1760 break; 1761 default: 1762 break; 1763 } 1764 1765 free_data: 1766 kfree(nvm); 1767 set_pi: 1768 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1769 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1770 else 1771 ns->pi_type = 0; 1772 1773 return ret; 1774 } 1775 1776 static void nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1777 { 1778 struct nvme_ctrl *ctrl = ns->ctrl; 1779 1780 if (nvme_init_ms(ns, id)) 1781 return; 1782 1783 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1784 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1785 return; 1786 1787 if (ctrl->ops->flags & NVME_F_FABRICS) { 1788 /* 1789 * The NVMe over Fabrics specification only supports metadata as 1790 * part of the extended data LBA. We rely on HCA/HBA support to 1791 * remap the separate metadata buffer from the block layer. 1792 */ 1793 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1794 return; 1795 1796 ns->features |= NVME_NS_EXT_LBAS; 1797 1798 /* 1799 * The current fabrics transport drivers support namespace 1800 * metadata formats only if nvme_ns_has_pi() returns true. 1801 * Suppress support for all other formats so the namespace will 1802 * have a 0 capacity and not be usable through the block stack. 1803 * 1804 * Note, this check will need to be modified if any drivers 1805 * gain the ability to use other metadata formats. 1806 */ 1807 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1808 ns->features |= NVME_NS_METADATA_SUPPORTED; 1809 } else { 1810 /* 1811 * For PCIe controllers, we can't easily remap the separate 1812 * metadata buffer from the block layer and thus require a 1813 * separate metadata buffer for block layer metadata/PI support. 1814 * We allow extended LBAs for the passthrough interface, though. 1815 */ 1816 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1817 ns->features |= NVME_NS_EXT_LBAS; 1818 else 1819 ns->features |= NVME_NS_METADATA_SUPPORTED; 1820 } 1821 } 1822 1823 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1824 struct request_queue *q) 1825 { 1826 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1827 1828 if (ctrl->max_hw_sectors) { 1829 u32 max_segments = 1830 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1831 1832 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1833 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1834 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1835 } 1836 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1837 blk_queue_dma_alignment(q, 3); 1838 blk_queue_write_cache(q, vwc, vwc); 1839 } 1840 1841 static void nvme_update_disk_info(struct gendisk *disk, 1842 struct nvme_ns *ns, struct nvme_id_ns *id) 1843 { 1844 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1845 unsigned short bs = 1 << ns->lba_shift; 1846 u32 atomic_bs, phys_bs, io_opt = 0; 1847 1848 /* 1849 * The block layer can't support LBA sizes larger than the page size 1850 * yet, so catch this early and don't allow block I/O. 1851 */ 1852 if (ns->lba_shift > PAGE_SHIFT) { 1853 capacity = 0; 1854 bs = (1 << 9); 1855 } 1856 1857 blk_integrity_unregister(disk); 1858 1859 atomic_bs = phys_bs = bs; 1860 if (id->nabo == 0) { 1861 /* 1862 * Bit 1 indicates whether NAWUPF is defined for this namespace 1863 * and whether it should be used instead of AWUPF. If NAWUPF == 1864 * 0 then AWUPF must be used instead. 1865 */ 1866 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1867 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1868 else 1869 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1870 } 1871 1872 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1873 /* NPWG = Namespace Preferred Write Granularity */ 1874 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1875 /* NOWS = Namespace Optimal Write Size */ 1876 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1877 } 1878 1879 blk_queue_logical_block_size(disk->queue, bs); 1880 /* 1881 * Linux filesystems assume writing a single physical block is 1882 * an atomic operation. Hence limit the physical block size to the 1883 * value of the Atomic Write Unit Power Fail parameter. 1884 */ 1885 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1886 blk_queue_io_min(disk->queue, phys_bs); 1887 blk_queue_io_opt(disk->queue, io_opt); 1888 1889 /* 1890 * Register a metadata profile for PI, or the plain non-integrity NVMe 1891 * metadata masquerading as Type 0 if supported, otherwise reject block 1892 * I/O to namespaces with metadata except when the namespace supports 1893 * PI, as it can strip/insert in that case. 1894 */ 1895 if (ns->ms) { 1896 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1897 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1898 nvme_init_integrity(disk, ns, 1899 ns->ctrl->max_integrity_segments); 1900 else if (!nvme_ns_has_pi(ns)) 1901 capacity = 0; 1902 } 1903 1904 set_capacity_and_notify(disk, capacity); 1905 1906 nvme_config_discard(disk, ns); 1907 blk_queue_max_write_zeroes_sectors(disk->queue, 1908 ns->ctrl->max_zeroes_sectors); 1909 } 1910 1911 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1912 { 1913 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1914 } 1915 1916 static inline bool nvme_first_scan(struct gendisk *disk) 1917 { 1918 /* nvme_alloc_ns() scans the disk prior to adding it */ 1919 return !disk_live(disk); 1920 } 1921 1922 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1923 { 1924 struct nvme_ctrl *ctrl = ns->ctrl; 1925 u32 iob; 1926 1927 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1928 is_power_of_2(ctrl->max_hw_sectors)) 1929 iob = ctrl->max_hw_sectors; 1930 else 1931 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1932 1933 if (!iob) 1934 return; 1935 1936 if (!is_power_of_2(iob)) { 1937 if (nvme_first_scan(ns->disk)) 1938 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1939 ns->disk->disk_name, iob); 1940 return; 1941 } 1942 1943 if (blk_queue_is_zoned(ns->disk->queue)) { 1944 if (nvme_first_scan(ns->disk)) 1945 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1946 ns->disk->disk_name); 1947 return; 1948 } 1949 1950 blk_queue_chunk_sectors(ns->queue, iob); 1951 } 1952 1953 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1954 struct nvme_ns_info *info) 1955 { 1956 blk_mq_freeze_queue(ns->disk->queue); 1957 nvme_set_queue_limits(ns->ctrl, ns->queue); 1958 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 1959 blk_mq_unfreeze_queue(ns->disk->queue); 1960 1961 if (nvme_ns_head_multipath(ns->head)) { 1962 blk_mq_freeze_queue(ns->head->disk->queue); 1963 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 1964 nvme_mpath_revalidate_paths(ns); 1965 blk_stack_limits(&ns->head->disk->queue->limits, 1966 &ns->queue->limits, 0); 1967 ns->head->disk->flags |= GENHD_FL_HIDDEN; 1968 blk_mq_unfreeze_queue(ns->head->disk->queue); 1969 } 1970 1971 /* Hide the block-interface for these devices */ 1972 ns->disk->flags |= GENHD_FL_HIDDEN; 1973 set_bit(NVME_NS_READY, &ns->flags); 1974 1975 return 0; 1976 } 1977 1978 static int nvme_update_ns_info_block(struct nvme_ns *ns, 1979 struct nvme_ns_info *info) 1980 { 1981 struct nvme_id_ns *id; 1982 unsigned lbaf; 1983 int ret; 1984 1985 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 1986 if (ret) 1987 return ret; 1988 1989 blk_mq_freeze_queue(ns->disk->queue); 1990 lbaf = nvme_lbaf_index(id->flbas); 1991 ns->lba_shift = id->lbaf[lbaf].ds; 1992 nvme_set_queue_limits(ns->ctrl, ns->queue); 1993 1994 nvme_configure_metadata(ns, id); 1995 nvme_set_chunk_sectors(ns, id); 1996 nvme_update_disk_info(ns->disk, ns, id); 1997 1998 if (ns->head->ids.csi == NVME_CSI_ZNS) { 1999 ret = nvme_update_zone_info(ns, lbaf); 2000 if (ret) { 2001 blk_mq_unfreeze_queue(ns->disk->queue); 2002 goto out; 2003 } 2004 } 2005 2006 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2007 set_bit(NVME_NS_READY, &ns->flags); 2008 blk_mq_unfreeze_queue(ns->disk->queue); 2009 2010 if (blk_queue_is_zoned(ns->queue)) { 2011 ret = nvme_revalidate_zones(ns); 2012 if (ret && !nvme_first_scan(ns->disk)) 2013 goto out; 2014 } 2015 2016 if (nvme_ns_head_multipath(ns->head)) { 2017 blk_mq_freeze_queue(ns->head->disk->queue); 2018 nvme_update_disk_info(ns->head->disk, ns, id); 2019 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2020 nvme_mpath_revalidate_paths(ns); 2021 blk_stack_limits(&ns->head->disk->queue->limits, 2022 &ns->queue->limits, 0); 2023 disk_update_readahead(ns->head->disk); 2024 blk_mq_unfreeze_queue(ns->head->disk->queue); 2025 } 2026 2027 ret = 0; 2028 out: 2029 /* 2030 * If probing fails due an unsupported feature, hide the block device, 2031 * but still allow other access. 2032 */ 2033 if (ret == -ENODEV) { 2034 ns->disk->flags |= GENHD_FL_HIDDEN; 2035 set_bit(NVME_NS_READY, &ns->flags); 2036 ret = 0; 2037 } 2038 kfree(id); 2039 return ret; 2040 } 2041 2042 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2043 { 2044 switch (info->ids.csi) { 2045 case NVME_CSI_ZNS: 2046 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2047 dev_info(ns->ctrl->device, 2048 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2049 info->nsid); 2050 return nvme_update_ns_info_generic(ns, info); 2051 } 2052 return nvme_update_ns_info_block(ns, info); 2053 case NVME_CSI_NVM: 2054 return nvme_update_ns_info_block(ns, info); 2055 default: 2056 dev_info(ns->ctrl->device, 2057 "block device for nsid %u not supported (csi %u)\n", 2058 info->nsid, info->ids.csi); 2059 return nvme_update_ns_info_generic(ns, info); 2060 } 2061 } 2062 2063 static char nvme_pr_type(enum pr_type type) 2064 { 2065 switch (type) { 2066 case PR_WRITE_EXCLUSIVE: 2067 return 1; 2068 case PR_EXCLUSIVE_ACCESS: 2069 return 2; 2070 case PR_WRITE_EXCLUSIVE_REG_ONLY: 2071 return 3; 2072 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 2073 return 4; 2074 case PR_WRITE_EXCLUSIVE_ALL_REGS: 2075 return 5; 2076 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 2077 return 6; 2078 default: 2079 return 0; 2080 } 2081 } 2082 2083 static int nvme_send_ns_head_pr_command(struct block_device *bdev, 2084 struct nvme_command *c, u8 data[16]) 2085 { 2086 struct nvme_ns_head *head = bdev->bd_disk->private_data; 2087 int srcu_idx = srcu_read_lock(&head->srcu); 2088 struct nvme_ns *ns = nvme_find_path(head); 2089 int ret = -EWOULDBLOCK; 2090 2091 if (ns) { 2092 c->common.nsid = cpu_to_le32(ns->head->ns_id); 2093 ret = nvme_submit_sync_cmd(ns->queue, c, data, 16); 2094 } 2095 srcu_read_unlock(&head->srcu, srcu_idx); 2096 return ret; 2097 } 2098 2099 static int nvme_send_ns_pr_command(struct nvme_ns *ns, struct nvme_command *c, 2100 u8 data[16]) 2101 { 2102 c->common.nsid = cpu_to_le32(ns->head->ns_id); 2103 return nvme_submit_sync_cmd(ns->queue, c, data, 16); 2104 } 2105 2106 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 2107 u64 key, u64 sa_key, u8 op) 2108 { 2109 struct nvme_command c = { }; 2110 u8 data[16] = { 0, }; 2111 2112 put_unaligned_le64(key, &data[0]); 2113 put_unaligned_le64(sa_key, &data[8]); 2114 2115 c.common.opcode = op; 2116 c.common.cdw10 = cpu_to_le32(cdw10); 2117 2118 if (IS_ENABLED(CONFIG_NVME_MULTIPATH) && 2119 bdev->bd_disk->fops == &nvme_ns_head_ops) 2120 return nvme_send_ns_head_pr_command(bdev, &c, data); 2121 return nvme_send_ns_pr_command(bdev->bd_disk->private_data, &c, data); 2122 } 2123 2124 static int nvme_pr_register(struct block_device *bdev, u64 old, 2125 u64 new, unsigned flags) 2126 { 2127 u32 cdw10; 2128 2129 if (flags & ~PR_FL_IGNORE_KEY) 2130 return -EOPNOTSUPP; 2131 2132 cdw10 = old ? 2 : 0; 2133 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 2134 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 2135 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 2136 } 2137 2138 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 2139 enum pr_type type, unsigned flags) 2140 { 2141 u32 cdw10; 2142 2143 if (flags & ~PR_FL_IGNORE_KEY) 2144 return -EOPNOTSUPP; 2145 2146 cdw10 = nvme_pr_type(type) << 8; 2147 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 2148 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 2149 } 2150 2151 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 2152 enum pr_type type, bool abort) 2153 { 2154 u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1); 2155 2156 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 2157 } 2158 2159 static int nvme_pr_clear(struct block_device *bdev, u64 key) 2160 { 2161 u32 cdw10 = 1 | (key ? 0 : 1 << 3); 2162 2163 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 2164 } 2165 2166 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 2167 { 2168 u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 0 : 1 << 3); 2169 2170 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 2171 } 2172 2173 const struct pr_ops nvme_pr_ops = { 2174 .pr_register = nvme_pr_register, 2175 .pr_reserve = nvme_pr_reserve, 2176 .pr_release = nvme_pr_release, 2177 .pr_preempt = nvme_pr_preempt, 2178 .pr_clear = nvme_pr_clear, 2179 }; 2180 2181 #ifdef CONFIG_BLK_SED_OPAL 2182 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2183 bool send) 2184 { 2185 struct nvme_ctrl *ctrl = data; 2186 struct nvme_command cmd = { }; 2187 2188 if (send) 2189 cmd.common.opcode = nvme_admin_security_send; 2190 else 2191 cmd.common.opcode = nvme_admin_security_recv; 2192 cmd.common.nsid = 0; 2193 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2194 cmd.common.cdw11 = cpu_to_le32(len); 2195 2196 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2197 NVME_QID_ANY, 1, 0); 2198 } 2199 EXPORT_SYMBOL_GPL(nvme_sec_submit); 2200 #endif /* CONFIG_BLK_SED_OPAL */ 2201 2202 #ifdef CONFIG_BLK_DEV_ZONED 2203 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2204 unsigned int nr_zones, report_zones_cb cb, void *data) 2205 { 2206 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2207 data); 2208 } 2209 #else 2210 #define nvme_report_zones NULL 2211 #endif /* CONFIG_BLK_DEV_ZONED */ 2212 2213 static const struct block_device_operations nvme_bdev_ops = { 2214 .owner = THIS_MODULE, 2215 .ioctl = nvme_ioctl, 2216 .compat_ioctl = blkdev_compat_ptr_ioctl, 2217 .open = nvme_open, 2218 .release = nvme_release, 2219 .getgeo = nvme_getgeo, 2220 .report_zones = nvme_report_zones, 2221 .pr_ops = &nvme_pr_ops, 2222 }; 2223 2224 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 timeout, bool enabled) 2225 { 2226 unsigned long timeout_jiffies = ((timeout + 1) * HZ / 2) + jiffies; 2227 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; 2228 int ret; 2229 2230 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2231 if (csts == ~0) 2232 return -ENODEV; 2233 if ((csts & NVME_CSTS_RDY) == bit) 2234 break; 2235 2236 usleep_range(1000, 2000); 2237 if (fatal_signal_pending(current)) 2238 return -EINTR; 2239 if (time_after(jiffies, timeout_jiffies)) { 2240 dev_err(ctrl->device, 2241 "Device not ready; aborting %s, CSTS=0x%x\n", 2242 enabled ? "initialisation" : "reset", csts); 2243 return -ENODEV; 2244 } 2245 } 2246 2247 return ret; 2248 } 2249 2250 /* 2251 * If the device has been passed off to us in an enabled state, just clear 2252 * the enabled bit. The spec says we should set the 'shutdown notification 2253 * bits', but doing so may cause the device to complete commands to the 2254 * admin queue ... and we don't know what memory that might be pointing at! 2255 */ 2256 int nvme_disable_ctrl(struct nvme_ctrl *ctrl) 2257 { 2258 int ret; 2259 2260 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2261 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2262 2263 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2264 if (ret) 2265 return ret; 2266 2267 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2268 msleep(NVME_QUIRK_DELAY_AMOUNT); 2269 2270 return nvme_wait_ready(ctrl, NVME_CAP_TIMEOUT(ctrl->cap), false); 2271 } 2272 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2273 2274 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2275 { 2276 unsigned dev_page_min; 2277 u32 timeout; 2278 int ret; 2279 2280 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2281 if (ret) { 2282 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2283 return ret; 2284 } 2285 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2286 2287 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2288 dev_err(ctrl->device, 2289 "Minimum device page size %u too large for host (%u)\n", 2290 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2291 return -ENODEV; 2292 } 2293 2294 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2295 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2296 else 2297 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2298 2299 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2300 u32 crto; 2301 2302 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2303 if (ret) { 2304 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2305 ret); 2306 return ret; 2307 } 2308 2309 if (ctrl->cap & NVME_CAP_CRMS_CRIMS) { 2310 ctrl->ctrl_config |= NVME_CC_CRIME; 2311 timeout = NVME_CRTO_CRIMT(crto); 2312 } else { 2313 timeout = NVME_CRTO_CRWMT(crto); 2314 } 2315 } else { 2316 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2317 } 2318 2319 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2320 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2321 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2322 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2323 if (ret) 2324 return ret; 2325 2326 /* Flush write to device (required if transport is PCI) */ 2327 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2328 if (ret) 2329 return ret; 2330 2331 ctrl->ctrl_config |= NVME_CC_ENABLE; 2332 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2333 if (ret) 2334 return ret; 2335 return nvme_wait_ready(ctrl, timeout, true); 2336 } 2337 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2338 2339 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 2340 { 2341 unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ); 2342 u32 csts; 2343 int ret; 2344 2345 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2346 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2347 2348 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2349 if (ret) 2350 return ret; 2351 2352 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2353 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) 2354 break; 2355 2356 msleep(100); 2357 if (fatal_signal_pending(current)) 2358 return -EINTR; 2359 if (time_after(jiffies, timeout)) { 2360 dev_err(ctrl->device, 2361 "Device shutdown incomplete; abort shutdown\n"); 2362 return -ENODEV; 2363 } 2364 } 2365 2366 return ret; 2367 } 2368 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); 2369 2370 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2371 { 2372 __le64 ts; 2373 int ret; 2374 2375 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2376 return 0; 2377 2378 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2379 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2380 NULL); 2381 if (ret) 2382 dev_warn_once(ctrl->device, 2383 "could not set timestamp (%d)\n", ret); 2384 return ret; 2385 } 2386 2387 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2388 { 2389 struct nvme_feat_host_behavior *host; 2390 u8 acre = 0, lbafee = 0; 2391 int ret; 2392 2393 /* Don't bother enabling the feature if retry delay is not reported */ 2394 if (ctrl->crdt[0]) 2395 acre = NVME_ENABLE_ACRE; 2396 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2397 lbafee = NVME_ENABLE_LBAFEE; 2398 2399 if (!acre && !lbafee) 2400 return 0; 2401 2402 host = kzalloc(sizeof(*host), GFP_KERNEL); 2403 if (!host) 2404 return 0; 2405 2406 host->acre = acre; 2407 host->lbafee = lbafee; 2408 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2409 host, sizeof(*host), NULL); 2410 kfree(host); 2411 return ret; 2412 } 2413 2414 /* 2415 * The function checks whether the given total (exlat + enlat) latency of 2416 * a power state allows the latter to be used as an APST transition target. 2417 * It does so by comparing the latency to the primary and secondary latency 2418 * tolerances defined by module params. If there's a match, the corresponding 2419 * timeout value is returned and the matching tolerance index (1 or 2) is 2420 * reported. 2421 */ 2422 static bool nvme_apst_get_transition_time(u64 total_latency, 2423 u64 *transition_time, unsigned *last_index) 2424 { 2425 if (total_latency <= apst_primary_latency_tol_us) { 2426 if (*last_index == 1) 2427 return false; 2428 *last_index = 1; 2429 *transition_time = apst_primary_timeout_ms; 2430 return true; 2431 } 2432 if (apst_secondary_timeout_ms && 2433 total_latency <= apst_secondary_latency_tol_us) { 2434 if (*last_index <= 2) 2435 return false; 2436 *last_index = 2; 2437 *transition_time = apst_secondary_timeout_ms; 2438 return true; 2439 } 2440 return false; 2441 } 2442 2443 /* 2444 * APST (Autonomous Power State Transition) lets us program a table of power 2445 * state transitions that the controller will perform automatically. 2446 * 2447 * Depending on module params, one of the two supported techniques will be used: 2448 * 2449 * - If the parameters provide explicit timeouts and tolerances, they will be 2450 * used to build a table with up to 2 non-operational states to transition to. 2451 * The default parameter values were selected based on the values used by 2452 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2453 * regeneration of the APST table in the event of switching between external 2454 * and battery power, the timeouts and tolerances reflect a compromise 2455 * between values used by Microsoft for AC and battery scenarios. 2456 * - If not, we'll configure the table with a simple heuristic: we are willing 2457 * to spend at most 2% of the time transitioning between power states. 2458 * Therefore, when running in any given state, we will enter the next 2459 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2460 * microseconds, as long as that state's exit latency is under the requested 2461 * maximum latency. 2462 * 2463 * We will not autonomously enter any non-operational state for which the total 2464 * latency exceeds ps_max_latency_us. 2465 * 2466 * Users can set ps_max_latency_us to zero to turn off APST. 2467 */ 2468 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2469 { 2470 struct nvme_feat_auto_pst *table; 2471 unsigned apste = 0; 2472 u64 max_lat_us = 0; 2473 __le64 target = 0; 2474 int max_ps = -1; 2475 int state; 2476 int ret; 2477 unsigned last_lt_index = UINT_MAX; 2478 2479 /* 2480 * If APST isn't supported or if we haven't been initialized yet, 2481 * then don't do anything. 2482 */ 2483 if (!ctrl->apsta) 2484 return 0; 2485 2486 if (ctrl->npss > 31) { 2487 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2488 return 0; 2489 } 2490 2491 table = kzalloc(sizeof(*table), GFP_KERNEL); 2492 if (!table) 2493 return 0; 2494 2495 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2496 /* Turn off APST. */ 2497 dev_dbg(ctrl->device, "APST disabled\n"); 2498 goto done; 2499 } 2500 2501 /* 2502 * Walk through all states from lowest- to highest-power. 2503 * According to the spec, lower-numbered states use more power. NPSS, 2504 * despite the name, is the index of the lowest-power state, not the 2505 * number of states. 2506 */ 2507 for (state = (int)ctrl->npss; state >= 0; state--) { 2508 u64 total_latency_us, exit_latency_us, transition_ms; 2509 2510 if (target) 2511 table->entries[state] = target; 2512 2513 /* 2514 * Don't allow transitions to the deepest state if it's quirked 2515 * off. 2516 */ 2517 if (state == ctrl->npss && 2518 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2519 continue; 2520 2521 /* 2522 * Is this state a useful non-operational state for higher-power 2523 * states to autonomously transition to? 2524 */ 2525 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2526 continue; 2527 2528 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2529 if (exit_latency_us > ctrl->ps_max_latency_us) 2530 continue; 2531 2532 total_latency_us = exit_latency_us + 2533 le32_to_cpu(ctrl->psd[state].entry_lat); 2534 2535 /* 2536 * This state is good. It can be used as the APST idle target 2537 * for higher power states. 2538 */ 2539 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2540 if (!nvme_apst_get_transition_time(total_latency_us, 2541 &transition_ms, &last_lt_index)) 2542 continue; 2543 } else { 2544 transition_ms = total_latency_us + 19; 2545 do_div(transition_ms, 20); 2546 if (transition_ms > (1 << 24) - 1) 2547 transition_ms = (1 << 24) - 1; 2548 } 2549 2550 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2551 if (max_ps == -1) 2552 max_ps = state; 2553 if (total_latency_us > max_lat_us) 2554 max_lat_us = total_latency_us; 2555 } 2556 2557 if (max_ps == -1) 2558 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2559 else 2560 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2561 max_ps, max_lat_us, (int)sizeof(*table), table); 2562 apste = 1; 2563 2564 done: 2565 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2566 table, sizeof(*table), NULL); 2567 if (ret) 2568 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2569 kfree(table); 2570 return ret; 2571 } 2572 2573 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2574 { 2575 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2576 u64 latency; 2577 2578 switch (val) { 2579 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2580 case PM_QOS_LATENCY_ANY: 2581 latency = U64_MAX; 2582 break; 2583 2584 default: 2585 latency = val; 2586 } 2587 2588 if (ctrl->ps_max_latency_us != latency) { 2589 ctrl->ps_max_latency_us = latency; 2590 if (ctrl->state == NVME_CTRL_LIVE) 2591 nvme_configure_apst(ctrl); 2592 } 2593 } 2594 2595 struct nvme_core_quirk_entry { 2596 /* 2597 * NVMe model and firmware strings are padded with spaces. For 2598 * simplicity, strings in the quirk table are padded with NULLs 2599 * instead. 2600 */ 2601 u16 vid; 2602 const char *mn; 2603 const char *fr; 2604 unsigned long quirks; 2605 }; 2606 2607 static const struct nvme_core_quirk_entry core_quirks[] = { 2608 { 2609 /* 2610 * This Toshiba device seems to die using any APST states. See: 2611 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2612 */ 2613 .vid = 0x1179, 2614 .mn = "THNSF5256GPUK TOSHIBA", 2615 .quirks = NVME_QUIRK_NO_APST, 2616 }, 2617 { 2618 /* 2619 * This LiteON CL1-3D*-Q11 firmware version has a race 2620 * condition associated with actions related to suspend to idle 2621 * LiteON has resolved the problem in future firmware 2622 */ 2623 .vid = 0x14a4, 2624 .fr = "22301111", 2625 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2626 }, 2627 { 2628 /* 2629 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2630 * aborts I/O during any load, but more easily reproducible 2631 * with discards (fstrim). 2632 * 2633 * The device is left in a state where it is also not possible 2634 * to use "nvme set-feature" to disable APST, but booting with 2635 * nvme_core.default_ps_max_latency=0 works. 2636 */ 2637 .vid = 0x1e0f, 2638 .mn = "KCD6XVUL6T40", 2639 .quirks = NVME_QUIRK_NO_APST, 2640 }, 2641 { 2642 /* 2643 * The external Samsung X5 SSD fails initialization without a 2644 * delay before checking if it is ready and has a whole set of 2645 * other problems. To make this even more interesting, it 2646 * shares the PCI ID with internal Samsung 970 Evo Plus that 2647 * does not need or want these quirks. 2648 */ 2649 .vid = 0x144d, 2650 .mn = "Samsung Portable SSD X5", 2651 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2652 NVME_QUIRK_NO_DEEPEST_PS | 2653 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2654 } 2655 }; 2656 2657 /* match is null-terminated but idstr is space-padded. */ 2658 static bool string_matches(const char *idstr, const char *match, size_t len) 2659 { 2660 size_t matchlen; 2661 2662 if (!match) 2663 return true; 2664 2665 matchlen = strlen(match); 2666 WARN_ON_ONCE(matchlen > len); 2667 2668 if (memcmp(idstr, match, matchlen)) 2669 return false; 2670 2671 for (; matchlen < len; matchlen++) 2672 if (idstr[matchlen] != ' ') 2673 return false; 2674 2675 return true; 2676 } 2677 2678 static bool quirk_matches(const struct nvme_id_ctrl *id, 2679 const struct nvme_core_quirk_entry *q) 2680 { 2681 return q->vid == le16_to_cpu(id->vid) && 2682 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2683 string_matches(id->fr, q->fr, sizeof(id->fr)); 2684 } 2685 2686 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2687 struct nvme_id_ctrl *id) 2688 { 2689 size_t nqnlen; 2690 int off; 2691 2692 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2693 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2694 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2695 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2696 return; 2697 } 2698 2699 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2700 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2701 } 2702 2703 /* 2704 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2705 * Base Specification 2.0. It is slightly different from the format 2706 * specified there due to historic reasons, and we can't change it now. 2707 */ 2708 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2709 "nqn.2014.08.org.nvmexpress:%04x%04x", 2710 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2711 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2712 off += sizeof(id->sn); 2713 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2714 off += sizeof(id->mn); 2715 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2716 } 2717 2718 static void nvme_release_subsystem(struct device *dev) 2719 { 2720 struct nvme_subsystem *subsys = 2721 container_of(dev, struct nvme_subsystem, dev); 2722 2723 if (subsys->instance >= 0) 2724 ida_free(&nvme_instance_ida, subsys->instance); 2725 kfree(subsys); 2726 } 2727 2728 static void nvme_destroy_subsystem(struct kref *ref) 2729 { 2730 struct nvme_subsystem *subsys = 2731 container_of(ref, struct nvme_subsystem, ref); 2732 2733 mutex_lock(&nvme_subsystems_lock); 2734 list_del(&subsys->entry); 2735 mutex_unlock(&nvme_subsystems_lock); 2736 2737 ida_destroy(&subsys->ns_ida); 2738 device_del(&subsys->dev); 2739 put_device(&subsys->dev); 2740 } 2741 2742 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2743 { 2744 kref_put(&subsys->ref, nvme_destroy_subsystem); 2745 } 2746 2747 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2748 { 2749 struct nvme_subsystem *subsys; 2750 2751 lockdep_assert_held(&nvme_subsystems_lock); 2752 2753 /* 2754 * Fail matches for discovery subsystems. This results 2755 * in each discovery controller bound to a unique subsystem. 2756 * This avoids issues with validating controller values 2757 * that can only be true when there is a single unique subsystem. 2758 * There may be multiple and completely independent entities 2759 * that provide discovery controllers. 2760 */ 2761 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2762 return NULL; 2763 2764 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2765 if (strcmp(subsys->subnqn, subsysnqn)) 2766 continue; 2767 if (!kref_get_unless_zero(&subsys->ref)) 2768 continue; 2769 return subsys; 2770 } 2771 2772 return NULL; 2773 } 2774 2775 #define SUBSYS_ATTR_RO(_name, _mode, _show) \ 2776 struct device_attribute subsys_attr_##_name = \ 2777 __ATTR(_name, _mode, _show, NULL) 2778 2779 static ssize_t nvme_subsys_show_nqn(struct device *dev, 2780 struct device_attribute *attr, 2781 char *buf) 2782 { 2783 struct nvme_subsystem *subsys = 2784 container_of(dev, struct nvme_subsystem, dev); 2785 2786 return sysfs_emit(buf, "%s\n", subsys->subnqn); 2787 } 2788 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn); 2789 2790 static ssize_t nvme_subsys_show_type(struct device *dev, 2791 struct device_attribute *attr, 2792 char *buf) 2793 { 2794 struct nvme_subsystem *subsys = 2795 container_of(dev, struct nvme_subsystem, dev); 2796 2797 switch (subsys->subtype) { 2798 case NVME_NQN_DISC: 2799 return sysfs_emit(buf, "discovery\n"); 2800 case NVME_NQN_NVME: 2801 return sysfs_emit(buf, "nvm\n"); 2802 default: 2803 return sysfs_emit(buf, "reserved\n"); 2804 } 2805 } 2806 static SUBSYS_ATTR_RO(subsystype, S_IRUGO, nvme_subsys_show_type); 2807 2808 #define nvme_subsys_show_str_function(field) \ 2809 static ssize_t subsys_##field##_show(struct device *dev, \ 2810 struct device_attribute *attr, char *buf) \ 2811 { \ 2812 struct nvme_subsystem *subsys = \ 2813 container_of(dev, struct nvme_subsystem, dev); \ 2814 return sysfs_emit(buf, "%.*s\n", \ 2815 (int)sizeof(subsys->field), subsys->field); \ 2816 } \ 2817 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show); 2818 2819 nvme_subsys_show_str_function(model); 2820 nvme_subsys_show_str_function(serial); 2821 nvme_subsys_show_str_function(firmware_rev); 2822 2823 static struct attribute *nvme_subsys_attrs[] = { 2824 &subsys_attr_model.attr, 2825 &subsys_attr_serial.attr, 2826 &subsys_attr_firmware_rev.attr, 2827 &subsys_attr_subsysnqn.attr, 2828 &subsys_attr_subsystype.attr, 2829 #ifdef CONFIG_NVME_MULTIPATH 2830 &subsys_attr_iopolicy.attr, 2831 #endif 2832 NULL, 2833 }; 2834 2835 static const struct attribute_group nvme_subsys_attrs_group = { 2836 .attrs = nvme_subsys_attrs, 2837 }; 2838 2839 static const struct attribute_group *nvme_subsys_attrs_groups[] = { 2840 &nvme_subsys_attrs_group, 2841 NULL, 2842 }; 2843 2844 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2845 { 2846 return ctrl->opts && ctrl->opts->discovery_nqn; 2847 } 2848 2849 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2850 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2851 { 2852 struct nvme_ctrl *tmp; 2853 2854 lockdep_assert_held(&nvme_subsystems_lock); 2855 2856 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2857 if (nvme_state_terminal(tmp)) 2858 continue; 2859 2860 if (tmp->cntlid == ctrl->cntlid) { 2861 dev_err(ctrl->device, 2862 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2863 ctrl->cntlid, dev_name(tmp->device), 2864 subsys->subnqn); 2865 return false; 2866 } 2867 2868 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2869 nvme_discovery_ctrl(ctrl)) 2870 continue; 2871 2872 dev_err(ctrl->device, 2873 "Subsystem does not support multiple controllers\n"); 2874 return false; 2875 } 2876 2877 return true; 2878 } 2879 2880 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2881 { 2882 struct nvme_subsystem *subsys, *found; 2883 int ret; 2884 2885 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2886 if (!subsys) 2887 return -ENOMEM; 2888 2889 subsys->instance = -1; 2890 mutex_init(&subsys->lock); 2891 kref_init(&subsys->ref); 2892 INIT_LIST_HEAD(&subsys->ctrls); 2893 INIT_LIST_HEAD(&subsys->nsheads); 2894 nvme_init_subnqn(subsys, ctrl, id); 2895 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2896 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2897 subsys->vendor_id = le16_to_cpu(id->vid); 2898 subsys->cmic = id->cmic; 2899 2900 /* Versions prior to 1.4 don't necessarily report a valid type */ 2901 if (id->cntrltype == NVME_CTRL_DISC || 2902 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2903 subsys->subtype = NVME_NQN_DISC; 2904 else 2905 subsys->subtype = NVME_NQN_NVME; 2906 2907 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2908 dev_err(ctrl->device, 2909 "Subsystem %s is not a discovery controller", 2910 subsys->subnqn); 2911 kfree(subsys); 2912 return -EINVAL; 2913 } 2914 subsys->awupf = le16_to_cpu(id->awupf); 2915 nvme_mpath_default_iopolicy(subsys); 2916 2917 subsys->dev.class = nvme_subsys_class; 2918 subsys->dev.release = nvme_release_subsystem; 2919 subsys->dev.groups = nvme_subsys_attrs_groups; 2920 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2921 device_initialize(&subsys->dev); 2922 2923 mutex_lock(&nvme_subsystems_lock); 2924 found = __nvme_find_get_subsystem(subsys->subnqn); 2925 if (found) { 2926 put_device(&subsys->dev); 2927 subsys = found; 2928 2929 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2930 ret = -EINVAL; 2931 goto out_put_subsystem; 2932 } 2933 } else { 2934 ret = device_add(&subsys->dev); 2935 if (ret) { 2936 dev_err(ctrl->device, 2937 "failed to register subsystem device.\n"); 2938 put_device(&subsys->dev); 2939 goto out_unlock; 2940 } 2941 ida_init(&subsys->ns_ida); 2942 list_add_tail(&subsys->entry, &nvme_subsystems); 2943 } 2944 2945 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2946 dev_name(ctrl->device)); 2947 if (ret) { 2948 dev_err(ctrl->device, 2949 "failed to create sysfs link from subsystem.\n"); 2950 goto out_put_subsystem; 2951 } 2952 2953 if (!found) 2954 subsys->instance = ctrl->instance; 2955 ctrl->subsys = subsys; 2956 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2957 mutex_unlock(&nvme_subsystems_lock); 2958 return 0; 2959 2960 out_put_subsystem: 2961 nvme_put_subsystem(subsys); 2962 out_unlock: 2963 mutex_unlock(&nvme_subsystems_lock); 2964 return ret; 2965 } 2966 2967 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2968 void *log, size_t size, u64 offset) 2969 { 2970 struct nvme_command c = { }; 2971 u32 dwlen = nvme_bytes_to_numd(size); 2972 2973 c.get_log_page.opcode = nvme_admin_get_log_page; 2974 c.get_log_page.nsid = cpu_to_le32(nsid); 2975 c.get_log_page.lid = log_page; 2976 c.get_log_page.lsp = lsp; 2977 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2978 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2979 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2980 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2981 c.get_log_page.csi = csi; 2982 2983 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2984 } 2985 2986 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2987 struct nvme_effects_log **log) 2988 { 2989 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2990 int ret; 2991 2992 if (cel) 2993 goto out; 2994 2995 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2996 if (!cel) 2997 return -ENOMEM; 2998 2999 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 3000 cel, sizeof(*cel), 0); 3001 if (ret) { 3002 kfree(cel); 3003 return ret; 3004 } 3005 3006 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 3007 out: 3008 *log = cel; 3009 return 0; 3010 } 3011 3012 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 3013 { 3014 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 3015 3016 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 3017 return UINT_MAX; 3018 return val; 3019 } 3020 3021 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 3022 { 3023 struct nvme_command c = { }; 3024 struct nvme_id_ctrl_nvm *id; 3025 int ret; 3026 3027 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 3028 ctrl->max_discard_sectors = UINT_MAX; 3029 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 3030 } else { 3031 ctrl->max_discard_sectors = 0; 3032 ctrl->max_discard_segments = 0; 3033 } 3034 3035 /* 3036 * Even though NVMe spec explicitly states that MDTS is not applicable 3037 * to the write-zeroes, we are cautious and limit the size to the 3038 * controllers max_hw_sectors value, which is based on the MDTS field 3039 * and possibly other limiting factors. 3040 */ 3041 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 3042 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 3043 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 3044 else 3045 ctrl->max_zeroes_sectors = 0; 3046 3047 if (nvme_ctrl_limited_cns(ctrl)) 3048 return 0; 3049 3050 id = kzalloc(sizeof(*id), GFP_KERNEL); 3051 if (!id) 3052 return 0; 3053 3054 c.identify.opcode = nvme_admin_identify; 3055 c.identify.cns = NVME_ID_CNS_CS_CTRL; 3056 c.identify.csi = NVME_CSI_NVM; 3057 3058 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 3059 if (ret) 3060 goto free_data; 3061 3062 if (id->dmrl) 3063 ctrl->max_discard_segments = id->dmrl; 3064 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 3065 if (id->wzsl) 3066 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 3067 3068 free_data: 3069 kfree(id); 3070 return ret; 3071 } 3072 3073 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3074 { 3075 struct nvme_id_ctrl *id; 3076 u32 max_hw_sectors; 3077 bool prev_apst_enabled; 3078 int ret; 3079 3080 ret = nvme_identify_ctrl(ctrl, &id); 3081 if (ret) { 3082 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3083 return -EIO; 3084 } 3085 3086 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3087 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3088 if (ret < 0) 3089 goto out_free; 3090 } 3091 3092 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3093 ctrl->cntlid = le16_to_cpu(id->cntlid); 3094 3095 if (!ctrl->identified) { 3096 unsigned int i; 3097 3098 /* 3099 * Check for quirks. Quirk can depend on firmware version, 3100 * so, in principle, the set of quirks present can change 3101 * across a reset. As a possible future enhancement, we 3102 * could re-scan for quirks every time we reinitialize 3103 * the device, but we'd have to make sure that the driver 3104 * behaves intelligently if the quirks change. 3105 */ 3106 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3107 if (quirk_matches(id, &core_quirks[i])) 3108 ctrl->quirks |= core_quirks[i].quirks; 3109 } 3110 3111 ret = nvme_init_subsystem(ctrl, id); 3112 if (ret) 3113 goto out_free; 3114 } 3115 memcpy(ctrl->subsys->firmware_rev, id->fr, 3116 sizeof(ctrl->subsys->firmware_rev)); 3117 3118 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3119 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3120 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3121 } 3122 3123 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3124 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3125 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3126 3127 ctrl->oacs = le16_to_cpu(id->oacs); 3128 ctrl->oncs = le16_to_cpu(id->oncs); 3129 ctrl->mtfa = le16_to_cpu(id->mtfa); 3130 ctrl->oaes = le32_to_cpu(id->oaes); 3131 ctrl->wctemp = le16_to_cpu(id->wctemp); 3132 ctrl->cctemp = le16_to_cpu(id->cctemp); 3133 3134 atomic_set(&ctrl->abort_limit, id->acl + 1); 3135 ctrl->vwc = id->vwc; 3136 if (id->mdts) 3137 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3138 else 3139 max_hw_sectors = UINT_MAX; 3140 ctrl->max_hw_sectors = 3141 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3142 3143 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3144 ctrl->sgls = le32_to_cpu(id->sgls); 3145 ctrl->kas = le16_to_cpu(id->kas); 3146 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3147 ctrl->ctratt = le32_to_cpu(id->ctratt); 3148 3149 ctrl->cntrltype = id->cntrltype; 3150 ctrl->dctype = id->dctype; 3151 3152 if (id->rtd3e) { 3153 /* us -> s */ 3154 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3155 3156 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3157 shutdown_timeout, 60); 3158 3159 if (ctrl->shutdown_timeout != shutdown_timeout) 3160 dev_info(ctrl->device, 3161 "Shutdown timeout set to %u seconds\n", 3162 ctrl->shutdown_timeout); 3163 } else 3164 ctrl->shutdown_timeout = shutdown_timeout; 3165 3166 ctrl->npss = id->npss; 3167 ctrl->apsta = id->apsta; 3168 prev_apst_enabled = ctrl->apst_enabled; 3169 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3170 if (force_apst && id->apsta) { 3171 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3172 ctrl->apst_enabled = true; 3173 } else { 3174 ctrl->apst_enabled = false; 3175 } 3176 } else { 3177 ctrl->apst_enabled = id->apsta; 3178 } 3179 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3180 3181 if (ctrl->ops->flags & NVME_F_FABRICS) { 3182 ctrl->icdoff = le16_to_cpu(id->icdoff); 3183 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3184 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3185 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3186 3187 /* 3188 * In fabrics we need to verify the cntlid matches the 3189 * admin connect 3190 */ 3191 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3192 dev_err(ctrl->device, 3193 "Mismatching cntlid: Connect %u vs Identify " 3194 "%u, rejecting\n", 3195 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3196 ret = -EINVAL; 3197 goto out_free; 3198 } 3199 3200 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3201 dev_err(ctrl->device, 3202 "keep-alive support is mandatory for fabrics\n"); 3203 ret = -EINVAL; 3204 goto out_free; 3205 } 3206 } else { 3207 ctrl->hmpre = le32_to_cpu(id->hmpre); 3208 ctrl->hmmin = le32_to_cpu(id->hmmin); 3209 ctrl->hmminds = le32_to_cpu(id->hmminds); 3210 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3211 } 3212 3213 ret = nvme_mpath_init_identify(ctrl, id); 3214 if (ret < 0) 3215 goto out_free; 3216 3217 if (ctrl->apst_enabled && !prev_apst_enabled) 3218 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3219 else if (!ctrl->apst_enabled && prev_apst_enabled) 3220 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3221 3222 out_free: 3223 kfree(id); 3224 return ret; 3225 } 3226 3227 /* 3228 * Initialize the cached copies of the Identify data and various controller 3229 * register in our nvme_ctrl structure. This should be called as soon as 3230 * the admin queue is fully up and running. 3231 */ 3232 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl) 3233 { 3234 int ret; 3235 3236 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3237 if (ret) { 3238 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3239 return ret; 3240 } 3241 3242 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3243 3244 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3245 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3246 3247 ret = nvme_init_identify(ctrl); 3248 if (ret) 3249 return ret; 3250 3251 ret = nvme_configure_apst(ctrl); 3252 if (ret < 0) 3253 return ret; 3254 3255 ret = nvme_configure_timestamp(ctrl); 3256 if (ret < 0) 3257 return ret; 3258 3259 ret = nvme_configure_host_options(ctrl); 3260 if (ret < 0) 3261 return ret; 3262 3263 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3264 /* 3265 * Do not return errors unless we are in a controller reset, 3266 * the controller works perfectly fine without hwmon. 3267 */ 3268 ret = nvme_hwmon_init(ctrl); 3269 if (ret == -EINTR) 3270 return ret; 3271 } 3272 3273 ctrl->identified = true; 3274 3275 return 0; 3276 } 3277 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3278 3279 static int nvme_dev_open(struct inode *inode, struct file *file) 3280 { 3281 struct nvme_ctrl *ctrl = 3282 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3283 3284 switch (ctrl->state) { 3285 case NVME_CTRL_LIVE: 3286 break; 3287 default: 3288 return -EWOULDBLOCK; 3289 } 3290 3291 nvme_get_ctrl(ctrl); 3292 if (!try_module_get(ctrl->ops->module)) { 3293 nvme_put_ctrl(ctrl); 3294 return -EINVAL; 3295 } 3296 3297 file->private_data = ctrl; 3298 return 0; 3299 } 3300 3301 static int nvme_dev_release(struct inode *inode, struct file *file) 3302 { 3303 struct nvme_ctrl *ctrl = 3304 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3305 3306 module_put(ctrl->ops->module); 3307 nvme_put_ctrl(ctrl); 3308 return 0; 3309 } 3310 3311 static const struct file_operations nvme_dev_fops = { 3312 .owner = THIS_MODULE, 3313 .open = nvme_dev_open, 3314 .release = nvme_dev_release, 3315 .unlocked_ioctl = nvme_dev_ioctl, 3316 .compat_ioctl = compat_ptr_ioctl, 3317 .uring_cmd = nvme_dev_uring_cmd, 3318 }; 3319 3320 static ssize_t nvme_sysfs_reset(struct device *dev, 3321 struct device_attribute *attr, const char *buf, 3322 size_t count) 3323 { 3324 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3325 int ret; 3326 3327 ret = nvme_reset_ctrl_sync(ctrl); 3328 if (ret < 0) 3329 return ret; 3330 return count; 3331 } 3332 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 3333 3334 static ssize_t nvme_sysfs_rescan(struct device *dev, 3335 struct device_attribute *attr, const char *buf, 3336 size_t count) 3337 { 3338 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3339 3340 nvme_queue_scan(ctrl); 3341 return count; 3342 } 3343 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 3344 3345 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) 3346 { 3347 struct gendisk *disk = dev_to_disk(dev); 3348 3349 if (disk->fops == &nvme_bdev_ops) 3350 return nvme_get_ns_from_dev(dev)->head; 3351 else 3352 return disk->private_data; 3353 } 3354 3355 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 3356 char *buf) 3357 { 3358 struct nvme_ns_head *head = dev_to_ns_head(dev); 3359 struct nvme_ns_ids *ids = &head->ids; 3360 struct nvme_subsystem *subsys = head->subsys; 3361 int serial_len = sizeof(subsys->serial); 3362 int model_len = sizeof(subsys->model); 3363 3364 if (!uuid_is_null(&ids->uuid)) 3365 return sysfs_emit(buf, "uuid.%pU\n", &ids->uuid); 3366 3367 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3368 return sysfs_emit(buf, "eui.%16phN\n", ids->nguid); 3369 3370 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3371 return sysfs_emit(buf, "eui.%8phN\n", ids->eui64); 3372 3373 while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' || 3374 subsys->serial[serial_len - 1] == '\0')) 3375 serial_len--; 3376 while (model_len > 0 && (subsys->model[model_len - 1] == ' ' || 3377 subsys->model[model_len - 1] == '\0')) 3378 model_len--; 3379 3380 return sysfs_emit(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id, 3381 serial_len, subsys->serial, model_len, subsys->model, 3382 head->ns_id); 3383 } 3384 static DEVICE_ATTR_RO(wwid); 3385 3386 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 3387 char *buf) 3388 { 3389 return sysfs_emit(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid); 3390 } 3391 static DEVICE_ATTR_RO(nguid); 3392 3393 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 3394 char *buf) 3395 { 3396 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3397 3398 /* For backward compatibility expose the NGUID to userspace if 3399 * we have no UUID set 3400 */ 3401 if (uuid_is_null(&ids->uuid)) { 3402 dev_warn_ratelimited(dev, 3403 "No UUID available providing old NGUID\n"); 3404 return sysfs_emit(buf, "%pU\n", ids->nguid); 3405 } 3406 return sysfs_emit(buf, "%pU\n", &ids->uuid); 3407 } 3408 static DEVICE_ATTR_RO(uuid); 3409 3410 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 3411 char *buf) 3412 { 3413 return sysfs_emit(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64); 3414 } 3415 static DEVICE_ATTR_RO(eui); 3416 3417 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 3418 char *buf) 3419 { 3420 return sysfs_emit(buf, "%d\n", dev_to_ns_head(dev)->ns_id); 3421 } 3422 static DEVICE_ATTR_RO(nsid); 3423 3424 static struct attribute *nvme_ns_id_attrs[] = { 3425 &dev_attr_wwid.attr, 3426 &dev_attr_uuid.attr, 3427 &dev_attr_nguid.attr, 3428 &dev_attr_eui.attr, 3429 &dev_attr_nsid.attr, 3430 #ifdef CONFIG_NVME_MULTIPATH 3431 &dev_attr_ana_grpid.attr, 3432 &dev_attr_ana_state.attr, 3433 #endif 3434 NULL, 3435 }; 3436 3437 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj, 3438 struct attribute *a, int n) 3439 { 3440 struct device *dev = container_of(kobj, struct device, kobj); 3441 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3442 3443 if (a == &dev_attr_uuid.attr) { 3444 if (uuid_is_null(&ids->uuid) && 3445 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3446 return 0; 3447 } 3448 if (a == &dev_attr_nguid.attr) { 3449 if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3450 return 0; 3451 } 3452 if (a == &dev_attr_eui.attr) { 3453 if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3454 return 0; 3455 } 3456 #ifdef CONFIG_NVME_MULTIPATH 3457 if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) { 3458 if (dev_to_disk(dev)->fops != &nvme_bdev_ops) /* per-path attr */ 3459 return 0; 3460 if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl)) 3461 return 0; 3462 } 3463 #endif 3464 return a->mode; 3465 } 3466 3467 static const struct attribute_group nvme_ns_id_attr_group = { 3468 .attrs = nvme_ns_id_attrs, 3469 .is_visible = nvme_ns_id_attrs_are_visible, 3470 }; 3471 3472 const struct attribute_group *nvme_ns_id_attr_groups[] = { 3473 &nvme_ns_id_attr_group, 3474 NULL, 3475 }; 3476 3477 #define nvme_show_str_function(field) \ 3478 static ssize_t field##_show(struct device *dev, \ 3479 struct device_attribute *attr, char *buf) \ 3480 { \ 3481 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3482 return sysfs_emit(buf, "%.*s\n", \ 3483 (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \ 3484 } \ 3485 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3486 3487 nvme_show_str_function(model); 3488 nvme_show_str_function(serial); 3489 nvme_show_str_function(firmware_rev); 3490 3491 #define nvme_show_int_function(field) \ 3492 static ssize_t field##_show(struct device *dev, \ 3493 struct device_attribute *attr, char *buf) \ 3494 { \ 3495 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3496 return sysfs_emit(buf, "%d\n", ctrl->field); \ 3497 } \ 3498 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3499 3500 nvme_show_int_function(cntlid); 3501 nvme_show_int_function(numa_node); 3502 nvme_show_int_function(queue_count); 3503 nvme_show_int_function(sqsize); 3504 nvme_show_int_function(kato); 3505 3506 static ssize_t nvme_sysfs_delete(struct device *dev, 3507 struct device_attribute *attr, const char *buf, 3508 size_t count) 3509 { 3510 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3511 3512 if (device_remove_file_self(dev, attr)) 3513 nvme_delete_ctrl_sync(ctrl); 3514 return count; 3515 } 3516 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 3517 3518 static ssize_t nvme_sysfs_show_transport(struct device *dev, 3519 struct device_attribute *attr, 3520 char *buf) 3521 { 3522 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3523 3524 return sysfs_emit(buf, "%s\n", ctrl->ops->name); 3525 } 3526 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 3527 3528 static ssize_t nvme_sysfs_show_state(struct device *dev, 3529 struct device_attribute *attr, 3530 char *buf) 3531 { 3532 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3533 static const char *const state_name[] = { 3534 [NVME_CTRL_NEW] = "new", 3535 [NVME_CTRL_LIVE] = "live", 3536 [NVME_CTRL_RESETTING] = "resetting", 3537 [NVME_CTRL_CONNECTING] = "connecting", 3538 [NVME_CTRL_DELETING] = "deleting", 3539 [NVME_CTRL_DELETING_NOIO]= "deleting (no IO)", 3540 [NVME_CTRL_DEAD] = "dead", 3541 }; 3542 3543 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 3544 state_name[ctrl->state]) 3545 return sysfs_emit(buf, "%s\n", state_name[ctrl->state]); 3546 3547 return sysfs_emit(buf, "unknown state\n"); 3548 } 3549 3550 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 3551 3552 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 3553 struct device_attribute *attr, 3554 char *buf) 3555 { 3556 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3557 3558 return sysfs_emit(buf, "%s\n", ctrl->subsys->subnqn); 3559 } 3560 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 3561 3562 static ssize_t nvme_sysfs_show_hostnqn(struct device *dev, 3563 struct device_attribute *attr, 3564 char *buf) 3565 { 3566 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3567 3568 return sysfs_emit(buf, "%s\n", ctrl->opts->host->nqn); 3569 } 3570 static DEVICE_ATTR(hostnqn, S_IRUGO, nvme_sysfs_show_hostnqn, NULL); 3571 3572 static ssize_t nvme_sysfs_show_hostid(struct device *dev, 3573 struct device_attribute *attr, 3574 char *buf) 3575 { 3576 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3577 3578 return sysfs_emit(buf, "%pU\n", &ctrl->opts->host->id); 3579 } 3580 static DEVICE_ATTR(hostid, S_IRUGO, nvme_sysfs_show_hostid, NULL); 3581 3582 static ssize_t nvme_sysfs_show_address(struct device *dev, 3583 struct device_attribute *attr, 3584 char *buf) 3585 { 3586 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3587 3588 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 3589 } 3590 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 3591 3592 static ssize_t nvme_ctrl_loss_tmo_show(struct device *dev, 3593 struct device_attribute *attr, char *buf) 3594 { 3595 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3596 struct nvmf_ctrl_options *opts = ctrl->opts; 3597 3598 if (ctrl->opts->max_reconnects == -1) 3599 return sysfs_emit(buf, "off\n"); 3600 return sysfs_emit(buf, "%d\n", 3601 opts->max_reconnects * opts->reconnect_delay); 3602 } 3603 3604 static ssize_t nvme_ctrl_loss_tmo_store(struct device *dev, 3605 struct device_attribute *attr, const char *buf, size_t count) 3606 { 3607 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3608 struct nvmf_ctrl_options *opts = ctrl->opts; 3609 int ctrl_loss_tmo, err; 3610 3611 err = kstrtoint(buf, 10, &ctrl_loss_tmo); 3612 if (err) 3613 return -EINVAL; 3614 3615 if (ctrl_loss_tmo < 0) 3616 opts->max_reconnects = -1; 3617 else 3618 opts->max_reconnects = DIV_ROUND_UP(ctrl_loss_tmo, 3619 opts->reconnect_delay); 3620 return count; 3621 } 3622 static DEVICE_ATTR(ctrl_loss_tmo, S_IRUGO | S_IWUSR, 3623 nvme_ctrl_loss_tmo_show, nvme_ctrl_loss_tmo_store); 3624 3625 static ssize_t nvme_ctrl_reconnect_delay_show(struct device *dev, 3626 struct device_attribute *attr, char *buf) 3627 { 3628 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3629 3630 if (ctrl->opts->reconnect_delay == -1) 3631 return sysfs_emit(buf, "off\n"); 3632 return sysfs_emit(buf, "%d\n", ctrl->opts->reconnect_delay); 3633 } 3634 3635 static ssize_t nvme_ctrl_reconnect_delay_store(struct device *dev, 3636 struct device_attribute *attr, const char *buf, size_t count) 3637 { 3638 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3639 unsigned int v; 3640 int err; 3641 3642 err = kstrtou32(buf, 10, &v); 3643 if (err) 3644 return err; 3645 3646 ctrl->opts->reconnect_delay = v; 3647 return count; 3648 } 3649 static DEVICE_ATTR(reconnect_delay, S_IRUGO | S_IWUSR, 3650 nvme_ctrl_reconnect_delay_show, nvme_ctrl_reconnect_delay_store); 3651 3652 static ssize_t nvme_ctrl_fast_io_fail_tmo_show(struct device *dev, 3653 struct device_attribute *attr, char *buf) 3654 { 3655 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3656 3657 if (ctrl->opts->fast_io_fail_tmo == -1) 3658 return sysfs_emit(buf, "off\n"); 3659 return sysfs_emit(buf, "%d\n", ctrl->opts->fast_io_fail_tmo); 3660 } 3661 3662 static ssize_t nvme_ctrl_fast_io_fail_tmo_store(struct device *dev, 3663 struct device_attribute *attr, const char *buf, size_t count) 3664 { 3665 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3666 struct nvmf_ctrl_options *opts = ctrl->opts; 3667 int fast_io_fail_tmo, err; 3668 3669 err = kstrtoint(buf, 10, &fast_io_fail_tmo); 3670 if (err) 3671 return -EINVAL; 3672 3673 if (fast_io_fail_tmo < 0) 3674 opts->fast_io_fail_tmo = -1; 3675 else 3676 opts->fast_io_fail_tmo = fast_io_fail_tmo; 3677 return count; 3678 } 3679 static DEVICE_ATTR(fast_io_fail_tmo, S_IRUGO | S_IWUSR, 3680 nvme_ctrl_fast_io_fail_tmo_show, nvme_ctrl_fast_io_fail_tmo_store); 3681 3682 static ssize_t cntrltype_show(struct device *dev, 3683 struct device_attribute *attr, char *buf) 3684 { 3685 static const char * const type[] = { 3686 [NVME_CTRL_IO] = "io\n", 3687 [NVME_CTRL_DISC] = "discovery\n", 3688 [NVME_CTRL_ADMIN] = "admin\n", 3689 }; 3690 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3691 3692 if (ctrl->cntrltype > NVME_CTRL_ADMIN || !type[ctrl->cntrltype]) 3693 return sysfs_emit(buf, "reserved\n"); 3694 3695 return sysfs_emit(buf, type[ctrl->cntrltype]); 3696 } 3697 static DEVICE_ATTR_RO(cntrltype); 3698 3699 static ssize_t dctype_show(struct device *dev, 3700 struct device_attribute *attr, char *buf) 3701 { 3702 static const char * const type[] = { 3703 [NVME_DCTYPE_NOT_REPORTED] = "none\n", 3704 [NVME_DCTYPE_DDC] = "ddc\n", 3705 [NVME_DCTYPE_CDC] = "cdc\n", 3706 }; 3707 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3708 3709 if (ctrl->dctype > NVME_DCTYPE_CDC || !type[ctrl->dctype]) 3710 return sysfs_emit(buf, "reserved\n"); 3711 3712 return sysfs_emit(buf, type[ctrl->dctype]); 3713 } 3714 static DEVICE_ATTR_RO(dctype); 3715 3716 #ifdef CONFIG_NVME_AUTH 3717 static ssize_t nvme_ctrl_dhchap_secret_show(struct device *dev, 3718 struct device_attribute *attr, char *buf) 3719 { 3720 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3721 struct nvmf_ctrl_options *opts = ctrl->opts; 3722 3723 if (!opts->dhchap_secret) 3724 return sysfs_emit(buf, "none\n"); 3725 return sysfs_emit(buf, "%s\n", opts->dhchap_secret); 3726 } 3727 3728 static ssize_t nvme_ctrl_dhchap_secret_store(struct device *dev, 3729 struct device_attribute *attr, const char *buf, size_t count) 3730 { 3731 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3732 struct nvmf_ctrl_options *opts = ctrl->opts; 3733 char *dhchap_secret; 3734 3735 if (!ctrl->opts->dhchap_secret) 3736 return -EINVAL; 3737 if (count < 7) 3738 return -EINVAL; 3739 if (memcmp(buf, "DHHC-1:", 7)) 3740 return -EINVAL; 3741 3742 dhchap_secret = kzalloc(count + 1, GFP_KERNEL); 3743 if (!dhchap_secret) 3744 return -ENOMEM; 3745 memcpy(dhchap_secret, buf, count); 3746 nvme_auth_stop(ctrl); 3747 if (strcmp(dhchap_secret, opts->dhchap_secret)) { 3748 int ret; 3749 3750 ret = nvme_auth_generate_key(dhchap_secret, &ctrl->host_key); 3751 if (ret) 3752 return ret; 3753 kfree(opts->dhchap_secret); 3754 opts->dhchap_secret = dhchap_secret; 3755 /* Key has changed; re-authentication with new key */ 3756 nvme_auth_reset(ctrl); 3757 } 3758 /* Start re-authentication */ 3759 dev_info(ctrl->device, "re-authenticating controller\n"); 3760 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 3761 3762 return count; 3763 } 3764 static DEVICE_ATTR(dhchap_secret, S_IRUGO | S_IWUSR, 3765 nvme_ctrl_dhchap_secret_show, nvme_ctrl_dhchap_secret_store); 3766 3767 static ssize_t nvme_ctrl_dhchap_ctrl_secret_show(struct device *dev, 3768 struct device_attribute *attr, char *buf) 3769 { 3770 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3771 struct nvmf_ctrl_options *opts = ctrl->opts; 3772 3773 if (!opts->dhchap_ctrl_secret) 3774 return sysfs_emit(buf, "none\n"); 3775 return sysfs_emit(buf, "%s\n", opts->dhchap_ctrl_secret); 3776 } 3777 3778 static ssize_t nvme_ctrl_dhchap_ctrl_secret_store(struct device *dev, 3779 struct device_attribute *attr, const char *buf, size_t count) 3780 { 3781 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3782 struct nvmf_ctrl_options *opts = ctrl->opts; 3783 char *dhchap_secret; 3784 3785 if (!ctrl->opts->dhchap_ctrl_secret) 3786 return -EINVAL; 3787 if (count < 7) 3788 return -EINVAL; 3789 if (memcmp(buf, "DHHC-1:", 7)) 3790 return -EINVAL; 3791 3792 dhchap_secret = kzalloc(count + 1, GFP_KERNEL); 3793 if (!dhchap_secret) 3794 return -ENOMEM; 3795 memcpy(dhchap_secret, buf, count); 3796 nvme_auth_stop(ctrl); 3797 if (strcmp(dhchap_secret, opts->dhchap_ctrl_secret)) { 3798 int ret; 3799 3800 ret = nvme_auth_generate_key(dhchap_secret, &ctrl->ctrl_key); 3801 if (ret) 3802 return ret; 3803 kfree(opts->dhchap_ctrl_secret); 3804 opts->dhchap_ctrl_secret = dhchap_secret; 3805 /* Key has changed; re-authentication with new key */ 3806 nvme_auth_reset(ctrl); 3807 } 3808 /* Start re-authentication */ 3809 dev_info(ctrl->device, "re-authenticating controller\n"); 3810 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 3811 3812 return count; 3813 } 3814 static DEVICE_ATTR(dhchap_ctrl_secret, S_IRUGO | S_IWUSR, 3815 nvme_ctrl_dhchap_ctrl_secret_show, nvme_ctrl_dhchap_ctrl_secret_store); 3816 #endif 3817 3818 static struct attribute *nvme_dev_attrs[] = { 3819 &dev_attr_reset_controller.attr, 3820 &dev_attr_rescan_controller.attr, 3821 &dev_attr_model.attr, 3822 &dev_attr_serial.attr, 3823 &dev_attr_firmware_rev.attr, 3824 &dev_attr_cntlid.attr, 3825 &dev_attr_delete_controller.attr, 3826 &dev_attr_transport.attr, 3827 &dev_attr_subsysnqn.attr, 3828 &dev_attr_address.attr, 3829 &dev_attr_state.attr, 3830 &dev_attr_numa_node.attr, 3831 &dev_attr_queue_count.attr, 3832 &dev_attr_sqsize.attr, 3833 &dev_attr_hostnqn.attr, 3834 &dev_attr_hostid.attr, 3835 &dev_attr_ctrl_loss_tmo.attr, 3836 &dev_attr_reconnect_delay.attr, 3837 &dev_attr_fast_io_fail_tmo.attr, 3838 &dev_attr_kato.attr, 3839 &dev_attr_cntrltype.attr, 3840 &dev_attr_dctype.attr, 3841 #ifdef CONFIG_NVME_AUTH 3842 &dev_attr_dhchap_secret.attr, 3843 &dev_attr_dhchap_ctrl_secret.attr, 3844 #endif 3845 NULL 3846 }; 3847 3848 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 3849 struct attribute *a, int n) 3850 { 3851 struct device *dev = container_of(kobj, struct device, kobj); 3852 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3853 3854 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 3855 return 0; 3856 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 3857 return 0; 3858 if (a == &dev_attr_hostnqn.attr && !ctrl->opts) 3859 return 0; 3860 if (a == &dev_attr_hostid.attr && !ctrl->opts) 3861 return 0; 3862 if (a == &dev_attr_ctrl_loss_tmo.attr && !ctrl->opts) 3863 return 0; 3864 if (a == &dev_attr_reconnect_delay.attr && !ctrl->opts) 3865 return 0; 3866 if (a == &dev_attr_fast_io_fail_tmo.attr && !ctrl->opts) 3867 return 0; 3868 #ifdef CONFIG_NVME_AUTH 3869 if (a == &dev_attr_dhchap_secret.attr && !ctrl->opts) 3870 return 0; 3871 if (a == &dev_attr_dhchap_ctrl_secret.attr && !ctrl->opts) 3872 return 0; 3873 #endif 3874 3875 return a->mode; 3876 } 3877 3878 static const struct attribute_group nvme_dev_attrs_group = { 3879 .attrs = nvme_dev_attrs, 3880 .is_visible = nvme_dev_attrs_are_visible, 3881 }; 3882 3883 static const struct attribute_group *nvme_dev_attr_groups[] = { 3884 &nvme_dev_attrs_group, 3885 NULL, 3886 }; 3887 3888 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3889 unsigned nsid) 3890 { 3891 struct nvme_ns_head *h; 3892 3893 lockdep_assert_held(&ctrl->subsys->lock); 3894 3895 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3896 /* 3897 * Private namespaces can share NSIDs under some conditions. 3898 * In that case we can't use the same ns_head for namespaces 3899 * with the same NSID. 3900 */ 3901 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3902 continue; 3903 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3904 return h; 3905 } 3906 3907 return NULL; 3908 } 3909 3910 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3911 struct nvme_ns_ids *ids) 3912 { 3913 bool has_uuid = !uuid_is_null(&ids->uuid); 3914 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3915 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3916 struct nvme_ns_head *h; 3917 3918 lockdep_assert_held(&subsys->lock); 3919 3920 list_for_each_entry(h, &subsys->nsheads, entry) { 3921 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3922 return -EINVAL; 3923 if (has_nguid && 3924 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3925 return -EINVAL; 3926 if (has_eui64 && 3927 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3928 return -EINVAL; 3929 } 3930 3931 return 0; 3932 } 3933 3934 static void nvme_cdev_rel(struct device *dev) 3935 { 3936 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3937 } 3938 3939 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3940 { 3941 cdev_device_del(cdev, cdev_device); 3942 put_device(cdev_device); 3943 } 3944 3945 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3946 const struct file_operations *fops, struct module *owner) 3947 { 3948 int minor, ret; 3949 3950 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3951 if (minor < 0) 3952 return minor; 3953 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3954 cdev_device->class = nvme_ns_chr_class; 3955 cdev_device->release = nvme_cdev_rel; 3956 device_initialize(cdev_device); 3957 cdev_init(cdev, fops); 3958 cdev->owner = owner; 3959 ret = cdev_device_add(cdev, cdev_device); 3960 if (ret) 3961 put_device(cdev_device); 3962 3963 return ret; 3964 } 3965 3966 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3967 { 3968 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3969 } 3970 3971 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3972 { 3973 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3974 return 0; 3975 } 3976 3977 static const struct file_operations nvme_ns_chr_fops = { 3978 .owner = THIS_MODULE, 3979 .open = nvme_ns_chr_open, 3980 .release = nvme_ns_chr_release, 3981 .unlocked_ioctl = nvme_ns_chr_ioctl, 3982 .compat_ioctl = compat_ptr_ioctl, 3983 .uring_cmd = nvme_ns_chr_uring_cmd, 3984 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3985 }; 3986 3987 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3988 { 3989 int ret; 3990 3991 ns->cdev_device.parent = ns->ctrl->device; 3992 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3993 ns->ctrl->instance, ns->head->instance); 3994 if (ret) 3995 return ret; 3996 3997 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3998 ns->ctrl->ops->module); 3999 } 4000 4001 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 4002 struct nvme_ns_info *info) 4003 { 4004 struct nvme_ns_head *head; 4005 size_t size = sizeof(*head); 4006 int ret = -ENOMEM; 4007 4008 #ifdef CONFIG_NVME_MULTIPATH 4009 size += num_possible_nodes() * sizeof(struct nvme_ns *); 4010 #endif 4011 4012 head = kzalloc(size, GFP_KERNEL); 4013 if (!head) 4014 goto out; 4015 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 4016 if (ret < 0) 4017 goto out_free_head; 4018 head->instance = ret; 4019 INIT_LIST_HEAD(&head->list); 4020 ret = init_srcu_struct(&head->srcu); 4021 if (ret) 4022 goto out_ida_remove; 4023 head->subsys = ctrl->subsys; 4024 head->ns_id = info->nsid; 4025 head->ids = info->ids; 4026 head->shared = info->is_shared; 4027 kref_init(&head->ref); 4028 4029 if (head->ids.csi) { 4030 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 4031 if (ret) 4032 goto out_cleanup_srcu; 4033 } else 4034 head->effects = ctrl->effects; 4035 4036 ret = nvme_mpath_alloc_disk(ctrl, head); 4037 if (ret) 4038 goto out_cleanup_srcu; 4039 4040 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 4041 4042 kref_get(&ctrl->subsys->ref); 4043 4044 return head; 4045 out_cleanup_srcu: 4046 cleanup_srcu_struct(&head->srcu); 4047 out_ida_remove: 4048 ida_free(&ctrl->subsys->ns_ida, head->instance); 4049 out_free_head: 4050 kfree(head); 4051 out: 4052 if (ret > 0) 4053 ret = blk_status_to_errno(nvme_error_status(ret)); 4054 return ERR_PTR(ret); 4055 } 4056 4057 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 4058 struct nvme_ns_ids *ids) 4059 { 4060 struct nvme_subsystem *s; 4061 int ret = 0; 4062 4063 /* 4064 * Note that this check is racy as we try to avoid holding the global 4065 * lock over the whole ns_head creation. But it is only intended as 4066 * a sanity check anyway. 4067 */ 4068 mutex_lock(&nvme_subsystems_lock); 4069 list_for_each_entry(s, &nvme_subsystems, entry) { 4070 if (s == this) 4071 continue; 4072 mutex_lock(&s->lock); 4073 ret = nvme_subsys_check_duplicate_ids(s, ids); 4074 mutex_unlock(&s->lock); 4075 if (ret) 4076 break; 4077 } 4078 mutex_unlock(&nvme_subsystems_lock); 4079 4080 return ret; 4081 } 4082 4083 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 4084 { 4085 struct nvme_ctrl *ctrl = ns->ctrl; 4086 struct nvme_ns_head *head = NULL; 4087 int ret; 4088 4089 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 4090 if (ret) { 4091 dev_err(ctrl->device, 4092 "globally duplicate IDs for nsid %d\n", info->nsid); 4093 nvme_print_device_info(ctrl); 4094 return ret; 4095 } 4096 4097 mutex_lock(&ctrl->subsys->lock); 4098 head = nvme_find_ns_head(ctrl, info->nsid); 4099 if (!head) { 4100 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 4101 if (ret) { 4102 dev_err(ctrl->device, 4103 "duplicate IDs in subsystem for nsid %d\n", 4104 info->nsid); 4105 goto out_unlock; 4106 } 4107 head = nvme_alloc_ns_head(ctrl, info); 4108 if (IS_ERR(head)) { 4109 ret = PTR_ERR(head); 4110 goto out_unlock; 4111 } 4112 } else { 4113 ret = -EINVAL; 4114 if (!info->is_shared || !head->shared) { 4115 dev_err(ctrl->device, 4116 "Duplicate unshared namespace %d\n", 4117 info->nsid); 4118 goto out_put_ns_head; 4119 } 4120 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 4121 dev_err(ctrl->device, 4122 "IDs don't match for shared namespace %d\n", 4123 info->nsid); 4124 goto out_put_ns_head; 4125 } 4126 4127 if (!multipath && !list_empty(&head->list)) { 4128 dev_warn(ctrl->device, 4129 "Found shared namespace %d, but multipathing not supported.\n", 4130 info->nsid); 4131 dev_warn_once(ctrl->device, 4132 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 4133 } 4134 } 4135 4136 list_add_tail_rcu(&ns->siblings, &head->list); 4137 ns->head = head; 4138 mutex_unlock(&ctrl->subsys->lock); 4139 return 0; 4140 4141 out_put_ns_head: 4142 nvme_put_ns_head(head); 4143 out_unlock: 4144 mutex_unlock(&ctrl->subsys->lock); 4145 return ret; 4146 } 4147 4148 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4149 { 4150 struct nvme_ns *ns, *ret = NULL; 4151 4152 down_read(&ctrl->namespaces_rwsem); 4153 list_for_each_entry(ns, &ctrl->namespaces, list) { 4154 if (ns->head->ns_id == nsid) { 4155 if (!nvme_get_ns(ns)) 4156 continue; 4157 ret = ns; 4158 break; 4159 } 4160 if (ns->head->ns_id > nsid) 4161 break; 4162 } 4163 up_read(&ctrl->namespaces_rwsem); 4164 return ret; 4165 } 4166 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 4167 4168 /* 4169 * Add the namespace to the controller list while keeping the list ordered. 4170 */ 4171 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 4172 { 4173 struct nvme_ns *tmp; 4174 4175 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 4176 if (tmp->head->ns_id < ns->head->ns_id) { 4177 list_add(&ns->list, &tmp->list); 4178 return; 4179 } 4180 } 4181 list_add(&ns->list, &ns->ctrl->namespaces); 4182 } 4183 4184 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 4185 { 4186 struct nvme_ns *ns; 4187 struct gendisk *disk; 4188 int node = ctrl->numa_node; 4189 4190 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 4191 if (!ns) 4192 return; 4193 4194 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 4195 if (IS_ERR(disk)) 4196 goto out_free_ns; 4197 disk->fops = &nvme_bdev_ops; 4198 disk->private_data = ns; 4199 4200 ns->disk = disk; 4201 ns->queue = disk->queue; 4202 4203 if (ctrl->opts && ctrl->opts->data_digest) 4204 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 4205 4206 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 4207 if (ctrl->ops->supports_pci_p2pdma && 4208 ctrl->ops->supports_pci_p2pdma(ctrl)) 4209 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 4210 4211 ns->ctrl = ctrl; 4212 kref_init(&ns->kref); 4213 4214 if (nvme_init_ns_head(ns, info)) 4215 goto out_cleanup_disk; 4216 4217 /* 4218 * If multipathing is enabled, the device name for all disks and not 4219 * just those that represent shared namespaces needs to be based on the 4220 * subsystem instance. Using the controller instance for private 4221 * namespaces could lead to naming collisions between shared and private 4222 * namespaces if they don't use a common numbering scheme. 4223 * 4224 * If multipathing is not enabled, disk names must use the controller 4225 * instance as shared namespaces will show up as multiple block 4226 * devices. 4227 */ 4228 if (ns->head->disk) { 4229 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 4230 ctrl->instance, ns->head->instance); 4231 disk->flags |= GENHD_FL_HIDDEN; 4232 } else if (multipath) { 4233 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 4234 ns->head->instance); 4235 } else { 4236 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 4237 ns->head->instance); 4238 } 4239 4240 if (nvme_update_ns_info(ns, info)) 4241 goto out_unlink_ns; 4242 4243 down_write(&ctrl->namespaces_rwsem); 4244 nvme_ns_add_to_ctrl_list(ns); 4245 up_write(&ctrl->namespaces_rwsem); 4246 nvme_get_ctrl(ctrl); 4247 4248 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 4249 goto out_cleanup_ns_from_list; 4250 4251 if (!nvme_ns_head_multipath(ns->head)) 4252 nvme_add_ns_cdev(ns); 4253 4254 nvme_mpath_add_disk(ns, info->anagrpid); 4255 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 4256 4257 return; 4258 4259 out_cleanup_ns_from_list: 4260 nvme_put_ctrl(ctrl); 4261 down_write(&ctrl->namespaces_rwsem); 4262 list_del_init(&ns->list); 4263 up_write(&ctrl->namespaces_rwsem); 4264 out_unlink_ns: 4265 mutex_lock(&ctrl->subsys->lock); 4266 list_del_rcu(&ns->siblings); 4267 if (list_empty(&ns->head->list)) 4268 list_del_init(&ns->head->entry); 4269 mutex_unlock(&ctrl->subsys->lock); 4270 nvme_put_ns_head(ns->head); 4271 out_cleanup_disk: 4272 put_disk(disk); 4273 out_free_ns: 4274 kfree(ns); 4275 } 4276 4277 static void nvme_ns_remove(struct nvme_ns *ns) 4278 { 4279 bool last_path = false; 4280 4281 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 4282 return; 4283 4284 clear_bit(NVME_NS_READY, &ns->flags); 4285 set_capacity(ns->disk, 0); 4286 nvme_fault_inject_fini(&ns->fault_inject); 4287 4288 /* 4289 * Ensure that !NVME_NS_READY is seen by other threads to prevent 4290 * this ns going back into current_path. 4291 */ 4292 synchronize_srcu(&ns->head->srcu); 4293 4294 /* wait for concurrent submissions */ 4295 if (nvme_mpath_clear_current_path(ns)) 4296 synchronize_srcu(&ns->head->srcu); 4297 4298 mutex_lock(&ns->ctrl->subsys->lock); 4299 list_del_rcu(&ns->siblings); 4300 if (list_empty(&ns->head->list)) { 4301 list_del_init(&ns->head->entry); 4302 last_path = true; 4303 } 4304 mutex_unlock(&ns->ctrl->subsys->lock); 4305 4306 /* guarantee not available in head->list */ 4307 synchronize_srcu(&ns->head->srcu); 4308 4309 if (!nvme_ns_head_multipath(ns->head)) 4310 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 4311 del_gendisk(ns->disk); 4312 4313 down_write(&ns->ctrl->namespaces_rwsem); 4314 list_del_init(&ns->list); 4315 up_write(&ns->ctrl->namespaces_rwsem); 4316 4317 if (last_path) 4318 nvme_mpath_shutdown_disk(ns->head); 4319 nvme_put_ns(ns); 4320 } 4321 4322 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 4323 { 4324 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 4325 4326 if (ns) { 4327 nvme_ns_remove(ns); 4328 nvme_put_ns(ns); 4329 } 4330 } 4331 4332 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 4333 { 4334 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 4335 4336 if (test_bit(NVME_NS_DEAD, &ns->flags)) 4337 goto out; 4338 4339 ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 4340 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 4341 dev_err(ns->ctrl->device, 4342 "identifiers changed for nsid %d\n", ns->head->ns_id); 4343 goto out; 4344 } 4345 4346 ret = nvme_update_ns_info(ns, info); 4347 out: 4348 /* 4349 * Only remove the namespace if we got a fatal error back from the 4350 * device, otherwise ignore the error and just move on. 4351 * 4352 * TODO: we should probably schedule a delayed retry here. 4353 */ 4354 if (ret > 0 && (ret & NVME_SC_DNR)) 4355 nvme_ns_remove(ns); 4356 } 4357 4358 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4359 { 4360 struct nvme_ns_info info = { .nsid = nsid }; 4361 struct nvme_ns *ns; 4362 4363 if (nvme_identify_ns_descs(ctrl, &info)) 4364 return; 4365 4366 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 4367 dev_warn(ctrl->device, 4368 "command set not reported for nsid: %d\n", nsid); 4369 return; 4370 } 4371 4372 /* 4373 * If available try to use the Command Set Idependent Identify Namespace 4374 * data structure to find all the generic information that is needed to 4375 * set up a namespace. If not fall back to the legacy version. 4376 */ 4377 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 4378 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) { 4379 if (nvme_ns_info_from_id_cs_indep(ctrl, &info)) 4380 return; 4381 } else { 4382 if (nvme_ns_info_from_identify(ctrl, &info)) 4383 return; 4384 } 4385 4386 /* 4387 * Ignore the namespace if it is not ready. We will get an AEN once it 4388 * becomes ready and restart the scan. 4389 */ 4390 if (!info.is_ready) 4391 return; 4392 4393 ns = nvme_find_get_ns(ctrl, nsid); 4394 if (ns) { 4395 nvme_validate_ns(ns, &info); 4396 nvme_put_ns(ns); 4397 } else { 4398 nvme_alloc_ns(ctrl, &info); 4399 } 4400 } 4401 4402 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4403 unsigned nsid) 4404 { 4405 struct nvme_ns *ns, *next; 4406 LIST_HEAD(rm_list); 4407 4408 down_write(&ctrl->namespaces_rwsem); 4409 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4410 if (ns->head->ns_id > nsid || test_bit(NVME_NS_DEAD, &ns->flags)) 4411 list_move_tail(&ns->list, &rm_list); 4412 } 4413 up_write(&ctrl->namespaces_rwsem); 4414 4415 list_for_each_entry_safe(ns, next, &rm_list, list) 4416 nvme_ns_remove(ns); 4417 4418 } 4419 4420 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4421 { 4422 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4423 __le32 *ns_list; 4424 u32 prev = 0; 4425 int ret = 0, i; 4426 4427 if (nvme_ctrl_limited_cns(ctrl)) 4428 return -EOPNOTSUPP; 4429 4430 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4431 if (!ns_list) 4432 return -ENOMEM; 4433 4434 for (;;) { 4435 struct nvme_command cmd = { 4436 .identify.opcode = nvme_admin_identify, 4437 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4438 .identify.nsid = cpu_to_le32(prev), 4439 }; 4440 4441 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4442 NVME_IDENTIFY_DATA_SIZE); 4443 if (ret) { 4444 dev_warn(ctrl->device, 4445 "Identify NS List failed (status=0x%x)\n", ret); 4446 goto free; 4447 } 4448 4449 for (i = 0; i < nr_entries; i++) { 4450 u32 nsid = le32_to_cpu(ns_list[i]); 4451 4452 if (!nsid) /* end of the list? */ 4453 goto out; 4454 nvme_scan_ns(ctrl, nsid); 4455 while (++prev < nsid) 4456 nvme_ns_remove_by_nsid(ctrl, prev); 4457 } 4458 } 4459 out: 4460 nvme_remove_invalid_namespaces(ctrl, prev); 4461 free: 4462 kfree(ns_list); 4463 return ret; 4464 } 4465 4466 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4467 { 4468 struct nvme_id_ctrl *id; 4469 u32 nn, i; 4470 4471 if (nvme_identify_ctrl(ctrl, &id)) 4472 return; 4473 nn = le32_to_cpu(id->nn); 4474 kfree(id); 4475 4476 for (i = 1; i <= nn; i++) 4477 nvme_scan_ns(ctrl, i); 4478 4479 nvme_remove_invalid_namespaces(ctrl, nn); 4480 } 4481 4482 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4483 { 4484 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4485 __le32 *log; 4486 int error; 4487 4488 log = kzalloc(log_size, GFP_KERNEL); 4489 if (!log) 4490 return; 4491 4492 /* 4493 * We need to read the log to clear the AEN, but we don't want to rely 4494 * on it for the changed namespace information as userspace could have 4495 * raced with us in reading the log page, which could cause us to miss 4496 * updates. 4497 */ 4498 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4499 NVME_CSI_NVM, log, log_size, 0); 4500 if (error) 4501 dev_warn(ctrl->device, 4502 "reading changed ns log failed: %d\n", error); 4503 4504 kfree(log); 4505 } 4506 4507 static void nvme_scan_work(struct work_struct *work) 4508 { 4509 struct nvme_ctrl *ctrl = 4510 container_of(work, struct nvme_ctrl, scan_work); 4511 int ret; 4512 4513 /* No tagset on a live ctrl means IO queues could not created */ 4514 if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) 4515 return; 4516 4517 /* 4518 * Identify controller limits can change at controller reset due to 4519 * new firmware download, even though it is not common we cannot ignore 4520 * such scenario. Controller's non-mdts limits are reported in the unit 4521 * of logical blocks that is dependent on the format of attached 4522 * namespace. Hence re-read the limits at the time of ns allocation. 4523 */ 4524 ret = nvme_init_non_mdts_limits(ctrl); 4525 if (ret < 0) { 4526 dev_warn(ctrl->device, 4527 "reading non-mdts-limits failed: %d\n", ret); 4528 return; 4529 } 4530 4531 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4532 dev_info(ctrl->device, "rescanning namespaces.\n"); 4533 nvme_clear_changed_ns_log(ctrl); 4534 } 4535 4536 mutex_lock(&ctrl->scan_lock); 4537 if (nvme_scan_ns_list(ctrl) != 0) 4538 nvme_scan_ns_sequential(ctrl); 4539 mutex_unlock(&ctrl->scan_lock); 4540 } 4541 4542 /* 4543 * This function iterates the namespace list unlocked to allow recovery from 4544 * controller failure. It is up to the caller to ensure the namespace list is 4545 * not modified by scan work while this function is executing. 4546 */ 4547 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4548 { 4549 struct nvme_ns *ns, *next; 4550 LIST_HEAD(ns_list); 4551 4552 /* 4553 * make sure to requeue I/O to all namespaces as these 4554 * might result from the scan itself and must complete 4555 * for the scan_work to make progress 4556 */ 4557 nvme_mpath_clear_ctrl_paths(ctrl); 4558 4559 /* prevent racing with ns scanning */ 4560 flush_work(&ctrl->scan_work); 4561 4562 /* 4563 * The dead states indicates the controller was not gracefully 4564 * disconnected. In that case, we won't be able to flush any data while 4565 * removing the namespaces' disks; fail all the queues now to avoid 4566 * potentially having to clean up the failed sync later. 4567 */ 4568 if (ctrl->state == NVME_CTRL_DEAD) 4569 nvme_kill_queues(ctrl); 4570 4571 /* this is a no-op when called from the controller reset handler */ 4572 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4573 4574 down_write(&ctrl->namespaces_rwsem); 4575 list_splice_init(&ctrl->namespaces, &ns_list); 4576 up_write(&ctrl->namespaces_rwsem); 4577 4578 list_for_each_entry_safe(ns, next, &ns_list, list) 4579 nvme_ns_remove(ns); 4580 } 4581 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4582 4583 static int nvme_class_uevent(struct device *dev, struct kobj_uevent_env *env) 4584 { 4585 struct nvme_ctrl *ctrl = 4586 container_of(dev, struct nvme_ctrl, ctrl_device); 4587 struct nvmf_ctrl_options *opts = ctrl->opts; 4588 int ret; 4589 4590 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4591 if (ret) 4592 return ret; 4593 4594 if (opts) { 4595 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4596 if (ret) 4597 return ret; 4598 4599 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4600 opts->trsvcid ?: "none"); 4601 if (ret) 4602 return ret; 4603 4604 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4605 opts->host_traddr ?: "none"); 4606 if (ret) 4607 return ret; 4608 4609 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4610 opts->host_iface ?: "none"); 4611 } 4612 return ret; 4613 } 4614 4615 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4616 { 4617 char *envp[2] = { envdata, NULL }; 4618 4619 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4620 } 4621 4622 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4623 { 4624 char *envp[2] = { NULL, NULL }; 4625 u32 aen_result = ctrl->aen_result; 4626 4627 ctrl->aen_result = 0; 4628 if (!aen_result) 4629 return; 4630 4631 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4632 if (!envp[0]) 4633 return; 4634 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4635 kfree(envp[0]); 4636 } 4637 4638 static void nvme_async_event_work(struct work_struct *work) 4639 { 4640 struct nvme_ctrl *ctrl = 4641 container_of(work, struct nvme_ctrl, async_event_work); 4642 4643 nvme_aen_uevent(ctrl); 4644 4645 /* 4646 * The transport drivers must guarantee AER submission here is safe by 4647 * flushing ctrl async_event_work after changing the controller state 4648 * from LIVE and before freeing the admin queue. 4649 */ 4650 if (ctrl->state == NVME_CTRL_LIVE) 4651 ctrl->ops->submit_async_event(ctrl); 4652 } 4653 4654 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4655 { 4656 4657 u32 csts; 4658 4659 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4660 return false; 4661 4662 if (csts == ~0) 4663 return false; 4664 4665 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4666 } 4667 4668 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4669 { 4670 struct nvme_fw_slot_info_log *log; 4671 4672 log = kmalloc(sizeof(*log), GFP_KERNEL); 4673 if (!log) 4674 return; 4675 4676 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4677 log, sizeof(*log), 0)) 4678 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4679 kfree(log); 4680 } 4681 4682 static void nvme_fw_act_work(struct work_struct *work) 4683 { 4684 struct nvme_ctrl *ctrl = container_of(work, 4685 struct nvme_ctrl, fw_act_work); 4686 unsigned long fw_act_timeout; 4687 4688 if (ctrl->mtfa) 4689 fw_act_timeout = jiffies + 4690 msecs_to_jiffies(ctrl->mtfa * 100); 4691 else 4692 fw_act_timeout = jiffies + 4693 msecs_to_jiffies(admin_timeout * 1000); 4694 4695 nvme_stop_queues(ctrl); 4696 while (nvme_ctrl_pp_status(ctrl)) { 4697 if (time_after(jiffies, fw_act_timeout)) { 4698 dev_warn(ctrl->device, 4699 "Fw activation timeout, reset controller\n"); 4700 nvme_try_sched_reset(ctrl); 4701 return; 4702 } 4703 msleep(100); 4704 } 4705 4706 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4707 return; 4708 4709 nvme_start_queues(ctrl); 4710 /* read FW slot information to clear the AER */ 4711 nvme_get_fw_slot_info(ctrl); 4712 4713 queue_work(nvme_wq, &ctrl->async_event_work); 4714 } 4715 4716 static u32 nvme_aer_type(u32 result) 4717 { 4718 return result & 0x7; 4719 } 4720 4721 static u32 nvme_aer_subtype(u32 result) 4722 { 4723 return (result & 0xff00) >> 8; 4724 } 4725 4726 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4727 { 4728 u32 aer_notice_type = nvme_aer_subtype(result); 4729 bool requeue = true; 4730 4731 trace_nvme_async_event(ctrl, aer_notice_type); 4732 4733 switch (aer_notice_type) { 4734 case NVME_AER_NOTICE_NS_CHANGED: 4735 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4736 nvme_queue_scan(ctrl); 4737 break; 4738 case NVME_AER_NOTICE_FW_ACT_STARTING: 4739 /* 4740 * We are (ab)using the RESETTING state to prevent subsequent 4741 * recovery actions from interfering with the controller's 4742 * firmware activation. 4743 */ 4744 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4745 nvme_auth_stop(ctrl); 4746 requeue = false; 4747 queue_work(nvme_wq, &ctrl->fw_act_work); 4748 } 4749 break; 4750 #ifdef CONFIG_NVME_MULTIPATH 4751 case NVME_AER_NOTICE_ANA: 4752 if (!ctrl->ana_log_buf) 4753 break; 4754 queue_work(nvme_wq, &ctrl->ana_work); 4755 break; 4756 #endif 4757 case NVME_AER_NOTICE_DISC_CHANGED: 4758 ctrl->aen_result = result; 4759 break; 4760 default: 4761 dev_warn(ctrl->device, "async event result %08x\n", result); 4762 } 4763 return requeue; 4764 } 4765 4766 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4767 { 4768 trace_nvme_async_event(ctrl, NVME_AER_ERROR); 4769 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4770 nvme_reset_ctrl(ctrl); 4771 } 4772 4773 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4774 volatile union nvme_result *res) 4775 { 4776 u32 result = le32_to_cpu(res->u32); 4777 u32 aer_type = nvme_aer_type(result); 4778 u32 aer_subtype = nvme_aer_subtype(result); 4779 bool requeue = true; 4780 4781 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4782 return; 4783 4784 switch (aer_type) { 4785 case NVME_AER_NOTICE: 4786 requeue = nvme_handle_aen_notice(ctrl, result); 4787 break; 4788 case NVME_AER_ERROR: 4789 /* 4790 * For a persistent internal error, don't run async_event_work 4791 * to submit a new AER. The controller reset will do it. 4792 */ 4793 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4794 nvme_handle_aer_persistent_error(ctrl); 4795 return; 4796 } 4797 fallthrough; 4798 case NVME_AER_SMART: 4799 case NVME_AER_CSS: 4800 case NVME_AER_VS: 4801 trace_nvme_async_event(ctrl, aer_type); 4802 ctrl->aen_result = result; 4803 break; 4804 default: 4805 break; 4806 } 4807 4808 if (requeue) 4809 queue_work(nvme_wq, &ctrl->async_event_work); 4810 } 4811 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4812 4813 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4814 const struct blk_mq_ops *ops, unsigned int flags, 4815 unsigned int cmd_size) 4816 { 4817 int ret; 4818 4819 memset(set, 0, sizeof(*set)); 4820 set->ops = ops; 4821 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4822 if (ctrl->ops->flags & NVME_F_FABRICS) 4823 set->reserved_tags = NVMF_RESERVED_TAGS; 4824 set->numa_node = ctrl->numa_node; 4825 set->flags = flags; 4826 set->cmd_size = cmd_size; 4827 set->driver_data = ctrl; 4828 set->nr_hw_queues = 1; 4829 set->timeout = NVME_ADMIN_TIMEOUT; 4830 ret = blk_mq_alloc_tag_set(set); 4831 if (ret) 4832 return ret; 4833 4834 ctrl->admin_q = blk_mq_init_queue(set); 4835 if (IS_ERR(ctrl->admin_q)) { 4836 ret = PTR_ERR(ctrl->admin_q); 4837 goto out_free_tagset; 4838 } 4839 4840 if (ctrl->ops->flags & NVME_F_FABRICS) { 4841 ctrl->fabrics_q = blk_mq_init_queue(set); 4842 if (IS_ERR(ctrl->fabrics_q)) { 4843 ret = PTR_ERR(ctrl->fabrics_q); 4844 goto out_cleanup_admin_q; 4845 } 4846 } 4847 4848 ctrl->admin_tagset = set; 4849 return 0; 4850 4851 out_cleanup_admin_q: 4852 blk_mq_destroy_queue(ctrl->admin_q); 4853 out_free_tagset: 4854 blk_mq_free_tag_set(ctrl->admin_tagset); 4855 return ret; 4856 } 4857 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4858 4859 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4860 { 4861 blk_mq_destroy_queue(ctrl->admin_q); 4862 if (ctrl->ops->flags & NVME_F_FABRICS) 4863 blk_mq_destroy_queue(ctrl->fabrics_q); 4864 blk_mq_free_tag_set(ctrl->admin_tagset); 4865 } 4866 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4867 4868 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4869 const struct blk_mq_ops *ops, unsigned int flags, 4870 unsigned int cmd_size) 4871 { 4872 int ret; 4873 4874 memset(set, 0, sizeof(*set)); 4875 set->ops = ops; 4876 set->queue_depth = ctrl->sqsize + 1; 4877 set->reserved_tags = NVMF_RESERVED_TAGS; 4878 set->numa_node = ctrl->numa_node; 4879 set->flags = flags; 4880 set->cmd_size = cmd_size, 4881 set->driver_data = ctrl; 4882 set->nr_hw_queues = ctrl->queue_count - 1; 4883 set->timeout = NVME_IO_TIMEOUT; 4884 if (ops->map_queues) 4885 set->nr_maps = ctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; 4886 ret = blk_mq_alloc_tag_set(set); 4887 if (ret) 4888 return ret; 4889 4890 if (ctrl->ops->flags & NVME_F_FABRICS) { 4891 ctrl->connect_q = blk_mq_init_queue(set); 4892 if (IS_ERR(ctrl->connect_q)) { 4893 ret = PTR_ERR(ctrl->connect_q); 4894 goto out_free_tag_set; 4895 } 4896 } 4897 4898 ctrl->tagset = set; 4899 return 0; 4900 4901 out_free_tag_set: 4902 blk_mq_free_tag_set(set); 4903 return ret; 4904 } 4905 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4906 4907 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4908 { 4909 if (ctrl->ops->flags & NVME_F_FABRICS) 4910 blk_mq_destroy_queue(ctrl->connect_q); 4911 blk_mq_free_tag_set(ctrl->tagset); 4912 } 4913 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4914 4915 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4916 { 4917 nvme_mpath_stop(ctrl); 4918 nvme_auth_stop(ctrl); 4919 nvme_stop_keep_alive(ctrl); 4920 nvme_stop_failfast_work(ctrl); 4921 flush_work(&ctrl->async_event_work); 4922 cancel_work_sync(&ctrl->fw_act_work); 4923 if (ctrl->ops->stop_ctrl) 4924 ctrl->ops->stop_ctrl(ctrl); 4925 } 4926 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4927 4928 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4929 { 4930 nvme_start_keep_alive(ctrl); 4931 4932 nvme_enable_aen(ctrl); 4933 4934 /* 4935 * persistent discovery controllers need to send indication to userspace 4936 * to re-read the discovery log page to learn about possible changes 4937 * that were missed. We identify persistent discovery controllers by 4938 * checking that they started once before, hence are reconnecting back. 4939 */ 4940 if (test_and_set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4941 nvme_discovery_ctrl(ctrl)) 4942 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4943 4944 if (ctrl->queue_count > 1) { 4945 nvme_queue_scan(ctrl); 4946 nvme_start_queues(ctrl); 4947 nvme_mpath_update(ctrl); 4948 } 4949 4950 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4951 } 4952 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4953 4954 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4955 { 4956 nvme_hwmon_exit(ctrl); 4957 nvme_fault_inject_fini(&ctrl->fault_inject); 4958 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4959 cdev_device_del(&ctrl->cdev, ctrl->device); 4960 nvme_put_ctrl(ctrl); 4961 } 4962 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4963 4964 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4965 { 4966 struct nvme_effects_log *cel; 4967 unsigned long i; 4968 4969 xa_for_each(&ctrl->cels, i, cel) { 4970 xa_erase(&ctrl->cels, i); 4971 kfree(cel); 4972 } 4973 4974 xa_destroy(&ctrl->cels); 4975 } 4976 4977 static void nvme_free_ctrl(struct device *dev) 4978 { 4979 struct nvme_ctrl *ctrl = 4980 container_of(dev, struct nvme_ctrl, ctrl_device); 4981 struct nvme_subsystem *subsys = ctrl->subsys; 4982 4983 if (!subsys || ctrl->instance != subsys->instance) 4984 ida_free(&nvme_instance_ida, ctrl->instance); 4985 4986 nvme_free_cels(ctrl); 4987 nvme_mpath_uninit(ctrl); 4988 nvme_auth_stop(ctrl); 4989 nvme_auth_free(ctrl); 4990 __free_page(ctrl->discard_page); 4991 4992 if (subsys) { 4993 mutex_lock(&nvme_subsystems_lock); 4994 list_del(&ctrl->subsys_entry); 4995 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4996 mutex_unlock(&nvme_subsystems_lock); 4997 } 4998 4999 ctrl->ops->free_ctrl(ctrl); 5000 5001 if (subsys) 5002 nvme_put_subsystem(subsys); 5003 } 5004 5005 /* 5006 * Initialize a NVMe controller structures. This needs to be called during 5007 * earliest initialization so that we have the initialized structured around 5008 * during probing. 5009 */ 5010 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 5011 const struct nvme_ctrl_ops *ops, unsigned long quirks) 5012 { 5013 int ret; 5014 5015 ctrl->state = NVME_CTRL_NEW; 5016 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 5017 spin_lock_init(&ctrl->lock); 5018 mutex_init(&ctrl->scan_lock); 5019 INIT_LIST_HEAD(&ctrl->namespaces); 5020 xa_init(&ctrl->cels); 5021 init_rwsem(&ctrl->namespaces_rwsem); 5022 ctrl->dev = dev; 5023 ctrl->ops = ops; 5024 ctrl->quirks = quirks; 5025 ctrl->numa_node = NUMA_NO_NODE; 5026 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 5027 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 5028 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 5029 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 5030 init_waitqueue_head(&ctrl->state_wq); 5031 5032 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 5033 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 5034 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 5035 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 5036 5037 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 5038 PAGE_SIZE); 5039 ctrl->discard_page = alloc_page(GFP_KERNEL); 5040 if (!ctrl->discard_page) { 5041 ret = -ENOMEM; 5042 goto out; 5043 } 5044 5045 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 5046 if (ret < 0) 5047 goto out; 5048 ctrl->instance = ret; 5049 5050 device_initialize(&ctrl->ctrl_device); 5051 ctrl->device = &ctrl->ctrl_device; 5052 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 5053 ctrl->instance); 5054 ctrl->device->class = nvme_class; 5055 ctrl->device->parent = ctrl->dev; 5056 ctrl->device->groups = nvme_dev_attr_groups; 5057 ctrl->device->release = nvme_free_ctrl; 5058 dev_set_drvdata(ctrl->device, ctrl); 5059 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 5060 if (ret) 5061 goto out_release_instance; 5062 5063 nvme_get_ctrl(ctrl); 5064 cdev_init(&ctrl->cdev, &nvme_dev_fops); 5065 ctrl->cdev.owner = ops->module; 5066 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 5067 if (ret) 5068 goto out_free_name; 5069 5070 /* 5071 * Initialize latency tolerance controls. The sysfs files won't 5072 * be visible to userspace unless the device actually supports APST. 5073 */ 5074 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 5075 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 5076 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 5077 5078 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 5079 nvme_mpath_init_ctrl(ctrl); 5080 nvme_auth_init_ctrl(ctrl); 5081 5082 return 0; 5083 out_free_name: 5084 nvme_put_ctrl(ctrl); 5085 kfree_const(ctrl->device->kobj.name); 5086 out_release_instance: 5087 ida_free(&nvme_instance_ida, ctrl->instance); 5088 out: 5089 if (ctrl->discard_page) 5090 __free_page(ctrl->discard_page); 5091 return ret; 5092 } 5093 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 5094 5095 static void nvme_start_ns_queue(struct nvme_ns *ns) 5096 { 5097 if (test_and_clear_bit(NVME_NS_STOPPED, &ns->flags)) 5098 blk_mq_unquiesce_queue(ns->queue); 5099 } 5100 5101 static void nvme_stop_ns_queue(struct nvme_ns *ns) 5102 { 5103 if (!test_and_set_bit(NVME_NS_STOPPED, &ns->flags)) 5104 blk_mq_quiesce_queue(ns->queue); 5105 else 5106 blk_mq_wait_quiesce_done(ns->queue); 5107 } 5108 5109 /* 5110 * Prepare a queue for teardown. 5111 * 5112 * This must forcibly unquiesce queues to avoid blocking dispatch, and only set 5113 * the capacity to 0 after that to avoid blocking dispatchers that may be 5114 * holding bd_butex. This will end buffered writers dirtying pages that can't 5115 * be synced. 5116 */ 5117 static void nvme_set_queue_dying(struct nvme_ns *ns) 5118 { 5119 if (test_and_set_bit(NVME_NS_DEAD, &ns->flags)) 5120 return; 5121 5122 blk_mark_disk_dead(ns->disk); 5123 nvme_start_ns_queue(ns); 5124 5125 set_capacity_and_notify(ns->disk, 0); 5126 } 5127 5128 /** 5129 * nvme_kill_queues(): Ends all namespace queues 5130 * @ctrl: the dead controller that needs to end 5131 * 5132 * Call this function when the driver determines it is unable to get the 5133 * controller in a state capable of servicing IO. 5134 */ 5135 void nvme_kill_queues(struct nvme_ctrl *ctrl) 5136 { 5137 struct nvme_ns *ns; 5138 5139 down_read(&ctrl->namespaces_rwsem); 5140 5141 /* Forcibly unquiesce queues to avoid blocking dispatch */ 5142 if (ctrl->admin_q && !blk_queue_dying(ctrl->admin_q)) 5143 nvme_start_admin_queue(ctrl); 5144 5145 list_for_each_entry(ns, &ctrl->namespaces, list) 5146 nvme_set_queue_dying(ns); 5147 5148 up_read(&ctrl->namespaces_rwsem); 5149 } 5150 EXPORT_SYMBOL_GPL(nvme_kill_queues); 5151 5152 void nvme_unfreeze(struct nvme_ctrl *ctrl) 5153 { 5154 struct nvme_ns *ns; 5155 5156 down_read(&ctrl->namespaces_rwsem); 5157 list_for_each_entry(ns, &ctrl->namespaces, list) 5158 blk_mq_unfreeze_queue(ns->queue); 5159 up_read(&ctrl->namespaces_rwsem); 5160 } 5161 EXPORT_SYMBOL_GPL(nvme_unfreeze); 5162 5163 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 5164 { 5165 struct nvme_ns *ns; 5166 5167 down_read(&ctrl->namespaces_rwsem); 5168 list_for_each_entry(ns, &ctrl->namespaces, list) { 5169 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 5170 if (timeout <= 0) 5171 break; 5172 } 5173 up_read(&ctrl->namespaces_rwsem); 5174 return timeout; 5175 } 5176 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 5177 5178 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 5179 { 5180 struct nvme_ns *ns; 5181 5182 down_read(&ctrl->namespaces_rwsem); 5183 list_for_each_entry(ns, &ctrl->namespaces, list) 5184 blk_mq_freeze_queue_wait(ns->queue); 5185 up_read(&ctrl->namespaces_rwsem); 5186 } 5187 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 5188 5189 void nvme_start_freeze(struct nvme_ctrl *ctrl) 5190 { 5191 struct nvme_ns *ns; 5192 5193 down_read(&ctrl->namespaces_rwsem); 5194 list_for_each_entry(ns, &ctrl->namespaces, list) 5195 blk_freeze_queue_start(ns->queue); 5196 up_read(&ctrl->namespaces_rwsem); 5197 } 5198 EXPORT_SYMBOL_GPL(nvme_start_freeze); 5199 5200 void nvme_stop_queues(struct nvme_ctrl *ctrl) 5201 { 5202 struct nvme_ns *ns; 5203 5204 down_read(&ctrl->namespaces_rwsem); 5205 list_for_each_entry(ns, &ctrl->namespaces, list) 5206 nvme_stop_ns_queue(ns); 5207 up_read(&ctrl->namespaces_rwsem); 5208 } 5209 EXPORT_SYMBOL_GPL(nvme_stop_queues); 5210 5211 void nvme_start_queues(struct nvme_ctrl *ctrl) 5212 { 5213 struct nvme_ns *ns; 5214 5215 down_read(&ctrl->namespaces_rwsem); 5216 list_for_each_entry(ns, &ctrl->namespaces, list) 5217 nvme_start_ns_queue(ns); 5218 up_read(&ctrl->namespaces_rwsem); 5219 } 5220 EXPORT_SYMBOL_GPL(nvme_start_queues); 5221 5222 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl) 5223 { 5224 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5225 blk_mq_quiesce_queue(ctrl->admin_q); 5226 else 5227 blk_mq_wait_quiesce_done(ctrl->admin_q); 5228 } 5229 EXPORT_SYMBOL_GPL(nvme_stop_admin_queue); 5230 5231 void nvme_start_admin_queue(struct nvme_ctrl *ctrl) 5232 { 5233 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5234 blk_mq_unquiesce_queue(ctrl->admin_q); 5235 } 5236 EXPORT_SYMBOL_GPL(nvme_start_admin_queue); 5237 5238 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 5239 { 5240 struct nvme_ns *ns; 5241 5242 down_read(&ctrl->namespaces_rwsem); 5243 list_for_each_entry(ns, &ctrl->namespaces, list) 5244 blk_sync_queue(ns->queue); 5245 up_read(&ctrl->namespaces_rwsem); 5246 } 5247 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 5248 5249 void nvme_sync_queues(struct nvme_ctrl *ctrl) 5250 { 5251 nvme_sync_io_queues(ctrl); 5252 if (ctrl->admin_q) 5253 blk_sync_queue(ctrl->admin_q); 5254 } 5255 EXPORT_SYMBOL_GPL(nvme_sync_queues); 5256 5257 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 5258 { 5259 if (file->f_op != &nvme_dev_fops) 5260 return NULL; 5261 return file->private_data; 5262 } 5263 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 5264 5265 /* 5266 * Check we didn't inadvertently grow the command structure sizes: 5267 */ 5268 static inline void _nvme_check_size(void) 5269 { 5270 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 5271 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 5272 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 5273 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 5274 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 5275 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 5276 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 5277 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 5278 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 5279 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 5280 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 5281 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 5282 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 5283 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 5284 NVME_IDENTIFY_DATA_SIZE); 5285 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 5286 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 5287 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 5288 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 5289 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 5290 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 5291 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 5292 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 5293 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 5294 } 5295 5296 5297 static int __init nvme_core_init(void) 5298 { 5299 int result = -ENOMEM; 5300 5301 _nvme_check_size(); 5302 5303 nvme_wq = alloc_workqueue("nvme-wq", 5304 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 5305 if (!nvme_wq) 5306 goto out; 5307 5308 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 5309 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 5310 if (!nvme_reset_wq) 5311 goto destroy_wq; 5312 5313 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 5314 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 5315 if (!nvme_delete_wq) 5316 goto destroy_reset_wq; 5317 5318 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 5319 NVME_MINORS, "nvme"); 5320 if (result < 0) 5321 goto destroy_delete_wq; 5322 5323 nvme_class = class_create(THIS_MODULE, "nvme"); 5324 if (IS_ERR(nvme_class)) { 5325 result = PTR_ERR(nvme_class); 5326 goto unregister_chrdev; 5327 } 5328 nvme_class->dev_uevent = nvme_class_uevent; 5329 5330 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem"); 5331 if (IS_ERR(nvme_subsys_class)) { 5332 result = PTR_ERR(nvme_subsys_class); 5333 goto destroy_class; 5334 } 5335 5336 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 5337 "nvme-generic"); 5338 if (result < 0) 5339 goto destroy_subsys_class; 5340 5341 nvme_ns_chr_class = class_create(THIS_MODULE, "nvme-generic"); 5342 if (IS_ERR(nvme_ns_chr_class)) { 5343 result = PTR_ERR(nvme_ns_chr_class); 5344 goto unregister_generic_ns; 5345 } 5346 5347 return 0; 5348 5349 unregister_generic_ns: 5350 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5351 destroy_subsys_class: 5352 class_destroy(nvme_subsys_class); 5353 destroy_class: 5354 class_destroy(nvme_class); 5355 unregister_chrdev: 5356 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5357 destroy_delete_wq: 5358 destroy_workqueue(nvme_delete_wq); 5359 destroy_reset_wq: 5360 destroy_workqueue(nvme_reset_wq); 5361 destroy_wq: 5362 destroy_workqueue(nvme_wq); 5363 out: 5364 return result; 5365 } 5366 5367 static void __exit nvme_core_exit(void) 5368 { 5369 class_destroy(nvme_ns_chr_class); 5370 class_destroy(nvme_subsys_class); 5371 class_destroy(nvme_class); 5372 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5373 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5374 destroy_workqueue(nvme_delete_wq); 5375 destroy_workqueue(nvme_reset_wq); 5376 destroy_workqueue(nvme_wq); 5377 ida_destroy(&nvme_ns_chr_minor_ida); 5378 ida_destroy(&nvme_instance_ida); 5379 } 5380 5381 MODULE_LICENSE("GPL"); 5382 MODULE_VERSION("1.0"); 5383 module_init(nvme_core_init); 5384 module_exit(nvme_core_exit); 5385