xref: /linux/drivers/nvme/host/rdma.c (revision 021bc4b9)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVMe over Fabrics RDMA host code.
4  * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5  */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <rdma/mr_pool.h>
11 #include <linux/err.h>
12 #include <linux/string.h>
13 #include <linux/atomic.h>
14 #include <linux/blk-mq.h>
15 #include <linux/blk-integrity.h>
16 #include <linux/types.h>
17 #include <linux/list.h>
18 #include <linux/mutex.h>
19 #include <linux/scatterlist.h>
20 #include <linux/nvme.h>
21 #include <asm/unaligned.h>
22 
23 #include <rdma/ib_verbs.h>
24 #include <rdma/rdma_cm.h>
25 #include <linux/nvme-rdma.h>
26 
27 #include "nvme.h"
28 #include "fabrics.h"
29 
30 
31 #define NVME_RDMA_CM_TIMEOUT_MS		3000		/* 3 second */
32 
33 #define NVME_RDMA_MAX_SEGMENTS		256
34 
35 #define NVME_RDMA_MAX_INLINE_SEGMENTS	4
36 
37 #define NVME_RDMA_DATA_SGL_SIZE \
38 	(sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
39 #define NVME_RDMA_METADATA_SGL_SIZE \
40 	(sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
41 
42 struct nvme_rdma_device {
43 	struct ib_device	*dev;
44 	struct ib_pd		*pd;
45 	struct kref		ref;
46 	struct list_head	entry;
47 	unsigned int		num_inline_segments;
48 };
49 
50 struct nvme_rdma_qe {
51 	struct ib_cqe		cqe;
52 	void			*data;
53 	u64			dma;
54 };
55 
56 struct nvme_rdma_sgl {
57 	int			nents;
58 	struct sg_table		sg_table;
59 };
60 
61 struct nvme_rdma_queue;
62 struct nvme_rdma_request {
63 	struct nvme_request	req;
64 	struct ib_mr		*mr;
65 	struct nvme_rdma_qe	sqe;
66 	union nvme_result	result;
67 	__le16			status;
68 	refcount_t		ref;
69 	struct ib_sge		sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
70 	u32			num_sge;
71 	struct ib_reg_wr	reg_wr;
72 	struct ib_cqe		reg_cqe;
73 	struct nvme_rdma_queue  *queue;
74 	struct nvme_rdma_sgl	data_sgl;
75 	struct nvme_rdma_sgl	*metadata_sgl;
76 	bool			use_sig_mr;
77 };
78 
79 enum nvme_rdma_queue_flags {
80 	NVME_RDMA_Q_ALLOCATED		= 0,
81 	NVME_RDMA_Q_LIVE		= 1,
82 	NVME_RDMA_Q_TR_READY		= 2,
83 };
84 
85 struct nvme_rdma_queue {
86 	struct nvme_rdma_qe	*rsp_ring;
87 	int			queue_size;
88 	size_t			cmnd_capsule_len;
89 	struct nvme_rdma_ctrl	*ctrl;
90 	struct nvme_rdma_device	*device;
91 	struct ib_cq		*ib_cq;
92 	struct ib_qp		*qp;
93 
94 	unsigned long		flags;
95 	struct rdma_cm_id	*cm_id;
96 	int			cm_error;
97 	struct completion	cm_done;
98 	bool			pi_support;
99 	int			cq_size;
100 	struct mutex		queue_lock;
101 };
102 
103 struct nvme_rdma_ctrl {
104 	/* read only in the hot path */
105 	struct nvme_rdma_queue	*queues;
106 
107 	/* other member variables */
108 	struct blk_mq_tag_set	tag_set;
109 	struct work_struct	err_work;
110 
111 	struct nvme_rdma_qe	async_event_sqe;
112 
113 	struct delayed_work	reconnect_work;
114 
115 	struct list_head	list;
116 
117 	struct blk_mq_tag_set	admin_tag_set;
118 	struct nvme_rdma_device	*device;
119 
120 	u32			max_fr_pages;
121 
122 	struct sockaddr_storage addr;
123 	struct sockaddr_storage src_addr;
124 
125 	struct nvme_ctrl	ctrl;
126 	bool			use_inline_data;
127 	u32			io_queues[HCTX_MAX_TYPES];
128 };
129 
130 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
131 {
132 	return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
133 }
134 
135 static LIST_HEAD(device_list);
136 static DEFINE_MUTEX(device_list_mutex);
137 
138 static LIST_HEAD(nvme_rdma_ctrl_list);
139 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
140 
141 /*
142  * Disabling this option makes small I/O goes faster, but is fundamentally
143  * unsafe.  With it turned off we will have to register a global rkey that
144  * allows read and write access to all physical memory.
145  */
146 static bool register_always = true;
147 module_param(register_always, bool, 0444);
148 MODULE_PARM_DESC(register_always,
149 	 "Use memory registration even for contiguous memory regions");
150 
151 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
152 		struct rdma_cm_event *event);
153 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
154 static void nvme_rdma_complete_rq(struct request *rq);
155 
156 static const struct blk_mq_ops nvme_rdma_mq_ops;
157 static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
158 
159 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
160 {
161 	return queue - queue->ctrl->queues;
162 }
163 
164 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
165 {
166 	return nvme_rdma_queue_idx(queue) >
167 		queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
168 		queue->ctrl->io_queues[HCTX_TYPE_READ];
169 }
170 
171 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
172 {
173 	return queue->cmnd_capsule_len - sizeof(struct nvme_command);
174 }
175 
176 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
177 		size_t capsule_size, enum dma_data_direction dir)
178 {
179 	ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
180 	kfree(qe->data);
181 }
182 
183 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
184 		size_t capsule_size, enum dma_data_direction dir)
185 {
186 	qe->data = kzalloc(capsule_size, GFP_KERNEL);
187 	if (!qe->data)
188 		return -ENOMEM;
189 
190 	qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
191 	if (ib_dma_mapping_error(ibdev, qe->dma)) {
192 		kfree(qe->data);
193 		qe->data = NULL;
194 		return -ENOMEM;
195 	}
196 
197 	return 0;
198 }
199 
200 static void nvme_rdma_free_ring(struct ib_device *ibdev,
201 		struct nvme_rdma_qe *ring, size_t ib_queue_size,
202 		size_t capsule_size, enum dma_data_direction dir)
203 {
204 	int i;
205 
206 	for (i = 0; i < ib_queue_size; i++)
207 		nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
208 	kfree(ring);
209 }
210 
211 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
212 		size_t ib_queue_size, size_t capsule_size,
213 		enum dma_data_direction dir)
214 {
215 	struct nvme_rdma_qe *ring;
216 	int i;
217 
218 	ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
219 	if (!ring)
220 		return NULL;
221 
222 	/*
223 	 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
224 	 * lifetime. It's safe, since any chage in the underlying RDMA device
225 	 * will issue error recovery and queue re-creation.
226 	 */
227 	for (i = 0; i < ib_queue_size; i++) {
228 		if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
229 			goto out_free_ring;
230 	}
231 
232 	return ring;
233 
234 out_free_ring:
235 	nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
236 	return NULL;
237 }
238 
239 static void nvme_rdma_qp_event(struct ib_event *event, void *context)
240 {
241 	pr_debug("QP event %s (%d)\n",
242 		 ib_event_msg(event->event), event->event);
243 
244 }
245 
246 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
247 {
248 	int ret;
249 
250 	ret = wait_for_completion_interruptible(&queue->cm_done);
251 	if (ret)
252 		return ret;
253 	WARN_ON_ONCE(queue->cm_error > 0);
254 	return queue->cm_error;
255 }
256 
257 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
258 {
259 	struct nvme_rdma_device *dev = queue->device;
260 	struct ib_qp_init_attr init_attr;
261 	int ret;
262 
263 	memset(&init_attr, 0, sizeof(init_attr));
264 	init_attr.event_handler = nvme_rdma_qp_event;
265 	/* +1 for drain */
266 	init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
267 	/* +1 for drain */
268 	init_attr.cap.max_recv_wr = queue->queue_size + 1;
269 	init_attr.cap.max_recv_sge = 1;
270 	init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
271 	init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
272 	init_attr.qp_type = IB_QPT_RC;
273 	init_attr.send_cq = queue->ib_cq;
274 	init_attr.recv_cq = queue->ib_cq;
275 	if (queue->pi_support)
276 		init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
277 	init_attr.qp_context = queue;
278 
279 	ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
280 
281 	queue->qp = queue->cm_id->qp;
282 	return ret;
283 }
284 
285 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
286 		struct request *rq, unsigned int hctx_idx)
287 {
288 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
289 
290 	kfree(req->sqe.data);
291 }
292 
293 static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
294 		struct request *rq, unsigned int hctx_idx,
295 		unsigned int numa_node)
296 {
297 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data);
298 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
299 	int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
300 	struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
301 
302 	nvme_req(rq)->ctrl = &ctrl->ctrl;
303 	req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
304 	if (!req->sqe.data)
305 		return -ENOMEM;
306 
307 	/* metadata nvme_rdma_sgl struct is located after command's data SGL */
308 	if (queue->pi_support)
309 		req->metadata_sgl = (void *)nvme_req(rq) +
310 			sizeof(struct nvme_rdma_request) +
311 			NVME_RDMA_DATA_SGL_SIZE;
312 
313 	req->queue = queue;
314 	nvme_req(rq)->cmd = req->sqe.data;
315 
316 	return 0;
317 }
318 
319 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
320 		unsigned int hctx_idx)
321 {
322 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data);
323 	struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
324 
325 	BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
326 
327 	hctx->driver_data = queue;
328 	return 0;
329 }
330 
331 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
332 		unsigned int hctx_idx)
333 {
334 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data);
335 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
336 
337 	BUG_ON(hctx_idx != 0);
338 
339 	hctx->driver_data = queue;
340 	return 0;
341 }
342 
343 static void nvme_rdma_free_dev(struct kref *ref)
344 {
345 	struct nvme_rdma_device *ndev =
346 		container_of(ref, struct nvme_rdma_device, ref);
347 
348 	mutex_lock(&device_list_mutex);
349 	list_del(&ndev->entry);
350 	mutex_unlock(&device_list_mutex);
351 
352 	ib_dealloc_pd(ndev->pd);
353 	kfree(ndev);
354 }
355 
356 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
357 {
358 	kref_put(&dev->ref, nvme_rdma_free_dev);
359 }
360 
361 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
362 {
363 	return kref_get_unless_zero(&dev->ref);
364 }
365 
366 static struct nvme_rdma_device *
367 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
368 {
369 	struct nvme_rdma_device *ndev;
370 
371 	mutex_lock(&device_list_mutex);
372 	list_for_each_entry(ndev, &device_list, entry) {
373 		if (ndev->dev->node_guid == cm_id->device->node_guid &&
374 		    nvme_rdma_dev_get(ndev))
375 			goto out_unlock;
376 	}
377 
378 	ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
379 	if (!ndev)
380 		goto out_err;
381 
382 	ndev->dev = cm_id->device;
383 	kref_init(&ndev->ref);
384 
385 	ndev->pd = ib_alloc_pd(ndev->dev,
386 		register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
387 	if (IS_ERR(ndev->pd))
388 		goto out_free_dev;
389 
390 	if (!(ndev->dev->attrs.device_cap_flags &
391 	      IB_DEVICE_MEM_MGT_EXTENSIONS)) {
392 		dev_err(&ndev->dev->dev,
393 			"Memory registrations not supported.\n");
394 		goto out_free_pd;
395 	}
396 
397 	ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
398 					ndev->dev->attrs.max_send_sge - 1);
399 	list_add(&ndev->entry, &device_list);
400 out_unlock:
401 	mutex_unlock(&device_list_mutex);
402 	return ndev;
403 
404 out_free_pd:
405 	ib_dealloc_pd(ndev->pd);
406 out_free_dev:
407 	kfree(ndev);
408 out_err:
409 	mutex_unlock(&device_list_mutex);
410 	return NULL;
411 }
412 
413 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
414 {
415 	if (nvme_rdma_poll_queue(queue))
416 		ib_free_cq(queue->ib_cq);
417 	else
418 		ib_cq_pool_put(queue->ib_cq, queue->cq_size);
419 }
420 
421 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
422 {
423 	struct nvme_rdma_device *dev;
424 	struct ib_device *ibdev;
425 
426 	if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
427 		return;
428 
429 	dev = queue->device;
430 	ibdev = dev->dev;
431 
432 	if (queue->pi_support)
433 		ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
434 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
435 
436 	/*
437 	 * The cm_id object might have been destroyed during RDMA connection
438 	 * establishment error flow to avoid getting other cma events, thus
439 	 * the destruction of the QP shouldn't use rdma_cm API.
440 	 */
441 	ib_destroy_qp(queue->qp);
442 	nvme_rdma_free_cq(queue);
443 
444 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
445 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
446 
447 	nvme_rdma_dev_put(dev);
448 }
449 
450 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
451 {
452 	u32 max_page_list_len;
453 
454 	if (pi_support)
455 		max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
456 	else
457 		max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
458 
459 	return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
460 }
461 
462 static int nvme_rdma_create_cq(struct ib_device *ibdev,
463 		struct nvme_rdma_queue *queue)
464 {
465 	int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
466 
467 	/*
468 	 * Spread I/O queues completion vectors according their queue index.
469 	 * Admin queues can always go on completion vector 0.
470 	 */
471 	comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
472 
473 	/* Polling queues need direct cq polling context */
474 	if (nvme_rdma_poll_queue(queue))
475 		queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
476 					   comp_vector, IB_POLL_DIRECT);
477 	else
478 		queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
479 					      comp_vector, IB_POLL_SOFTIRQ);
480 
481 	if (IS_ERR(queue->ib_cq)) {
482 		ret = PTR_ERR(queue->ib_cq);
483 		return ret;
484 	}
485 
486 	return 0;
487 }
488 
489 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
490 {
491 	struct ib_device *ibdev;
492 	const int send_wr_factor = 3;			/* MR, SEND, INV */
493 	const int cq_factor = send_wr_factor + 1;	/* + RECV */
494 	int ret, pages_per_mr;
495 
496 	queue->device = nvme_rdma_find_get_device(queue->cm_id);
497 	if (!queue->device) {
498 		dev_err(queue->cm_id->device->dev.parent,
499 			"no client data found!\n");
500 		return -ECONNREFUSED;
501 	}
502 	ibdev = queue->device->dev;
503 
504 	/* +1 for ib_drain_qp */
505 	queue->cq_size = cq_factor * queue->queue_size + 1;
506 
507 	ret = nvme_rdma_create_cq(ibdev, queue);
508 	if (ret)
509 		goto out_put_dev;
510 
511 	ret = nvme_rdma_create_qp(queue, send_wr_factor);
512 	if (ret)
513 		goto out_destroy_ib_cq;
514 
515 	queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
516 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
517 	if (!queue->rsp_ring) {
518 		ret = -ENOMEM;
519 		goto out_destroy_qp;
520 	}
521 
522 	/*
523 	 * Currently we don't use SG_GAPS MR's so if the first entry is
524 	 * misaligned we'll end up using two entries for a single data page,
525 	 * so one additional entry is required.
526 	 */
527 	pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
528 	ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
529 			      queue->queue_size,
530 			      IB_MR_TYPE_MEM_REG,
531 			      pages_per_mr, 0);
532 	if (ret) {
533 		dev_err(queue->ctrl->ctrl.device,
534 			"failed to initialize MR pool sized %d for QID %d\n",
535 			queue->queue_size, nvme_rdma_queue_idx(queue));
536 		goto out_destroy_ring;
537 	}
538 
539 	if (queue->pi_support) {
540 		ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
541 				      queue->queue_size, IB_MR_TYPE_INTEGRITY,
542 				      pages_per_mr, pages_per_mr);
543 		if (ret) {
544 			dev_err(queue->ctrl->ctrl.device,
545 				"failed to initialize PI MR pool sized %d for QID %d\n",
546 				queue->queue_size, nvme_rdma_queue_idx(queue));
547 			goto out_destroy_mr_pool;
548 		}
549 	}
550 
551 	set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
552 
553 	return 0;
554 
555 out_destroy_mr_pool:
556 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
557 out_destroy_ring:
558 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
559 			    sizeof(struct nvme_completion), DMA_FROM_DEVICE);
560 out_destroy_qp:
561 	rdma_destroy_qp(queue->cm_id);
562 out_destroy_ib_cq:
563 	nvme_rdma_free_cq(queue);
564 out_put_dev:
565 	nvme_rdma_dev_put(queue->device);
566 	return ret;
567 }
568 
569 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
570 		int idx, size_t queue_size)
571 {
572 	struct nvme_rdma_queue *queue;
573 	struct sockaddr *src_addr = NULL;
574 	int ret;
575 
576 	queue = &ctrl->queues[idx];
577 	mutex_init(&queue->queue_lock);
578 	queue->ctrl = ctrl;
579 	if (idx && ctrl->ctrl.max_integrity_segments)
580 		queue->pi_support = true;
581 	else
582 		queue->pi_support = false;
583 	init_completion(&queue->cm_done);
584 
585 	if (idx > 0)
586 		queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
587 	else
588 		queue->cmnd_capsule_len = sizeof(struct nvme_command);
589 
590 	queue->queue_size = queue_size;
591 
592 	queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
593 			RDMA_PS_TCP, IB_QPT_RC);
594 	if (IS_ERR(queue->cm_id)) {
595 		dev_info(ctrl->ctrl.device,
596 			"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
597 		ret = PTR_ERR(queue->cm_id);
598 		goto out_destroy_mutex;
599 	}
600 
601 	if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
602 		src_addr = (struct sockaddr *)&ctrl->src_addr;
603 
604 	queue->cm_error = -ETIMEDOUT;
605 	ret = rdma_resolve_addr(queue->cm_id, src_addr,
606 			(struct sockaddr *)&ctrl->addr,
607 			NVME_RDMA_CM_TIMEOUT_MS);
608 	if (ret) {
609 		dev_info(ctrl->ctrl.device,
610 			"rdma_resolve_addr failed (%d).\n", ret);
611 		goto out_destroy_cm_id;
612 	}
613 
614 	ret = nvme_rdma_wait_for_cm(queue);
615 	if (ret) {
616 		dev_info(ctrl->ctrl.device,
617 			"rdma connection establishment failed (%d)\n", ret);
618 		goto out_destroy_cm_id;
619 	}
620 
621 	set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
622 
623 	return 0;
624 
625 out_destroy_cm_id:
626 	rdma_destroy_id(queue->cm_id);
627 	nvme_rdma_destroy_queue_ib(queue);
628 out_destroy_mutex:
629 	mutex_destroy(&queue->queue_lock);
630 	return ret;
631 }
632 
633 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
634 {
635 	rdma_disconnect(queue->cm_id);
636 	ib_drain_qp(queue->qp);
637 }
638 
639 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
640 {
641 	if (!test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
642 		return;
643 
644 	mutex_lock(&queue->queue_lock);
645 	if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
646 		__nvme_rdma_stop_queue(queue);
647 	mutex_unlock(&queue->queue_lock);
648 }
649 
650 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
651 {
652 	if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
653 		return;
654 
655 	rdma_destroy_id(queue->cm_id);
656 	nvme_rdma_destroy_queue_ib(queue);
657 	mutex_destroy(&queue->queue_lock);
658 }
659 
660 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
661 {
662 	int i;
663 
664 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
665 		nvme_rdma_free_queue(&ctrl->queues[i]);
666 }
667 
668 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
669 {
670 	int i;
671 
672 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
673 		nvme_rdma_stop_queue(&ctrl->queues[i]);
674 }
675 
676 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
677 {
678 	struct nvme_rdma_queue *queue = &ctrl->queues[idx];
679 	int ret;
680 
681 	if (idx)
682 		ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
683 	else
684 		ret = nvmf_connect_admin_queue(&ctrl->ctrl);
685 
686 	if (!ret) {
687 		set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
688 	} else {
689 		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
690 			__nvme_rdma_stop_queue(queue);
691 		dev_info(ctrl->ctrl.device,
692 			"failed to connect queue: %d ret=%d\n", idx, ret);
693 	}
694 	return ret;
695 }
696 
697 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl,
698 				     int first, int last)
699 {
700 	int i, ret = 0;
701 
702 	for (i = first; i < last; i++) {
703 		ret = nvme_rdma_start_queue(ctrl, i);
704 		if (ret)
705 			goto out_stop_queues;
706 	}
707 
708 	return 0;
709 
710 out_stop_queues:
711 	for (i--; i >= first; i--)
712 		nvme_rdma_stop_queue(&ctrl->queues[i]);
713 	return ret;
714 }
715 
716 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
717 {
718 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
719 	unsigned int nr_io_queues;
720 	int i, ret;
721 
722 	nr_io_queues = nvmf_nr_io_queues(opts);
723 	ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
724 	if (ret)
725 		return ret;
726 
727 	if (nr_io_queues == 0) {
728 		dev_err(ctrl->ctrl.device,
729 			"unable to set any I/O queues\n");
730 		return -ENOMEM;
731 	}
732 
733 	ctrl->ctrl.queue_count = nr_io_queues + 1;
734 	dev_info(ctrl->ctrl.device,
735 		"creating %d I/O queues.\n", nr_io_queues);
736 
737 	nvmf_set_io_queues(opts, nr_io_queues, ctrl->io_queues);
738 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
739 		ret = nvme_rdma_alloc_queue(ctrl, i,
740 				ctrl->ctrl.sqsize + 1);
741 		if (ret)
742 			goto out_free_queues;
743 	}
744 
745 	return 0;
746 
747 out_free_queues:
748 	for (i--; i >= 1; i--)
749 		nvme_rdma_free_queue(&ctrl->queues[i]);
750 
751 	return ret;
752 }
753 
754 static int nvme_rdma_alloc_tag_set(struct nvme_ctrl *ctrl)
755 {
756 	unsigned int cmd_size = sizeof(struct nvme_rdma_request) +
757 				NVME_RDMA_DATA_SGL_SIZE;
758 
759 	if (ctrl->max_integrity_segments)
760 		cmd_size += sizeof(struct nvme_rdma_sgl) +
761 			    NVME_RDMA_METADATA_SGL_SIZE;
762 
763 	return nvme_alloc_io_tag_set(ctrl, &to_rdma_ctrl(ctrl)->tag_set,
764 			&nvme_rdma_mq_ops,
765 			ctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2,
766 			cmd_size);
767 }
768 
769 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl)
770 {
771 	if (ctrl->async_event_sqe.data) {
772 		cancel_work_sync(&ctrl->ctrl.async_event_work);
773 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
774 				sizeof(struct nvme_command), DMA_TO_DEVICE);
775 		ctrl->async_event_sqe.data = NULL;
776 	}
777 	nvme_rdma_free_queue(&ctrl->queues[0]);
778 }
779 
780 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
781 		bool new)
782 {
783 	bool pi_capable = false;
784 	int error;
785 
786 	error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
787 	if (error)
788 		return error;
789 
790 	ctrl->device = ctrl->queues[0].device;
791 	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
792 
793 	/* T10-PI support */
794 	if (ctrl->device->dev->attrs.kernel_cap_flags &
795 	    IBK_INTEGRITY_HANDOVER)
796 		pi_capable = true;
797 
798 	ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
799 							pi_capable);
800 
801 	/*
802 	 * Bind the async event SQE DMA mapping to the admin queue lifetime.
803 	 * It's safe, since any chage in the underlying RDMA device will issue
804 	 * error recovery and queue re-creation.
805 	 */
806 	error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
807 			sizeof(struct nvme_command), DMA_TO_DEVICE);
808 	if (error)
809 		goto out_free_queue;
810 
811 	if (new) {
812 		error = nvme_alloc_admin_tag_set(&ctrl->ctrl,
813 				&ctrl->admin_tag_set, &nvme_rdma_admin_mq_ops,
814 				sizeof(struct nvme_rdma_request) +
815 				NVME_RDMA_DATA_SGL_SIZE);
816 		if (error)
817 			goto out_free_async_qe;
818 
819 	}
820 
821 	error = nvme_rdma_start_queue(ctrl, 0);
822 	if (error)
823 		goto out_remove_admin_tag_set;
824 
825 	error = nvme_enable_ctrl(&ctrl->ctrl);
826 	if (error)
827 		goto out_stop_queue;
828 
829 	ctrl->ctrl.max_segments = ctrl->max_fr_pages;
830 	ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
831 	if (pi_capable)
832 		ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
833 	else
834 		ctrl->ctrl.max_integrity_segments = 0;
835 
836 	nvme_unquiesce_admin_queue(&ctrl->ctrl);
837 
838 	error = nvme_init_ctrl_finish(&ctrl->ctrl, false);
839 	if (error)
840 		goto out_quiesce_queue;
841 
842 	return 0;
843 
844 out_quiesce_queue:
845 	nvme_quiesce_admin_queue(&ctrl->ctrl);
846 	blk_sync_queue(ctrl->ctrl.admin_q);
847 out_stop_queue:
848 	nvme_rdma_stop_queue(&ctrl->queues[0]);
849 	nvme_cancel_admin_tagset(&ctrl->ctrl);
850 out_remove_admin_tag_set:
851 	if (new)
852 		nvme_remove_admin_tag_set(&ctrl->ctrl);
853 out_free_async_qe:
854 	if (ctrl->async_event_sqe.data) {
855 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
856 			sizeof(struct nvme_command), DMA_TO_DEVICE);
857 		ctrl->async_event_sqe.data = NULL;
858 	}
859 out_free_queue:
860 	nvme_rdma_free_queue(&ctrl->queues[0]);
861 	return error;
862 }
863 
864 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
865 {
866 	int ret, nr_queues;
867 
868 	ret = nvme_rdma_alloc_io_queues(ctrl);
869 	if (ret)
870 		return ret;
871 
872 	if (new) {
873 		ret = nvme_rdma_alloc_tag_set(&ctrl->ctrl);
874 		if (ret)
875 			goto out_free_io_queues;
876 	}
877 
878 	/*
879 	 * Only start IO queues for which we have allocated the tagset
880 	 * and limitted it to the available queues. On reconnects, the
881 	 * queue number might have changed.
882 	 */
883 	nr_queues = min(ctrl->tag_set.nr_hw_queues + 1, ctrl->ctrl.queue_count);
884 	ret = nvme_rdma_start_io_queues(ctrl, 1, nr_queues);
885 	if (ret)
886 		goto out_cleanup_tagset;
887 
888 	if (!new) {
889 		nvme_start_freeze(&ctrl->ctrl);
890 		nvme_unquiesce_io_queues(&ctrl->ctrl);
891 		if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
892 			/*
893 			 * If we timed out waiting for freeze we are likely to
894 			 * be stuck.  Fail the controller initialization just
895 			 * to be safe.
896 			 */
897 			ret = -ENODEV;
898 			nvme_unfreeze(&ctrl->ctrl);
899 			goto out_wait_freeze_timed_out;
900 		}
901 		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
902 			ctrl->ctrl.queue_count - 1);
903 		nvme_unfreeze(&ctrl->ctrl);
904 	}
905 
906 	/*
907 	 * If the number of queues has increased (reconnect case)
908 	 * start all new queues now.
909 	 */
910 	ret = nvme_rdma_start_io_queues(ctrl, nr_queues,
911 					ctrl->tag_set.nr_hw_queues + 1);
912 	if (ret)
913 		goto out_wait_freeze_timed_out;
914 
915 	return 0;
916 
917 out_wait_freeze_timed_out:
918 	nvme_quiesce_io_queues(&ctrl->ctrl);
919 	nvme_sync_io_queues(&ctrl->ctrl);
920 	nvme_rdma_stop_io_queues(ctrl);
921 out_cleanup_tagset:
922 	nvme_cancel_tagset(&ctrl->ctrl);
923 	if (new)
924 		nvme_remove_io_tag_set(&ctrl->ctrl);
925 out_free_io_queues:
926 	nvme_rdma_free_io_queues(ctrl);
927 	return ret;
928 }
929 
930 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
931 		bool remove)
932 {
933 	nvme_quiesce_admin_queue(&ctrl->ctrl);
934 	blk_sync_queue(ctrl->ctrl.admin_q);
935 	nvme_rdma_stop_queue(&ctrl->queues[0]);
936 	nvme_cancel_admin_tagset(&ctrl->ctrl);
937 	if (remove) {
938 		nvme_unquiesce_admin_queue(&ctrl->ctrl);
939 		nvme_remove_admin_tag_set(&ctrl->ctrl);
940 	}
941 	nvme_rdma_destroy_admin_queue(ctrl);
942 }
943 
944 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
945 		bool remove)
946 {
947 	if (ctrl->ctrl.queue_count > 1) {
948 		nvme_quiesce_io_queues(&ctrl->ctrl);
949 		nvme_sync_io_queues(&ctrl->ctrl);
950 		nvme_rdma_stop_io_queues(ctrl);
951 		nvme_cancel_tagset(&ctrl->ctrl);
952 		if (remove) {
953 			nvme_unquiesce_io_queues(&ctrl->ctrl);
954 			nvme_remove_io_tag_set(&ctrl->ctrl);
955 		}
956 		nvme_rdma_free_io_queues(ctrl);
957 	}
958 }
959 
960 static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
961 {
962 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
963 
964 	flush_work(&ctrl->err_work);
965 	cancel_delayed_work_sync(&ctrl->reconnect_work);
966 }
967 
968 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
969 {
970 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
971 
972 	if (list_empty(&ctrl->list))
973 		goto free_ctrl;
974 
975 	mutex_lock(&nvme_rdma_ctrl_mutex);
976 	list_del(&ctrl->list);
977 	mutex_unlock(&nvme_rdma_ctrl_mutex);
978 
979 	nvmf_free_options(nctrl->opts);
980 free_ctrl:
981 	kfree(ctrl->queues);
982 	kfree(ctrl);
983 }
984 
985 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
986 {
987 	enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
988 
989 	/* If we are resetting/deleting then do nothing */
990 	if (state != NVME_CTRL_CONNECTING) {
991 		WARN_ON_ONCE(state == NVME_CTRL_NEW || state == NVME_CTRL_LIVE);
992 		return;
993 	}
994 
995 	if (nvmf_should_reconnect(&ctrl->ctrl)) {
996 		dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
997 			ctrl->ctrl.opts->reconnect_delay);
998 		queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
999 				ctrl->ctrl.opts->reconnect_delay * HZ);
1000 	} else {
1001 		nvme_delete_ctrl(&ctrl->ctrl);
1002 	}
1003 }
1004 
1005 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
1006 {
1007 	int ret;
1008 	bool changed;
1009 
1010 	ret = nvme_rdma_configure_admin_queue(ctrl, new);
1011 	if (ret)
1012 		return ret;
1013 
1014 	if (ctrl->ctrl.icdoff) {
1015 		ret = -EOPNOTSUPP;
1016 		dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1017 		goto destroy_admin;
1018 	}
1019 
1020 	if (!(ctrl->ctrl.sgls & (1 << 2))) {
1021 		ret = -EOPNOTSUPP;
1022 		dev_err(ctrl->ctrl.device,
1023 			"Mandatory keyed sgls are not supported!\n");
1024 		goto destroy_admin;
1025 	}
1026 
1027 	if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1028 		dev_warn(ctrl->ctrl.device,
1029 			"queue_size %zu > ctrl sqsize %u, clamping down\n",
1030 			ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1031 	}
1032 
1033 	if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) {
1034 		dev_warn(ctrl->ctrl.device,
1035 			"ctrl sqsize %u > max queue size %u, clamping down\n",
1036 			ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE);
1037 		ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1;
1038 	}
1039 
1040 	if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1041 		dev_warn(ctrl->ctrl.device,
1042 			"sqsize %u > ctrl maxcmd %u, clamping down\n",
1043 			ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1044 		ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1045 	}
1046 
1047 	if (ctrl->ctrl.sgls & (1 << 20))
1048 		ctrl->use_inline_data = true;
1049 
1050 	if (ctrl->ctrl.queue_count > 1) {
1051 		ret = nvme_rdma_configure_io_queues(ctrl, new);
1052 		if (ret)
1053 			goto destroy_admin;
1054 	}
1055 
1056 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
1057 	if (!changed) {
1058 		/*
1059 		 * state change failure is ok if we started ctrl delete,
1060 		 * unless we're during creation of a new controller to
1061 		 * avoid races with teardown flow.
1062 		 */
1063 		enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1064 
1065 		WARN_ON_ONCE(state != NVME_CTRL_DELETING &&
1066 			     state != NVME_CTRL_DELETING_NOIO);
1067 		WARN_ON_ONCE(new);
1068 		ret = -EINVAL;
1069 		goto destroy_io;
1070 	}
1071 
1072 	nvme_start_ctrl(&ctrl->ctrl);
1073 	return 0;
1074 
1075 destroy_io:
1076 	if (ctrl->ctrl.queue_count > 1) {
1077 		nvme_quiesce_io_queues(&ctrl->ctrl);
1078 		nvme_sync_io_queues(&ctrl->ctrl);
1079 		nvme_rdma_stop_io_queues(ctrl);
1080 		nvme_cancel_tagset(&ctrl->ctrl);
1081 		if (new)
1082 			nvme_remove_io_tag_set(&ctrl->ctrl);
1083 		nvme_rdma_free_io_queues(ctrl);
1084 	}
1085 destroy_admin:
1086 	nvme_stop_keep_alive(&ctrl->ctrl);
1087 	nvme_quiesce_admin_queue(&ctrl->ctrl);
1088 	blk_sync_queue(ctrl->ctrl.admin_q);
1089 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1090 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1091 	if (new)
1092 		nvme_remove_admin_tag_set(&ctrl->ctrl);
1093 	nvme_rdma_destroy_admin_queue(ctrl);
1094 	return ret;
1095 }
1096 
1097 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1098 {
1099 	struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1100 			struct nvme_rdma_ctrl, reconnect_work);
1101 
1102 	++ctrl->ctrl.nr_reconnects;
1103 
1104 	if (nvme_rdma_setup_ctrl(ctrl, false))
1105 		goto requeue;
1106 
1107 	dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1108 			ctrl->ctrl.nr_reconnects);
1109 
1110 	ctrl->ctrl.nr_reconnects = 0;
1111 
1112 	return;
1113 
1114 requeue:
1115 	dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
1116 			ctrl->ctrl.nr_reconnects);
1117 	nvme_rdma_reconnect_or_remove(ctrl);
1118 }
1119 
1120 static void nvme_rdma_error_recovery_work(struct work_struct *work)
1121 {
1122 	struct nvme_rdma_ctrl *ctrl = container_of(work,
1123 			struct nvme_rdma_ctrl, err_work);
1124 
1125 	nvme_stop_keep_alive(&ctrl->ctrl);
1126 	flush_work(&ctrl->ctrl.async_event_work);
1127 	nvme_rdma_teardown_io_queues(ctrl, false);
1128 	nvme_unquiesce_io_queues(&ctrl->ctrl);
1129 	nvme_rdma_teardown_admin_queue(ctrl, false);
1130 	nvme_unquiesce_admin_queue(&ctrl->ctrl);
1131 	nvme_auth_stop(&ctrl->ctrl);
1132 
1133 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1134 		/* state change failure is ok if we started ctrl delete */
1135 		enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1136 
1137 		WARN_ON_ONCE(state != NVME_CTRL_DELETING &&
1138 			     state != NVME_CTRL_DELETING_NOIO);
1139 		return;
1140 	}
1141 
1142 	nvme_rdma_reconnect_or_remove(ctrl);
1143 }
1144 
1145 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1146 {
1147 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
1148 		return;
1149 
1150 	dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1151 	queue_work(nvme_reset_wq, &ctrl->err_work);
1152 }
1153 
1154 static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1155 {
1156 	struct request *rq = blk_mq_rq_from_pdu(req);
1157 
1158 	if (!refcount_dec_and_test(&req->ref))
1159 		return;
1160 	if (!nvme_try_complete_req(rq, req->status, req->result))
1161 		nvme_rdma_complete_rq(rq);
1162 }
1163 
1164 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1165 		const char *op)
1166 {
1167 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1168 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1169 
1170 	if (nvme_ctrl_state(&ctrl->ctrl) == NVME_CTRL_LIVE)
1171 		dev_info(ctrl->ctrl.device,
1172 			     "%s for CQE 0x%p failed with status %s (%d)\n",
1173 			     op, wc->wr_cqe,
1174 			     ib_wc_status_msg(wc->status), wc->status);
1175 	nvme_rdma_error_recovery(ctrl);
1176 }
1177 
1178 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1179 {
1180 	if (unlikely(wc->status != IB_WC_SUCCESS))
1181 		nvme_rdma_wr_error(cq, wc, "MEMREG");
1182 }
1183 
1184 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1185 {
1186 	struct nvme_rdma_request *req =
1187 		container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1188 
1189 	if (unlikely(wc->status != IB_WC_SUCCESS))
1190 		nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
1191 	else
1192 		nvme_rdma_end_request(req);
1193 }
1194 
1195 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1196 		struct nvme_rdma_request *req)
1197 {
1198 	struct ib_send_wr wr = {
1199 		.opcode		    = IB_WR_LOCAL_INV,
1200 		.next		    = NULL,
1201 		.num_sge	    = 0,
1202 		.send_flags	    = IB_SEND_SIGNALED,
1203 		.ex.invalidate_rkey = req->mr->rkey,
1204 	};
1205 
1206 	req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1207 	wr.wr_cqe = &req->reg_cqe;
1208 
1209 	return ib_post_send(queue->qp, &wr, NULL);
1210 }
1211 
1212 static void nvme_rdma_dma_unmap_req(struct ib_device *ibdev, struct request *rq)
1213 {
1214 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1215 
1216 	if (blk_integrity_rq(rq)) {
1217 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1218 				req->metadata_sgl->nents, rq_dma_dir(rq));
1219 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1220 				      NVME_INLINE_METADATA_SG_CNT);
1221 	}
1222 
1223 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1224 			rq_dma_dir(rq));
1225 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1226 }
1227 
1228 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1229 		struct request *rq)
1230 {
1231 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1232 	struct nvme_rdma_device *dev = queue->device;
1233 	struct ib_device *ibdev = dev->dev;
1234 	struct list_head *pool = &queue->qp->rdma_mrs;
1235 
1236 	if (!blk_rq_nr_phys_segments(rq))
1237 		return;
1238 
1239 	if (req->use_sig_mr)
1240 		pool = &queue->qp->sig_mrs;
1241 
1242 	if (req->mr) {
1243 		ib_mr_pool_put(queue->qp, pool, req->mr);
1244 		req->mr = NULL;
1245 	}
1246 
1247 	nvme_rdma_dma_unmap_req(ibdev, rq);
1248 }
1249 
1250 static int nvme_rdma_set_sg_null(struct nvme_command *c)
1251 {
1252 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1253 
1254 	sg->addr = 0;
1255 	put_unaligned_le24(0, sg->length);
1256 	put_unaligned_le32(0, sg->key);
1257 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1258 	return 0;
1259 }
1260 
1261 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
1262 		struct nvme_rdma_request *req, struct nvme_command *c,
1263 		int count)
1264 {
1265 	struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
1266 	struct ib_sge *sge = &req->sge[1];
1267 	struct scatterlist *sgl;
1268 	u32 len = 0;
1269 	int i;
1270 
1271 	for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
1272 		sge->addr = sg_dma_address(sgl);
1273 		sge->length = sg_dma_len(sgl);
1274 		sge->lkey = queue->device->pd->local_dma_lkey;
1275 		len += sge->length;
1276 		sge++;
1277 	}
1278 
1279 	sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
1280 	sg->length = cpu_to_le32(len);
1281 	sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1282 
1283 	req->num_sge += count;
1284 	return 0;
1285 }
1286 
1287 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1288 		struct nvme_rdma_request *req, struct nvme_command *c)
1289 {
1290 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1291 
1292 	sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1293 	put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
1294 	put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
1295 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1296 	return 0;
1297 }
1298 
1299 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1300 		struct nvme_rdma_request *req, struct nvme_command *c,
1301 		int count)
1302 {
1303 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1304 	int nr;
1305 
1306 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1307 	if (WARN_ON_ONCE(!req->mr))
1308 		return -EAGAIN;
1309 
1310 	/*
1311 	 * Align the MR to a 4K page size to match the ctrl page size and
1312 	 * the block virtual boundary.
1313 	 */
1314 	nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1315 			  SZ_4K);
1316 	if (unlikely(nr < count)) {
1317 		ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1318 		req->mr = NULL;
1319 		if (nr < 0)
1320 			return nr;
1321 		return -EINVAL;
1322 	}
1323 
1324 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1325 
1326 	req->reg_cqe.done = nvme_rdma_memreg_done;
1327 	memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1328 	req->reg_wr.wr.opcode = IB_WR_REG_MR;
1329 	req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1330 	req->reg_wr.wr.num_sge = 0;
1331 	req->reg_wr.mr = req->mr;
1332 	req->reg_wr.key = req->mr->rkey;
1333 	req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1334 			     IB_ACCESS_REMOTE_READ |
1335 			     IB_ACCESS_REMOTE_WRITE;
1336 
1337 	sg->addr = cpu_to_le64(req->mr->iova);
1338 	put_unaligned_le24(req->mr->length, sg->length);
1339 	put_unaligned_le32(req->mr->rkey, sg->key);
1340 	sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1341 			NVME_SGL_FMT_INVALIDATE;
1342 
1343 	return 0;
1344 }
1345 
1346 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1347 		struct nvme_command *cmd, struct ib_sig_domain *domain,
1348 		u16 control, u8 pi_type)
1349 {
1350 	domain->sig_type = IB_SIG_TYPE_T10_DIF;
1351 	domain->sig.dif.bg_type = IB_T10DIF_CRC;
1352 	domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1353 	domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1354 	if (control & NVME_RW_PRINFO_PRCHK_REF)
1355 		domain->sig.dif.ref_remap = true;
1356 
1357 	domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
1358 	domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
1359 	domain->sig.dif.app_escape = true;
1360 	if (pi_type == NVME_NS_DPS_PI_TYPE3)
1361 		domain->sig.dif.ref_escape = true;
1362 }
1363 
1364 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1365 		struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1366 		u8 pi_type)
1367 {
1368 	u16 control = le16_to_cpu(cmd->rw.control);
1369 
1370 	memset(sig_attrs, 0, sizeof(*sig_attrs));
1371 	if (control & NVME_RW_PRINFO_PRACT) {
1372 		/* for WRITE_INSERT/READ_STRIP no memory domain */
1373 		sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1374 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1375 					 pi_type);
1376 		/* Clear the PRACT bit since HCA will generate/verify the PI */
1377 		control &= ~NVME_RW_PRINFO_PRACT;
1378 		cmd->rw.control = cpu_to_le16(control);
1379 	} else {
1380 		/* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1381 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1382 					 pi_type);
1383 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1384 					 pi_type);
1385 	}
1386 }
1387 
1388 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1389 {
1390 	*mask = 0;
1391 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1392 		*mask |= IB_SIG_CHECK_REFTAG;
1393 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1394 		*mask |= IB_SIG_CHECK_GUARD;
1395 }
1396 
1397 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1398 {
1399 	if (unlikely(wc->status != IB_WC_SUCCESS))
1400 		nvme_rdma_wr_error(cq, wc, "SIG");
1401 }
1402 
1403 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1404 		struct nvme_rdma_request *req, struct nvme_command *c,
1405 		int count, int pi_count)
1406 {
1407 	struct nvme_rdma_sgl *sgl = &req->data_sgl;
1408 	struct ib_reg_wr *wr = &req->reg_wr;
1409 	struct request *rq = blk_mq_rq_from_pdu(req);
1410 	struct nvme_ns *ns = rq->q->queuedata;
1411 	struct bio *bio = rq->bio;
1412 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1413 	struct blk_integrity *bi = blk_get_integrity(bio->bi_bdev->bd_disk);
1414 	u32 xfer_len;
1415 	int nr;
1416 
1417 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1418 	if (WARN_ON_ONCE(!req->mr))
1419 		return -EAGAIN;
1420 
1421 	nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1422 			     req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1423 			     SZ_4K);
1424 	if (unlikely(nr))
1425 		goto mr_put;
1426 
1427 	nvme_rdma_set_sig_attrs(bi, c, req->mr->sig_attrs, ns->head->pi_type);
1428 	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1429 
1430 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1431 
1432 	req->reg_cqe.done = nvme_rdma_sig_done;
1433 	memset(wr, 0, sizeof(*wr));
1434 	wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1435 	wr->wr.wr_cqe = &req->reg_cqe;
1436 	wr->wr.num_sge = 0;
1437 	wr->wr.send_flags = 0;
1438 	wr->mr = req->mr;
1439 	wr->key = req->mr->rkey;
1440 	wr->access = IB_ACCESS_LOCAL_WRITE |
1441 		     IB_ACCESS_REMOTE_READ |
1442 		     IB_ACCESS_REMOTE_WRITE;
1443 
1444 	sg->addr = cpu_to_le64(req->mr->iova);
1445 	xfer_len = req->mr->length;
1446 	/* Check if PI is added by the HW */
1447 	if (!pi_count)
1448 		xfer_len += (xfer_len >> bi->interval_exp) * ns->head->pi_size;
1449 	put_unaligned_le24(xfer_len, sg->length);
1450 	put_unaligned_le32(req->mr->rkey, sg->key);
1451 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1452 
1453 	return 0;
1454 
1455 mr_put:
1456 	ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1457 	req->mr = NULL;
1458 	if (nr < 0)
1459 		return nr;
1460 	return -EINVAL;
1461 }
1462 
1463 static int nvme_rdma_dma_map_req(struct ib_device *ibdev, struct request *rq,
1464 		int *count, int *pi_count)
1465 {
1466 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1467 	int ret;
1468 
1469 	req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1470 	ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1471 			blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
1472 			NVME_INLINE_SG_CNT);
1473 	if (ret)
1474 		return -ENOMEM;
1475 
1476 	req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1477 					    req->data_sgl.sg_table.sgl);
1478 
1479 	*count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1480 			       req->data_sgl.nents, rq_dma_dir(rq));
1481 	if (unlikely(*count <= 0)) {
1482 		ret = -EIO;
1483 		goto out_free_table;
1484 	}
1485 
1486 	if (blk_integrity_rq(rq)) {
1487 		req->metadata_sgl->sg_table.sgl =
1488 			(struct scatterlist *)(req->metadata_sgl + 1);
1489 		ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1490 				blk_rq_count_integrity_sg(rq->q, rq->bio),
1491 				req->metadata_sgl->sg_table.sgl,
1492 				NVME_INLINE_METADATA_SG_CNT);
1493 		if (unlikely(ret)) {
1494 			ret = -ENOMEM;
1495 			goto out_unmap_sg;
1496 		}
1497 
1498 		req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
1499 				rq->bio, req->metadata_sgl->sg_table.sgl);
1500 		*pi_count = ib_dma_map_sg(ibdev,
1501 					  req->metadata_sgl->sg_table.sgl,
1502 					  req->metadata_sgl->nents,
1503 					  rq_dma_dir(rq));
1504 		if (unlikely(*pi_count <= 0)) {
1505 			ret = -EIO;
1506 			goto out_free_pi_table;
1507 		}
1508 	}
1509 
1510 	return 0;
1511 
1512 out_free_pi_table:
1513 	sg_free_table_chained(&req->metadata_sgl->sg_table,
1514 			      NVME_INLINE_METADATA_SG_CNT);
1515 out_unmap_sg:
1516 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1517 			rq_dma_dir(rq));
1518 out_free_table:
1519 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1520 	return ret;
1521 }
1522 
1523 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
1524 		struct request *rq, struct nvme_command *c)
1525 {
1526 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1527 	struct nvme_rdma_device *dev = queue->device;
1528 	struct ib_device *ibdev = dev->dev;
1529 	int pi_count = 0;
1530 	int count, ret;
1531 
1532 	req->num_sge = 1;
1533 	refcount_set(&req->ref, 2); /* send and recv completions */
1534 
1535 	c->common.flags |= NVME_CMD_SGL_METABUF;
1536 
1537 	if (!blk_rq_nr_phys_segments(rq))
1538 		return nvme_rdma_set_sg_null(c);
1539 
1540 	ret = nvme_rdma_dma_map_req(ibdev, rq, &count, &pi_count);
1541 	if (unlikely(ret))
1542 		return ret;
1543 
1544 	if (req->use_sig_mr) {
1545 		ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1546 		goto out;
1547 	}
1548 
1549 	if (count <= dev->num_inline_segments) {
1550 		if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
1551 		    queue->ctrl->use_inline_data &&
1552 		    blk_rq_payload_bytes(rq) <=
1553 				nvme_rdma_inline_data_size(queue)) {
1554 			ret = nvme_rdma_map_sg_inline(queue, req, c, count);
1555 			goto out;
1556 		}
1557 
1558 		if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
1559 			ret = nvme_rdma_map_sg_single(queue, req, c);
1560 			goto out;
1561 		}
1562 	}
1563 
1564 	ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1565 out:
1566 	if (unlikely(ret))
1567 		goto out_dma_unmap_req;
1568 
1569 	return 0;
1570 
1571 out_dma_unmap_req:
1572 	nvme_rdma_dma_unmap_req(ibdev, rq);
1573 	return ret;
1574 }
1575 
1576 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1577 {
1578 	struct nvme_rdma_qe *qe =
1579 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1580 	struct nvme_rdma_request *req =
1581 		container_of(qe, struct nvme_rdma_request, sqe);
1582 
1583 	if (unlikely(wc->status != IB_WC_SUCCESS))
1584 		nvme_rdma_wr_error(cq, wc, "SEND");
1585 	else
1586 		nvme_rdma_end_request(req);
1587 }
1588 
1589 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1590 		struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1591 		struct ib_send_wr *first)
1592 {
1593 	struct ib_send_wr wr;
1594 	int ret;
1595 
1596 	sge->addr   = qe->dma;
1597 	sge->length = sizeof(struct nvme_command);
1598 	sge->lkey   = queue->device->pd->local_dma_lkey;
1599 
1600 	wr.next       = NULL;
1601 	wr.wr_cqe     = &qe->cqe;
1602 	wr.sg_list    = sge;
1603 	wr.num_sge    = num_sge;
1604 	wr.opcode     = IB_WR_SEND;
1605 	wr.send_flags = IB_SEND_SIGNALED;
1606 
1607 	if (first)
1608 		first->next = &wr;
1609 	else
1610 		first = &wr;
1611 
1612 	ret = ib_post_send(queue->qp, first, NULL);
1613 	if (unlikely(ret)) {
1614 		dev_err(queue->ctrl->ctrl.device,
1615 			     "%s failed with error code %d\n", __func__, ret);
1616 	}
1617 	return ret;
1618 }
1619 
1620 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1621 		struct nvme_rdma_qe *qe)
1622 {
1623 	struct ib_recv_wr wr;
1624 	struct ib_sge list;
1625 	int ret;
1626 
1627 	list.addr   = qe->dma;
1628 	list.length = sizeof(struct nvme_completion);
1629 	list.lkey   = queue->device->pd->local_dma_lkey;
1630 
1631 	qe->cqe.done = nvme_rdma_recv_done;
1632 
1633 	wr.next     = NULL;
1634 	wr.wr_cqe   = &qe->cqe;
1635 	wr.sg_list  = &list;
1636 	wr.num_sge  = 1;
1637 
1638 	ret = ib_post_recv(queue->qp, &wr, NULL);
1639 	if (unlikely(ret)) {
1640 		dev_err(queue->ctrl->ctrl.device,
1641 			"%s failed with error code %d\n", __func__, ret);
1642 	}
1643 	return ret;
1644 }
1645 
1646 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1647 {
1648 	u32 queue_idx = nvme_rdma_queue_idx(queue);
1649 
1650 	if (queue_idx == 0)
1651 		return queue->ctrl->admin_tag_set.tags[queue_idx];
1652 	return queue->ctrl->tag_set.tags[queue_idx - 1];
1653 }
1654 
1655 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1656 {
1657 	if (unlikely(wc->status != IB_WC_SUCCESS))
1658 		nvme_rdma_wr_error(cq, wc, "ASYNC");
1659 }
1660 
1661 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
1662 {
1663 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1664 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
1665 	struct ib_device *dev = queue->device->dev;
1666 	struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1667 	struct nvme_command *cmd = sqe->data;
1668 	struct ib_sge sge;
1669 	int ret;
1670 
1671 	ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1672 
1673 	memset(cmd, 0, sizeof(*cmd));
1674 	cmd->common.opcode = nvme_admin_async_event;
1675 	cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
1676 	cmd->common.flags |= NVME_CMD_SGL_METABUF;
1677 	nvme_rdma_set_sg_null(cmd);
1678 
1679 	sqe->cqe.done = nvme_rdma_async_done;
1680 
1681 	ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1682 			DMA_TO_DEVICE);
1683 
1684 	ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
1685 	WARN_ON_ONCE(ret);
1686 }
1687 
1688 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1689 		struct nvme_completion *cqe, struct ib_wc *wc)
1690 {
1691 	struct request *rq;
1692 	struct nvme_rdma_request *req;
1693 
1694 	rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
1695 	if (!rq) {
1696 		dev_err(queue->ctrl->ctrl.device,
1697 			"got bad command_id %#x on QP %#x\n",
1698 			cqe->command_id, queue->qp->qp_num);
1699 		nvme_rdma_error_recovery(queue->ctrl);
1700 		return;
1701 	}
1702 	req = blk_mq_rq_to_pdu(rq);
1703 
1704 	req->status = cqe->status;
1705 	req->result = cqe->result;
1706 
1707 	if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1708 		if (unlikely(!req->mr ||
1709 			     wc->ex.invalidate_rkey != req->mr->rkey)) {
1710 			dev_err(queue->ctrl->ctrl.device,
1711 				"Bogus remote invalidation for rkey %#x\n",
1712 				req->mr ? req->mr->rkey : 0);
1713 			nvme_rdma_error_recovery(queue->ctrl);
1714 		}
1715 	} else if (req->mr) {
1716 		int ret;
1717 
1718 		ret = nvme_rdma_inv_rkey(queue, req);
1719 		if (unlikely(ret < 0)) {
1720 			dev_err(queue->ctrl->ctrl.device,
1721 				"Queueing INV WR for rkey %#x failed (%d)\n",
1722 				req->mr->rkey, ret);
1723 			nvme_rdma_error_recovery(queue->ctrl);
1724 		}
1725 		/* the local invalidation completion will end the request */
1726 		return;
1727 	}
1728 
1729 	nvme_rdma_end_request(req);
1730 }
1731 
1732 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1733 {
1734 	struct nvme_rdma_qe *qe =
1735 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1736 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1737 	struct ib_device *ibdev = queue->device->dev;
1738 	struct nvme_completion *cqe = qe->data;
1739 	const size_t len = sizeof(struct nvme_completion);
1740 
1741 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
1742 		nvme_rdma_wr_error(cq, wc, "RECV");
1743 		return;
1744 	}
1745 
1746 	/* sanity checking for received data length */
1747 	if (unlikely(wc->byte_len < len)) {
1748 		dev_err(queue->ctrl->ctrl.device,
1749 			"Unexpected nvme completion length(%d)\n", wc->byte_len);
1750 		nvme_rdma_error_recovery(queue->ctrl);
1751 		return;
1752 	}
1753 
1754 	ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1755 	/*
1756 	 * AEN requests are special as they don't time out and can
1757 	 * survive any kind of queue freeze and often don't respond to
1758 	 * aborts.  We don't even bother to allocate a struct request
1759 	 * for them but rather special case them here.
1760 	 */
1761 	if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1762 				     cqe->command_id)))
1763 		nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1764 				&cqe->result);
1765 	else
1766 		nvme_rdma_process_nvme_rsp(queue, cqe, wc);
1767 	ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1768 
1769 	nvme_rdma_post_recv(queue, qe);
1770 }
1771 
1772 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1773 {
1774 	int ret, i;
1775 
1776 	for (i = 0; i < queue->queue_size; i++) {
1777 		ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1778 		if (ret)
1779 			return ret;
1780 	}
1781 
1782 	return 0;
1783 }
1784 
1785 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1786 		struct rdma_cm_event *ev)
1787 {
1788 	struct rdma_cm_id *cm_id = queue->cm_id;
1789 	int status = ev->status;
1790 	const char *rej_msg;
1791 	const struct nvme_rdma_cm_rej *rej_data;
1792 	u8 rej_data_len;
1793 
1794 	rej_msg = rdma_reject_msg(cm_id, status);
1795 	rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1796 
1797 	if (rej_data && rej_data_len >= sizeof(u16)) {
1798 		u16 sts = le16_to_cpu(rej_data->sts);
1799 
1800 		dev_err(queue->ctrl->ctrl.device,
1801 		      "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1802 		      status, rej_msg, sts, nvme_rdma_cm_msg(sts));
1803 	} else {
1804 		dev_err(queue->ctrl->ctrl.device,
1805 			"Connect rejected: status %d (%s).\n", status, rej_msg);
1806 	}
1807 
1808 	return -ECONNRESET;
1809 }
1810 
1811 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1812 {
1813 	struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
1814 	int ret;
1815 
1816 	ret = nvme_rdma_create_queue_ib(queue);
1817 	if (ret)
1818 		return ret;
1819 
1820 	if (ctrl->opts->tos >= 0)
1821 		rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
1822 	ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CM_TIMEOUT_MS);
1823 	if (ret) {
1824 		dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
1825 			queue->cm_error);
1826 		goto out_destroy_queue;
1827 	}
1828 
1829 	return 0;
1830 
1831 out_destroy_queue:
1832 	nvme_rdma_destroy_queue_ib(queue);
1833 	return ret;
1834 }
1835 
1836 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1837 {
1838 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1839 	struct rdma_conn_param param = { };
1840 	struct nvme_rdma_cm_req priv = { };
1841 	int ret;
1842 
1843 	param.qp_num = queue->qp->qp_num;
1844 	param.flow_control = 1;
1845 
1846 	param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
1847 	/* maximum retry count */
1848 	param.retry_count = 7;
1849 	param.rnr_retry_count = 7;
1850 	param.private_data = &priv;
1851 	param.private_data_len = sizeof(priv);
1852 
1853 	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1854 	priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1855 	/*
1856 	 * set the admin queue depth to the minimum size
1857 	 * specified by the Fabrics standard.
1858 	 */
1859 	if (priv.qid == 0) {
1860 		priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1861 		priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1862 	} else {
1863 		/*
1864 		 * current interpretation of the fabrics spec
1865 		 * is at minimum you make hrqsize sqsize+1, or a
1866 		 * 1's based representation of sqsize.
1867 		 */
1868 		priv.hrqsize = cpu_to_le16(queue->queue_size);
1869 		priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1870 	}
1871 
1872 	ret = rdma_connect_locked(queue->cm_id, &param);
1873 	if (ret) {
1874 		dev_err(ctrl->ctrl.device,
1875 			"rdma_connect_locked failed (%d).\n", ret);
1876 		return ret;
1877 	}
1878 
1879 	return 0;
1880 }
1881 
1882 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1883 		struct rdma_cm_event *ev)
1884 {
1885 	struct nvme_rdma_queue *queue = cm_id->context;
1886 	int cm_error = 0;
1887 
1888 	dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1889 		rdma_event_msg(ev->event), ev->event,
1890 		ev->status, cm_id);
1891 
1892 	switch (ev->event) {
1893 	case RDMA_CM_EVENT_ADDR_RESOLVED:
1894 		cm_error = nvme_rdma_addr_resolved(queue);
1895 		break;
1896 	case RDMA_CM_EVENT_ROUTE_RESOLVED:
1897 		cm_error = nvme_rdma_route_resolved(queue);
1898 		break;
1899 	case RDMA_CM_EVENT_ESTABLISHED:
1900 		queue->cm_error = nvme_rdma_conn_established(queue);
1901 		/* complete cm_done regardless of success/failure */
1902 		complete(&queue->cm_done);
1903 		return 0;
1904 	case RDMA_CM_EVENT_REJECTED:
1905 		cm_error = nvme_rdma_conn_rejected(queue, ev);
1906 		break;
1907 	case RDMA_CM_EVENT_ROUTE_ERROR:
1908 	case RDMA_CM_EVENT_CONNECT_ERROR:
1909 	case RDMA_CM_EVENT_UNREACHABLE:
1910 	case RDMA_CM_EVENT_ADDR_ERROR:
1911 		dev_dbg(queue->ctrl->ctrl.device,
1912 			"CM error event %d\n", ev->event);
1913 		cm_error = -ECONNRESET;
1914 		break;
1915 	case RDMA_CM_EVENT_DISCONNECTED:
1916 	case RDMA_CM_EVENT_ADDR_CHANGE:
1917 	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1918 		dev_dbg(queue->ctrl->ctrl.device,
1919 			"disconnect received - connection closed\n");
1920 		nvme_rdma_error_recovery(queue->ctrl);
1921 		break;
1922 	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1923 		/* device removal is handled via the ib_client API */
1924 		break;
1925 	default:
1926 		dev_err(queue->ctrl->ctrl.device,
1927 			"Unexpected RDMA CM event (%d)\n", ev->event);
1928 		nvme_rdma_error_recovery(queue->ctrl);
1929 		break;
1930 	}
1931 
1932 	if (cm_error) {
1933 		queue->cm_error = cm_error;
1934 		complete(&queue->cm_done);
1935 	}
1936 
1937 	return 0;
1938 }
1939 
1940 static void nvme_rdma_complete_timed_out(struct request *rq)
1941 {
1942 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1943 	struct nvme_rdma_queue *queue = req->queue;
1944 
1945 	nvme_rdma_stop_queue(queue);
1946 	nvmf_complete_timed_out_request(rq);
1947 }
1948 
1949 static enum blk_eh_timer_return nvme_rdma_timeout(struct request *rq)
1950 {
1951 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1952 	struct nvme_rdma_queue *queue = req->queue;
1953 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1954 	struct nvme_command *cmd = req->req.cmd;
1955 	int qid = nvme_rdma_queue_idx(queue);
1956 
1957 	dev_warn(ctrl->ctrl.device,
1958 		 "I/O tag %d (%04x) opcode %#x (%s) QID %d timeout\n",
1959 		 rq->tag, nvme_cid(rq), cmd->common.opcode,
1960 		 nvme_fabrics_opcode_str(qid, cmd), qid);
1961 
1962 	if (nvme_ctrl_state(&ctrl->ctrl) != NVME_CTRL_LIVE) {
1963 		/*
1964 		 * If we are resetting, connecting or deleting we should
1965 		 * complete immediately because we may block controller
1966 		 * teardown or setup sequence
1967 		 * - ctrl disable/shutdown fabrics requests
1968 		 * - connect requests
1969 		 * - initialization admin requests
1970 		 * - I/O requests that entered after unquiescing and
1971 		 *   the controller stopped responding
1972 		 *
1973 		 * All other requests should be cancelled by the error
1974 		 * recovery work, so it's fine that we fail it here.
1975 		 */
1976 		nvme_rdma_complete_timed_out(rq);
1977 		return BLK_EH_DONE;
1978 	}
1979 
1980 	/*
1981 	 * LIVE state should trigger the normal error recovery which will
1982 	 * handle completing this request.
1983 	 */
1984 	nvme_rdma_error_recovery(ctrl);
1985 	return BLK_EH_RESET_TIMER;
1986 }
1987 
1988 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
1989 		const struct blk_mq_queue_data *bd)
1990 {
1991 	struct nvme_ns *ns = hctx->queue->queuedata;
1992 	struct nvme_rdma_queue *queue = hctx->driver_data;
1993 	struct request *rq = bd->rq;
1994 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1995 	struct nvme_rdma_qe *sqe = &req->sqe;
1996 	struct nvme_command *c = nvme_req(rq)->cmd;
1997 	struct ib_device *dev;
1998 	bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
1999 	blk_status_t ret;
2000 	int err;
2001 
2002 	WARN_ON_ONCE(rq->tag < 0);
2003 
2004 	if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2005 		return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq);
2006 
2007 	dev = queue->device->dev;
2008 
2009 	req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2010 					 sizeof(struct nvme_command),
2011 					 DMA_TO_DEVICE);
2012 	err = ib_dma_mapping_error(dev, req->sqe.dma);
2013 	if (unlikely(err))
2014 		return BLK_STS_RESOURCE;
2015 
2016 	ib_dma_sync_single_for_cpu(dev, sqe->dma,
2017 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2018 
2019 	ret = nvme_setup_cmd(ns, rq);
2020 	if (ret)
2021 		goto unmap_qe;
2022 
2023 	nvme_start_request(rq);
2024 
2025 	if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2026 	    queue->pi_support &&
2027 	    (c->common.opcode == nvme_cmd_write ||
2028 	     c->common.opcode == nvme_cmd_read) &&
2029 	    nvme_ns_has_pi(ns->head))
2030 		req->use_sig_mr = true;
2031 	else
2032 		req->use_sig_mr = false;
2033 
2034 	err = nvme_rdma_map_data(queue, rq, c);
2035 	if (unlikely(err < 0)) {
2036 		dev_err(queue->ctrl->ctrl.device,
2037 			     "Failed to map data (%d)\n", err);
2038 		goto err;
2039 	}
2040 
2041 	sqe->cqe.done = nvme_rdma_send_done;
2042 
2043 	ib_dma_sync_single_for_device(dev, sqe->dma,
2044 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2045 
2046 	err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2047 			req->mr ? &req->reg_wr.wr : NULL);
2048 	if (unlikely(err))
2049 		goto err_unmap;
2050 
2051 	return BLK_STS_OK;
2052 
2053 err_unmap:
2054 	nvme_rdma_unmap_data(queue, rq);
2055 err:
2056 	if (err == -EIO)
2057 		ret = nvme_host_path_error(rq);
2058 	else if (err == -ENOMEM || err == -EAGAIN)
2059 		ret = BLK_STS_RESOURCE;
2060 	else
2061 		ret = BLK_STS_IOERR;
2062 	nvme_cleanup_cmd(rq);
2063 unmap_qe:
2064 	ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2065 			    DMA_TO_DEVICE);
2066 	return ret;
2067 }
2068 
2069 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob)
2070 {
2071 	struct nvme_rdma_queue *queue = hctx->driver_data;
2072 
2073 	return ib_process_cq_direct(queue->ib_cq, -1);
2074 }
2075 
2076 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2077 {
2078 	struct request *rq = blk_mq_rq_from_pdu(req);
2079 	struct ib_mr_status mr_status;
2080 	int ret;
2081 
2082 	ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2083 	if (ret) {
2084 		pr_err("ib_check_mr_status failed, ret %d\n", ret);
2085 		nvme_req(rq)->status = NVME_SC_INVALID_PI;
2086 		return;
2087 	}
2088 
2089 	if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2090 		switch (mr_status.sig_err.err_type) {
2091 		case IB_SIG_BAD_GUARD:
2092 			nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2093 			break;
2094 		case IB_SIG_BAD_REFTAG:
2095 			nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2096 			break;
2097 		case IB_SIG_BAD_APPTAG:
2098 			nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2099 			break;
2100 		}
2101 		pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2102 		       mr_status.sig_err.err_type, mr_status.sig_err.expected,
2103 		       mr_status.sig_err.actual);
2104 	}
2105 }
2106 
2107 static void nvme_rdma_complete_rq(struct request *rq)
2108 {
2109 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2110 	struct nvme_rdma_queue *queue = req->queue;
2111 	struct ib_device *ibdev = queue->device->dev;
2112 
2113 	if (req->use_sig_mr)
2114 		nvme_rdma_check_pi_status(req);
2115 
2116 	nvme_rdma_unmap_data(queue, rq);
2117 	ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2118 			    DMA_TO_DEVICE);
2119 	nvme_complete_rq(rq);
2120 }
2121 
2122 static void nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2123 {
2124 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data);
2125 
2126 	nvmf_map_queues(set, &ctrl->ctrl, ctrl->io_queues);
2127 }
2128 
2129 static const struct blk_mq_ops nvme_rdma_mq_ops = {
2130 	.queue_rq	= nvme_rdma_queue_rq,
2131 	.complete	= nvme_rdma_complete_rq,
2132 	.init_request	= nvme_rdma_init_request,
2133 	.exit_request	= nvme_rdma_exit_request,
2134 	.init_hctx	= nvme_rdma_init_hctx,
2135 	.timeout	= nvme_rdma_timeout,
2136 	.map_queues	= nvme_rdma_map_queues,
2137 	.poll		= nvme_rdma_poll,
2138 };
2139 
2140 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
2141 	.queue_rq	= nvme_rdma_queue_rq,
2142 	.complete	= nvme_rdma_complete_rq,
2143 	.init_request	= nvme_rdma_init_request,
2144 	.exit_request	= nvme_rdma_exit_request,
2145 	.init_hctx	= nvme_rdma_init_admin_hctx,
2146 	.timeout	= nvme_rdma_timeout,
2147 };
2148 
2149 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
2150 {
2151 	nvme_rdma_teardown_io_queues(ctrl, shutdown);
2152 	nvme_quiesce_admin_queue(&ctrl->ctrl);
2153 	nvme_disable_ctrl(&ctrl->ctrl, shutdown);
2154 	nvme_rdma_teardown_admin_queue(ctrl, shutdown);
2155 }
2156 
2157 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2158 {
2159 	nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
2160 }
2161 
2162 static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2163 {
2164 	struct nvme_rdma_ctrl *ctrl =
2165 		container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
2166 
2167 	nvme_stop_ctrl(&ctrl->ctrl);
2168 	nvme_rdma_shutdown_ctrl(ctrl, false);
2169 
2170 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2171 		/* state change failure should never happen */
2172 		WARN_ON_ONCE(1);
2173 		return;
2174 	}
2175 
2176 	if (nvme_rdma_setup_ctrl(ctrl, false))
2177 		goto out_fail;
2178 
2179 	return;
2180 
2181 out_fail:
2182 	++ctrl->ctrl.nr_reconnects;
2183 	nvme_rdma_reconnect_or_remove(ctrl);
2184 }
2185 
2186 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2187 	.name			= "rdma",
2188 	.module			= THIS_MODULE,
2189 	.flags			= NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
2190 	.reg_read32		= nvmf_reg_read32,
2191 	.reg_read64		= nvmf_reg_read64,
2192 	.reg_write32		= nvmf_reg_write32,
2193 	.free_ctrl		= nvme_rdma_free_ctrl,
2194 	.submit_async_event	= nvme_rdma_submit_async_event,
2195 	.delete_ctrl		= nvme_rdma_delete_ctrl,
2196 	.get_address		= nvmf_get_address,
2197 	.stop_ctrl		= nvme_rdma_stop_ctrl,
2198 };
2199 
2200 /*
2201  * Fails a connection request if it matches an existing controller
2202  * (association) with the same tuple:
2203  * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2204  *
2205  * if local address is not specified in the request, it will match an
2206  * existing controller with all the other parameters the same and no
2207  * local port address specified as well.
2208  *
2209  * The ports don't need to be compared as they are intrinsically
2210  * already matched by the port pointers supplied.
2211  */
2212 static bool
2213 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2214 {
2215 	struct nvme_rdma_ctrl *ctrl;
2216 	bool found = false;
2217 
2218 	mutex_lock(&nvme_rdma_ctrl_mutex);
2219 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2220 		found = nvmf_ip_options_match(&ctrl->ctrl, opts);
2221 		if (found)
2222 			break;
2223 	}
2224 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2225 
2226 	return found;
2227 }
2228 
2229 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2230 		struct nvmf_ctrl_options *opts)
2231 {
2232 	struct nvme_rdma_ctrl *ctrl;
2233 	int ret;
2234 	bool changed;
2235 
2236 	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
2237 	if (!ctrl)
2238 		return ERR_PTR(-ENOMEM);
2239 	ctrl->ctrl.opts = opts;
2240 	INIT_LIST_HEAD(&ctrl->list);
2241 
2242 	if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2243 		opts->trsvcid =
2244 			kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2245 		if (!opts->trsvcid) {
2246 			ret = -ENOMEM;
2247 			goto out_free_ctrl;
2248 		}
2249 		opts->mask |= NVMF_OPT_TRSVCID;
2250 	}
2251 
2252 	ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2253 			opts->traddr, opts->trsvcid, &ctrl->addr);
2254 	if (ret) {
2255 		pr_err("malformed address passed: %s:%s\n",
2256 			opts->traddr, opts->trsvcid);
2257 		goto out_free_ctrl;
2258 	}
2259 
2260 	if (opts->mask & NVMF_OPT_HOST_TRADDR) {
2261 		ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2262 			opts->host_traddr, NULL, &ctrl->src_addr);
2263 		if (ret) {
2264 			pr_err("malformed src address passed: %s\n",
2265 			       opts->host_traddr);
2266 			goto out_free_ctrl;
2267 		}
2268 	}
2269 
2270 	if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2271 		ret = -EALREADY;
2272 		goto out_free_ctrl;
2273 	}
2274 
2275 	INIT_DELAYED_WORK(&ctrl->reconnect_work,
2276 			nvme_rdma_reconnect_ctrl_work);
2277 	INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2278 	INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
2279 
2280 	ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2281 				opts->nr_poll_queues + 1;
2282 	ctrl->ctrl.sqsize = opts->queue_size - 1;
2283 	ctrl->ctrl.kato = opts->kato;
2284 
2285 	ret = -ENOMEM;
2286 	ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
2287 				GFP_KERNEL);
2288 	if (!ctrl->queues)
2289 		goto out_free_ctrl;
2290 
2291 	ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2292 				0 /* no quirks, we're perfect! */);
2293 	if (ret)
2294 		goto out_kfree_queues;
2295 
2296 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2297 	WARN_ON_ONCE(!changed);
2298 
2299 	ret = nvme_rdma_setup_ctrl(ctrl, true);
2300 	if (ret)
2301 		goto out_uninit_ctrl;
2302 
2303 	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs, hostnqn: %s\n",
2304 		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr, opts->host->nqn);
2305 
2306 	mutex_lock(&nvme_rdma_ctrl_mutex);
2307 	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2308 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2309 
2310 	return &ctrl->ctrl;
2311 
2312 out_uninit_ctrl:
2313 	nvme_uninit_ctrl(&ctrl->ctrl);
2314 	nvme_put_ctrl(&ctrl->ctrl);
2315 	if (ret > 0)
2316 		ret = -EIO;
2317 	return ERR_PTR(ret);
2318 out_kfree_queues:
2319 	kfree(ctrl->queues);
2320 out_free_ctrl:
2321 	kfree(ctrl);
2322 	return ERR_PTR(ret);
2323 }
2324 
2325 static struct nvmf_transport_ops nvme_rdma_transport = {
2326 	.name		= "rdma",
2327 	.module		= THIS_MODULE,
2328 	.required_opts	= NVMF_OPT_TRADDR,
2329 	.allowed_opts	= NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2330 			  NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2331 			  NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2332 			  NVMF_OPT_TOS,
2333 	.create_ctrl	= nvme_rdma_create_ctrl,
2334 };
2335 
2336 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2337 {
2338 	struct nvme_rdma_ctrl *ctrl;
2339 	struct nvme_rdma_device *ndev;
2340 	bool found = false;
2341 
2342 	mutex_lock(&device_list_mutex);
2343 	list_for_each_entry(ndev, &device_list, entry) {
2344 		if (ndev->dev == ib_device) {
2345 			found = true;
2346 			break;
2347 		}
2348 	}
2349 	mutex_unlock(&device_list_mutex);
2350 
2351 	if (!found)
2352 		return;
2353 
2354 	/* Delete all controllers using this device */
2355 	mutex_lock(&nvme_rdma_ctrl_mutex);
2356 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2357 		if (ctrl->device->dev != ib_device)
2358 			continue;
2359 		nvme_delete_ctrl(&ctrl->ctrl);
2360 	}
2361 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2362 
2363 	flush_workqueue(nvme_delete_wq);
2364 }
2365 
2366 static struct ib_client nvme_rdma_ib_client = {
2367 	.name   = "nvme_rdma",
2368 	.remove = nvme_rdma_remove_one
2369 };
2370 
2371 static int __init nvme_rdma_init_module(void)
2372 {
2373 	int ret;
2374 
2375 	ret = ib_register_client(&nvme_rdma_ib_client);
2376 	if (ret)
2377 		return ret;
2378 
2379 	ret = nvmf_register_transport(&nvme_rdma_transport);
2380 	if (ret)
2381 		goto err_unreg_client;
2382 
2383 	return 0;
2384 
2385 err_unreg_client:
2386 	ib_unregister_client(&nvme_rdma_ib_client);
2387 	return ret;
2388 }
2389 
2390 static void __exit nvme_rdma_cleanup_module(void)
2391 {
2392 	struct nvme_rdma_ctrl *ctrl;
2393 
2394 	nvmf_unregister_transport(&nvme_rdma_transport);
2395 	ib_unregister_client(&nvme_rdma_ib_client);
2396 
2397 	mutex_lock(&nvme_rdma_ctrl_mutex);
2398 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2399 		nvme_delete_ctrl(&ctrl->ctrl);
2400 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2401 	flush_workqueue(nvme_delete_wq);
2402 }
2403 
2404 module_init(nvme_rdma_init_module);
2405 module_exit(nvme_rdma_cleanup_module);
2406 
2407 MODULE_DESCRIPTION("NVMe host RDMA transport driver");
2408 MODULE_LICENSE("GPL v2");
2409