1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Intel Merrifield SoC pinctrl driver 4 * 5 * Copyright (C) 2016, Intel Corporation 6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7 */ 8 9 #include <linux/init.h> 10 #include <linux/kernel.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/types.h> 15 16 #include <linux/pinctrl/pinctrl.h> 17 18 #include "pinctrl-intel.h" 19 #include "pinctrl-tangier.h" 20 21 static const struct pinctrl_pin_desc mrfld_pins[] = { 22 /* Family 0: OCP2SSC (0 pins) */ 23 /* Family 1: ULPI (13 pins) */ 24 PINCTRL_PIN(0, "ULPI_CLK"), 25 PINCTRL_PIN(1, "ULPI_D0"), 26 PINCTRL_PIN(2, "ULPI_D1"), 27 PINCTRL_PIN(3, "ULPI_D2"), 28 PINCTRL_PIN(4, "ULPI_D3"), 29 PINCTRL_PIN(5, "ULPI_D4"), 30 PINCTRL_PIN(6, "ULPI_D5"), 31 PINCTRL_PIN(7, "ULPI_D6"), 32 PINCTRL_PIN(8, "ULPI_D7"), 33 PINCTRL_PIN(9, "ULPI_DIR"), 34 PINCTRL_PIN(10, "ULPI_NXT"), 35 PINCTRL_PIN(11, "ULPI_REFCLK"), 36 PINCTRL_PIN(12, "ULPI_STP"), 37 /* Family 2: eMMC (24 pins) */ 38 PINCTRL_PIN(13, "EMMC_CLK"), 39 PINCTRL_PIN(14, "EMMC_CMD"), 40 PINCTRL_PIN(15, "EMMC_D0"), 41 PINCTRL_PIN(16, "EMMC_D1"), 42 PINCTRL_PIN(17, "EMMC_D2"), 43 PINCTRL_PIN(18, "EMMC_D3"), 44 PINCTRL_PIN(19, "EMMC_D4"), 45 PINCTRL_PIN(20, "EMMC_D5"), 46 PINCTRL_PIN(21, "EMMC_D6"), 47 PINCTRL_PIN(22, "EMMC_D7"), 48 PINCTRL_PIN(23, "EMMC_RST_N"), 49 PINCTRL_PIN(24, "GP154"), 50 PINCTRL_PIN(25, "GP155"), 51 PINCTRL_PIN(26, "GP156"), 52 PINCTRL_PIN(27, "GP157"), 53 PINCTRL_PIN(28, "GP158"), 54 PINCTRL_PIN(29, "GP159"), 55 PINCTRL_PIN(30, "GP160"), 56 PINCTRL_PIN(31, "GP161"), 57 PINCTRL_PIN(32, "GP162"), 58 PINCTRL_PIN(33, "GP163"), 59 PINCTRL_PIN(34, "GP97"), 60 PINCTRL_PIN(35, "GP14"), 61 PINCTRL_PIN(36, "GP15"), 62 /* Family 3: SDIO (20 pins) */ 63 PINCTRL_PIN(37, "GP77_SD_CD"), 64 PINCTRL_PIN(38, "GP78_SD_CLK"), 65 PINCTRL_PIN(39, "GP79_SD_CMD"), 66 PINCTRL_PIN(40, "GP80_SD_D0"), 67 PINCTRL_PIN(41, "GP81_SD_D1"), 68 PINCTRL_PIN(42, "GP82_SD_D2"), 69 PINCTRL_PIN(43, "GP83_SD_D3"), 70 PINCTRL_PIN(44, "GP84_SD_LS_CLK_FB"), 71 PINCTRL_PIN(45, "GP85_SD_LS_CMD_DIR"), 72 PINCTRL_PIN(46, "GP86_SD_LS_D_DIR"), 73 PINCTRL_PIN(47, "GP88_SD_LS_SEL"), 74 PINCTRL_PIN(48, "GP87_SD_PD"), 75 PINCTRL_PIN(49, "GP89_SD_WP"), 76 PINCTRL_PIN(50, "GP90_SDIO_CLK"), 77 PINCTRL_PIN(51, "GP91_SDIO_CMD"), 78 PINCTRL_PIN(52, "GP92_SDIO_D0"), 79 PINCTRL_PIN(53, "GP93_SDIO_D1"), 80 PINCTRL_PIN(54, "GP94_SDIO_D2"), 81 PINCTRL_PIN(55, "GP95_SDIO_D3"), 82 PINCTRL_PIN(56, "GP96_SDIO_PD"), 83 /* Family 4: HSI (8 pins) */ 84 PINCTRL_PIN(57, "HSI_ACDATA"), 85 PINCTRL_PIN(58, "HSI_ACFLAG"), 86 PINCTRL_PIN(59, "HSI_ACREADY"), 87 PINCTRL_PIN(60, "HSI_ACWAKE"), 88 PINCTRL_PIN(61, "HSI_CADATA"), 89 PINCTRL_PIN(62, "HSI_CAFLAG"), 90 PINCTRL_PIN(63, "HSI_CAREADY"), 91 PINCTRL_PIN(64, "HSI_CAWAKE"), 92 /* Family 5: SSP Audio (14 pins) */ 93 PINCTRL_PIN(65, "GP70"), 94 PINCTRL_PIN(66, "GP71"), 95 PINCTRL_PIN(67, "GP32_I2S_0_CLK"), 96 PINCTRL_PIN(68, "GP33_I2S_0_FS"), 97 PINCTRL_PIN(69, "GP34_I2S_0_RXD"), 98 PINCTRL_PIN(70, "GP35_I2S_0_TXD"), 99 PINCTRL_PIN(71, "GP36_I2S_1_CLK"), 100 PINCTRL_PIN(72, "GP37_I2S_1_FS"), 101 PINCTRL_PIN(73, "GP38_I2S_1_RXD"), 102 PINCTRL_PIN(74, "GP39_I2S_1_TXD"), 103 PINCTRL_PIN(75, "GP40_I2S_2_CLK"), 104 PINCTRL_PIN(76, "GP41_I2S_2_FS"), 105 PINCTRL_PIN(77, "GP42_I2S_2_RXD"), 106 PINCTRL_PIN(78, "GP43_I2S_2_TXD"), 107 /* Family 6: GP SSP (22 pins) */ 108 PINCTRL_PIN(79, "GP120_SPI_0_CLK"), 109 PINCTRL_PIN(80, "GP121_SPI_0_SS"), 110 PINCTRL_PIN(81, "GP122_SPI_0_RXD"), 111 PINCTRL_PIN(82, "GP123_SPI_0_TXD"), 112 PINCTRL_PIN(83, "GP102_SPI_1_CLK"), 113 PINCTRL_PIN(84, "GP103_SPI_1_SS0"), 114 PINCTRL_PIN(85, "GP104_SPI_1_SS1"), 115 PINCTRL_PIN(86, "GP105_SPI_1_SS2"), 116 PINCTRL_PIN(87, "GP106_SPI_1_SS3"), 117 PINCTRL_PIN(88, "GP107_SPI_1_RXD"), 118 PINCTRL_PIN(89, "GP108_SPI_1_TXD"), 119 PINCTRL_PIN(90, "GP109_SPI_2_CLK"), 120 PINCTRL_PIN(91, "GP110_SPI_2_SS0"), 121 PINCTRL_PIN(92, "GP111_SPI_2_SS1"), 122 PINCTRL_PIN(93, "GP112_SPI_2_SS2"), 123 PINCTRL_PIN(94, "GP113_SPI_2_SS3"), 124 PINCTRL_PIN(95, "GP114_SPI_2_RXD"), 125 PINCTRL_PIN(96, "GP115_SPI_2_TXD"), 126 PINCTRL_PIN(97, "GP116_SPI_3_CLK"), 127 PINCTRL_PIN(98, "GP117_SPI_3_SS"), 128 PINCTRL_PIN(99, "GP118_SPI_3_RXD"), 129 PINCTRL_PIN(100, "GP119_SPI_3_TXD"), 130 /* Family 7: I2C (14 pins) */ 131 PINCTRL_PIN(101, "GP19_I2C_1_SCL"), 132 PINCTRL_PIN(102, "GP20_I2C_1_SDA"), 133 PINCTRL_PIN(103, "GP21_I2C_2_SCL"), 134 PINCTRL_PIN(104, "GP22_I2C_2_SDA"), 135 PINCTRL_PIN(105, "GP17_I2C_3_SCL_HDMI"), 136 PINCTRL_PIN(106, "GP18_I2C_3_SDA_HDMI"), 137 PINCTRL_PIN(107, "GP23_I2C_4_SCL"), 138 PINCTRL_PIN(108, "GP24_I2C_4_SDA"), 139 PINCTRL_PIN(109, "GP25_I2C_5_SCL"), 140 PINCTRL_PIN(110, "GP26_I2C_5_SDA"), 141 PINCTRL_PIN(111, "GP27_I2C_6_SCL"), 142 PINCTRL_PIN(112, "GP28_I2C_6_SDA"), 143 PINCTRL_PIN(113, "GP29_I2C_7_SCL"), 144 PINCTRL_PIN(114, "GP30_I2C_7_SDA"), 145 /* Family 8: UART (12 pins) */ 146 PINCTRL_PIN(115, "GP124_UART_0_CTS"), 147 PINCTRL_PIN(116, "GP125_UART_0_RTS"), 148 PINCTRL_PIN(117, "GP126_UART_0_RX"), 149 PINCTRL_PIN(118, "GP127_UART_0_TX"), 150 PINCTRL_PIN(119, "GP128_UART_1_CTS"), 151 PINCTRL_PIN(120, "GP129_UART_1_RTS"), 152 PINCTRL_PIN(121, "GP130_UART_1_RX"), 153 PINCTRL_PIN(122, "GP131_UART_1_TX"), 154 PINCTRL_PIN(123, "GP132_UART_2_CTS"), 155 PINCTRL_PIN(124, "GP133_UART_2_RTS"), 156 PINCTRL_PIN(125, "GP134_UART_2_RX"), 157 PINCTRL_PIN(126, "GP135_UART_2_TX"), 158 /* Family 9: GPIO South (19 pins) */ 159 PINCTRL_PIN(127, "GP177"), 160 PINCTRL_PIN(128, "GP178"), 161 PINCTRL_PIN(129, "GP179"), 162 PINCTRL_PIN(130, "GP180"), 163 PINCTRL_PIN(131, "GP181"), 164 PINCTRL_PIN(132, "GP182_PWM2"), 165 PINCTRL_PIN(133, "GP183_PWM3"), 166 PINCTRL_PIN(134, "GP184"), 167 PINCTRL_PIN(135, "GP185"), 168 PINCTRL_PIN(136, "GP186"), 169 PINCTRL_PIN(137, "GP187"), 170 PINCTRL_PIN(138, "GP188"), 171 PINCTRL_PIN(139, "GP189"), 172 PINCTRL_PIN(140, "GP64_FAST_INT0"), 173 PINCTRL_PIN(141, "GP65_FAST_INT1"), 174 PINCTRL_PIN(142, "GP66_FAST_INT2"), 175 PINCTRL_PIN(143, "GP67_FAST_INT3"), 176 PINCTRL_PIN(144, "GP12_PWM0"), 177 PINCTRL_PIN(145, "GP13_PWM1"), 178 /* Family 10: Camera Sideband (12 pins) */ 179 PINCTRL_PIN(146, "GP0"), 180 PINCTRL_PIN(147, "GP1"), 181 PINCTRL_PIN(148, "GP2"), 182 PINCTRL_PIN(149, "GP3"), 183 PINCTRL_PIN(150, "GP4"), 184 PINCTRL_PIN(151, "GP5"), 185 PINCTRL_PIN(152, "GP6"), 186 PINCTRL_PIN(153, "GP7"), 187 PINCTRL_PIN(154, "GP8"), 188 PINCTRL_PIN(155, "GP9"), 189 PINCTRL_PIN(156, "GP10"), 190 PINCTRL_PIN(157, "GP11"), 191 /* Family 11: Clock (22 pins) */ 192 PINCTRL_PIN(158, "GP137"), 193 PINCTRL_PIN(159, "GP138"), 194 PINCTRL_PIN(160, "GP139"), 195 PINCTRL_PIN(161, "GP140"), 196 PINCTRL_PIN(162, "GP141"), 197 PINCTRL_PIN(163, "GP142"), 198 PINCTRL_PIN(164, "GP16_HDMI_HPD"), 199 PINCTRL_PIN(165, "GP68_DSI_A_TE"), 200 PINCTRL_PIN(166, "GP69_DSI_C_TE"), 201 PINCTRL_PIN(167, "OSC_CLK_CTRL0"), 202 PINCTRL_PIN(168, "OSC_CLK_CTRL1"), 203 PINCTRL_PIN(169, "OSC_CLK0"), 204 PINCTRL_PIN(170, "OSC_CLK1"), 205 PINCTRL_PIN(171, "OSC_CLK2"), 206 PINCTRL_PIN(172, "OSC_CLK3"), 207 PINCTRL_PIN(173, "OSC_CLK4"), 208 PINCTRL_PIN(174, "RESETOUT"), 209 PINCTRL_PIN(175, "PMODE"), 210 PINCTRL_PIN(176, "PRDY"), 211 PINCTRL_PIN(177, "PREQ"), 212 PINCTRL_PIN(178, "GP190"), 213 PINCTRL_PIN(179, "GP191"), 214 /* Family 12: MSIC (15 pins) */ 215 PINCTRL_PIN(180, "I2C_0_SCL"), 216 PINCTRL_PIN(181, "I2C_0_SDA"), 217 PINCTRL_PIN(182, "IERR"), 218 PINCTRL_PIN(183, "JTAG_TCK"), 219 PINCTRL_PIN(184, "JTAG_TDI"), 220 PINCTRL_PIN(185, "JTAG_TDO"), 221 PINCTRL_PIN(186, "JTAG_TMS"), 222 PINCTRL_PIN(187, "JTAG_TRST"), 223 PINCTRL_PIN(188, "PROCHOT"), 224 PINCTRL_PIN(189, "RTC_CLK"), 225 PINCTRL_PIN(190, "SVID_ALERT"), 226 PINCTRL_PIN(191, "SVID_CLK"), 227 PINCTRL_PIN(192, "SVID_D"), 228 PINCTRL_PIN(193, "THERMTRIP"), 229 PINCTRL_PIN(194, "STANDBY"), 230 /* Family 13: Keyboard (20 pins) */ 231 PINCTRL_PIN(195, "GP44"), 232 PINCTRL_PIN(196, "GP45"), 233 PINCTRL_PIN(197, "GP46"), 234 PINCTRL_PIN(198, "GP47"), 235 PINCTRL_PIN(199, "GP48"), 236 PINCTRL_PIN(200, "GP49"), 237 PINCTRL_PIN(201, "GP50"), 238 PINCTRL_PIN(202, "GP51"), 239 PINCTRL_PIN(203, "GP52"), 240 PINCTRL_PIN(204, "GP53"), 241 PINCTRL_PIN(205, "GP54"), 242 PINCTRL_PIN(206, "GP55"), 243 PINCTRL_PIN(207, "GP56"), 244 PINCTRL_PIN(208, "GP57"), 245 PINCTRL_PIN(209, "GP58"), 246 PINCTRL_PIN(210, "GP59"), 247 PINCTRL_PIN(211, "GP60"), 248 PINCTRL_PIN(212, "GP61"), 249 PINCTRL_PIN(213, "GP62"), 250 PINCTRL_PIN(214, "GP63"), 251 /* Family 14: GPIO North (13 pins) */ 252 PINCTRL_PIN(215, "GP164"), 253 PINCTRL_PIN(216, "GP165"), 254 PINCTRL_PIN(217, "GP166"), 255 PINCTRL_PIN(218, "GP167"), 256 PINCTRL_PIN(219, "GP168_MJTAG_TCK"), 257 PINCTRL_PIN(220, "GP169_MJTAG_TDI"), 258 PINCTRL_PIN(221, "GP170_MJTAG_TDO"), 259 PINCTRL_PIN(222, "GP171_MJTAG_TMS"), 260 PINCTRL_PIN(223, "GP172_MJTAG_TRST"), 261 PINCTRL_PIN(224, "GP173"), 262 PINCTRL_PIN(225, "GP174"), 263 PINCTRL_PIN(226, "GP175"), 264 PINCTRL_PIN(227, "GP176"), 265 /* Family 15: PTI (5 pins) */ 266 PINCTRL_PIN(228, "GP72_PTI_CLK"), 267 PINCTRL_PIN(229, "GP73_PTI_D0"), 268 PINCTRL_PIN(230, "GP74_PTI_D1"), 269 PINCTRL_PIN(231, "GP75_PTI_D2"), 270 PINCTRL_PIN(232, "GP76_PTI_D3"), 271 /* Family 16: USB3 (0 pins) */ 272 /* Family 17: HSIC (0 pins) */ 273 /* Family 18: Broadcast (0 pins) */ 274 }; 275 276 static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 }; 277 static const unsigned int mrfld_i2s2_pins[] = { 75, 76, 77, 78 }; 278 static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 }; 279 static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 }; 280 static const unsigned int mrfld_uart1_pins[] = { 119, 120, 121, 122 }; 281 static const unsigned int mrfld_uart2_pins[] = { 123, 124, 125, 126 }; 282 static const unsigned int mrfld_pwm0_pins[] = { 144 }; 283 static const unsigned int mrfld_pwm1_pins[] = { 145 }; 284 static const unsigned int mrfld_pwm2_pins[] = { 132 }; 285 static const unsigned int mrfld_pwm3_pins[] = { 133 }; 286 287 static const struct intel_pingroup mrfld_groups[] = { 288 PIN_GROUP("sdio_grp", mrfld_sdio_pins, 1), 289 PIN_GROUP("i2s2_grp", mrfld_i2s2_pins, 1), 290 PIN_GROUP("spi5_grp", mrfld_spi5_pins, 1), 291 PIN_GROUP("uart0_grp", mrfld_uart0_pins, 1), 292 PIN_GROUP("uart1_grp", mrfld_uart1_pins, 1), 293 PIN_GROUP("uart2_grp", mrfld_uart2_pins, 1), 294 PIN_GROUP("pwm0_grp", mrfld_pwm0_pins, 1), 295 PIN_GROUP("pwm1_grp", mrfld_pwm1_pins, 1), 296 PIN_GROUP("pwm2_grp", mrfld_pwm2_pins, 1), 297 PIN_GROUP("pwm3_grp", mrfld_pwm3_pins, 1), 298 }; 299 300 static const char * const mrfld_sdio_groups[] = { "sdio_grp" }; 301 static const char * const mrfld_i2s2_groups[] = { "i2s2_grp" }; 302 static const char * const mrfld_spi5_groups[] = { "spi5_grp" }; 303 static const char * const mrfld_uart0_groups[] = { "uart0_grp" }; 304 static const char * const mrfld_uart1_groups[] = { "uart1_grp" }; 305 static const char * const mrfld_uart2_groups[] = { "uart2_grp" }; 306 static const char * const mrfld_pwm0_groups[] = { "pwm0_grp" }; 307 static const char * const mrfld_pwm1_groups[] = { "pwm1_grp" }; 308 static const char * const mrfld_pwm2_groups[] = { "pwm2_grp" }; 309 static const char * const mrfld_pwm3_groups[] = { "pwm3_grp" }; 310 311 static const struct intel_function mrfld_functions[] = { 312 FUNCTION("sdio", mrfld_sdio_groups), 313 FUNCTION("i2s2", mrfld_i2s2_groups), 314 FUNCTION("spi5", mrfld_spi5_groups), 315 FUNCTION("uart0", mrfld_uart0_groups), 316 FUNCTION("uart1", mrfld_uart1_groups), 317 FUNCTION("uart2", mrfld_uart2_groups), 318 FUNCTION("pwm0", mrfld_pwm0_groups), 319 FUNCTION("pwm1", mrfld_pwm1_groups), 320 FUNCTION("pwm2", mrfld_pwm2_groups), 321 FUNCTION("pwm3", mrfld_pwm3_groups), 322 }; 323 324 static const struct tng_family mrfld_families[] = { 325 TNG_FAMILY(1, 0, 12), 326 TNG_FAMILY(2, 13, 36), 327 TNG_FAMILY(3, 37, 56), 328 TNG_FAMILY(4, 57, 64), 329 TNG_FAMILY(5, 65, 78), 330 TNG_FAMILY(6, 79, 100), 331 TNG_FAMILY_PROTECTED(7, 101, 114), 332 TNG_FAMILY(8, 115, 126), 333 TNG_FAMILY(9, 127, 145), 334 TNG_FAMILY(10, 146, 157), 335 TNG_FAMILY(11, 158, 179), 336 TNG_FAMILY_PROTECTED(12, 180, 194), 337 TNG_FAMILY(13, 195, 214), 338 TNG_FAMILY(14, 215, 227), 339 TNG_FAMILY(15, 228, 232), 340 }; 341 342 static const struct tng_pinctrl mrfld_soc_data = { 343 .pins = mrfld_pins, 344 .npins = ARRAY_SIZE(mrfld_pins), 345 .groups = mrfld_groups, 346 .ngroups = ARRAY_SIZE(mrfld_groups), 347 .families = mrfld_families, 348 .nfamilies = ARRAY_SIZE(mrfld_families), 349 .functions = mrfld_functions, 350 .nfunctions = ARRAY_SIZE(mrfld_functions), 351 }; 352 353 static const struct acpi_device_id mrfld_acpi_table[] = { 354 { "INTC1002", (kernel_ulong_t)&mrfld_soc_data }, 355 { } 356 }; 357 MODULE_DEVICE_TABLE(acpi, mrfld_acpi_table); 358 359 static struct platform_driver mrfld_pinctrl_driver = { 360 .probe = devm_tng_pinctrl_probe, 361 .driver = { 362 .name = "pinctrl-merrifield", 363 .acpi_match_table = mrfld_acpi_table, 364 }, 365 }; 366 367 static int __init mrfld_pinctrl_init(void) 368 { 369 return platform_driver_register(&mrfld_pinctrl_driver); 370 } 371 subsys_initcall(mrfld_pinctrl_init); 372 373 static void __exit mrfld_pinctrl_exit(void) 374 { 375 platform_driver_unregister(&mrfld_pinctrl_driver); 376 } 377 module_exit(mrfld_pinctrl_exit); 378 379 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); 380 MODULE_DESCRIPTION("Intel Merrifield SoC pinctrl driver"); 381 MODULE_LICENSE("GPL v2"); 382 MODULE_ALIAS("platform:pinctrl-merrifield"); 383 MODULE_IMPORT_NS(PINCTRL_TANGIER); 384