11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2fc59e66cSHongzhou Yang /*
3fc59e66cSHongzhou Yang  * Copyright (c) 2015 MediaTek Inc.
4fc59e66cSHongzhou Yang  * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
5fc59e66cSHongzhou Yang  */
6fc59e66cSHongzhou Yang 
7d4bc6b92SPaul Gortmaker #include <linux/init.h>
8fc59e66cSHongzhou Yang #include <linux/platform_device.h>
9fc59e66cSHongzhou Yang #include <linux/of.h>
10fc59e66cSHongzhou Yang #include <linux/pinctrl/pinctrl.h>
11fc59e66cSHongzhou Yang #include <linux/pinctrl/pinconf-generic.h>
12fc59e66cSHongzhou Yang #include <linux/mfd/mt6397/core.h>
13fc59e66cSHongzhou Yang 
14fc59e66cSHongzhou Yang #include "pinctrl-mtk-common.h"
15fc59e66cSHongzhou Yang #include "pinctrl-mtk-mt6397.h"
16fc59e66cSHongzhou Yang 
17fc59e66cSHongzhou Yang #define MT6397_PIN_REG_BASE  0xc000
18fc59e66cSHongzhou Yang 
19fc59e66cSHongzhou Yang static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {
20fc59e66cSHongzhou Yang 	.pins = mtk_pins_mt6397,
21fc59e66cSHongzhou Yang 	.npins = ARRAY_SIZE(mtk_pins_mt6397),
22fc59e66cSHongzhou Yang 	.dir_offset = (MT6397_PIN_REG_BASE + 0x000),
23fc59e66cSHongzhou Yang 	.ies_offset = MTK_PINCTRL_NOT_SUPPORT,
24fc59e66cSHongzhou Yang 	.smt_offset = MTK_PINCTRL_NOT_SUPPORT,
25fc59e66cSHongzhou Yang 	.pullen_offset = (MT6397_PIN_REG_BASE + 0x020),
26fc59e66cSHongzhou Yang 	.pullsel_offset = (MT6397_PIN_REG_BASE + 0x040),
27fc59e66cSHongzhou Yang 	.dout_offset = (MT6397_PIN_REG_BASE + 0x080),
28fc59e66cSHongzhou Yang 	.din_offset = (MT6397_PIN_REG_BASE + 0x0a0),
29fc59e66cSHongzhou Yang 	.pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0),
30fc59e66cSHongzhou Yang 	.type1_start = 41,
31fc59e66cSHongzhou Yang 	.type1_end = 41,
32fc59e66cSHongzhou Yang 	.port_shf = 3,
33fc59e66cSHongzhou Yang 	.port_mask = 0x3,
34fc59e66cSHongzhou Yang 	.port_align = 2,
35*9f940d8eSFabien Parent 	.mode_mask = 0xf,
36*9f940d8eSFabien Parent 	.mode_per_reg = 5,
37*9f940d8eSFabien Parent 	.mode_shf = 4,
38fc59e66cSHongzhou Yang };
39fc59e66cSHongzhou Yang 
mt6397_pinctrl_probe(struct platform_device * pdev)40fc59e66cSHongzhou Yang static int mt6397_pinctrl_probe(struct platform_device *pdev)
41fc59e66cSHongzhou Yang {
42fc59e66cSHongzhou Yang 	struct mt6397_chip *mt6397;
43fc59e66cSHongzhou Yang 
44fc59e66cSHongzhou Yang 	mt6397 = dev_get_drvdata(pdev->dev.parent);
45fc59e66cSHongzhou Yang 	return mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap);
46fc59e66cSHongzhou Yang }
47fc59e66cSHongzhou Yang 
48fc59e66cSHongzhou Yang static const struct of_device_id mt6397_pctrl_match[] = {
49fc59e66cSHongzhou Yang 	{ .compatible = "mediatek,mt6397-pinctrl", },
50fc59e66cSHongzhou Yang 	{ }
51fc59e66cSHongzhou Yang };
52fc59e66cSHongzhou Yang 
53fc59e66cSHongzhou Yang static struct platform_driver mtk_pinctrl_driver = {
54fc59e66cSHongzhou Yang 	.probe = mt6397_pinctrl_probe,
55fc59e66cSHongzhou Yang 	.driver = {
56fc59e66cSHongzhou Yang 		.name = "mediatek-mt6397-pinctrl",
57fc59e66cSHongzhou Yang 		.of_match_table = mt6397_pctrl_match,
58fc59e66cSHongzhou Yang 	},
59fc59e66cSHongzhou Yang };
60fc59e66cSHongzhou Yang 
614ecb65fbSGeliang Tang builtin_platform_driver(mtk_pinctrl_driver);
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