1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 3 4 #define pr_fmt(fmt) "%s: " fmt, __func__ 5 6 #include <linux/err.h> 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/platform_device.h> 11 #include <linux/slab.h> 12 #include <linux/string.h> 13 #include <linux/regulator/driver.h> 14 #include <linux/regulator/machine.h> 15 #include <linux/regulator/of_regulator.h> 16 17 #include <soc/qcom/cmd-db.h> 18 #include <soc/qcom/rpmh.h> 19 20 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 21 22 /** 23 * enum rpmh_regulator_type - supported RPMh accelerator types 24 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage, 25 * and mode of LDO, SMPS, and BOB type PMIC regulators. 26 * @XOB: RPMh XOB accelerator which supports voting on the enable state 27 * of PMIC regulators. 28 */ 29 enum rpmh_regulator_type { 30 VRM, 31 XOB, 32 }; 33 34 #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0 35 #define RPMH_REGULATOR_REG_ENABLE 0x4 36 #define RPMH_REGULATOR_REG_VRM_MODE 0x8 37 38 #define PMIC4_LDO_MODE_RETENTION 4 39 #define PMIC4_LDO_MODE_LPM 5 40 #define PMIC4_LDO_MODE_HPM 7 41 42 #define PMIC4_SMPS_MODE_RETENTION 4 43 #define PMIC4_SMPS_MODE_PFM 5 44 #define PMIC4_SMPS_MODE_AUTO 6 45 #define PMIC4_SMPS_MODE_PWM 7 46 47 #define PMIC4_BOB_MODE_PASS 0 48 #define PMIC4_BOB_MODE_PFM 1 49 #define PMIC4_BOB_MODE_AUTO 2 50 #define PMIC4_BOB_MODE_PWM 3 51 52 #define PMIC5_LDO_MODE_RETENTION 3 53 #define PMIC5_LDO_MODE_LPM 4 54 #define PMIC5_LDO_MODE_HPM 7 55 56 #define PMIC5_SMPS_MODE_RETENTION 3 57 #define PMIC5_SMPS_MODE_PFM 4 58 #define PMIC5_SMPS_MODE_AUTO 6 59 #define PMIC5_SMPS_MODE_PWM 7 60 61 #define PMIC5_BOB_MODE_PASS 2 62 #define PMIC5_BOB_MODE_PFM 4 63 #define PMIC5_BOB_MODE_AUTO 6 64 #define PMIC5_BOB_MODE_PWM 7 65 66 /** 67 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations 68 * @regulator_type: RPMh accelerator type used to manage this 69 * regulator 70 * @ops: Pointer to regulator ops callback structure 71 * @voltage_range: The single range of voltages supported by this 72 * PMIC regulator type 73 * @n_voltages: The number of unique voltage set points defined 74 * by voltage_range 75 * @hpm_min_load_uA: Minimum load current in microamps that requires 76 * high power mode (HPM) operation. This is used 77 * for LDO hardware type regulators only. 78 * @pmic_mode_map: Array indexed by regulator framework mode 79 * containing PMIC hardware modes. Must be large 80 * enough to index all framework modes supported 81 * by this regulator hardware type. 82 * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined 83 * in device tree to a regulator framework mode 84 */ 85 struct rpmh_vreg_hw_data { 86 enum rpmh_regulator_type regulator_type; 87 const struct regulator_ops *ops; 88 const struct linear_range voltage_range; 89 int n_voltages; 90 int hpm_min_load_uA; 91 const int *pmic_mode_map; 92 unsigned int (*of_map_mode)(unsigned int mode); 93 }; 94 95 /** 96 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a 97 * single regulator device 98 * @dev: Device pointer for the top-level PMIC RPMh 99 * regulator parent device. This is used as a 100 * handle in RPMh write requests. 101 * @addr: Base address of the regulator resource within 102 * an RPMh accelerator 103 * @rdesc: Regulator descriptor 104 * @hw_data: PMIC regulator configuration data for this RPMh 105 * regulator 106 * @always_wait_for_ack: Boolean flag indicating if a request must always 107 * wait for an ACK from RPMh before continuing even 108 * if it corresponds to a strictly lower power 109 * state (e.g. enabled --> disabled). 110 * @enabled: Flag indicating if the regulator is enabled or 111 * not 112 * @bypassed: Boolean indicating if the regulator is in 113 * bypass (pass-through) mode or not. This is 114 * only used by BOB rpmh-regulator resources. 115 * @voltage_selector: Selector used for get_voltage_sel() and 116 * set_voltage_sel() callbacks 117 * @mode: RPMh VRM regulator current framework mode 118 */ 119 struct rpmh_vreg { 120 struct device *dev; 121 u32 addr; 122 struct regulator_desc rdesc; 123 const struct rpmh_vreg_hw_data *hw_data; 124 bool always_wait_for_ack; 125 126 int enabled; 127 bool bypassed; 128 int voltage_selector; 129 unsigned int mode; 130 }; 131 132 /** 133 * struct rpmh_vreg_init_data - initialization data for an RPMh regulator 134 * @name: Name for the regulator which also corresponds 135 * to the device tree subnode name of the regulator 136 * @resource_name: RPMh regulator resource name format string. 137 * This must include exactly one field: '%s' which 138 * is filled at run-time with the PMIC ID provided 139 * by device tree property qcom,pmic-id. Example: 140 * "ldo%s1" for RPMh resource "ldoa1". 141 * @supply_name: Parent supply regulator name 142 * @hw_data: Configuration data for this PMIC regulator type 143 */ 144 struct rpmh_vreg_init_data { 145 const char *name; 146 const char *resource_name; 147 const char *supply_name; 148 const struct rpmh_vreg_hw_data *hw_data; 149 }; 150 151 /** 152 * rpmh_regulator_send_request() - send the request to RPMh 153 * @vreg: Pointer to the RPMh regulator 154 * @cmd: Pointer to the RPMh command to send 155 * @wait_for_ack: Boolean indicating if execution must wait until the 156 * request has been acknowledged as complete 157 * 158 * Return: 0 on success, errno on failure 159 */ 160 static int rpmh_regulator_send_request(struct rpmh_vreg *vreg, 161 struct tcs_cmd *cmd, bool wait_for_ack) 162 { 163 int ret; 164 165 if (wait_for_ack || vreg->always_wait_for_ack) 166 ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1); 167 else 168 ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 169 1); 170 171 return ret; 172 } 173 174 static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, 175 unsigned int selector, bool wait_for_ack) 176 { 177 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 178 struct tcs_cmd cmd = { 179 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE, 180 }; 181 int ret; 182 183 /* VRM voltage control register is set with voltage in millivolts. */ 184 cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev, 185 selector), 1000); 186 187 ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack); 188 if (!ret) 189 vreg->voltage_selector = selector; 190 191 return ret; 192 } 193 194 static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, 195 unsigned int selector) 196 { 197 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 198 199 if (vreg->enabled == -EINVAL) { 200 /* 201 * Cache the voltage and send it later when the regulator is 202 * enabled or disabled. 203 */ 204 vreg->voltage_selector = selector; 205 return 0; 206 } 207 208 return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector, 209 selector > vreg->voltage_selector); 210 } 211 212 static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev) 213 { 214 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 215 216 return vreg->voltage_selector; 217 } 218 219 static int rpmh_regulator_is_enabled(struct regulator_dev *rdev) 220 { 221 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 222 223 return vreg->enabled; 224 } 225 226 static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev, 227 bool enable) 228 { 229 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 230 struct tcs_cmd cmd = { 231 .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE, 232 .data = enable, 233 }; 234 int ret; 235 236 if (vreg->enabled == -EINVAL && 237 vreg->voltage_selector != -ENOTRECOVERABLE) { 238 ret = _rpmh_regulator_vrm_set_voltage_sel(rdev, 239 vreg->voltage_selector, true); 240 if (ret < 0) 241 return ret; 242 } 243 244 ret = rpmh_regulator_send_request(vreg, &cmd, enable); 245 if (!ret) 246 vreg->enabled = enable; 247 248 return ret; 249 } 250 251 static int rpmh_regulator_enable(struct regulator_dev *rdev) 252 { 253 return rpmh_regulator_set_enable_state(rdev, true); 254 } 255 256 static int rpmh_regulator_disable(struct regulator_dev *rdev) 257 { 258 return rpmh_regulator_set_enable_state(rdev, false); 259 } 260 261 static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg, 262 unsigned int mode, bool bypassed) 263 { 264 struct tcs_cmd cmd = { 265 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE, 266 }; 267 int pmic_mode; 268 269 if (mode > REGULATOR_MODE_STANDBY) 270 return -EINVAL; 271 272 pmic_mode = vreg->hw_data->pmic_mode_map[mode]; 273 if (pmic_mode < 0) 274 return pmic_mode; 275 276 if (bypassed) 277 cmd.data = PMIC4_BOB_MODE_PASS; 278 else 279 cmd.data = pmic_mode; 280 281 return rpmh_regulator_send_request(vreg, &cmd, true); 282 } 283 284 static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev, 285 unsigned int mode) 286 { 287 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 288 int ret; 289 290 if (mode == vreg->mode) 291 return 0; 292 293 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed); 294 if (!ret) 295 vreg->mode = mode; 296 297 return ret; 298 } 299 300 static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev) 301 { 302 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 303 304 return vreg->mode; 305 } 306 307 /** 308 * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load 309 * @rdev: Regulator device pointer for the rpmh-regulator 310 * @input_uV: Input voltage 311 * @output_uV: Output voltage 312 * @load_uA: Aggregated load current in microamps 313 * 314 * This function is used in the regulator_ops for VRM type RPMh regulator 315 * devices. 316 * 317 * Return: 0 on success, errno on failure 318 */ 319 static unsigned int rpmh_regulator_vrm_get_optimum_mode( 320 struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA) 321 { 322 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 323 324 if (load_uA >= vreg->hw_data->hpm_min_load_uA) 325 return REGULATOR_MODE_NORMAL; 326 else 327 return REGULATOR_MODE_IDLE; 328 } 329 330 static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev, 331 bool enable) 332 { 333 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 334 int ret; 335 336 if (vreg->bypassed == enable) 337 return 0; 338 339 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable); 340 if (!ret) 341 vreg->bypassed = enable; 342 343 return ret; 344 } 345 346 static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev, 347 bool *enable) 348 { 349 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 350 351 *enable = vreg->bypassed; 352 353 return 0; 354 } 355 356 static const struct regulator_ops rpmh_regulator_vrm_ops = { 357 .enable = rpmh_regulator_enable, 358 .disable = rpmh_regulator_disable, 359 .is_enabled = rpmh_regulator_is_enabled, 360 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, 361 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, 362 .list_voltage = regulator_list_voltage_linear_range, 363 .set_mode = rpmh_regulator_vrm_set_mode, 364 .get_mode = rpmh_regulator_vrm_get_mode, 365 }; 366 367 static const struct regulator_ops rpmh_regulator_vrm_drms_ops = { 368 .enable = rpmh_regulator_enable, 369 .disable = rpmh_regulator_disable, 370 .is_enabled = rpmh_regulator_is_enabled, 371 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, 372 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, 373 .list_voltage = regulator_list_voltage_linear_range, 374 .set_mode = rpmh_regulator_vrm_set_mode, 375 .get_mode = rpmh_regulator_vrm_get_mode, 376 .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode, 377 }; 378 379 static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = { 380 .enable = rpmh_regulator_enable, 381 .disable = rpmh_regulator_disable, 382 .is_enabled = rpmh_regulator_is_enabled, 383 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, 384 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, 385 .list_voltage = regulator_list_voltage_linear_range, 386 .set_mode = rpmh_regulator_vrm_set_mode, 387 .get_mode = rpmh_regulator_vrm_get_mode, 388 .set_bypass = rpmh_regulator_vrm_set_bypass, 389 .get_bypass = rpmh_regulator_vrm_get_bypass, 390 }; 391 392 static const struct regulator_ops rpmh_regulator_xob_ops = { 393 .enable = rpmh_regulator_enable, 394 .disable = rpmh_regulator_disable, 395 .is_enabled = rpmh_regulator_is_enabled, 396 }; 397 398 /** 399 * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator 400 * @vreg: Pointer to the individual rpmh-regulator resource 401 * @dev: Pointer to the top level rpmh-regulator PMIC device 402 * @node: Pointer to the individual rpmh-regulator resource 403 * device node 404 * @pmic_id: String used to identify the top level rpmh-regulator 405 * PMIC device on the board 406 * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator 407 * resources defined for the top level PMIC device 408 * 409 * Return: 0 on success, errno on failure 410 */ 411 static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev, 412 struct device_node *node, const char *pmic_id, 413 const struct rpmh_vreg_init_data *pmic_rpmh_data) 414 { 415 struct regulator_config reg_config = {}; 416 char rpmh_resource_name[20] = ""; 417 const struct rpmh_vreg_init_data *rpmh_data; 418 struct regulator_init_data *init_data; 419 struct regulator_dev *rdev; 420 int ret; 421 422 vreg->dev = dev; 423 424 for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++) 425 if (of_node_name_eq(node, rpmh_data->name)) 426 break; 427 428 if (!rpmh_data->name) { 429 dev_err(dev, "Unknown regulator %pOFn\n", node); 430 return -EINVAL; 431 } 432 433 scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name), 434 rpmh_data->resource_name, pmic_id); 435 436 vreg->addr = cmd_db_read_addr(rpmh_resource_name); 437 if (!vreg->addr) { 438 dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n", 439 node, rpmh_resource_name); 440 return -ENODEV; 441 } 442 443 vreg->rdesc.name = rpmh_data->name; 444 vreg->rdesc.supply_name = rpmh_data->supply_name; 445 vreg->hw_data = rpmh_data->hw_data; 446 447 vreg->enabled = -EINVAL; 448 vreg->voltage_selector = -ENOTRECOVERABLE; 449 vreg->mode = REGULATOR_MODE_INVALID; 450 451 if (rpmh_data->hw_data->n_voltages) { 452 vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range; 453 vreg->rdesc.n_linear_ranges = 1; 454 vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages; 455 } 456 457 vreg->always_wait_for_ack = of_property_read_bool(node, 458 "qcom,always-wait-for-ack"); 459 460 vreg->rdesc.owner = THIS_MODULE; 461 vreg->rdesc.type = REGULATOR_VOLTAGE; 462 vreg->rdesc.ops = vreg->hw_data->ops; 463 vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode; 464 465 init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc); 466 if (!init_data) 467 return -ENOMEM; 468 469 if (rpmh_data->hw_data->regulator_type == XOB && 470 init_data->constraints.min_uV && 471 init_data->constraints.min_uV == init_data->constraints.max_uV) { 472 vreg->rdesc.fixed_uV = init_data->constraints.min_uV; 473 vreg->rdesc.n_voltages = 1; 474 } 475 476 reg_config.dev = dev; 477 reg_config.init_data = init_data; 478 reg_config.of_node = node; 479 reg_config.driver_data = vreg; 480 481 rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config); 482 if (IS_ERR(rdev)) { 483 ret = PTR_ERR(rdev); 484 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", 485 node, ret); 486 return ret; 487 } 488 489 dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n", 490 node, rpmh_resource_name, vreg->addr); 491 492 return 0; 493 } 494 495 static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = { 496 [REGULATOR_MODE_INVALID] = -EINVAL, 497 [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION, 498 [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM, 499 [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM, 500 [REGULATOR_MODE_FAST] = -EINVAL, 501 }; 502 503 static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = { 504 [REGULATOR_MODE_INVALID] = -EINVAL, 505 [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION, 506 [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM, 507 [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM, 508 [REGULATOR_MODE_FAST] = -EINVAL, 509 }; 510 511 static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode) 512 { 513 unsigned int mode; 514 515 switch (rpmh_mode) { 516 case RPMH_REGULATOR_MODE_HPM: 517 mode = REGULATOR_MODE_NORMAL; 518 break; 519 case RPMH_REGULATOR_MODE_LPM: 520 mode = REGULATOR_MODE_IDLE; 521 break; 522 case RPMH_REGULATOR_MODE_RET: 523 mode = REGULATOR_MODE_STANDBY; 524 break; 525 default: 526 mode = REGULATOR_MODE_INVALID; 527 break; 528 } 529 530 return mode; 531 } 532 533 static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = { 534 [REGULATOR_MODE_INVALID] = -EINVAL, 535 [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION, 536 [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM, 537 [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO, 538 [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM, 539 }; 540 541 static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = { 542 [REGULATOR_MODE_INVALID] = -EINVAL, 543 [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION, 544 [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM, 545 [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO, 546 [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM, 547 }; 548 549 static unsigned int 550 rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode) 551 { 552 unsigned int mode; 553 554 switch (rpmh_mode) { 555 case RPMH_REGULATOR_MODE_HPM: 556 mode = REGULATOR_MODE_FAST; 557 break; 558 case RPMH_REGULATOR_MODE_AUTO: 559 mode = REGULATOR_MODE_NORMAL; 560 break; 561 case RPMH_REGULATOR_MODE_LPM: 562 mode = REGULATOR_MODE_IDLE; 563 break; 564 case RPMH_REGULATOR_MODE_RET: 565 mode = REGULATOR_MODE_STANDBY; 566 break; 567 default: 568 mode = REGULATOR_MODE_INVALID; 569 break; 570 } 571 572 return mode; 573 } 574 575 static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = { 576 [REGULATOR_MODE_INVALID] = -EINVAL, 577 [REGULATOR_MODE_STANDBY] = -EINVAL, 578 [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM, 579 [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO, 580 [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM, 581 }; 582 583 static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = { 584 [REGULATOR_MODE_INVALID] = -EINVAL, 585 [REGULATOR_MODE_STANDBY] = -EINVAL, 586 [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM, 587 [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO, 588 [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM, 589 }; 590 591 static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode) 592 { 593 unsigned int mode; 594 595 switch (rpmh_mode) { 596 case RPMH_REGULATOR_MODE_HPM: 597 mode = REGULATOR_MODE_FAST; 598 break; 599 case RPMH_REGULATOR_MODE_AUTO: 600 mode = REGULATOR_MODE_NORMAL; 601 break; 602 case RPMH_REGULATOR_MODE_LPM: 603 mode = REGULATOR_MODE_IDLE; 604 break; 605 default: 606 mode = REGULATOR_MODE_INVALID; 607 break; 608 } 609 610 return mode; 611 } 612 613 static const struct rpmh_vreg_hw_data pmic4_pldo = { 614 .regulator_type = VRM, 615 .ops = &rpmh_regulator_vrm_drms_ops, 616 .voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), 617 .n_voltages = 256, 618 .hpm_min_load_uA = 10000, 619 .pmic_mode_map = pmic_mode_map_pmic4_ldo, 620 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 621 }; 622 623 static const struct rpmh_vreg_hw_data pmic4_pldo_lv = { 624 .regulator_type = VRM, 625 .ops = &rpmh_regulator_vrm_drms_ops, 626 .voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), 627 .n_voltages = 128, 628 .hpm_min_load_uA = 10000, 629 .pmic_mode_map = pmic_mode_map_pmic4_ldo, 630 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 631 }; 632 633 static const struct rpmh_vreg_hw_data pmic4_nldo = { 634 .regulator_type = VRM, 635 .ops = &rpmh_regulator_vrm_drms_ops, 636 .voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 637 .n_voltages = 128, 638 .hpm_min_load_uA = 30000, 639 .pmic_mode_map = pmic_mode_map_pmic4_ldo, 640 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 641 }; 642 643 static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = { 644 .regulator_type = VRM, 645 .ops = &rpmh_regulator_vrm_ops, 646 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 647 .n_voltages = 216, 648 .pmic_mode_map = pmic_mode_map_pmic4_smps, 649 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 650 }; 651 652 static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = { 653 .regulator_type = VRM, 654 .ops = &rpmh_regulator_vrm_ops, 655 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), 656 .n_voltages = 259, 657 .pmic_mode_map = pmic_mode_map_pmic4_smps, 658 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 659 }; 660 661 static const struct rpmh_vreg_hw_data pmic4_bob = { 662 .regulator_type = VRM, 663 .ops = &rpmh_regulator_vrm_bypass_ops, 664 .voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), 665 .n_voltages = 84, 666 .pmic_mode_map = pmic_mode_map_pmic4_bob, 667 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, 668 }; 669 670 static const struct rpmh_vreg_hw_data pmic4_lvs = { 671 .regulator_type = XOB, 672 .ops = &rpmh_regulator_xob_ops, 673 /* LVS hardware does not support voltage or mode configuration. */ 674 }; 675 676 static const struct rpmh_vreg_hw_data pmic5_pldo = { 677 .regulator_type = VRM, 678 .ops = &rpmh_regulator_vrm_drms_ops, 679 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), 680 .n_voltages = 256, 681 .hpm_min_load_uA = 10000, 682 .pmic_mode_map = pmic_mode_map_pmic5_ldo, 683 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 684 }; 685 686 static const struct rpmh_vreg_hw_data pmic5_pldo_lv = { 687 .regulator_type = VRM, 688 .ops = &rpmh_regulator_vrm_drms_ops, 689 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), 690 .n_voltages = 63, 691 .hpm_min_load_uA = 10000, 692 .pmic_mode_map = pmic_mode_map_pmic5_ldo, 693 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 694 }; 695 696 static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = { 697 .regulator_type = VRM, 698 .ops = &rpmh_regulator_vrm_drms_ops, 699 .voltage_range = REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000), 700 .n_voltages = 188, 701 .hpm_min_load_uA = 10000, 702 .pmic_mode_map = pmic_mode_map_pmic5_ldo, 703 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 704 }; 705 706 static const struct rpmh_vreg_hw_data pmic5_nldo = { 707 .regulator_type = VRM, 708 .ops = &rpmh_regulator_vrm_drms_ops, 709 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), 710 .n_voltages = 124, 711 .hpm_min_load_uA = 30000, 712 .pmic_mode_map = pmic_mode_map_pmic5_ldo, 713 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 714 }; 715 716 static const struct rpmh_vreg_hw_data pmic5_nldo515 = { 717 .regulator_type = VRM, 718 .ops = &rpmh_regulator_vrm_drms_ops, 719 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), 720 .n_voltages = 211, 721 .hpm_min_load_uA = 30000, 722 .pmic_mode_map = pmic_mode_map_pmic5_ldo, 723 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, 724 }; 725 726 static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = { 727 .regulator_type = VRM, 728 .ops = &rpmh_regulator_vrm_ops, 729 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 730 .n_voltages = 216, 731 .pmic_mode_map = pmic_mode_map_pmic5_smps, 732 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 733 }; 734 735 static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = { 736 .regulator_type = VRM, 737 .ops = &rpmh_regulator_vrm_ops, 738 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), 739 .n_voltages = 264, 740 .pmic_mode_map = pmic_mode_map_pmic5_smps, 741 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 742 }; 743 744 static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = { 745 .regulator_type = VRM, 746 .ops = &rpmh_regulator_vrm_ops, 747 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), 748 .n_voltages = 264, 749 .pmic_mode_map = pmic_mode_map_pmic5_smps, 750 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 751 }; 752 753 static const struct rpmh_vreg_hw_data pmic5_ftsmps525_lv = { 754 .regulator_type = VRM, 755 .ops = &rpmh_regulator_vrm_ops, 756 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000), 757 .n_voltages = 268, 758 .pmic_mode_map = pmic_mode_map_pmic5_smps, 759 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 760 }; 761 762 static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = { 763 .regulator_type = VRM, 764 .ops = &rpmh_regulator_vrm_ops, 765 .voltage_range = REGULATOR_LINEAR_RANGE(600000, 0, 267, 8000), 766 .n_voltages = 268, 767 .pmic_mode_map = pmic_mode_map_pmic5_smps, 768 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 769 }; 770 771 static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = { 772 .regulator_type = VRM, 773 .ops = &rpmh_regulator_vrm_ops, 774 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 775 .n_voltages = 215, 776 .pmic_mode_map = pmic_mode_map_pmic5_smps, 777 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 778 }; 779 780 static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { 781 .regulator_type = VRM, 782 .ops = &rpmh_regulator_vrm_ops, 783 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000), 784 .n_voltages = 236, 785 .pmic_mode_map = pmic_mode_map_pmic5_smps, 786 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 787 }; 788 789 static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = { 790 .regulator_type = VRM, 791 .ops = &rpmh_regulator_vrm_ops, 792 .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000), 793 .n_voltages = 5, 794 .pmic_mode_map = pmic_mode_map_pmic5_smps, 795 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 796 }; 797 798 static const struct rpmh_vreg_hw_data pmic5_bob = { 799 .regulator_type = VRM, 800 .ops = &rpmh_regulator_vrm_bypass_ops, 801 .voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000), 802 .n_voltages = 32, 803 .pmic_mode_map = pmic_mode_map_pmic5_bob, 804 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, 805 }; 806 807 #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \ 808 { \ 809 .name = _name, \ 810 .resource_name = _resource_name, \ 811 .hw_data = _hw_data, \ 812 .supply_name = _supply_name, \ 813 } 814 815 static const struct rpmh_vreg_init_data pm8998_vreg_data[] = { 816 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 817 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 818 RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"), 819 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"), 820 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"), 821 RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"), 822 RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"), 823 RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"), 824 RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"), 825 RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"), 826 RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"), 827 RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"), 828 RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"), 829 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"), 830 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"), 831 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"), 832 RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"), 833 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"), 834 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"), 835 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 836 RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"), 837 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"), 838 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"), 839 RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"), 840 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 841 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"), 842 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 843 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 844 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"), 845 RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"), 846 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"), 847 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"), 848 RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"), 849 RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"), 850 RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"), 851 RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"), 852 RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"), 853 RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"), 854 RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"), 855 RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"), 856 RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"), 857 RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"), 858 RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"), 859 {} 860 }; 861 862 static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = { 863 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 864 {} 865 }; 866 867 static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = { 868 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), 869 {} 870 }; 871 872 static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { 873 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 874 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 875 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), 876 RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"), 877 {} 878 }; 879 880 static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { 881 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 882 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 883 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 884 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 885 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 886 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 887 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 888 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 889 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 890 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), 891 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"), 892 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"), 893 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 894 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 895 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 896 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"), 897 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"), 898 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"), 899 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"), 900 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"), 901 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"), 902 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 903 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"), 904 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 905 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 906 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), 907 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), 908 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 909 {} 910 }; 911 912 static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { 913 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 914 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 915 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 916 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 917 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 918 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 919 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 920 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 921 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"), 922 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"), 923 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"), 924 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"), 925 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"), 926 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"), 927 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"), 928 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"), 929 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"), 930 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), 931 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), 932 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 933 {} 934 }; 935 936 static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { 937 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 938 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 939 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 940 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 941 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 942 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 943 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 944 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 945 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 946 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), 947 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"), 948 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"), 949 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 950 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 951 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 952 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"), 953 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 954 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"), 955 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"), 956 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"), 957 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"), 958 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 959 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"), 960 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 961 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 962 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), 963 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), 964 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 965 {} 966 }; 967 968 static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = { 969 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"), 970 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"), 971 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"), 972 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"), 973 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"), 974 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"), 975 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"), 976 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"), 977 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"), 978 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"), 979 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"), 980 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"), 981 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"), 982 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"), 983 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"), 984 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"), 985 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"), 986 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"), 987 {} 988 }; 989 990 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { 991 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 992 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 993 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 994 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 995 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 996 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 997 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 998 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 999 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 1000 RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"), 1001 RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"), 1002 RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"), 1003 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"), 1004 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"), 1005 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"), 1006 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"), 1007 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"), 1008 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"), 1009 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"), 1010 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), 1011 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), 1012 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), 1013 {} 1014 }; 1015 1016 static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { 1017 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"), 1018 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1019 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1020 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 1021 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 1022 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1023 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1024 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 1025 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 1026 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), 1027 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"), 1028 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"), 1029 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1030 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1031 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1032 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"), 1033 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1034 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"), 1035 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"), 1036 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"), 1037 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"), 1038 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"), 1039 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1040 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 1041 {} 1042 }; 1043 1044 static const struct rpmh_vreg_init_data pm8450_vreg_data[] = { 1045 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"), 1046 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), 1047 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"), 1048 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"), 1049 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"), 1050 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"), 1051 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1052 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), 1053 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1054 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"), 1055 {} 1056 }; 1057 1058 static const struct rpmh_vreg_init_data pm8550_vreg_data[] = { 1059 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1-l4-l10"), 1060 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l13-l14"), 1061 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1062 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l1-l4-l10"), 1063 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16"), 1064 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l7"), 1065 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l6-l7"), 1066 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l8-l9"), 1067 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"), 1068 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l1-l4-l10"), 1069 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"), 1070 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"), 1071 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l2-l13-l14"), 1072 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l2-l13-l14"), 1073 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"), 1074 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16"), 1075 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l17"), 1076 RPMH_VREG("bob1", "bob%s1", &pmic5_bob, "vdd-bob1"), 1077 RPMH_VREG("bob2", "bob%s2", &pmic5_bob, "vdd-bob2"), 1078 {} 1079 }; 1080 1081 static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = { 1082 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), 1083 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), 1084 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), 1085 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_lv, "vdd-s4"), 1086 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), 1087 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_mv, "vdd-s6"), 1088 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1089 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), 1090 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1091 {} 1092 }; 1093 1094 static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { 1095 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), 1096 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), 1097 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), 1098 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), 1099 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), 1100 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), 1101 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), 1102 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), 1103 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1104 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), 1105 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1106 {} 1107 }; 1108 1109 static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { 1110 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), 1111 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), 1112 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), 1113 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), 1114 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), 1115 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), 1116 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), 1117 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), 1118 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1119 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), 1120 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1121 {} 1122 }; 1123 1124 static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { 1125 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), 1126 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"), 1127 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1128 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), 1129 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1130 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), 1131 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), 1132 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), 1133 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), 1134 {} 1135 }; 1136 1137 static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { 1138 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), 1139 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"), 1140 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1141 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), 1142 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1143 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), 1144 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), 1145 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), 1146 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), 1147 {} 1148 }; 1149 1150 static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { 1151 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1152 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1153 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1154 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1155 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1156 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1157 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"), 1158 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"), 1159 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"), 1160 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1161 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"), 1162 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"), 1163 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"), 1164 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"), 1165 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1166 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1167 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1168 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1169 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1170 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1171 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1172 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1173 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1174 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1175 {} 1176 }; 1177 1178 static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { 1179 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1180 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1181 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1182 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 1183 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 1184 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1185 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1186 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1187 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"), 1188 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"), 1189 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"), 1190 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"), 1191 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"), 1192 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"), 1193 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"), 1194 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"), 1195 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"), 1196 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), 1197 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), 1198 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 1199 {} 1200 }; 1201 1202 static const struct rpmh_vreg_init_data pm6350_vreg_data[] = { 1203 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL), 1204 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL), 1205 /* smps3 - smps5 not configured */ 1206 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL), 1207 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL), 1208 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL), 1209 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL), 1210 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL), 1211 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL), 1212 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL), 1213 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL), 1214 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL), 1215 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL), 1216 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL), 1217 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL), 1218 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL), 1219 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL), 1220 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL), 1221 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL), 1222 /* ldo17 not configured */ 1223 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL), 1224 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL), 1225 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL), 1226 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL), 1227 RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL), 1228 }; 1229 1230 static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { 1231 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1232 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), 1233 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"), 1234 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1235 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1236 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1237 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"), 1238 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"), 1239 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"), 1240 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"), 1241 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"), 1242 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), 1243 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), 1244 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"), 1245 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"), 1246 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"), 1247 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"), 1248 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"), 1249 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"), 1250 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"), 1251 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"), 1252 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), 1253 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"), 1254 {} 1255 }; 1256 1257 static const struct rpmh_vreg_init_data pmx65_vreg_data[] = { 1258 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1259 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), 1260 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"), 1261 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1262 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1263 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1264 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"), 1265 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1266 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1267 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"), 1268 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1269 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), 1270 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"), 1271 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"), 1272 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"), 1273 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"), 1274 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"), 1275 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"), 1276 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"), 1277 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"), 1278 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"), 1279 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"), 1280 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), 1281 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"), 1282 RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"), 1283 /* ldo18 not configured */ 1284 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"), 1285 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"), 1286 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"), 1287 {} 1288 }; 1289 1290 static const struct rpmh_vreg_init_data pmx75_vreg_data[] = { 1291 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), 1292 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), 1293 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), 1294 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), 1295 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), 1296 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), 1297 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), 1298 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), 1299 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525_lv, "vdd-s9"), 1300 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525_lv, "vdd-s10"), 1301 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1302 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-18"), 1303 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1304 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l16"), 1305 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo_lv, "vdd-l5-l6"), 1306 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo_lv, "vdd-l5-l6"), 1307 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"), 1308 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8-l9"), 1309 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l8-l9"), 1310 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"), 1311 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"), 1312 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"), 1313 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"), 1314 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo515, "vdd-l14"), 1315 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"), 1316 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo515, "vdd-l4-l16"), 1317 RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo515, "vdd-l17"), 1318 /* ldo18 not configured */ 1319 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo515, "vdd-l19"), 1320 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo515, "vdd-l20-l21"), 1321 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo515, "vdd-l20-l21"), 1322 }; 1323 1324 static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { 1325 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), 1326 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), 1327 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"), 1328 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"), 1329 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"), 1330 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"), 1331 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"), 1332 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1333 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1334 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"), 1335 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1336 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1337 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"), 1338 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"), 1339 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"), 1340 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), 1341 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), 1342 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), 1343 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1344 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1345 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"), 1346 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"), 1347 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1348 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"), 1349 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1350 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1351 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1352 {} 1353 }; 1354 1355 static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { 1356 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"), 1357 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), 1358 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps515, "vdd-s3"), 1359 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"), 1360 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"), 1361 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1362 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"), 1363 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"), 1364 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"), 1365 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"), 1366 {} 1367 }; 1368 1369 static const struct rpmh_vreg_init_data pm660_vreg_data[] = { 1370 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1371 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1372 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), 1373 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"), 1374 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"), 1375 RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"), 1376 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"), 1377 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"), 1378 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"), 1379 /* ldo4 is inaccessible on PM660 */ 1380 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"), 1381 RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"), 1382 RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"), 1383 RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1384 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1385 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1386 RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1387 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1388 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1389 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1390 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1391 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1392 RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1393 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1394 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1395 {} 1396 }; 1397 1398 static const struct rpmh_vreg_init_data pm660l_vreg_data[] = { 1399 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1400 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1401 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"), 1402 RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"), 1403 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"), 1404 RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"), 1405 RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1406 RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"), 1407 RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1408 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"), 1409 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1410 RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1411 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), 1412 {} 1413 }; 1414 1415 static int rpmh_regulator_probe(struct platform_device *pdev) 1416 { 1417 struct device *dev = &pdev->dev; 1418 const struct rpmh_vreg_init_data *vreg_data; 1419 struct device_node *node; 1420 struct rpmh_vreg *vreg; 1421 const char *pmic_id; 1422 int ret; 1423 1424 vreg_data = of_device_get_match_data(dev); 1425 if (!vreg_data) 1426 return -ENODEV; 1427 1428 ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id); 1429 if (ret < 0) { 1430 dev_err(dev, "qcom,pmic-id missing in DT node\n"); 1431 return ret; 1432 } 1433 1434 for_each_available_child_of_node(dev->of_node, node) { 1435 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); 1436 if (!vreg) { 1437 of_node_put(node); 1438 return -ENOMEM; 1439 } 1440 1441 ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id, 1442 vreg_data); 1443 if (ret < 0) { 1444 of_node_put(node); 1445 return ret; 1446 } 1447 } 1448 1449 return 0; 1450 } 1451 1452 static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { 1453 { 1454 .compatible = "qcom,pm8005-rpmh-regulators", 1455 .data = pm8005_vreg_data, 1456 }, 1457 { 1458 .compatible = "qcom,pm8009-rpmh-regulators", 1459 .data = pm8009_vreg_data, 1460 }, 1461 { 1462 .compatible = "qcom,pm8009-1-rpmh-regulators", 1463 .data = pm8009_1_vreg_data, 1464 }, 1465 { 1466 .compatible = "qcom,pm8150-rpmh-regulators", 1467 .data = pm8150_vreg_data, 1468 }, 1469 { 1470 .compatible = "qcom,pm8150l-rpmh-regulators", 1471 .data = pm8150l_vreg_data, 1472 }, 1473 { 1474 .compatible = "qcom,pm8350-rpmh-regulators", 1475 .data = pm8350_vreg_data, 1476 }, 1477 { 1478 .compatible = "qcom,pm8350c-rpmh-regulators", 1479 .data = pm8350c_vreg_data, 1480 }, 1481 { 1482 .compatible = "qcom,pm8450-rpmh-regulators", 1483 .data = pm8450_vreg_data, 1484 }, 1485 { 1486 .compatible = "qcom,pm8550-rpmh-regulators", 1487 .data = pm8550_vreg_data, 1488 }, 1489 { 1490 .compatible = "qcom,pm8550ve-rpmh-regulators", 1491 .data = pm8550ve_vreg_data, 1492 }, 1493 { 1494 .compatible = "qcom,pm8550vs-rpmh-regulators", 1495 .data = pm8550vs_vreg_data, 1496 }, 1497 { 1498 .compatible = "qcom,pm8998-rpmh-regulators", 1499 .data = pm8998_vreg_data, 1500 }, 1501 { 1502 .compatible = "qcom,pmg1110-rpmh-regulators", 1503 .data = pmg1110_vreg_data, 1504 }, 1505 { 1506 .compatible = "qcom,pmi8998-rpmh-regulators", 1507 .data = pmi8998_vreg_data, 1508 }, 1509 { 1510 .compatible = "qcom,pm6150-rpmh-regulators", 1511 .data = pm6150_vreg_data, 1512 }, 1513 { 1514 .compatible = "qcom,pm6150l-rpmh-regulators", 1515 .data = pm6150l_vreg_data, 1516 }, 1517 { 1518 .compatible = "qcom,pm6350-rpmh-regulators", 1519 .data = pm6350_vreg_data, 1520 }, 1521 { 1522 .compatible = "qcom,pmc8180-rpmh-regulators", 1523 .data = pm8150_vreg_data, 1524 }, 1525 { 1526 .compatible = "qcom,pmc8180c-rpmh-regulators", 1527 .data = pm8150l_vreg_data, 1528 }, 1529 { 1530 .compatible = "qcom,pmc8380-rpmh-regulators", 1531 .data = pmc8380_vreg_data, 1532 }, 1533 { 1534 .compatible = "qcom,pmm8155au-rpmh-regulators", 1535 .data = pmm8155au_vreg_data, 1536 }, 1537 { 1538 .compatible = "qcom,pmm8654au-rpmh-regulators", 1539 .data = pmm8654au_vreg_data, 1540 }, 1541 { 1542 .compatible = "qcom,pmx55-rpmh-regulators", 1543 .data = pmx55_vreg_data, 1544 }, 1545 { 1546 .compatible = "qcom,pmx65-rpmh-regulators", 1547 .data = pmx65_vreg_data, 1548 }, 1549 { 1550 .compatible = "qcom,pmx75-rpmh-regulators", 1551 .data = pmx75_vreg_data, 1552 }, 1553 { 1554 .compatible = "qcom,pm7325-rpmh-regulators", 1555 .data = pm7325_vreg_data, 1556 }, 1557 { 1558 .compatible = "qcom,pmr735a-rpmh-regulators", 1559 .data = pmr735a_vreg_data, 1560 }, 1561 { 1562 .compatible = "qcom,pm660-rpmh-regulators", 1563 .data = pm660_vreg_data, 1564 }, 1565 { 1566 .compatible = "qcom,pm660l-rpmh-regulators", 1567 .data = pm660l_vreg_data, 1568 }, 1569 {} 1570 }; 1571 MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table); 1572 1573 static struct platform_driver rpmh_regulator_driver = { 1574 .driver = { 1575 .name = "qcom-rpmh-regulator", 1576 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1577 .of_match_table = of_match_ptr(rpmh_regulator_match_table), 1578 }, 1579 .probe = rpmh_regulator_probe, 1580 }; 1581 module_platform_driver(rpmh_regulator_driver); 1582 1583 MODULE_DESCRIPTION("Qualcomm RPMh regulator driver"); 1584 MODULE_LICENSE("GPL v2"); 1585