1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/delay.h> 8 #include <linux/err.h> 9 #include <linux/kernel.h> 10 #include <linux/interrupt.h> 11 #include <linux/bitops.h> 12 #include <linux/slab.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/ktime.h> 17 #include <linux/regulator/driver.h> 18 #include <linux/regmap.h> 19 #include <linux/list.h> 20 #include <linux/mfd/syscon.h> 21 #include <linux/io.h> 22 23 /* Pin control enable input pins. */ 24 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00 25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01 26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02 27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04 28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08 29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10 30 31 /* Pin control high power mode input pins. */ 32 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00 33 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01 34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02 35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04 36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x08 37 #define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10 38 #define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20 39 40 /* 41 * Used with enable parameters to specify that hardware default register values 42 * should be left unaltered. 43 */ 44 #define SPMI_REGULATOR_USE_HW_DEFAULT 2 45 46 /* Soft start strength of a voltage switch type regulator */ 47 enum spmi_vs_soft_start_str { 48 SPMI_VS_SOFT_START_STR_0P05_UA = 0, 49 SPMI_VS_SOFT_START_STR_0P25_UA, 50 SPMI_VS_SOFT_START_STR_0P55_UA, 51 SPMI_VS_SOFT_START_STR_0P75_UA, 52 SPMI_VS_SOFT_START_STR_HW_DEFAULT, 53 }; 54 55 /** 56 * struct spmi_regulator_init_data - spmi-regulator initialization data 57 * @pin_ctrl_enable: Bit mask specifying which hardware pins should be 58 * used to enable the regulator, if any 59 * Value should be an ORing of 60 * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If 61 * the bit specified by 62 * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is 63 * set, then pin control enable hardware registers 64 * will not be modified. 65 * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be 66 * used to force the regulator into high power 67 * mode, if any 68 * Value should be an ORing of 69 * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If 70 * the bit specified by 71 * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is 72 * set, then pin control mode hardware registers 73 * will not be modified. 74 * @vs_soft_start_strength: This parameter sets the soft start strength for 75 * voltage switch type regulators. Its value 76 * should be one of SPMI_VS_SOFT_START_STR_*. If 77 * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT, 78 * then the soft start strength will be left at its 79 * default hardware value. 80 */ 81 struct spmi_regulator_init_data { 82 unsigned pin_ctrl_enable; 83 unsigned pin_ctrl_hpm; 84 enum spmi_vs_soft_start_str vs_soft_start_strength; 85 }; 86 87 /* These types correspond to unique register layouts. */ 88 enum spmi_regulator_logical_type { 89 SPMI_REGULATOR_LOGICAL_TYPE_SMPS, 90 SPMI_REGULATOR_LOGICAL_TYPE_LDO, 91 SPMI_REGULATOR_LOGICAL_TYPE_VS, 92 SPMI_REGULATOR_LOGICAL_TYPE_BOOST, 93 SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS, 94 SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP, 95 SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO, 96 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, 97 SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, 98 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, 99 SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, 100 SPMI_REGULATOR_LOGICAL_TYPE_HFS430, 101 }; 102 103 enum spmi_regulator_type { 104 SPMI_REGULATOR_TYPE_BUCK = 0x03, 105 SPMI_REGULATOR_TYPE_LDO = 0x04, 106 SPMI_REGULATOR_TYPE_VS = 0x05, 107 SPMI_REGULATOR_TYPE_BOOST = 0x1b, 108 SPMI_REGULATOR_TYPE_FTS = 0x1c, 109 SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f, 110 SPMI_REGULATOR_TYPE_ULT_LDO = 0x21, 111 SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22, 112 }; 113 114 enum spmi_regulator_subtype { 115 SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08, 116 SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09, 117 SPMI_REGULATOR_SUBTYPE_N50 = 0x01, 118 SPMI_REGULATOR_SUBTYPE_N150 = 0x02, 119 SPMI_REGULATOR_SUBTYPE_N300 = 0x03, 120 SPMI_REGULATOR_SUBTYPE_N600 = 0x04, 121 SPMI_REGULATOR_SUBTYPE_N1200 = 0x05, 122 SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06, 123 SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07, 124 SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14, 125 SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15, 126 SPMI_REGULATOR_SUBTYPE_P50 = 0x08, 127 SPMI_REGULATOR_SUBTYPE_P150 = 0x09, 128 SPMI_REGULATOR_SUBTYPE_P300 = 0x0a, 129 SPMI_REGULATOR_SUBTYPE_P600 = 0x0b, 130 SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c, 131 SPMI_REGULATOR_SUBTYPE_LN = 0x10, 132 SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28, 133 SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29, 134 SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a, 135 SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b, 136 SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c, 137 SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d, 138 SPMI_REGULATOR_SUBTYPE_LV100 = 0x01, 139 SPMI_REGULATOR_SUBTYPE_LV300 = 0x02, 140 SPMI_REGULATOR_SUBTYPE_MV300 = 0x08, 141 SPMI_REGULATOR_SUBTYPE_MV500 = 0x09, 142 SPMI_REGULATOR_SUBTYPE_HDMI = 0x10, 143 SPMI_REGULATOR_SUBTYPE_OTG = 0x11, 144 SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, 145 SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, 146 SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, 147 SPMI_REGULATOR_SUBTYPE_FTS426_CTL = 0x0a, 148 SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, 149 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, 150 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, 151 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, 152 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, 153 SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, 154 }; 155 156 enum spmi_common_regulator_registers { 157 SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01, 158 SPMI_COMMON_REG_TYPE = 0x04, 159 SPMI_COMMON_REG_SUBTYPE = 0x05, 160 SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40, 161 SPMI_COMMON_REG_VOLTAGE_SET = 0x41, 162 SPMI_COMMON_REG_MODE = 0x45, 163 SPMI_COMMON_REG_ENABLE = 0x46, 164 SPMI_COMMON_REG_PULL_DOWN = 0x48, 165 SPMI_COMMON_REG_SOFT_START = 0x4c, 166 SPMI_COMMON_REG_STEP_CTRL = 0x61, 167 }; 168 169 /* 170 * Second common register layout used by newer devices starting with ftsmps426 171 * Note that some of the registers from the first common layout remain 172 * unchanged and their definition is not duplicated. 173 */ 174 enum spmi_ftsmps426_regulator_registers { 175 SPMI_FTSMPS426_REG_VOLTAGE_LSB = 0x40, 176 SPMI_FTSMPS426_REG_VOLTAGE_MSB = 0x41, 177 SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB = 0x68, 178 SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69, 179 }; 180 181 enum spmi_vs_registers { 182 SPMI_VS_REG_OCP = 0x4a, 183 SPMI_VS_REG_SOFT_START = 0x4c, 184 }; 185 186 enum spmi_boost_registers { 187 SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a, 188 }; 189 190 enum spmi_boost_byp_registers { 191 SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b, 192 }; 193 194 enum spmi_saw3_registers { 195 SAW3_SECURE = 0x00, 196 SAW3_ID = 0x04, 197 SAW3_SPM_STS = 0x0C, 198 SAW3_AVS_STS = 0x10, 199 SAW3_PMIC_STS = 0x14, 200 SAW3_RST = 0x18, 201 SAW3_VCTL = 0x1C, 202 SAW3_AVS_CTL = 0x20, 203 SAW3_AVS_LIMIT = 0x24, 204 SAW3_AVS_DLY = 0x28, 205 SAW3_AVS_HYSTERESIS = 0x2C, 206 SAW3_SPM_STS2 = 0x38, 207 SAW3_SPM_PMIC_DATA_3 = 0x4C, 208 SAW3_VERSION = 0xFD0, 209 }; 210 211 /* Used for indexing into ctrl_reg. These are offets from 0x40 */ 212 enum spmi_common_control_register_index { 213 SPMI_COMMON_IDX_VOLTAGE_RANGE = 0, 214 SPMI_COMMON_IDX_VOLTAGE_SET = 1, 215 SPMI_COMMON_IDX_MODE = 5, 216 SPMI_COMMON_IDX_ENABLE = 6, 217 }; 218 219 /* Common regulator control register layout */ 220 #define SPMI_COMMON_ENABLE_MASK 0x80 221 #define SPMI_COMMON_ENABLE 0x80 222 #define SPMI_COMMON_DISABLE 0x00 223 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08 224 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04 225 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02 226 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01 227 #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f 228 229 /* Common regulator mode register layout */ 230 #define SPMI_COMMON_MODE_HPM_MASK 0x80 231 #define SPMI_COMMON_MODE_AUTO_MASK 0x40 232 #define SPMI_COMMON_MODE_BYPASS_MASK 0x20 233 #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10 234 #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08 235 #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04 236 #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02 237 #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 238 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f 239 240 #define SPMI_FTSMPS426_MODE_BYPASS_MASK 3 241 #define SPMI_FTSMPS426_MODE_RETENTION_MASK 4 242 #define SPMI_FTSMPS426_MODE_LPM_MASK 5 243 #define SPMI_FTSMPS426_MODE_AUTO_MASK 6 244 #define SPMI_FTSMPS426_MODE_HPM_MASK 7 245 246 #define SPMI_FTSMPS426_MODE_MASK 0x07 247 248 /* Common regulator pull down control register layout */ 249 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 250 251 /* LDO regulator current limit control register layout */ 252 #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80 253 254 /* LDO regulator soft start control register layout */ 255 #define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80 256 257 /* VS regulator over current protection control register layout */ 258 #define SPMI_VS_OCP_OVERRIDE 0x01 259 #define SPMI_VS_OCP_NO_OVERRIDE 0x00 260 261 /* VS regulator soft start control register layout */ 262 #define SPMI_VS_SOFT_START_ENABLE_MASK 0x80 263 #define SPMI_VS_SOFT_START_SEL_MASK 0x03 264 265 /* Boost regulator current limit control register layout */ 266 #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80 267 #define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07 268 269 #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10 270 #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30 271 #define SPMI_VS_OCP_FALL_DELAY_US 90 272 #define SPMI_VS_OCP_FAULT_DELAY_US 20000 273 274 #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18 275 #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3 276 #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07 277 #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0 278 279 /* Clock rate in kHz of the FTSMPS regulator reference clock. */ 280 #define SPMI_FTSMPS_CLOCK_RATE 19200 281 282 /* Minimum voltage stepper delay for each step. */ 283 #define SPMI_FTSMPS_STEP_DELAY 8 284 #define SPMI_DEFAULT_STEP_DELAY 20 285 286 /* 287 * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to 288 * adjust the step rate in order to account for oscillator variance. 289 */ 290 #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 291 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 292 293 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03 294 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0 295 296 /* Clock rate in kHz of the FTSMPS426 regulator reference clock. */ 297 #define SPMI_FTSMPS426_CLOCK_RATE 4800 298 299 #define SPMI_HFS430_CLOCK_RATE 1600 300 301 /* Minimum voltage stepper delay for each step. */ 302 #define SPMI_FTSMPS426_STEP_DELAY 2 303 304 /* 305 * The ratio SPMI_FTSMPS426_STEP_MARGIN_NUM/SPMI_FTSMPS426_STEP_MARGIN_DEN is 306 * used to adjust the step rate in order to account for oscillator variance. 307 */ 308 #define SPMI_FTSMPS426_STEP_MARGIN_NUM 10 309 #define SPMI_FTSMPS426_STEP_MARGIN_DEN 11 310 311 312 /* VSET value to decide the range of ULT SMPS */ 313 #define ULT_SMPS_RANGE_SPLIT 0x60 314 315 /** 316 * struct spmi_voltage_range - regulator set point voltage mapping description 317 * @min_uV: Minimum programmable output voltage resulting from 318 * set point register value 0x00 319 * @max_uV: Maximum programmable output voltage 320 * @step_uV: Output voltage increase resulting from the set point 321 * register value increasing by 1 322 * @set_point_min_uV: Minimum allowed voltage 323 * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order 324 * to pick which range should be used in the case of 325 * overlapping set points. 326 * @n_voltages: Number of preferred voltage set points present in this 327 * range 328 * @range_sel: Voltage range register value corresponding to this range 329 * 330 * The following relationships must be true for the values used in this struct: 331 * (max_uV - min_uV) % step_uV == 0 332 * (set_point_min_uV - min_uV) % step_uV == 0* 333 * (set_point_max_uV - min_uV) % step_uV == 0* 334 * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1 335 * 336 * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to 337 * specify that the voltage range has meaning, but is not preferred. 338 */ 339 struct spmi_voltage_range { 340 int min_uV; 341 int max_uV; 342 int step_uV; 343 int set_point_min_uV; 344 int set_point_max_uV; 345 unsigned n_voltages; 346 u8 range_sel; 347 }; 348 349 /* 350 * The ranges specified in the spmi_voltage_set_points struct must be listed 351 * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV. 352 */ 353 struct spmi_voltage_set_points { 354 struct spmi_voltage_range *range; 355 int count; 356 unsigned n_voltages; 357 }; 358 359 struct spmi_regulator { 360 struct regulator_desc desc; 361 struct device *dev; 362 struct delayed_work ocp_work; 363 struct regmap *regmap; 364 struct spmi_voltage_set_points *set_points; 365 enum spmi_regulator_logical_type logical_type; 366 int ocp_irq; 367 int ocp_count; 368 int ocp_max_retries; 369 int ocp_retry_delay_ms; 370 int hpm_min_load; 371 int slew_rate; 372 ktime_t vs_enable_time; 373 u16 base; 374 struct list_head node; 375 }; 376 377 struct spmi_regulator_mapping { 378 enum spmi_regulator_type type; 379 enum spmi_regulator_subtype subtype; 380 enum spmi_regulator_logical_type logical_type; 381 u32 revision_min; 382 u32 revision_max; 383 struct regulator_ops *ops; 384 struct spmi_voltage_set_points *set_points; 385 int hpm_min_load; 386 }; 387 388 struct spmi_regulator_data { 389 const char *name; 390 u16 base; 391 const char *supply; 392 const char *ocp; 393 u16 force_type; 394 }; 395 396 #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \ 397 _logical_type, _ops_val, _set_points_val, _hpm_min_load) \ 398 { \ 399 .type = SPMI_REGULATOR_TYPE_##_type, \ 400 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ 401 .revision_min = _dig_major_min, \ 402 .revision_max = _dig_major_max, \ 403 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \ 404 .ops = &spmi_##_ops_val##_ops, \ 405 .set_points = &_set_points_val##_set_points, \ 406 .hpm_min_load = _hpm_min_load, \ 407 } 408 409 #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \ 410 { \ 411 .type = SPMI_REGULATOR_TYPE_VS, \ 412 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ 413 .revision_min = _dig_major_min, \ 414 .revision_max = _dig_major_max, \ 415 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \ 416 .ops = &spmi_vs_ops, \ 417 } 418 419 #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \ 420 _set_point_max_uV, _max_uV, _step_uV) \ 421 { \ 422 .min_uV = _min_uV, \ 423 .max_uV = _max_uV, \ 424 .set_point_min_uV = _set_point_min_uV, \ 425 .set_point_max_uV = _set_point_max_uV, \ 426 .step_uV = _step_uV, \ 427 .range_sel = _range_sel, \ 428 } 429 430 #define DEFINE_SPMI_SET_POINTS(name) \ 431 struct spmi_voltage_set_points name##_set_points = { \ 432 .range = name##_ranges, \ 433 .count = ARRAY_SIZE(name##_ranges), \ 434 } 435 436 /* 437 * These tables contain the physically available PMIC regulator voltage setpoint 438 * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed 439 * to ensure that the setpoints available to software are monotonically 440 * increasing and unique. The set_voltage callback functions expect these 441 * properties to hold. 442 */ 443 static struct spmi_voltage_range pldo_ranges[] = { 444 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), 445 SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000), 446 SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000), 447 }; 448 449 static struct spmi_voltage_range nldo1_ranges[] = { 450 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), 451 }; 452 453 static struct spmi_voltage_range nldo2_ranges[] = { 454 SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500), 455 SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250), 456 SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500), 457 }; 458 459 static struct spmi_voltage_range nldo3_ranges[] = { 460 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), 461 SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500), 462 SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500), 463 }; 464 465 static struct spmi_voltage_range ln_ldo_ranges[] = { 466 SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000), 467 SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000), 468 }; 469 470 static struct spmi_voltage_range smps_ranges[] = { 471 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), 472 SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000), 473 }; 474 475 static struct spmi_voltage_range ftsmps_ranges[] = { 476 SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000), 477 SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000), 478 }; 479 480 static struct spmi_voltage_range ftsmps2p5_ranges[] = { 481 SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000), 482 SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), 483 }; 484 485 static struct spmi_voltage_range ftsmps426_ranges[] = { 486 SPMI_VOLTAGE_RANGE(0, 0, 320000, 1352000, 1352000, 4000), 487 }; 488 489 static struct spmi_voltage_range boost_ranges[] = { 490 SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), 491 }; 492 493 static struct spmi_voltage_range boost_byp_ranges[] = { 494 SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000), 495 }; 496 497 static struct spmi_voltage_range ult_lo_smps_ranges[] = { 498 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), 499 SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000), 500 }; 501 502 static struct spmi_voltage_range ult_ho_smps_ranges[] = { 503 SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000), 504 }; 505 506 static struct spmi_voltage_range ult_nldo_ranges[] = { 507 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), 508 }; 509 510 static struct spmi_voltage_range ult_pldo_ranges[] = { 511 SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), 512 }; 513 514 static struct spmi_voltage_range hfs430_ranges[] = { 515 SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000), 516 }; 517 518 static DEFINE_SPMI_SET_POINTS(pldo); 519 static DEFINE_SPMI_SET_POINTS(nldo1); 520 static DEFINE_SPMI_SET_POINTS(nldo2); 521 static DEFINE_SPMI_SET_POINTS(nldo3); 522 static DEFINE_SPMI_SET_POINTS(ln_ldo); 523 static DEFINE_SPMI_SET_POINTS(smps); 524 static DEFINE_SPMI_SET_POINTS(ftsmps); 525 static DEFINE_SPMI_SET_POINTS(ftsmps2p5); 526 static DEFINE_SPMI_SET_POINTS(ftsmps426); 527 static DEFINE_SPMI_SET_POINTS(boost); 528 static DEFINE_SPMI_SET_POINTS(boost_byp); 529 static DEFINE_SPMI_SET_POINTS(ult_lo_smps); 530 static DEFINE_SPMI_SET_POINTS(ult_ho_smps); 531 static DEFINE_SPMI_SET_POINTS(ult_nldo); 532 static DEFINE_SPMI_SET_POINTS(ult_pldo); 533 static DEFINE_SPMI_SET_POINTS(hfs430); 534 535 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, 536 int len) 537 { 538 return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); 539 } 540 541 static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr, 542 u8 *buf, int len) 543 { 544 return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); 545 } 546 547 static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val, 548 u8 mask) 549 { 550 return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val); 551 } 552 553 static int spmi_regulator_vs_enable(struct regulator_dev *rdev) 554 { 555 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 556 557 if (vreg->ocp_irq) { 558 vreg->ocp_count = 0; 559 vreg->vs_enable_time = ktime_get(); 560 } 561 562 return regulator_enable_regmap(rdev); 563 } 564 565 static int spmi_regulator_vs_ocp(struct regulator_dev *rdev) 566 { 567 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 568 u8 reg = SPMI_VS_OCP_OVERRIDE; 569 570 return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, ®, 1); 571 } 572 573 static int spmi_regulator_select_voltage(struct spmi_regulator *vreg, 574 int min_uV, int max_uV) 575 { 576 const struct spmi_voltage_range *range; 577 int uV = min_uV; 578 int lim_min_uV, lim_max_uV, i, range_id, range_max_uV; 579 int selector, voltage_sel; 580 581 /* Check if request voltage is outside of physically settable range. */ 582 lim_min_uV = vreg->set_points->range[0].set_point_min_uV; 583 lim_max_uV = 584 vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV; 585 586 if (uV < lim_min_uV && max_uV >= lim_min_uV) 587 uV = lim_min_uV; 588 589 if (uV < lim_min_uV || uV > lim_max_uV) { 590 dev_err(vreg->dev, 591 "request v=[%d, %d] is outside possible v=[%d, %d]\n", 592 min_uV, max_uV, lim_min_uV, lim_max_uV); 593 return -EINVAL; 594 } 595 596 /* Find the range which uV is inside of. */ 597 for (i = vreg->set_points->count - 1; i > 0; i--) { 598 range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV; 599 if (uV > range_max_uV && range_max_uV > 0) 600 break; 601 } 602 603 range_id = i; 604 range = &vreg->set_points->range[range_id]; 605 606 /* 607 * Force uV to be an allowed set point by applying a ceiling function to 608 * the uV value. 609 */ 610 voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); 611 uV = voltage_sel * range->step_uV + range->min_uV; 612 613 if (uV > max_uV) { 614 dev_err(vreg->dev, 615 "request v=[%d, %d] cannot be met by any set point; " 616 "next set point: %d\n", 617 min_uV, max_uV, uV); 618 return -EINVAL; 619 } 620 621 selector = 0; 622 for (i = 0; i < range_id; i++) 623 selector += vreg->set_points->range[i].n_voltages; 624 selector += (uV - range->set_point_min_uV) / range->step_uV; 625 626 return selector; 627 } 628 629 static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg, 630 unsigned selector, u8 *range_sel, 631 u8 *voltage_sel) 632 { 633 const struct spmi_voltage_range *range, *end; 634 unsigned offset; 635 636 range = vreg->set_points->range; 637 end = range + vreg->set_points->count; 638 639 for (; range < end; range++) { 640 if (selector < range->n_voltages) { 641 /* 642 * hardware selectors between set point min and real 643 * min are invalid so we ignore them 644 */ 645 offset = range->set_point_min_uV - range->min_uV; 646 offset /= range->step_uV; 647 *voltage_sel = selector + offset; 648 *range_sel = range->range_sel; 649 return 0; 650 } 651 652 selector -= range->n_voltages; 653 } 654 655 return -EINVAL; 656 } 657 658 static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel, 659 const struct spmi_voltage_range *range) 660 { 661 unsigned sw_sel = 0; 662 unsigned offset, max_hw_sel; 663 const struct spmi_voltage_range *r = vreg->set_points->range; 664 const struct spmi_voltage_range *end = r + vreg->set_points->count; 665 666 for (; r < end; r++) { 667 if (r == range && range->n_voltages) { 668 /* 669 * hardware selectors between set point min and real 670 * min and between set point max and real max are 671 * invalid so we return an error if they're 672 * programmed into the hardware 673 */ 674 offset = range->set_point_min_uV - range->min_uV; 675 offset /= range->step_uV; 676 if (hw_sel < offset) 677 return -EINVAL; 678 679 max_hw_sel = range->set_point_max_uV - range->min_uV; 680 max_hw_sel /= range->step_uV; 681 if (hw_sel > max_hw_sel) 682 return -EINVAL; 683 684 return sw_sel + hw_sel - offset; 685 } 686 sw_sel += r->n_voltages; 687 } 688 689 return -EINVAL; 690 } 691 692 static const struct spmi_voltage_range * 693 spmi_regulator_find_range(struct spmi_regulator *vreg) 694 { 695 u8 range_sel; 696 const struct spmi_voltage_range *range, *end; 697 698 range = vreg->set_points->range; 699 end = range + vreg->set_points->count; 700 701 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1); 702 703 for (; range < end; range++) 704 if (range->range_sel == range_sel) 705 return range; 706 707 return NULL; 708 } 709 710 static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg, 711 int min_uV, int max_uV) 712 { 713 const struct spmi_voltage_range *range; 714 int uV = min_uV; 715 int i, selector; 716 717 range = spmi_regulator_find_range(vreg); 718 if (!range) 719 goto different_range; 720 721 if (uV < range->min_uV && max_uV >= range->min_uV) 722 uV = range->min_uV; 723 724 if (uV < range->min_uV || uV > range->max_uV) { 725 /* Current range doesn't support the requested voltage. */ 726 goto different_range; 727 } 728 729 /* 730 * Force uV to be an allowed set point by applying a ceiling function to 731 * the uV value. 732 */ 733 uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); 734 uV = uV * range->step_uV + range->min_uV; 735 736 if (uV > max_uV) { 737 /* 738 * No set point in the current voltage range is within the 739 * requested min_uV to max_uV range. 740 */ 741 goto different_range; 742 } 743 744 selector = 0; 745 for (i = 0; i < vreg->set_points->count; i++) { 746 if (uV >= vreg->set_points->range[i].set_point_min_uV 747 && uV <= vreg->set_points->range[i].set_point_max_uV) { 748 selector += 749 (uV - vreg->set_points->range[i].set_point_min_uV) 750 / vreg->set_points->range[i].step_uV; 751 break; 752 } 753 754 selector += vreg->set_points->range[i].n_voltages; 755 } 756 757 if (selector >= vreg->set_points->n_voltages) 758 goto different_range; 759 760 return selector; 761 762 different_range: 763 return spmi_regulator_select_voltage(vreg, min_uV, max_uV); 764 } 765 766 static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev, 767 int min_uV, int max_uV) 768 { 769 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 770 771 /* 772 * Favor staying in the current voltage range if possible. This avoids 773 * voltage spikes that occur when changing the voltage range. 774 */ 775 return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV); 776 } 777 778 static int 779 spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector) 780 { 781 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 782 int ret; 783 u8 buf[2]; 784 u8 range_sel, voltage_sel; 785 786 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); 787 if (ret) 788 return ret; 789 790 buf[0] = range_sel; 791 buf[1] = voltage_sel; 792 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); 793 } 794 795 static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, 796 unsigned selector); 797 798 static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev, 799 unsigned selector) 800 { 801 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 802 u8 buf[2]; 803 int mV; 804 805 mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000; 806 807 buf[0] = mV & 0xff; 808 buf[1] = mV >> 8; 809 return spmi_vreg_write(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); 810 } 811 812 static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, 813 unsigned int old_selector, unsigned int new_selector) 814 { 815 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 816 int diff_uV; 817 818 diff_uV = abs(spmi_regulator_common_list_voltage(rdev, new_selector) - 819 spmi_regulator_common_list_voltage(rdev, old_selector)); 820 821 return DIV_ROUND_UP(diff_uV, vreg->slew_rate); 822 } 823 824 static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) 825 { 826 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 827 const struct spmi_voltage_range *range; 828 u8 voltage_sel; 829 830 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); 831 832 range = spmi_regulator_find_range(vreg); 833 if (!range) 834 return -EINVAL; 835 836 return spmi_hw_selector_to_sw(vreg, voltage_sel, range); 837 } 838 839 static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev) 840 { 841 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 842 const struct spmi_voltage_range *range; 843 u8 buf[2]; 844 int uV; 845 846 spmi_vreg_read(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); 847 848 uV = (((unsigned int)buf[1] << 8) | (unsigned int)buf[0]) * 1000; 849 range = vreg->set_points->range; 850 851 return (uV - range->set_point_min_uV) / range->step_uV; 852 } 853 854 static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev, 855 int min_uV, int max_uV) 856 { 857 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 858 859 return spmi_regulator_select_voltage(vreg, min_uV, max_uV); 860 } 861 862 static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev, 863 unsigned selector) 864 { 865 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 866 u8 sel = selector; 867 868 /* 869 * Certain types of regulators do not have a range select register so 870 * only voltage set register needs to be written. 871 */ 872 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1); 873 } 874 875 static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev) 876 { 877 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 878 u8 selector; 879 int ret; 880 881 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1); 882 if (ret) 883 return ret; 884 885 return selector; 886 } 887 888 static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev, 889 unsigned selector) 890 { 891 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 892 int ret; 893 u8 range_sel, voltage_sel; 894 895 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); 896 if (ret) 897 return ret; 898 899 /* 900 * Calculate VSET based on range 901 * In case of range 0: voltage_sel is a 7 bit value, can be written 902 * witout any modification. 903 * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to 904 * [011]. 905 */ 906 if (range_sel == 1) 907 voltage_sel |= ULT_SMPS_RANGE_SPLIT; 908 909 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET, 910 voltage_sel, 0xff); 911 } 912 913 static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev) 914 { 915 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 916 const struct spmi_voltage_range *range; 917 u8 voltage_sel; 918 919 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); 920 921 range = spmi_regulator_find_range(vreg); 922 if (!range) 923 return -EINVAL; 924 925 if (range->range_sel == 1) 926 voltage_sel &= ~ULT_SMPS_RANGE_SPLIT; 927 928 return spmi_hw_selector_to_sw(vreg, voltage_sel, range); 929 } 930 931 static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, 932 unsigned selector) 933 { 934 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 935 int uV = 0; 936 int i; 937 938 if (selector >= vreg->set_points->n_voltages) 939 return 0; 940 941 for (i = 0; i < vreg->set_points->count; i++) { 942 if (selector < vreg->set_points->range[i].n_voltages) { 943 uV = selector * vreg->set_points->range[i].step_uV 944 + vreg->set_points->range[i].set_point_min_uV; 945 break; 946 } 947 948 selector -= vreg->set_points->range[i].n_voltages; 949 } 950 951 return uV; 952 } 953 954 static int 955 spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable) 956 { 957 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 958 u8 mask = SPMI_COMMON_MODE_BYPASS_MASK; 959 u8 val = 0; 960 961 if (enable) 962 val = mask; 963 964 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 965 } 966 967 static int 968 spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable) 969 { 970 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 971 u8 val; 972 int ret; 973 974 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1); 975 *enable = val & SPMI_COMMON_MODE_BYPASS_MASK; 976 977 return ret; 978 } 979 980 static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) 981 { 982 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 983 u8 reg; 984 985 spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); 986 987 reg &= SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; 988 989 switch (reg) { 990 case SPMI_COMMON_MODE_HPM_MASK: 991 return REGULATOR_MODE_NORMAL; 992 case SPMI_COMMON_MODE_AUTO_MASK: 993 return REGULATOR_MODE_FAST; 994 default: 995 return REGULATOR_MODE_IDLE; 996 } 997 } 998 999 static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev) 1000 { 1001 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1002 u8 reg; 1003 1004 spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); 1005 1006 switch (reg) { 1007 case SPMI_FTSMPS426_MODE_HPM_MASK: 1008 return REGULATOR_MODE_NORMAL; 1009 case SPMI_FTSMPS426_MODE_AUTO_MASK: 1010 return REGULATOR_MODE_FAST; 1011 default: 1012 return REGULATOR_MODE_IDLE; 1013 } 1014 } 1015 1016 static int 1017 spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) 1018 { 1019 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1020 u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; 1021 u8 val; 1022 1023 switch (mode) { 1024 case REGULATOR_MODE_NORMAL: 1025 val = SPMI_COMMON_MODE_HPM_MASK; 1026 break; 1027 case REGULATOR_MODE_FAST: 1028 val = SPMI_COMMON_MODE_AUTO_MASK; 1029 break; 1030 default: 1031 val = 0; 1032 break; 1033 } 1034 1035 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 1036 } 1037 1038 static int 1039 spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode) 1040 { 1041 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1042 u8 mask = SPMI_FTSMPS426_MODE_MASK; 1043 u8 val; 1044 1045 switch (mode) { 1046 case REGULATOR_MODE_NORMAL: 1047 val = SPMI_FTSMPS426_MODE_HPM_MASK; 1048 break; 1049 case REGULATOR_MODE_FAST: 1050 val = SPMI_FTSMPS426_MODE_AUTO_MASK; 1051 break; 1052 case REGULATOR_MODE_IDLE: 1053 val = SPMI_FTSMPS426_MODE_LPM_MASK; 1054 break; 1055 default: 1056 return -EINVAL; 1057 } 1058 1059 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 1060 } 1061 1062 static int 1063 spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) 1064 { 1065 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1066 unsigned int mode; 1067 1068 if (load_uA >= vreg->hpm_min_load) 1069 mode = REGULATOR_MODE_NORMAL; 1070 else 1071 mode = REGULATOR_MODE_IDLE; 1072 1073 return spmi_regulator_common_set_mode(rdev, mode); 1074 } 1075 1076 static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) 1077 { 1078 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1079 unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; 1080 1081 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN, 1082 mask, mask); 1083 } 1084 1085 static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) 1086 { 1087 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1088 unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK; 1089 1090 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START, 1091 mask, mask); 1092 } 1093 1094 static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA) 1095 { 1096 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1097 enum spmi_regulator_logical_type type = vreg->logical_type; 1098 unsigned int current_reg; 1099 u8 reg; 1100 u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK | 1101 SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; 1102 int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500; 1103 1104 if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST) 1105 current_reg = SPMI_BOOST_REG_CURRENT_LIMIT; 1106 else 1107 current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT; 1108 1109 if (ilim_uA > max || ilim_uA <= 0) 1110 return -EINVAL; 1111 1112 reg = (ilim_uA - 1) / 500; 1113 reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; 1114 1115 return spmi_vreg_update_bits(vreg, current_reg, reg, mask); 1116 } 1117 1118 static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg) 1119 { 1120 int ret; 1121 1122 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, 1123 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); 1124 1125 vreg->vs_enable_time = ktime_get(); 1126 1127 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, 1128 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); 1129 1130 return ret; 1131 } 1132 1133 static void spmi_regulator_vs_ocp_work(struct work_struct *work) 1134 { 1135 struct delayed_work *dwork = to_delayed_work(work); 1136 struct spmi_regulator *vreg 1137 = container_of(dwork, struct spmi_regulator, ocp_work); 1138 1139 spmi_regulator_vs_clear_ocp(vreg); 1140 } 1141 1142 static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data) 1143 { 1144 struct spmi_regulator *vreg = data; 1145 ktime_t ocp_irq_time; 1146 s64 ocp_trigger_delay_us; 1147 1148 ocp_irq_time = ktime_get(); 1149 ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time, 1150 vreg->vs_enable_time); 1151 1152 /* 1153 * Reset the OCP count if there is a large delay between switch enable 1154 * and when OCP triggers. This is indicative of a hotplug event as 1155 * opposed to a fault. 1156 */ 1157 if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US) 1158 vreg->ocp_count = 0; 1159 1160 /* Wait for switch output to settle back to 0 V after OCP triggered. */ 1161 udelay(SPMI_VS_OCP_FALL_DELAY_US); 1162 1163 vreg->ocp_count++; 1164 1165 if (vreg->ocp_count == 1) { 1166 /* Immediately clear the over current condition. */ 1167 spmi_regulator_vs_clear_ocp(vreg); 1168 } else if (vreg->ocp_count <= vreg->ocp_max_retries) { 1169 /* Schedule the over current clear task to run later. */ 1170 schedule_delayed_work(&vreg->ocp_work, 1171 msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1); 1172 } else { 1173 dev_err(vreg->dev, 1174 "OCP triggered %d times; no further retries\n", 1175 vreg->ocp_count); 1176 } 1177 1178 return IRQ_HANDLED; 1179 } 1180 1181 #define SAW3_VCTL_DATA_MASK 0xFF 1182 #define SAW3_VCTL_CLEAR_MASK 0x700FF 1183 #define SAW3_AVS_CTL_EN_MASK 0x1 1184 #define SAW3_AVS_CTL_TGGL_MASK 0x8000000 1185 #define SAW3_AVS_CTL_CLEAR_MASK 0x7efc00 1186 1187 static struct regmap *saw_regmap; 1188 1189 static void spmi_saw_set_vdd(void *data) 1190 { 1191 u32 vctl, data3, avs_ctl, pmic_sts; 1192 bool avs_enabled = false; 1193 unsigned long timeout; 1194 u8 voltage_sel = *(u8 *)data; 1195 1196 regmap_read(saw_regmap, SAW3_AVS_CTL, &avs_ctl); 1197 regmap_read(saw_regmap, SAW3_VCTL, &vctl); 1198 regmap_read(saw_regmap, SAW3_SPM_PMIC_DATA_3, &data3); 1199 1200 /* select the band */ 1201 vctl &= ~SAW3_VCTL_CLEAR_MASK; 1202 vctl |= (u32)voltage_sel; 1203 1204 data3 &= ~SAW3_VCTL_CLEAR_MASK; 1205 data3 |= (u32)voltage_sel; 1206 1207 /* If AVS is enabled, switch it off during the voltage change */ 1208 avs_enabled = SAW3_AVS_CTL_EN_MASK & avs_ctl; 1209 if (avs_enabled) { 1210 avs_ctl &= ~SAW3_AVS_CTL_TGGL_MASK; 1211 regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl); 1212 } 1213 1214 regmap_write(saw_regmap, SAW3_RST, 1); 1215 regmap_write(saw_regmap, SAW3_VCTL, vctl); 1216 regmap_write(saw_regmap, SAW3_SPM_PMIC_DATA_3, data3); 1217 1218 timeout = jiffies + usecs_to_jiffies(100); 1219 do { 1220 regmap_read(saw_regmap, SAW3_PMIC_STS, &pmic_sts); 1221 pmic_sts &= SAW3_VCTL_DATA_MASK; 1222 if (pmic_sts == (u32)voltage_sel) 1223 break; 1224 1225 cpu_relax(); 1226 1227 } while (time_before(jiffies, timeout)); 1228 1229 /* After successful voltage change, switch the AVS back on */ 1230 if (avs_enabled) { 1231 pmic_sts &= 0x3f; 1232 avs_ctl &= ~SAW3_AVS_CTL_CLEAR_MASK; 1233 avs_ctl |= ((pmic_sts - 4) << 10); 1234 avs_ctl |= (pmic_sts << 17); 1235 avs_ctl |= SAW3_AVS_CTL_TGGL_MASK; 1236 regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl); 1237 } 1238 } 1239 1240 static int 1241 spmi_regulator_saw_set_voltage(struct regulator_dev *rdev, unsigned selector) 1242 { 1243 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1244 int ret; 1245 u8 range_sel, voltage_sel; 1246 1247 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); 1248 if (ret) 1249 return ret; 1250 1251 if (0 != range_sel) { 1252 dev_dbg(&rdev->dev, "range_sel = %02X voltage_sel = %02X", \ 1253 range_sel, voltage_sel); 1254 return -EINVAL; 1255 } 1256 1257 /* Always do the SAW register writes on the first CPU */ 1258 return smp_call_function_single(0, spmi_saw_set_vdd, \ 1259 &voltage_sel, true); 1260 } 1261 1262 static struct regulator_ops spmi_saw_ops = {}; 1263 1264 static struct regulator_ops spmi_smps_ops = { 1265 .enable = regulator_enable_regmap, 1266 .disable = regulator_disable_regmap, 1267 .is_enabled = regulator_is_enabled_regmap, 1268 .set_voltage_sel = spmi_regulator_common_set_voltage, 1269 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1270 .get_voltage_sel = spmi_regulator_common_get_voltage, 1271 .map_voltage = spmi_regulator_common_map_voltage, 1272 .list_voltage = spmi_regulator_common_list_voltage, 1273 .set_mode = spmi_regulator_common_set_mode, 1274 .get_mode = spmi_regulator_common_get_mode, 1275 .set_load = spmi_regulator_common_set_load, 1276 .set_pull_down = spmi_regulator_common_set_pull_down, 1277 }; 1278 1279 static struct regulator_ops spmi_ldo_ops = { 1280 .enable = regulator_enable_regmap, 1281 .disable = regulator_disable_regmap, 1282 .is_enabled = regulator_is_enabled_regmap, 1283 .set_voltage_sel = spmi_regulator_common_set_voltage, 1284 .get_voltage_sel = spmi_regulator_common_get_voltage, 1285 .map_voltage = spmi_regulator_common_map_voltage, 1286 .list_voltage = spmi_regulator_common_list_voltage, 1287 .set_mode = spmi_regulator_common_set_mode, 1288 .get_mode = spmi_regulator_common_get_mode, 1289 .set_load = spmi_regulator_common_set_load, 1290 .set_bypass = spmi_regulator_common_set_bypass, 1291 .get_bypass = spmi_regulator_common_get_bypass, 1292 .set_pull_down = spmi_regulator_common_set_pull_down, 1293 .set_soft_start = spmi_regulator_common_set_soft_start, 1294 }; 1295 1296 static struct regulator_ops spmi_ln_ldo_ops = { 1297 .enable = regulator_enable_regmap, 1298 .disable = regulator_disable_regmap, 1299 .is_enabled = regulator_is_enabled_regmap, 1300 .set_voltage_sel = spmi_regulator_common_set_voltage, 1301 .get_voltage_sel = spmi_regulator_common_get_voltage, 1302 .map_voltage = spmi_regulator_common_map_voltage, 1303 .list_voltage = spmi_regulator_common_list_voltage, 1304 .set_bypass = spmi_regulator_common_set_bypass, 1305 .get_bypass = spmi_regulator_common_get_bypass, 1306 }; 1307 1308 static struct regulator_ops spmi_vs_ops = { 1309 .enable = spmi_regulator_vs_enable, 1310 .disable = regulator_disable_regmap, 1311 .is_enabled = regulator_is_enabled_regmap, 1312 .set_pull_down = spmi_regulator_common_set_pull_down, 1313 .set_soft_start = spmi_regulator_common_set_soft_start, 1314 .set_over_current_protection = spmi_regulator_vs_ocp, 1315 .set_mode = spmi_regulator_common_set_mode, 1316 .get_mode = spmi_regulator_common_get_mode, 1317 }; 1318 1319 static struct regulator_ops spmi_boost_ops = { 1320 .enable = regulator_enable_regmap, 1321 .disable = regulator_disable_regmap, 1322 .is_enabled = regulator_is_enabled_regmap, 1323 .set_voltage_sel = spmi_regulator_single_range_set_voltage, 1324 .get_voltage_sel = spmi_regulator_single_range_get_voltage, 1325 .map_voltage = spmi_regulator_single_map_voltage, 1326 .list_voltage = spmi_regulator_common_list_voltage, 1327 .set_input_current_limit = spmi_regulator_set_ilim, 1328 }; 1329 1330 static struct regulator_ops spmi_ftsmps_ops = { 1331 .enable = regulator_enable_regmap, 1332 .disable = regulator_disable_regmap, 1333 .is_enabled = regulator_is_enabled_regmap, 1334 .set_voltage_sel = spmi_regulator_common_set_voltage, 1335 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1336 .get_voltage_sel = spmi_regulator_common_get_voltage, 1337 .map_voltage = spmi_regulator_common_map_voltage, 1338 .list_voltage = spmi_regulator_common_list_voltage, 1339 .set_mode = spmi_regulator_common_set_mode, 1340 .get_mode = spmi_regulator_common_get_mode, 1341 .set_load = spmi_regulator_common_set_load, 1342 .set_pull_down = spmi_regulator_common_set_pull_down, 1343 }; 1344 1345 static struct regulator_ops spmi_ult_lo_smps_ops = { 1346 .enable = regulator_enable_regmap, 1347 .disable = regulator_disable_regmap, 1348 .is_enabled = regulator_is_enabled_regmap, 1349 .set_voltage_sel = spmi_regulator_ult_lo_smps_set_voltage, 1350 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1351 .get_voltage_sel = spmi_regulator_ult_lo_smps_get_voltage, 1352 .list_voltage = spmi_regulator_common_list_voltage, 1353 .set_mode = spmi_regulator_common_set_mode, 1354 .get_mode = spmi_regulator_common_get_mode, 1355 .set_load = spmi_regulator_common_set_load, 1356 .set_pull_down = spmi_regulator_common_set_pull_down, 1357 }; 1358 1359 static struct regulator_ops spmi_ult_ho_smps_ops = { 1360 .enable = regulator_enable_regmap, 1361 .disable = regulator_disable_regmap, 1362 .is_enabled = regulator_is_enabled_regmap, 1363 .set_voltage_sel = spmi_regulator_single_range_set_voltage, 1364 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1365 .get_voltage_sel = spmi_regulator_single_range_get_voltage, 1366 .map_voltage = spmi_regulator_single_map_voltage, 1367 .list_voltage = spmi_regulator_common_list_voltage, 1368 .set_mode = spmi_regulator_common_set_mode, 1369 .get_mode = spmi_regulator_common_get_mode, 1370 .set_load = spmi_regulator_common_set_load, 1371 .set_pull_down = spmi_regulator_common_set_pull_down, 1372 }; 1373 1374 static struct regulator_ops spmi_ult_ldo_ops = { 1375 .enable = regulator_enable_regmap, 1376 .disable = regulator_disable_regmap, 1377 .is_enabled = regulator_is_enabled_regmap, 1378 .set_voltage_sel = spmi_regulator_single_range_set_voltage, 1379 .get_voltage_sel = spmi_regulator_single_range_get_voltage, 1380 .map_voltage = spmi_regulator_single_map_voltage, 1381 .list_voltage = spmi_regulator_common_list_voltage, 1382 .set_mode = spmi_regulator_common_set_mode, 1383 .get_mode = spmi_regulator_common_get_mode, 1384 .set_load = spmi_regulator_common_set_load, 1385 .set_bypass = spmi_regulator_common_set_bypass, 1386 .get_bypass = spmi_regulator_common_get_bypass, 1387 .set_pull_down = spmi_regulator_common_set_pull_down, 1388 .set_soft_start = spmi_regulator_common_set_soft_start, 1389 }; 1390 1391 static struct regulator_ops spmi_ftsmps426_ops = { 1392 .enable = regulator_enable_regmap, 1393 .disable = regulator_disable_regmap, 1394 .is_enabled = regulator_is_enabled_regmap, 1395 .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, 1396 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1397 .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, 1398 .map_voltage = spmi_regulator_single_map_voltage, 1399 .list_voltage = spmi_regulator_common_list_voltage, 1400 .set_mode = spmi_regulator_ftsmps426_set_mode, 1401 .get_mode = spmi_regulator_ftsmps426_get_mode, 1402 .set_load = spmi_regulator_common_set_load, 1403 .set_pull_down = spmi_regulator_common_set_pull_down, 1404 }; 1405 1406 static struct regulator_ops spmi_hfs430_ops = { 1407 .enable = regulator_enable_regmap, 1408 .disable = regulator_disable_regmap, 1409 .is_enabled = regulator_is_enabled_regmap, 1410 .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, 1411 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1412 .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, 1413 .map_voltage = spmi_regulator_single_map_voltage, 1414 .list_voltage = spmi_regulator_common_list_voltage, 1415 .set_mode = spmi_regulator_ftsmps426_set_mode, 1416 .get_mode = spmi_regulator_ftsmps426_get_mode, 1417 }; 1418 1419 /* Maximum possible digital major revision value */ 1420 #define INF 0xFF 1421 1422 static const struct spmi_regulator_mapping supported_regulators[] = { 1423 /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ 1424 SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), 1425 SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), 1426 SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), 1427 SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), 1428 SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), 1429 SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000), 1430 SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000), 1431 SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000), 1432 SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000), 1433 SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000), 1434 SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000), 1435 SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000), 1436 SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000), 1437 SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000), 1438 SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000), 1439 SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000), 1440 SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0), 1441 SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000), 1442 SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000), 1443 SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000), 1444 SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000), 1445 SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000), 1446 SPMI_VREG_VS(LV100, 0, INF), 1447 SPMI_VREG_VS(LV300, 0, INF), 1448 SPMI_VREG_VS(MV300, 0, INF), 1449 SPMI_VREG_VS(MV500, 0, INF), 1450 SPMI_VREG_VS(HDMI, 0, INF), 1451 SPMI_VREG_VS(OTG, 0, INF), 1452 SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), 1453 SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), 1454 SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), 1455 SPMI_VREG(FTS, FTS426_CTL, 0, INF, FTSMPS426, ftsmps426, ftsmps426, 100000), 1456 SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), 1457 SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1458 ult_lo_smps, 100000), 1459 SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1460 ult_lo_smps, 100000), 1461 SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1462 ult_lo_smps, 100000), 1463 SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps, 1464 ult_ho_smps, 100000), 1465 SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1466 SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1467 SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1468 SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1469 SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1470 SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1471 SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1472 SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1473 SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1474 SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), 1475 }; 1476 1477 static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) 1478 { 1479 unsigned int n; 1480 struct spmi_voltage_range *range = points->range; 1481 1482 for (; range < points->range + points->count; range++) { 1483 n = 0; 1484 if (range->set_point_max_uV) { 1485 n = range->set_point_max_uV - range->set_point_min_uV; 1486 n = (n / range->step_uV) + 1; 1487 } 1488 range->n_voltages = n; 1489 points->n_voltages += n; 1490 } 1491 } 1492 1493 static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type) 1494 { 1495 const struct spmi_regulator_mapping *mapping; 1496 int ret, i; 1497 u32 dig_major_rev; 1498 u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1]; 1499 u8 type, subtype; 1500 1501 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version, 1502 ARRAY_SIZE(version)); 1503 if (ret) { 1504 dev_dbg(vreg->dev, "could not read version registers\n"); 1505 return ret; 1506 } 1507 dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV 1508 - SPMI_COMMON_REG_DIG_MAJOR_REV]; 1509 1510 if (!force_type) { 1511 type = version[SPMI_COMMON_REG_TYPE - 1512 SPMI_COMMON_REG_DIG_MAJOR_REV]; 1513 subtype = version[SPMI_COMMON_REG_SUBTYPE - 1514 SPMI_COMMON_REG_DIG_MAJOR_REV]; 1515 } else { 1516 type = force_type >> 8; 1517 subtype = force_type; 1518 } 1519 1520 for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) { 1521 mapping = &supported_regulators[i]; 1522 if (mapping->type == type && mapping->subtype == subtype 1523 && mapping->revision_min <= dig_major_rev 1524 && mapping->revision_max >= dig_major_rev) 1525 goto found; 1526 } 1527 1528 dev_err(vreg->dev, 1529 "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n", 1530 vreg->desc.name, type, subtype, dig_major_rev); 1531 1532 return -ENODEV; 1533 1534 found: 1535 vreg->logical_type = mapping->logical_type; 1536 vreg->set_points = mapping->set_points; 1537 vreg->hpm_min_load = mapping->hpm_min_load; 1538 vreg->desc.ops = mapping->ops; 1539 1540 if (mapping->set_points) { 1541 if (!mapping->set_points->n_voltages) 1542 spmi_calculate_num_voltages(mapping->set_points); 1543 vreg->desc.n_voltages = mapping->set_points->n_voltages; 1544 } 1545 1546 return 0; 1547 } 1548 1549 static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg) 1550 { 1551 int ret; 1552 u8 reg = 0; 1553 int step, delay, slew_rate, step_delay; 1554 const struct spmi_voltage_range *range; 1555 1556 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); 1557 if (ret) { 1558 dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); 1559 return ret; 1560 } 1561 1562 range = spmi_regulator_find_range(vreg); 1563 if (!range) 1564 return -EINVAL; 1565 1566 switch (vreg->logical_type) { 1567 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS: 1568 step_delay = SPMI_FTSMPS_STEP_DELAY; 1569 break; 1570 default: 1571 step_delay = SPMI_DEFAULT_STEP_DELAY; 1572 break; 1573 } 1574 1575 step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK; 1576 step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT; 1577 1578 delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK; 1579 delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT; 1580 1581 /* slew_rate has units of uV/us */ 1582 slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step); 1583 slew_rate /= 1000 * (step_delay << delay); 1584 slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM; 1585 slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN; 1586 1587 /* Ensure that the slew rate is greater than 0 */ 1588 vreg->slew_rate = max(slew_rate, 1); 1589 1590 return ret; 1591 } 1592 1593 static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg, 1594 int clock_rate) 1595 { 1596 int ret; 1597 u8 reg = 0; 1598 int delay, slew_rate; 1599 const struct spmi_voltage_range *range = &vreg->set_points->range[0]; 1600 1601 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); 1602 if (ret) { 1603 dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); 1604 return ret; 1605 } 1606 1607 delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK; 1608 delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; 1609 1610 /* slew_rate has units of uV/us */ 1611 slew_rate = clock_rate * range->step_uV; 1612 slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay); 1613 slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM; 1614 slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN; 1615 1616 /* Ensure that the slew rate is greater than 0 */ 1617 vreg->slew_rate = max(slew_rate, 1); 1618 1619 return ret; 1620 } 1621 1622 static int spmi_regulator_init_registers(struct spmi_regulator *vreg, 1623 const struct spmi_regulator_init_data *data) 1624 { 1625 int ret; 1626 enum spmi_regulator_logical_type type; 1627 u8 ctrl_reg[8], reg, mask; 1628 1629 type = vreg->logical_type; 1630 1631 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); 1632 if (ret) 1633 return ret; 1634 1635 /* Set up enable pin control. */ 1636 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS 1637 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO 1638 || type == SPMI_REGULATOR_LOGICAL_TYPE_VS) 1639 && !(data->pin_ctrl_enable 1640 & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) { 1641 ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= 1642 ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; 1643 ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= 1644 data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; 1645 } 1646 1647 /* Set up mode pin control. */ 1648 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS 1649 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO) 1650 && !(data->pin_ctrl_hpm 1651 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { 1652 ctrl_reg[SPMI_COMMON_IDX_MODE] &= 1653 ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK; 1654 ctrl_reg[SPMI_COMMON_IDX_MODE] |= 1655 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK; 1656 } 1657 1658 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS 1659 && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { 1660 ctrl_reg[SPMI_COMMON_IDX_MODE] &= 1661 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1662 ctrl_reg[SPMI_COMMON_IDX_MODE] |= 1663 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1664 } 1665 1666 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS 1667 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS 1668 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO) 1669 && !(data->pin_ctrl_hpm 1670 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { 1671 ctrl_reg[SPMI_COMMON_IDX_MODE] &= 1672 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1673 ctrl_reg[SPMI_COMMON_IDX_MODE] |= 1674 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1675 } 1676 1677 /* Write back any control register values that were modified. */ 1678 ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); 1679 if (ret) 1680 return ret; 1681 1682 /* Set soft start strength and over current protection for VS. */ 1683 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) { 1684 if (data->vs_soft_start_strength 1685 != SPMI_VS_SOFT_START_STR_HW_DEFAULT) { 1686 reg = data->vs_soft_start_strength 1687 & SPMI_VS_SOFT_START_SEL_MASK; 1688 mask = SPMI_VS_SOFT_START_SEL_MASK; 1689 return spmi_vreg_update_bits(vreg, 1690 SPMI_VS_REG_SOFT_START, 1691 reg, mask); 1692 } 1693 } 1694 1695 return 0; 1696 } 1697 1698 static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg, 1699 struct device_node *node, struct spmi_regulator_init_data *data) 1700 { 1701 /* 1702 * Initialize configuration parameters to use hardware default in case 1703 * no value is specified via device tree. 1704 */ 1705 data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT; 1706 data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT; 1707 data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT; 1708 1709 /* These bindings are optional, so it is okay if they aren't found. */ 1710 of_property_read_u32(node, "qcom,ocp-max-retries", 1711 &vreg->ocp_max_retries); 1712 of_property_read_u32(node, "qcom,ocp-retry-delay", 1713 &vreg->ocp_retry_delay_ms); 1714 of_property_read_u32(node, "qcom,pin-ctrl-enable", 1715 &data->pin_ctrl_enable); 1716 of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm); 1717 of_property_read_u32(node, "qcom,vs-soft-start-strength", 1718 &data->vs_soft_start_strength); 1719 } 1720 1721 static unsigned int spmi_regulator_of_map_mode(unsigned int mode) 1722 { 1723 if (mode == 1) 1724 return REGULATOR_MODE_NORMAL; 1725 if (mode == 2) 1726 return REGULATOR_MODE_FAST; 1727 1728 return REGULATOR_MODE_IDLE; 1729 } 1730 1731 static int spmi_regulator_of_parse(struct device_node *node, 1732 const struct regulator_desc *desc, 1733 struct regulator_config *config) 1734 { 1735 struct spmi_regulator_init_data data = { }; 1736 struct spmi_regulator *vreg = config->driver_data; 1737 struct device *dev = config->dev; 1738 int ret; 1739 1740 spmi_regulator_get_dt_config(vreg, node, &data); 1741 1742 if (!vreg->ocp_max_retries) 1743 vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES; 1744 if (!vreg->ocp_retry_delay_ms) 1745 vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS; 1746 1747 ret = spmi_regulator_init_registers(vreg, &data); 1748 if (ret) { 1749 dev_err(dev, "common initialization failed, ret=%d\n", ret); 1750 return ret; 1751 } 1752 1753 switch (vreg->logical_type) { 1754 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS: 1755 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS: 1756 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS: 1757 case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: 1758 ret = spmi_regulator_init_slew_rate(vreg); 1759 if (ret) 1760 return ret; 1761 break; 1762 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426: 1763 ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, 1764 SPMI_FTSMPS426_CLOCK_RATE); 1765 if (ret) 1766 return ret; 1767 break; 1768 case SPMI_REGULATOR_LOGICAL_TYPE_HFS430: 1769 ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, 1770 SPMI_HFS430_CLOCK_RATE); 1771 if (ret) 1772 return ret; 1773 break; 1774 default: 1775 break; 1776 } 1777 1778 if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS) 1779 vreg->ocp_irq = 0; 1780 1781 if (vreg->ocp_irq) { 1782 ret = devm_request_irq(dev, vreg->ocp_irq, 1783 spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp", 1784 vreg); 1785 if (ret < 0) { 1786 dev_err(dev, "failed to request irq %d, ret=%d\n", 1787 vreg->ocp_irq, ret); 1788 return ret; 1789 } 1790 1791 INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work); 1792 } 1793 1794 return 0; 1795 } 1796 1797 static const struct spmi_regulator_data pm8941_regulators[] = { 1798 { "s1", 0x1400, "vdd_s1", }, 1799 { "s2", 0x1700, "vdd_s2", }, 1800 { "s3", 0x1a00, "vdd_s3", }, 1801 { "s4", 0xa000, }, 1802 { "l1", 0x4000, "vdd_l1_l3", }, 1803 { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, 1804 { "l3", 0x4200, "vdd_l1_l3", }, 1805 { "l4", 0x4300, "vdd_l4_l11", }, 1806 { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, 1807 { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, 1808 { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, 1809 { "l8", 0x4700, "vdd_l8_l16_l18_19", }, 1810 { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, 1811 { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, 1812 { "l11", 0x4a00, "vdd_l4_l11", }, 1813 { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, 1814 { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, 1815 { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, 1816 { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, 1817 { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, 1818 { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, 1819 { "l18", 0x5100, "vdd_l8_l16_l18_19", }, 1820 { "l19", 0x5200, "vdd_l8_l16_l18_19", }, 1821 { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, 1822 { "l21", 0x5400, "vdd_l21", }, 1823 { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, 1824 { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, 1825 { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, 1826 { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, 1827 { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, 1828 { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, 1829 { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", }, 1830 { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", }, 1831 { } 1832 }; 1833 1834 static const struct spmi_regulator_data pm8841_regulators[] = { 1835 { "s1", 0x1400, "vdd_s1", }, 1836 { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 }, 1837 { "s3", 0x1a00, "vdd_s3", }, 1838 { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 }, 1839 { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 }, 1840 { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 }, 1841 { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 }, 1842 { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 }, 1843 { } 1844 }; 1845 1846 static const struct spmi_regulator_data pm8916_regulators[] = { 1847 { "s1", 0x1400, "vdd_s1", }, 1848 { "s2", 0x1700, "vdd_s2", }, 1849 { "s3", 0x1a00, "vdd_s3", }, 1850 { "s4", 0x1d00, "vdd_s4", }, 1851 { "l1", 0x4000, "vdd_l1_l3", }, 1852 { "l2", 0x4100, "vdd_l2", }, 1853 { "l3", 0x4200, "vdd_l1_l3", }, 1854 { "l4", 0x4300, "vdd_l4_l5_l6", }, 1855 { "l5", 0x4400, "vdd_l4_l5_l6", }, 1856 { "l6", 0x4500, "vdd_l4_l5_l6", }, 1857 { "l7", 0x4600, "vdd_l7", }, 1858 { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", }, 1859 { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", }, 1860 { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", }, 1861 { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", }, 1862 { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", }, 1863 { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", }, 1864 { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", }, 1865 { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", }, 1866 { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", }, 1867 { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", }, 1868 { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", }, 1869 { } 1870 }; 1871 1872 static const struct spmi_regulator_data pm8994_regulators[] = { 1873 { "s1", 0x1400, "vdd_s1", }, 1874 { "s2", 0x1700, "vdd_s2", }, 1875 { "s3", 0x1a00, "vdd_s3", }, 1876 { "s4", 0x1d00, "vdd_s4", }, 1877 { "s5", 0x2000, "vdd_s5", }, 1878 { "s6", 0x2300, "vdd_s6", }, 1879 { "s7", 0x2600, "vdd_s7", }, 1880 { "s8", 0x2900, "vdd_s8", }, 1881 { "s9", 0x2c00, "vdd_s9", }, 1882 { "s10", 0x2f00, "vdd_s10", }, 1883 { "s11", 0x3200, "vdd_s11", }, 1884 { "s12", 0x3500, "vdd_s12", }, 1885 { "l1", 0x4000, "vdd_l1", }, 1886 { "l2", 0x4100, "vdd_l2_l26_l28", }, 1887 { "l3", 0x4200, "vdd_l3_l11", }, 1888 { "l4", 0x4300, "vdd_l4_l27_l31", }, 1889 { "l5", 0x4400, "vdd_l5_l7", }, 1890 { "l6", 0x4500, "vdd_l6_l12_l32", }, 1891 { "l7", 0x4600, "vdd_l5_l7", }, 1892 { "l8", 0x4700, "vdd_l8_l16_l30", }, 1893 { "l9", 0x4800, "vdd_l9_l10_l18_l22", }, 1894 { "l10", 0x4900, "vdd_l9_l10_l18_l22", }, 1895 { "l11", 0x4a00, "vdd_l3_l11", }, 1896 { "l12", 0x4b00, "vdd_l6_l12_l32", }, 1897 { "l13", 0x4c00, "vdd_l13_l19_l23_l24", }, 1898 { "l14", 0x4d00, "vdd_l14_l15", }, 1899 { "l15", 0x4e00, "vdd_l14_l15", }, 1900 { "l16", 0x4f00, "vdd_l8_l16_l30", }, 1901 { "l17", 0x5000, "vdd_l17_l29", }, 1902 { "l18", 0x5100, "vdd_l9_l10_l18_l22", }, 1903 { "l19", 0x5200, "vdd_l13_l19_l23_l24", }, 1904 { "l20", 0x5300, "vdd_l20_l21", }, 1905 { "l21", 0x5400, "vdd_l20_l21", }, 1906 { "l22", 0x5500, "vdd_l9_l10_l18_l22", }, 1907 { "l23", 0x5600, "vdd_l13_l19_l23_l24", }, 1908 { "l24", 0x5700, "vdd_l13_l19_l23_l24", }, 1909 { "l25", 0x5800, "vdd_l25", }, 1910 { "l26", 0x5900, "vdd_l2_l26_l28", }, 1911 { "l27", 0x5a00, "vdd_l4_l27_l31", }, 1912 { "l28", 0x5b00, "vdd_l2_l26_l28", }, 1913 { "l29", 0x5c00, "vdd_l17_l29", }, 1914 { "l30", 0x5d00, "vdd_l8_l16_l30", }, 1915 { "l31", 0x5e00, "vdd_l4_l27_l31", }, 1916 { "l32", 0x5f00, "vdd_l6_l12_l32", }, 1917 { "lvs1", 0x8000, "vdd_lvs_1_2", }, 1918 { "lvs2", 0x8100, "vdd_lvs_1_2", }, 1919 { } 1920 }; 1921 1922 static const struct spmi_regulator_data pmi8994_regulators[] = { 1923 { "s1", 0x1400, "vdd_s1", }, 1924 { "s2", 0x1700, "vdd_s2", }, 1925 { "s3", 0x1a00, "vdd_s3", }, 1926 { "l1", 0x4000, "vdd_l1", }, 1927 { } 1928 }; 1929 1930 static const struct spmi_regulator_data pm8005_regulators[] = { 1931 { "s1", 0x1400, "vdd_s1", }, 1932 { "s2", 0x1700, "vdd_s2", }, 1933 { "s3", 0x1a00, "vdd_s3", }, 1934 { "s4", 0x1d00, "vdd_s4", }, 1935 { } 1936 }; 1937 1938 static const struct spmi_regulator_data pms405_regulators[] = { 1939 { "s3", 0x1a00, "vdd_s3"}, 1940 { } 1941 }; 1942 1943 static const struct of_device_id qcom_spmi_regulator_match[] = { 1944 { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, 1945 { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, 1946 { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, 1947 { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, 1948 { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, 1949 { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, 1950 { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, 1951 { } 1952 }; 1953 MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); 1954 1955 static int qcom_spmi_regulator_probe(struct platform_device *pdev) 1956 { 1957 const struct spmi_regulator_data *reg; 1958 const struct spmi_voltage_range *range; 1959 const struct of_device_id *match; 1960 struct regulator_config config = { }; 1961 struct regulator_dev *rdev; 1962 struct spmi_regulator *vreg; 1963 struct regmap *regmap; 1964 const char *name; 1965 struct device *dev = &pdev->dev; 1966 struct device_node *node = pdev->dev.of_node; 1967 struct device_node *syscon, *reg_node; 1968 struct property *reg_prop; 1969 int ret, lenp; 1970 struct list_head *vreg_list; 1971 1972 vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL); 1973 if (!vreg_list) 1974 return -ENOMEM; 1975 INIT_LIST_HEAD(vreg_list); 1976 platform_set_drvdata(pdev, vreg_list); 1977 1978 regmap = dev_get_regmap(dev->parent, NULL); 1979 if (!regmap) 1980 return -ENODEV; 1981 1982 match = of_match_device(qcom_spmi_regulator_match, &pdev->dev); 1983 if (!match) 1984 return -ENODEV; 1985 1986 if (of_find_property(node, "qcom,saw-reg", &lenp)) { 1987 syscon = of_parse_phandle(node, "qcom,saw-reg", 0); 1988 saw_regmap = syscon_node_to_regmap(syscon); 1989 of_node_put(syscon); 1990 if (IS_ERR(saw_regmap)) 1991 dev_err(dev, "ERROR reading SAW regmap\n"); 1992 } 1993 1994 for (reg = match->data; reg->name; reg++) { 1995 1996 if (saw_regmap) { 1997 reg_node = of_get_child_by_name(node, reg->name); 1998 reg_prop = of_find_property(reg_node, "qcom,saw-slave", 1999 &lenp); 2000 of_node_put(reg_node); 2001 if (reg_prop) 2002 continue; 2003 } 2004 2005 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); 2006 if (!vreg) 2007 return -ENOMEM; 2008 2009 vreg->dev = dev; 2010 vreg->base = reg->base; 2011 vreg->regmap = regmap; 2012 if (reg->ocp) { 2013 vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp); 2014 if (vreg->ocp_irq < 0) { 2015 ret = vreg->ocp_irq; 2016 goto err; 2017 } 2018 } 2019 vreg->desc.id = -1; 2020 vreg->desc.owner = THIS_MODULE; 2021 vreg->desc.type = REGULATOR_VOLTAGE; 2022 vreg->desc.enable_reg = reg->base + SPMI_COMMON_REG_ENABLE; 2023 vreg->desc.enable_mask = SPMI_COMMON_ENABLE_MASK; 2024 vreg->desc.enable_val = SPMI_COMMON_ENABLE; 2025 vreg->desc.name = name = reg->name; 2026 vreg->desc.supply_name = reg->supply; 2027 vreg->desc.of_match = reg->name; 2028 vreg->desc.of_parse_cb = spmi_regulator_of_parse; 2029 vreg->desc.of_map_mode = spmi_regulator_of_map_mode; 2030 2031 ret = spmi_regulator_match(vreg, reg->force_type); 2032 if (ret) 2033 continue; 2034 2035 if (saw_regmap) { 2036 reg_node = of_get_child_by_name(node, reg->name); 2037 reg_prop = of_find_property(reg_node, "qcom,saw-leader", 2038 &lenp); 2039 of_node_put(reg_node); 2040 if (reg_prop) { 2041 spmi_saw_ops = *(vreg->desc.ops); 2042 spmi_saw_ops.set_voltage_sel = 2043 spmi_regulator_saw_set_voltage; 2044 vreg->desc.ops = &spmi_saw_ops; 2045 } 2046 } 2047 2048 if (vreg->set_points && vreg->set_points->count == 1) { 2049 /* since there is only one range */ 2050 range = vreg->set_points->range; 2051 vreg->desc.uV_step = range->step_uV; 2052 } 2053 2054 config.dev = dev; 2055 config.driver_data = vreg; 2056 config.regmap = regmap; 2057 rdev = devm_regulator_register(dev, &vreg->desc, &config); 2058 if (IS_ERR(rdev)) { 2059 dev_err(dev, "failed to register %s\n", name); 2060 ret = PTR_ERR(rdev); 2061 goto err; 2062 } 2063 2064 INIT_LIST_HEAD(&vreg->node); 2065 list_add(&vreg->node, vreg_list); 2066 } 2067 2068 return 0; 2069 2070 err: 2071 list_for_each_entry(vreg, vreg_list, node) 2072 if (vreg->ocp_irq) 2073 cancel_delayed_work_sync(&vreg->ocp_work); 2074 return ret; 2075 } 2076 2077 static int qcom_spmi_regulator_remove(struct platform_device *pdev) 2078 { 2079 struct spmi_regulator *vreg; 2080 struct list_head *vreg_list = platform_get_drvdata(pdev); 2081 2082 list_for_each_entry(vreg, vreg_list, node) 2083 if (vreg->ocp_irq) 2084 cancel_delayed_work_sync(&vreg->ocp_work); 2085 2086 return 0; 2087 } 2088 2089 static struct platform_driver qcom_spmi_regulator_driver = { 2090 .driver = { 2091 .name = "qcom-spmi-regulator", 2092 .of_match_table = qcom_spmi_regulator_match, 2093 }, 2094 .probe = qcom_spmi_regulator_probe, 2095 .remove = qcom_spmi_regulator_remove, 2096 }; 2097 module_platform_driver(qcom_spmi_regulator_driver); 2098 2099 MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver"); 2100 MODULE_LICENSE("GPL v2"); 2101 MODULE_ALIAS("platform:qcom-spmi-regulator"); 2102