1 /*
2  * Linux driver attachment glue for PCI based U320 controllers.
3  *
4  * Copyright (c) 2000-2001 Adaptec Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    substantially similar to the "NO WARRANTY" disclaimer below
15  *    ("Disclaimer") and any redistribution must be conditioned upon
16  *    including a substantially similar Disclaimer requirement for further
17  *    binary redistribution.
18  * 3. Neither the names of the above-listed copyright holders nor the names
19  *    of any contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  * Alternatively, this software may be distributed under the terms of the
23  * GNU General Public License ("GPL") version 2 as published by the Free
24  * Software Foundation.
25  *
26  * NO WARRANTY
27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGES.
38  *
39  * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
40  */
41 
42 #include "aic79xx_osm.h"
43 #include "aic79xx_inline.h"
44 #include "aic79xx_pci.h"
45 
46 /* Define the macro locally since it's different for different class of chips.
47  */
48 #define ID(x)		 \
49 	ID2C(x),	 \
50 	ID2C(IDIROC(x))
51 
52 static const struct pci_device_id ahd_linux_pci_id_table[] = {
53 	/* aic7901 based controllers */
54 	ID(ID_AHA_29320A),
55 	ID(ID_AHA_29320ALP),
56 	ID(ID_AHA_29320LPE),
57 	/* aic7902 based controllers */
58 	ID(ID_AHA_29320),
59 	ID(ID_AHA_29320B),
60 	ID(ID_AHA_29320LP),
61 	ID(ID_AHA_39320),
62 	ID(ID_AHA_39320_B),
63 	ID(ID_AHA_39320A),
64 	ID(ID_AHA_39320D),
65 	ID(ID_AHA_39320D_HP),
66 	ID(ID_AHA_39320D_B),
67 	ID(ID_AHA_39320D_B_HP),
68 	/* Generic chip probes for devices we don't know exactly. */
69 	ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
70 	ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
71 	ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
72 	{ 0 }
73 };
74 
75 MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
76 
77 static int __maybe_unused
78 ahd_linux_pci_dev_suspend(struct device *dev)
79 {
80 	struct ahd_softc *ahd = dev_get_drvdata(dev);
81 	int rc;
82 
83 	if ((rc = ahd_suspend(ahd)))
84 		return rc;
85 
86 	ahd_pci_suspend(ahd);
87 
88 	return rc;
89 }
90 
91 static int __maybe_unused
92 ahd_linux_pci_dev_resume(struct device *dev)
93 {
94 	struct ahd_softc *ahd = dev_get_drvdata(dev);
95 
96 	ahd_pci_resume(ahd);
97 
98 	ahd_resume(ahd);
99 
100 	return 0;
101 }
102 
103 static void
104 ahd_linux_pci_dev_remove(struct pci_dev *pdev)
105 {
106 	struct ahd_softc *ahd = pci_get_drvdata(pdev);
107 	u_long s;
108 
109 	if (ahd->platform_data && ahd->platform_data->host)
110 			scsi_remove_host(ahd->platform_data->host);
111 
112 	ahd_lock(ahd, &s);
113 	ahd_intr_enable(ahd, FALSE);
114 	ahd_unlock(ahd, &s);
115 	ahd_free(ahd);
116 }
117 
118 static void
119 ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
120 {
121 	struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
122 	unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
123 
124 	master_pdev = pci_get_slot(pdev->bus, master_devfn);
125 	if (master_pdev) {
126 		struct ahd_softc *master = pci_get_drvdata(master_pdev);
127 		if (master) {
128 			ahd->flags &= ~AHD_BIOS_ENABLED;
129 			ahd->flags |= master->flags & AHD_BIOS_ENABLED;
130 		} else
131 			printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
132 		pci_dev_put(master_pdev);
133 	}
134 }
135 
136 static int
137 ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
138 {
139 	char		 buf[80];
140 	struct		 ahd_softc *ahd;
141 	ahd_dev_softc_t	 pci;
142 	const struct ahd_pci_identity *entry;
143 	char		*name;
144 	int		 error;
145 	struct device	*dev = &pdev->dev;
146 
147 	pci = pdev;
148 	entry = ahd_find_pci_device(pci);
149 	if (entry == NULL)
150 		return (-ENODEV);
151 
152 	/*
153 	 * Allocate a softc for this card and
154 	 * set it up for attachment by our
155 	 * common detect routine.
156 	 */
157 	sprintf(buf, "ahd_pci:%d:%d:%d",
158 		ahd_get_pci_bus(pci),
159 		ahd_get_pci_slot(pci),
160 		ahd_get_pci_function(pci));
161 	name = kstrdup(buf, GFP_ATOMIC);
162 	if (name == NULL)
163 		return (-ENOMEM);
164 	ahd = ahd_alloc(NULL, name);
165 	if (ahd == NULL)
166 		return (-ENOMEM);
167 	if (pci_enable_device(pdev)) {
168 		ahd_free(ahd);
169 		return (-ENODEV);
170 	}
171 	pci_set_master(pdev);
172 
173 	if (sizeof(dma_addr_t) > 4) {
174 		const u64 required_mask = dma_get_required_mask(dev);
175 
176 		if (required_mask > DMA_BIT_MASK(39) &&
177 		    dma_set_mask(dev, DMA_BIT_MASK(64)) == 0)
178 			ahd->flags |= AHD_64BIT_ADDRESSING;
179 		else if (required_mask > DMA_BIT_MASK(32) &&
180 			 dma_set_mask(dev, DMA_BIT_MASK(39)) == 0)
181 			ahd->flags |= AHD_39BIT_ADDRESSING;
182 		else
183 			dma_set_mask(dev, DMA_BIT_MASK(32));
184 	} else {
185 		dma_set_mask(dev, DMA_BIT_MASK(32));
186 	}
187 	ahd->dev_softc = pci;
188 	error = ahd_pci_config(ahd, entry);
189 	if (error != 0) {
190 		ahd_free(ahd);
191 		return (-error);
192 	}
193 
194 	/*
195 	 * Second Function PCI devices need to inherit some
196 	 * * settings from function 0.
197 	 */
198 	if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
199 		ahd_linux_pci_inherit_flags(ahd);
200 
201 	pci_set_drvdata(pdev, ahd);
202 
203 	ahd_linux_register_host(ahd, &aic79xx_driver_template);
204 	return (0);
205 }
206 
207 static SIMPLE_DEV_PM_OPS(ahd_linux_pci_dev_pm_ops,
208 			 ahd_linux_pci_dev_suspend,
209 			 ahd_linux_pci_dev_resume);
210 
211 static struct pci_driver aic79xx_pci_driver = {
212 	.name		= "aic79xx",
213 	.probe		= ahd_linux_pci_dev_probe,
214 	.driver.pm	= &ahd_linux_pci_dev_pm_ops,
215 	.remove		= ahd_linux_pci_dev_remove,
216 	.id_table	= ahd_linux_pci_id_table
217 };
218 
219 int
220 ahd_linux_pci_init(void)
221 {
222 	return pci_register_driver(&aic79xx_pci_driver);
223 }
224 
225 void
226 ahd_linux_pci_exit(void)
227 {
228 	pci_unregister_driver(&aic79xx_pci_driver);
229 }
230 
231 static int
232 ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base,
233 				 resource_size_t *base2)
234 {
235 	*base = pci_resource_start(ahd->dev_softc, 0);
236 	/*
237 	 * This is really the 3rd bar and should be at index 2,
238 	 * but the Linux PCI code doesn't know how to "count" 64bit
239 	 * bars.
240 	 */
241 	*base2 = pci_resource_start(ahd->dev_softc, 3);
242 	if (*base == 0 || *base2 == 0)
243 		return (ENOMEM);
244 	if (!request_region(*base, 256, "aic79xx"))
245 		return (ENOMEM);
246 	if (!request_region(*base2, 256, "aic79xx")) {
247 		release_region(*base, 256);
248 		return (ENOMEM);
249 	}
250 	return (0);
251 }
252 
253 static int
254 ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
255 				 resource_size_t *bus_addr,
256 				 uint8_t __iomem **maddr)
257 {
258 	resource_size_t	start;
259 	resource_size_t	base_page;
260 	u_long	base_offset;
261 	int	error = 0;
262 
263 	if (aic79xx_allow_memio == 0)
264 		return (ENOMEM);
265 
266 	if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
267 		return (ENOMEM);
268 
269 	start = pci_resource_start(ahd->dev_softc, 1);
270 	base_page = start & PAGE_MASK;
271 	base_offset = start - base_page;
272 	if (start != 0) {
273 		*bus_addr = start;
274 		if (!request_mem_region(start, 0x1000, "aic79xx"))
275 			error = ENOMEM;
276 		if (!error) {
277 			*maddr = ioremap(base_page, base_offset + 512);
278 			if (*maddr == NULL) {
279 				error = ENOMEM;
280 				release_mem_region(start, 0x1000);
281 			} else
282 				*maddr += base_offset;
283 		}
284 	} else
285 		error = ENOMEM;
286 	return (error);
287 }
288 
289 int
290 ahd_pci_map_registers(struct ahd_softc *ahd)
291 {
292 	uint32_t command;
293 	resource_size_t base;
294 	uint8_t	__iomem *maddr;
295 	int	 error;
296 
297 	/*
298 	 * If its allowed, we prefer memory mapped access.
299 	 */
300 	command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
301 	command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
302 	base = 0;
303 	maddr = NULL;
304 	error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
305 	if (error == 0) {
306 		ahd->platform_data->mem_busaddr = base;
307 		ahd->tags[0] = BUS_SPACE_MEMIO;
308 		ahd->bshs[0].maddr = maddr;
309 		ahd->tags[1] = BUS_SPACE_MEMIO;
310 		ahd->bshs[1].maddr = maddr + 0x100;
311 		ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
312 				     command | PCIM_CMD_MEMEN, 4);
313 
314 		if (ahd_pci_test_register_access(ahd) != 0) {
315 
316 			printk("aic79xx: PCI Device %d:%d:%d "
317 			       "failed memory mapped test.  Using PIO.\n",
318 			       ahd_get_pci_bus(ahd->dev_softc),
319 			       ahd_get_pci_slot(ahd->dev_softc),
320 			       ahd_get_pci_function(ahd->dev_softc));
321 			iounmap(maddr);
322 			release_mem_region(ahd->platform_data->mem_busaddr,
323 					   0x1000);
324 			ahd->bshs[0].maddr = NULL;
325 			maddr = NULL;
326 		} else
327 			command |= PCIM_CMD_MEMEN;
328 	} else if (bootverbose) {
329 		printk("aic79xx: PCI%d:%d:%d MEM region 0x%llx "
330 		       "unavailable. Cannot memory map device.\n",
331 		       ahd_get_pci_bus(ahd->dev_softc),
332 		       ahd_get_pci_slot(ahd->dev_softc),
333 		       ahd_get_pci_function(ahd->dev_softc),
334 		       (unsigned long long)base);
335 	}
336 
337 	if (maddr == NULL) {
338 		resource_size_t base2;
339 
340 		error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
341 		if (error == 0) {
342 			ahd->tags[0] = BUS_SPACE_PIO;
343 			ahd->tags[1] = BUS_SPACE_PIO;
344 			ahd->bshs[0].ioport = (u_long)base;
345 			ahd->bshs[1].ioport = (u_long)base2;
346 			command |= PCIM_CMD_PORTEN;
347 		} else {
348 			printk("aic79xx: PCI%d:%d:%d IO regions 0x%llx and "
349 			       "0x%llx unavailable. Cannot map device.\n",
350 			       ahd_get_pci_bus(ahd->dev_softc),
351 			       ahd_get_pci_slot(ahd->dev_softc),
352 			       ahd_get_pci_function(ahd->dev_softc),
353 			       (unsigned long long)base,
354 			       (unsigned long long)base2);
355 		}
356 	}
357 	ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
358 	return (error);
359 }
360 
361 int
362 ahd_pci_map_int(struct ahd_softc *ahd)
363 {
364 	int error;
365 
366 	error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
367 			    IRQF_SHARED, "aic79xx", ahd);
368 	if (!error)
369 		ahd->platform_data->irq = ahd->dev_softc->irq;
370 
371 	return (-error);
372 }
373 
374 void
375 ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
376 {
377 	pci_set_power_state(ahd->dev_softc, new_state);
378 }
379