1 /* 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 3 * All rights reserved 4 * www.brocade.com 5 * 6 * Linux driver for Brocade Fibre Channel Host Bus Adapter. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License (GPL) Version 2 as 10 * published by the Free Software Foundation 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 */ 17 18 #ifndef __BFA_DEFS_H__ 19 #define __BFA_DEFS_H__ 20 21 #include "bfa_fc.h" 22 #include "bfad_drv.h" 23 24 #define BFA_MFG_SERIALNUM_SIZE 11 25 #define STRSZ(_n) (((_n) + 4) & ~3) 26 27 /* 28 * Manufacturing card type 29 */ 30 enum { 31 BFA_MFG_TYPE_CB_MAX = 825, /* Crossbow card type max */ 32 BFA_MFG_TYPE_FC8P2 = 825, /* 8G 2port FC card */ 33 BFA_MFG_TYPE_FC8P1 = 815, /* 8G 1port FC card */ 34 BFA_MFG_TYPE_FC4P2 = 425, /* 4G 2port FC card */ 35 BFA_MFG_TYPE_FC4P1 = 415, /* 4G 1port FC card */ 36 BFA_MFG_TYPE_CNA10P2 = 1020, /* 10G 2port CNA card */ 37 BFA_MFG_TYPE_CNA10P1 = 1010, /* 10G 1port CNA card */ 38 BFA_MFG_TYPE_JAYHAWK = 804, /* Jayhawk mezz card */ 39 BFA_MFG_TYPE_WANCHESE = 1007, /* Wanchese mezz card */ 40 BFA_MFG_TYPE_ASTRA = 807, /* Astra mezz card */ 41 BFA_MFG_TYPE_LIGHTNING_P0 = 902, /* Lightning mezz card - old */ 42 BFA_MFG_TYPE_LIGHTNING = 1741, /* Lightning mezz card */ 43 BFA_MFG_TYPE_PROWLER_F = 1560, /* Prowler FC only cards */ 44 BFA_MFG_TYPE_PROWLER_N = 1410, /* Prowler NIC only cards */ 45 BFA_MFG_TYPE_PROWLER_C = 1710, /* Prowler CNA only cards */ 46 BFA_MFG_TYPE_PROWLER_D = 1860, /* Prowler Dual cards */ 47 BFA_MFG_TYPE_CHINOOK = 1867, /* Chinook cards */ 48 BFA_MFG_TYPE_INVALID = 0, /* Invalid card type */ 49 }; 50 51 #pragma pack(1) 52 53 /* 54 * Check if Mezz card 55 */ 56 #define bfa_mfg_is_mezz(type) (( \ 57 (type) == BFA_MFG_TYPE_JAYHAWK || \ 58 (type) == BFA_MFG_TYPE_WANCHESE || \ 59 (type) == BFA_MFG_TYPE_ASTRA || \ 60 (type) == BFA_MFG_TYPE_LIGHTNING_P0 || \ 61 (type) == BFA_MFG_TYPE_LIGHTNING || \ 62 (type) == BFA_MFG_TYPE_CHINOOK)) 63 64 /* 65 * Check if the card having old wwn/mac handling 66 */ 67 #define bfa_mfg_is_old_wwn_mac_model(type) (( \ 68 (type) == BFA_MFG_TYPE_FC8P2 || \ 69 (type) == BFA_MFG_TYPE_FC8P1 || \ 70 (type) == BFA_MFG_TYPE_FC4P2 || \ 71 (type) == BFA_MFG_TYPE_FC4P1 || \ 72 (type) == BFA_MFG_TYPE_CNA10P2 || \ 73 (type) == BFA_MFG_TYPE_CNA10P1 || \ 74 (type) == BFA_MFG_TYPE_JAYHAWK || \ 75 (type) == BFA_MFG_TYPE_WANCHESE)) 76 77 #define bfa_mfg_increment_wwn_mac(m, i) \ 78 do { \ 79 u32 t = ((u32)(m)[0] << 16) | ((u32)(m)[1] << 8) | \ 80 (u32)(m)[2]; \ 81 t += (i); \ 82 (m)[0] = (t >> 16) & 0xFF; \ 83 (m)[1] = (t >> 8) & 0xFF; \ 84 (m)[2] = t & 0xFF; \ 85 } while (0) 86 87 /* 88 * VPD data length 89 */ 90 #define BFA_MFG_VPD_LEN 512 91 92 /* 93 * VPD vendor tag 94 */ 95 enum { 96 BFA_MFG_VPD_UNKNOWN = 0, /* vendor unknown */ 97 BFA_MFG_VPD_IBM = 1, /* vendor IBM */ 98 BFA_MFG_VPD_HP = 2, /* vendor HP */ 99 BFA_MFG_VPD_DELL = 3, /* vendor DELL */ 100 BFA_MFG_VPD_PCI_IBM = 0x08, /* PCI VPD IBM */ 101 BFA_MFG_VPD_PCI_HP = 0x10, /* PCI VPD HP */ 102 BFA_MFG_VPD_PCI_DELL = 0x20, /* PCI VPD DELL */ 103 BFA_MFG_VPD_PCI_BRCD = 0xf8, /* PCI VPD Brocade */ 104 }; 105 106 /* 107 * All numerical fields are in big-endian format. 108 */ 109 struct bfa_mfg_vpd_s { 110 u8 version; /* vpd data version */ 111 u8 vpd_sig[3]; /* characters 'V', 'P', 'D' */ 112 u8 chksum; /* u8 checksum */ 113 u8 vendor; /* vendor */ 114 u8 len; /* vpd data length excluding header */ 115 u8 rsv; 116 u8 data[BFA_MFG_VPD_LEN]; /* vpd data */ 117 }; 118 119 #pragma pack() 120 121 /* 122 * Status return values 123 */ 124 enum bfa_status { 125 BFA_STATUS_OK = 0, /* Success */ 126 BFA_STATUS_FAILED = 1, /* Operation failed */ 127 BFA_STATUS_EINVAL = 2, /* Invalid params Check input 128 * parameters */ 129 BFA_STATUS_ENOMEM = 3, /* Out of resources */ 130 BFA_STATUS_ETIMER = 5, /* Timer expired - Retry, if persists, 131 * contact support */ 132 BFA_STATUS_EPROTOCOL = 6, /* Protocol error */ 133 BFA_STATUS_SFP_UNSUPP = 10, /* Unsupported SFP - Replace SFP */ 134 BFA_STATUS_UNKNOWN_VFID = 11, /* VF_ID not found */ 135 BFA_STATUS_DATACORRUPTED = 12, /* Diag returned data corrupted */ 136 BFA_STATUS_DEVBUSY = 13, /* Device busy - Retry operation */ 137 BFA_STATUS_HDMA_FAILED = 16, /* Host dma failed contact support */ 138 BFA_STATUS_FLASH_BAD_LEN = 17, /* Flash bad length */ 139 BFA_STATUS_UNKNOWN_LWWN = 18, /* LPORT PWWN not found */ 140 BFA_STATUS_UNKNOWN_RWWN = 19, /* RPORT PWWN not found */ 141 BFA_STATUS_VPORT_EXISTS = 21, /* VPORT already exists */ 142 BFA_STATUS_VPORT_MAX = 22, /* Reached max VPORT supported limit */ 143 BFA_STATUS_UNSUPP_SPEED = 23, /* Invalid Speed Check speed setting */ 144 BFA_STATUS_INVLD_DFSZ = 24, /* Invalid Max data field size */ 145 BFA_STATUS_CMD_NOTSUPP = 26, /* Command/API not supported */ 146 BFA_STATUS_FABRIC_RJT = 29, /* Reject from attached fabric */ 147 BFA_STATUS_UNKNOWN_VWWN = 30, /* VPORT PWWN not found */ 148 BFA_STATUS_PORT_OFFLINE = 34, /* Port is not online */ 149 BFA_STATUS_VPORT_WWN_BP = 46, /* WWN is same as base port's WWN */ 150 BFA_STATUS_PORT_NOT_DISABLED = 47, /* Port not disabled disable port */ 151 BFA_STATUS_NO_FCPIM_NEXUS = 52, /* No FCP Nexus exists with the rport */ 152 BFA_STATUS_IOC_FAILURE = 56, /* IOC failure - Retry, if persists 153 * contact support */ 154 BFA_STATUS_INVALID_WWN = 57, /* Invalid WWN */ 155 BFA_STATUS_ADAPTER_ENABLED = 60, /* Adapter is not disabled */ 156 BFA_STATUS_IOC_NON_OP = 61, /* IOC is not operational */ 157 BFA_STATUS_VERSION_FAIL = 70, /* Application/Driver version mismatch */ 158 BFA_STATUS_DIAG_BUSY = 71, /* diag busy */ 159 BFA_STATUS_BEACON_ON = 72, /* Port Beacon already on */ 160 BFA_STATUS_ENOFSAVE = 78, /* No saved firmware trace */ 161 BFA_STATUS_IOC_DISABLED = 82, /* IOC is already disabled */ 162 BFA_STATUS_NO_SFP_DEV = 89, /* No SFP device check or replace SFP */ 163 BFA_STATUS_MEMTEST_FAILED = 90, /* Memory test failed contact support */ 164 BFA_STATUS_LEDTEST_OP = 109, /* LED test is operating */ 165 BFA_STATUS_INVALID_MAC = 134, /* Invalid MAC address */ 166 BFA_STATUS_PBC = 154, /* Operation not allowed for pre-boot 167 * configuration */ 168 BFA_STATUS_BAD_FWCFG = 156, /* Bad firmware configuration */ 169 BFA_STATUS_INVALID_VENDOR = 158, /* Invalid switch vendor */ 170 BFA_STATUS_SFP_NOT_READY = 159, /* SFP info is not ready. Retry */ 171 BFA_STATUS_TRUNK_ENABLED = 164, /* Trunk is already enabled on 172 * this adapter */ 173 BFA_STATUS_TRUNK_DISABLED = 165, /* Trunking is disabled on 174 * the adapter */ 175 BFA_STATUS_IOPROFILE_OFF = 175, /* IO profile OFF */ 176 BFA_STATUS_PHY_NOT_PRESENT = 183, /* PHY module not present */ 177 BFA_STATUS_FEATURE_NOT_SUPPORTED = 192, /* Feature not supported */ 178 BFA_STATUS_FAA_ENABLED = 197, /* FAA is already enabled */ 179 BFA_STATUS_FAA_DISABLED = 198, /* FAA is already disabled */ 180 BFA_STATUS_FAA_ACQUIRED = 199, /* FAA is already acquired */ 181 BFA_STATUS_FAA_ACQ_ADDR = 200, /* Acquiring addr */ 182 BFA_STATUS_ERROR_TRUNK_ENABLED = 203, /* Trunk enabled on adapter */ 183 BFA_STATUS_MAX_VAL /* Unknown error code */ 184 }; 185 #define bfa_status_t enum bfa_status 186 187 enum bfa_eproto_status { 188 BFA_EPROTO_BAD_ACCEPT = 0, 189 BFA_EPROTO_UNKNOWN_RSP = 1 190 }; 191 #define bfa_eproto_status_t enum bfa_eproto_status 192 193 enum bfa_boolean { 194 BFA_FALSE = 0, 195 BFA_TRUE = 1 196 }; 197 #define bfa_boolean_t enum bfa_boolean 198 199 #define BFA_STRING_32 32 200 #define BFA_VERSION_LEN 64 201 202 /* 203 * ---------------------- adapter definitions ------------ 204 */ 205 206 /* 207 * BFA adapter level attributes. 208 */ 209 enum { 210 BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE), 211 /* 212 *!< adapter serial num length 213 */ 214 BFA_ADAPTER_MODEL_NAME_LEN = 16, /* model name length */ 215 BFA_ADAPTER_MODEL_DESCR_LEN = 128, /* model description length */ 216 BFA_ADAPTER_MFG_NAME_LEN = 8, /* manufacturer name length */ 217 BFA_ADAPTER_SYM_NAME_LEN = 64, /* adapter symbolic name length */ 218 BFA_ADAPTER_OS_TYPE_LEN = 64, /* adapter os type length */ 219 }; 220 221 struct bfa_adapter_attr_s { 222 char manufacturer[BFA_ADAPTER_MFG_NAME_LEN]; 223 char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; 224 u32 card_type; 225 char model[BFA_ADAPTER_MODEL_NAME_LEN]; 226 char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN]; 227 wwn_t pwwn; 228 char node_symname[FC_SYMNAME_MAX]; 229 char hw_ver[BFA_VERSION_LEN]; 230 char fw_ver[BFA_VERSION_LEN]; 231 char optrom_ver[BFA_VERSION_LEN]; 232 char os_type[BFA_ADAPTER_OS_TYPE_LEN]; 233 struct bfa_mfg_vpd_s vpd; 234 struct mac_s mac; 235 236 u8 nports; 237 u8 max_speed; 238 u8 prototype; 239 char asic_rev; 240 241 u8 pcie_gen; 242 u8 pcie_lanes_orig; 243 u8 pcie_lanes; 244 u8 cna_capable; 245 246 u8 is_mezz; 247 u8 trunk_capable; 248 }; 249 250 /* 251 * ---------------------- IOC definitions ------------ 252 */ 253 254 enum { 255 BFA_IOC_DRIVER_LEN = 16, 256 BFA_IOC_CHIP_REV_LEN = 8, 257 }; 258 259 /* 260 * Driver and firmware versions. 261 */ 262 struct bfa_ioc_driver_attr_s { 263 char driver[BFA_IOC_DRIVER_LEN]; /* driver name */ 264 char driver_ver[BFA_VERSION_LEN]; /* driver version */ 265 char fw_ver[BFA_VERSION_LEN]; /* firmware version */ 266 char bios_ver[BFA_VERSION_LEN]; /* bios version */ 267 char efi_ver[BFA_VERSION_LEN]; /* EFI version */ 268 char ob_ver[BFA_VERSION_LEN]; /* openboot version */ 269 }; 270 271 /* 272 * IOC PCI device attributes 273 */ 274 struct bfa_ioc_pci_attr_s { 275 u16 vendor_id; /* PCI vendor ID */ 276 u16 device_id; /* PCI device ID */ 277 u16 ssid; /* subsystem ID */ 278 u16 ssvid; /* subsystem vendor ID */ 279 u32 pcifn; /* PCI device function */ 280 u32 rsvd; /* padding */ 281 char chip_rev[BFA_IOC_CHIP_REV_LEN]; /* chip revision */ 282 }; 283 284 /* 285 * IOC states 286 */ 287 enum bfa_ioc_state { 288 BFA_IOC_UNINIT = 1, /* IOC is in uninit state */ 289 BFA_IOC_RESET = 2, /* IOC is in reset state */ 290 BFA_IOC_SEMWAIT = 3, /* Waiting for IOC h/w semaphore */ 291 BFA_IOC_HWINIT = 4, /* IOC h/w is being initialized */ 292 BFA_IOC_GETATTR = 5, /* IOC is being configured */ 293 BFA_IOC_OPERATIONAL = 6, /* IOC is operational */ 294 BFA_IOC_INITFAIL = 7, /* IOC hardware failure */ 295 BFA_IOC_FAIL = 8, /* IOC heart-beat failure */ 296 BFA_IOC_DISABLING = 9, /* IOC is being disabled */ 297 BFA_IOC_DISABLED = 10, /* IOC is disabled */ 298 BFA_IOC_FWMISMATCH = 11, /* IOC f/w different from drivers */ 299 BFA_IOC_ENABLING = 12, /* IOC is being enabled */ 300 BFA_IOC_HWFAIL = 13, /* PCI mapping doesn't exist */ 301 BFA_IOC_ACQ_ADDR = 14, /* Acquiring addr from fabric */ 302 }; 303 304 /* 305 * IOC firmware stats 306 */ 307 struct bfa_fw_ioc_stats_s { 308 u32 enable_reqs; 309 u32 disable_reqs; 310 u32 get_attr_reqs; 311 u32 dbg_sync; 312 u32 dbg_dump; 313 u32 unknown_reqs; 314 }; 315 316 /* 317 * IOC driver stats 318 */ 319 struct bfa_ioc_drv_stats_s { 320 u32 ioc_isrs; 321 u32 ioc_enables; 322 u32 ioc_disables; 323 u32 ioc_hbfails; 324 u32 ioc_boots; 325 u32 stats_tmos; 326 u32 hb_count; 327 u32 disable_reqs; 328 u32 enable_reqs; 329 u32 disable_replies; 330 u32 enable_replies; 331 u32 rsvd; 332 }; 333 334 /* 335 * IOC statistics 336 */ 337 struct bfa_ioc_stats_s { 338 struct bfa_ioc_drv_stats_s drv_stats; /* driver IOC stats */ 339 struct bfa_fw_ioc_stats_s fw_stats; /* firmware IOC stats */ 340 }; 341 342 enum bfa_ioc_type_e { 343 BFA_IOC_TYPE_FC = 1, 344 BFA_IOC_TYPE_FCoE = 2, 345 BFA_IOC_TYPE_LL = 3, 346 }; 347 348 /* 349 * IOC attributes returned in queries 350 */ 351 struct bfa_ioc_attr_s { 352 enum bfa_ioc_type_e ioc_type; 353 enum bfa_ioc_state state; /* IOC state */ 354 struct bfa_adapter_attr_s adapter_attr; /* HBA attributes */ 355 struct bfa_ioc_driver_attr_s driver_attr; /* driver attr */ 356 struct bfa_ioc_pci_attr_s pci_attr; 357 u8 port_id; /* port number */ 358 u8 port_mode; /* bfa_mode_s */ 359 u8 cap_bm; /* capability */ 360 u8 port_mode_cfg; /* bfa_mode_s */ 361 u8 rsvd[4]; /* 64bit align */ 362 }; 363 364 /* 365 * AEN related definitions 366 */ 367 enum bfa_aen_category { 368 BFA_AEN_CAT_ADAPTER = 1, 369 BFA_AEN_CAT_PORT = 2, 370 BFA_AEN_CAT_LPORT = 3, 371 BFA_AEN_CAT_RPORT = 4, 372 BFA_AEN_CAT_ITNIM = 5, 373 BFA_AEN_CAT_AUDIT = 8, 374 BFA_AEN_CAT_IOC = 9, 375 }; 376 377 /* BFA adapter level events */ 378 enum bfa_adapter_aen_event { 379 BFA_ADAPTER_AEN_ADD = 1, /* New Adapter found event */ 380 BFA_ADAPTER_AEN_REMOVE = 2, /* Adapter removed event */ 381 }; 382 383 struct bfa_adapter_aen_data_s { 384 char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; 385 u32 nports; /* Number of NPorts */ 386 wwn_t pwwn; /* WWN of one of its physical port */ 387 }; 388 389 /* BFA physical port Level events */ 390 enum bfa_port_aen_event { 391 BFA_PORT_AEN_ONLINE = 1, /* Physical Port online event */ 392 BFA_PORT_AEN_OFFLINE = 2, /* Physical Port offline event */ 393 BFA_PORT_AEN_RLIR = 3, /* RLIR event, not supported */ 394 BFA_PORT_AEN_SFP_INSERT = 4, /* SFP inserted event */ 395 BFA_PORT_AEN_SFP_REMOVE = 5, /* SFP removed event */ 396 BFA_PORT_AEN_SFP_POM = 6, /* SFP POM event */ 397 BFA_PORT_AEN_ENABLE = 7, /* Physical Port enable event */ 398 BFA_PORT_AEN_DISABLE = 8, /* Physical Port disable event */ 399 BFA_PORT_AEN_AUTH_ON = 9, /* Physical Port auth success event */ 400 BFA_PORT_AEN_AUTH_OFF = 10, /* Physical Port auth fail event */ 401 BFA_PORT_AEN_DISCONNECT = 11, /* Physical Port disconnect event */ 402 BFA_PORT_AEN_QOS_NEG = 12, /* Base Port QOS negotiation event */ 403 BFA_PORT_AEN_FABRIC_NAME_CHANGE = 13, /* Fabric Name/WWN change */ 404 BFA_PORT_AEN_SFP_ACCESS_ERROR = 14, /* SFP read error event */ 405 BFA_PORT_AEN_SFP_UNSUPPORT = 15, /* Unsupported SFP event */ 406 }; 407 408 enum bfa_port_aen_sfp_pom { 409 BFA_PORT_AEN_SFP_POM_GREEN = 1, /* Normal */ 410 BFA_PORT_AEN_SFP_POM_AMBER = 2, /* Warning */ 411 BFA_PORT_AEN_SFP_POM_RED = 3, /* Critical */ 412 BFA_PORT_AEN_SFP_POM_MAX = BFA_PORT_AEN_SFP_POM_RED 413 }; 414 415 struct bfa_port_aen_data_s { 416 wwn_t pwwn; /* WWN of the physical port */ 417 wwn_t fwwn; /* WWN of the fabric port */ 418 u32 phy_port_num; /* For SFP related events */ 419 u16 ioc_type; 420 u16 level; /* Only transitions will be informed */ 421 mac_t mac; /* MAC address of the ethernet port */ 422 u16 rsvd; 423 }; 424 425 /* BFA AEN logical port events */ 426 enum bfa_lport_aen_event { 427 BFA_LPORT_AEN_NEW = 1, /* LPort created event */ 428 BFA_LPORT_AEN_DELETE = 2, /* LPort deleted event */ 429 BFA_LPORT_AEN_ONLINE = 3, /* LPort online event */ 430 BFA_LPORT_AEN_OFFLINE = 4, /* LPort offline event */ 431 BFA_LPORT_AEN_DISCONNECT = 5, /* LPort disconnect event */ 432 BFA_LPORT_AEN_NEW_PROP = 6, /* VPort created event */ 433 BFA_LPORT_AEN_DELETE_PROP = 7, /* VPort deleted event */ 434 BFA_LPORT_AEN_NEW_STANDARD = 8, /* VPort created event */ 435 BFA_LPORT_AEN_DELETE_STANDARD = 9, /* VPort deleted event */ 436 BFA_LPORT_AEN_NPIV_DUP_WWN = 10, /* VPort with duplicate WWN */ 437 BFA_LPORT_AEN_NPIV_FABRIC_MAX = 11, /* Max NPIV in fabric/fport */ 438 BFA_LPORT_AEN_NPIV_UNKNOWN = 12, /* Unknown NPIV Error code */ 439 }; 440 441 struct bfa_lport_aen_data_s { 442 u16 vf_id; /* vf_id of this logical port */ 443 u16 roles; /* Logical port mode,IM/TM/IP etc */ 444 u32 rsvd; 445 wwn_t ppwwn; /* WWN of its physical port */ 446 wwn_t lpwwn; /* WWN of this logical port */ 447 }; 448 449 /* BFA ITNIM events */ 450 enum bfa_itnim_aen_event { 451 BFA_ITNIM_AEN_ONLINE = 1, /* Target online */ 452 BFA_ITNIM_AEN_OFFLINE = 2, /* Target offline */ 453 BFA_ITNIM_AEN_DISCONNECT = 3, /* Target disconnected */ 454 }; 455 456 struct bfa_itnim_aen_data_s { 457 u16 vf_id; /* vf_id of the IT nexus */ 458 u16 rsvd[3]; 459 wwn_t ppwwn; /* WWN of its physical port */ 460 wwn_t lpwwn; /* WWN of logical port */ 461 wwn_t rpwwn; /* WWN of remote(target) port */ 462 }; 463 464 /* BFA audit events */ 465 enum bfa_audit_aen_event { 466 BFA_AUDIT_AEN_AUTH_ENABLE = 1, 467 BFA_AUDIT_AEN_AUTH_DISABLE = 2, 468 BFA_AUDIT_AEN_FLASH_ERASE = 3, 469 BFA_AUDIT_AEN_FLASH_UPDATE = 4, 470 }; 471 472 struct bfa_audit_aen_data_s { 473 wwn_t pwwn; 474 int partition_inst; 475 int partition_type; 476 }; 477 478 /* BFA IOC level events */ 479 enum bfa_ioc_aen_event { 480 BFA_IOC_AEN_HBGOOD = 1, /* Heart Beat restore event */ 481 BFA_IOC_AEN_HBFAIL = 2, /* Heart Beat failure event */ 482 BFA_IOC_AEN_ENABLE = 3, /* IOC enabled event */ 483 BFA_IOC_AEN_DISABLE = 4, /* IOC disabled event */ 484 BFA_IOC_AEN_FWMISMATCH = 5, /* IOC firmware mismatch */ 485 BFA_IOC_AEN_FWCFG_ERROR = 6, /* IOC firmware config error */ 486 BFA_IOC_AEN_INVALID_VENDOR = 7, 487 BFA_IOC_AEN_INVALID_NWWN = 8, /* Zero NWWN */ 488 BFA_IOC_AEN_INVALID_PWWN = 9 /* Zero PWWN */ 489 }; 490 491 struct bfa_ioc_aen_data_s { 492 wwn_t pwwn; 493 u16 ioc_type; 494 mac_t mac; 495 }; 496 497 /* 498 * ---------------------- mfg definitions ------------ 499 */ 500 501 /* 502 * Checksum size 503 */ 504 #define BFA_MFG_CHKSUM_SIZE 16 505 506 #define BFA_MFG_PARTNUM_SIZE 14 507 #define BFA_MFG_SUPPLIER_ID_SIZE 10 508 #define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20 509 #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20 510 #define BFA_MFG_SUPPLIER_REVISION_SIZE 4 511 /* 512 * Initial capability definition 513 */ 514 #define BFA_MFG_IC_FC 0x01 515 #define BFA_MFG_IC_ETH 0x02 516 517 /* 518 * Adapter capability mask definition 519 */ 520 #define BFA_CM_HBA 0x01 521 #define BFA_CM_CNA 0x02 522 #define BFA_CM_NIC 0x04 523 #define BFA_CM_FC16G 0x08 524 #define BFA_CM_SRIOV 0x10 525 #define BFA_CM_MEZZ 0x20 526 527 #pragma pack(1) 528 529 /* 530 * All numerical fields are in big-endian format. 531 */ 532 struct bfa_mfg_block_s { 533 u8 version; /*!< manufacturing block version */ 534 u8 mfg_sig[3]; /*!< characters 'M', 'F', 'G' */ 535 u16 mfgsize; /*!< mfg block size */ 536 u16 u16_chksum; /*!< old u16 checksum */ 537 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 538 char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)]; 539 u8 mfg_day; /*!< manufacturing day */ 540 u8 mfg_month; /*!< manufacturing month */ 541 u16 mfg_year; /*!< manufacturing year */ 542 wwn_t mfg_wwn; /*!< wwn base for this adapter */ 543 u8 num_wwn; /*!< number of wwns assigned */ 544 u8 mfg_speeds; /*!< speeds allowed for this adapter */ 545 u8 rsv[2]; 546 char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)]; 547 char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)]; 548 char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)]; 549 char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)]; 550 mac_t mfg_mac; /*!< base mac address */ 551 u8 num_mac; /*!< number of mac addresses */ 552 u8 rsv2; 553 u32 card_type; /*!< card type */ 554 char cap_nic; /*!< capability nic */ 555 char cap_cna; /*!< capability cna */ 556 char cap_hba; /*!< capability hba */ 557 char cap_fc16g; /*!< capability fc 16g */ 558 char cap_sriov; /*!< capability sriov */ 559 char cap_mezz; /*!< capability mezz */ 560 u8 rsv3; 561 u8 mfg_nports; /*!< number of ports */ 562 char media[8]; /*!< xfi/xaui */ 563 char initial_mode[8]; /*!< initial mode: hba/cna/nic */ 564 u8 rsv4[84]; 565 u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */ 566 }; 567 568 #pragma pack() 569 570 /* 571 * ---------------------- pci definitions ------------ 572 */ 573 574 /* 575 * PCI device and vendor ID information 576 */ 577 enum { 578 BFA_PCI_VENDOR_ID_BROCADE = 0x1657, 579 BFA_PCI_DEVICE_ID_FC_8G2P = 0x13, 580 BFA_PCI_DEVICE_ID_FC_8G1P = 0x17, 581 BFA_PCI_DEVICE_ID_CT = 0x14, 582 BFA_PCI_DEVICE_ID_CT_FC = 0x21, 583 BFA_PCI_DEVICE_ID_CT2 = 0x22, 584 }; 585 586 #define bfa_asic_id_cb(__d) \ 587 ((__d) == BFA_PCI_DEVICE_ID_FC_8G2P || \ 588 (__d) == BFA_PCI_DEVICE_ID_FC_8G1P) 589 #define bfa_asic_id_ct(__d) \ 590 ((__d) == BFA_PCI_DEVICE_ID_CT || \ 591 (__d) == BFA_PCI_DEVICE_ID_CT_FC) 592 #define bfa_asic_id_ct2(__d) ((__d) == BFA_PCI_DEVICE_ID_CT2) 593 #define bfa_asic_id_ctc(__d) \ 594 (bfa_asic_id_ct(__d) || bfa_asic_id_ct2(__d)) 595 596 /* 597 * PCI sub-system device and vendor ID information 598 */ 599 enum { 600 BFA_PCI_FCOE_SSDEVICE_ID = 0x14, 601 BFA_PCI_CT2_SSID_FCoE = 0x22, 602 BFA_PCI_CT2_SSID_ETH = 0x23, 603 BFA_PCI_CT2_SSID_FC = 0x24, 604 }; 605 606 /* 607 * Maximum number of device address ranges mapped through different BAR(s) 608 */ 609 #define BFA_PCI_ACCESS_RANGES 1 610 611 /* 612 * Port speed settings. Each specific speed is a bit field. Use multiple 613 * bits to specify speeds to be selected for auto-negotiation. 614 */ 615 enum bfa_port_speed { 616 BFA_PORT_SPEED_UNKNOWN = 0, 617 BFA_PORT_SPEED_1GBPS = 1, 618 BFA_PORT_SPEED_2GBPS = 2, 619 BFA_PORT_SPEED_4GBPS = 4, 620 BFA_PORT_SPEED_8GBPS = 8, 621 BFA_PORT_SPEED_10GBPS = 10, 622 BFA_PORT_SPEED_16GBPS = 16, 623 BFA_PORT_SPEED_AUTO = 0xf, 624 }; 625 #define bfa_port_speed_t enum bfa_port_speed 626 627 enum { 628 BFA_BOOT_BOOTLUN_MAX = 4, /* maximum boot lun per IOC */ 629 BFA_PREBOOT_BOOTLUN_MAX = 8, /* maximum preboot lun per IOC */ 630 }; 631 632 #define BOOT_CFG_REV1 1 633 #define BOOT_CFG_VLAN 1 634 635 /* 636 * Boot options setting. Boot options setting determines from where 637 * to get the boot lun information 638 */ 639 enum bfa_boot_bootopt { 640 BFA_BOOT_AUTO_DISCOVER = 0, /* Boot from blun provided by fabric */ 641 BFA_BOOT_STORED_BLUN = 1, /* Boot from bluns stored in flash */ 642 BFA_BOOT_FIRST_LUN = 2, /* Boot from first discovered blun */ 643 BFA_BOOT_PBC = 3, /* Boot from pbc configured blun */ 644 }; 645 646 #pragma pack(1) 647 /* 648 * Boot lun information. 649 */ 650 struct bfa_boot_bootlun_s { 651 wwn_t pwwn; /* port wwn of target */ 652 struct scsi_lun lun; /* 64-bit lun */ 653 }; 654 #pragma pack() 655 656 /* 657 * BOOT boot configuraton 658 */ 659 struct bfa_boot_cfg_s { 660 u8 version; 661 u8 rsvd1; 662 u16 chksum; 663 u8 enable; /* enable/disable SAN boot */ 664 u8 speed; /* boot speed settings */ 665 u8 topology; /* boot topology setting */ 666 u8 bootopt; /* bfa_boot_bootopt_t */ 667 u32 nbluns; /* number of boot luns */ 668 u32 rsvd2; 669 struct bfa_boot_bootlun_s blun[BFA_BOOT_BOOTLUN_MAX]; 670 struct bfa_boot_bootlun_s blun_disc[BFA_BOOT_BOOTLUN_MAX]; 671 }; 672 673 struct bfa_boot_pbc_s { 674 u8 enable; /* enable/disable SAN boot */ 675 u8 speed; /* boot speed settings */ 676 u8 topology; /* boot topology setting */ 677 u8 rsvd1; 678 u32 nbluns; /* number of boot luns */ 679 struct bfa_boot_bootlun_s pblun[BFA_PREBOOT_BOOTLUN_MAX]; 680 }; 681 682 struct bfa_ethboot_cfg_s { 683 u8 version; 684 u8 rsvd1; 685 u16 chksum; 686 u8 enable; /* enable/disable Eth/PXE boot */ 687 u8 rsvd2; 688 u16 vlan; 689 }; 690 691 /* 692 * ASIC block configuration related structures 693 */ 694 #define BFA_ABLK_MAX_PORTS 2 695 #define BFA_ABLK_MAX_PFS 16 696 #define BFA_ABLK_MAX 2 697 698 #pragma pack(1) 699 enum bfa_mode_s { 700 BFA_MODE_HBA = 1, 701 BFA_MODE_CNA = 2, 702 BFA_MODE_NIC = 3 703 }; 704 705 struct bfa_adapter_cfg_mode_s { 706 u16 max_pf; 707 u16 max_vf; 708 enum bfa_mode_s mode; 709 }; 710 711 struct bfa_ablk_cfg_pf_s { 712 u16 pers; 713 u8 port_id; 714 u8 optrom; 715 u8 valid; 716 u8 sriov; 717 u8 max_vfs; 718 u8 rsvd[1]; 719 u16 num_qpairs; 720 u16 num_vectors; 721 u32 bw; 722 }; 723 724 struct bfa_ablk_cfg_port_s { 725 u8 mode; 726 u8 type; 727 u8 max_pfs; 728 u8 rsvd[5]; 729 }; 730 731 struct bfa_ablk_cfg_inst_s { 732 u8 nports; 733 u8 max_pfs; 734 u8 rsvd[6]; 735 struct bfa_ablk_cfg_pf_s pf_cfg[BFA_ABLK_MAX_PFS]; 736 struct bfa_ablk_cfg_port_s port_cfg[BFA_ABLK_MAX_PORTS]; 737 }; 738 739 struct bfa_ablk_cfg_s { 740 struct bfa_ablk_cfg_inst_s inst[BFA_ABLK_MAX]; 741 }; 742 743 744 /* 745 * SFP module specific 746 */ 747 #define SFP_DIAGMON_SIZE 10 /* num bytes of diag monitor data */ 748 749 /* SFP state change notification event */ 750 #define BFA_SFP_SCN_REMOVED 0 751 #define BFA_SFP_SCN_INSERTED 1 752 #define BFA_SFP_SCN_POM 2 753 #define BFA_SFP_SCN_FAILED 3 754 #define BFA_SFP_SCN_UNSUPPORT 4 755 #define BFA_SFP_SCN_VALID 5 756 757 enum bfa_defs_sfp_media_e { 758 BFA_SFP_MEDIA_UNKNOWN = 0x00, 759 BFA_SFP_MEDIA_CU = 0x01, 760 BFA_SFP_MEDIA_LW = 0x02, 761 BFA_SFP_MEDIA_SW = 0x03, 762 BFA_SFP_MEDIA_EL = 0x04, 763 BFA_SFP_MEDIA_UNSUPPORT = 0x05, 764 }; 765 766 /* 767 * values for xmtr_tech above 768 */ 769 enum { 770 SFP_XMTR_TECH_CU = (1 << 0), /* copper FC-BaseT */ 771 SFP_XMTR_TECH_CP = (1 << 1), /* copper passive */ 772 SFP_XMTR_TECH_CA = (1 << 2), /* copper active */ 773 SFP_XMTR_TECH_LL = (1 << 3), /* longwave laser */ 774 SFP_XMTR_TECH_SL = (1 << 4), /* shortwave laser w/ OFC */ 775 SFP_XMTR_TECH_SN = (1 << 5), /* shortwave laser w/o OFC */ 776 SFP_XMTR_TECH_EL_INTRA = (1 << 6), /* elec intra-enclosure */ 777 SFP_XMTR_TECH_EL_INTER = (1 << 7), /* elec inter-enclosure */ 778 SFP_XMTR_TECH_LC = (1 << 8), /* longwave laser */ 779 SFP_XMTR_TECH_SA = (1 << 9) 780 }; 781 782 /* 783 * Serial ID: Data Fields -- Address A0h 784 * Basic ID field total 64 bytes 785 */ 786 struct sfp_srlid_base_s { 787 u8 id; /* 00: Identifier */ 788 u8 extid; /* 01: Extended Identifier */ 789 u8 connector; /* 02: Connector */ 790 u8 xcvr[8]; /* 03-10: Transceiver */ 791 u8 encoding; /* 11: Encoding */ 792 u8 br_norm; /* 12: BR, Nominal */ 793 u8 rate_id; /* 13: Rate Identifier */ 794 u8 len_km; /* 14: Length single mode km */ 795 u8 len_100m; /* 15: Length single mode 100m */ 796 u8 len_om2; /* 16: Length om2 fiber 10m */ 797 u8 len_om1; /* 17: Length om1 fiber 10m */ 798 u8 len_cu; /* 18: Length copper 1m */ 799 u8 len_om3; /* 19: Length om3 fiber 10m */ 800 u8 vendor_name[16];/* 20-35 */ 801 u8 unalloc1; 802 u8 vendor_oui[3]; /* 37-39 */ 803 u8 vendor_pn[16]; /* 40-55 */ 804 u8 vendor_rev[4]; /* 56-59 */ 805 u8 wavelen[2]; /* 60-61 */ 806 u8 unalloc2; 807 u8 cc_base; /* 63: check code for base id field */ 808 }; 809 810 /* 811 * Serial ID: Data Fields -- Address A0h 812 * Extended id field total 32 bytes 813 */ 814 struct sfp_srlid_ext_s { 815 u8 options[2]; 816 u8 br_max; 817 u8 br_min; 818 u8 vendor_sn[16]; 819 u8 date_code[8]; 820 u8 diag_mon_type; /* 92: Diagnostic Monitoring type */ 821 u8 en_options; 822 u8 sff_8472; 823 u8 cc_ext; 824 }; 825 826 /* 827 * Diagnostic: Data Fields -- Address A2h 828 * Diagnostic and control/status base field total 96 bytes 829 */ 830 struct sfp_diag_base_s { 831 /* 832 * Alarm and warning Thresholds 40 bytes 833 */ 834 u8 temp_high_alarm[2]; /* 00-01 */ 835 u8 temp_low_alarm[2]; /* 02-03 */ 836 u8 temp_high_warning[2]; /* 04-05 */ 837 u8 temp_low_warning[2]; /* 06-07 */ 838 839 u8 volt_high_alarm[2]; /* 08-09 */ 840 u8 volt_low_alarm[2]; /* 10-11 */ 841 u8 volt_high_warning[2]; /* 12-13 */ 842 u8 volt_low_warning[2]; /* 14-15 */ 843 844 u8 bias_high_alarm[2]; /* 16-17 */ 845 u8 bias_low_alarm[2]; /* 18-19 */ 846 u8 bias_high_warning[2]; /* 20-21 */ 847 u8 bias_low_warning[2]; /* 22-23 */ 848 849 u8 tx_pwr_high_alarm[2]; /* 24-25 */ 850 u8 tx_pwr_low_alarm[2]; /* 26-27 */ 851 u8 tx_pwr_high_warning[2]; /* 28-29 */ 852 u8 tx_pwr_low_warning[2]; /* 30-31 */ 853 854 u8 rx_pwr_high_alarm[2]; /* 32-33 */ 855 u8 rx_pwr_low_alarm[2]; /* 34-35 */ 856 u8 rx_pwr_high_warning[2]; /* 36-37 */ 857 u8 rx_pwr_low_warning[2]; /* 38-39 */ 858 859 u8 unallocate_1[16]; 860 861 /* 862 * ext_cal_const[36] 863 */ 864 u8 rx_pwr[20]; 865 u8 tx_i[4]; 866 u8 tx_pwr[4]; 867 u8 temp[4]; 868 u8 volt[4]; 869 u8 unallocate_2[3]; 870 u8 cc_dmi; 871 }; 872 873 /* 874 * Diagnostic: Data Fields -- Address A2h 875 * Diagnostic and control/status extended field total 24 bytes 876 */ 877 struct sfp_diag_ext_s { 878 u8 diag[SFP_DIAGMON_SIZE]; 879 u8 unalloc1[4]; 880 u8 status_ctl; 881 u8 rsvd; 882 u8 alarm_flags[2]; 883 u8 unalloc2[2]; 884 u8 warning_flags[2]; 885 u8 ext_status_ctl[2]; 886 }; 887 888 struct sfp_mem_s { 889 struct sfp_srlid_base_s srlid_base; 890 struct sfp_srlid_ext_s srlid_ext; 891 struct sfp_diag_base_s diag_base; 892 struct sfp_diag_ext_s diag_ext; 893 }; 894 895 /* 896 * transceiver codes (SFF-8472 Rev 10.2 Table 3.5) 897 */ 898 union sfp_xcvr_e10g_code_u { 899 u8 b; 900 struct { 901 #ifdef __BIGENDIAN 902 u8 e10g_unall:1; /* 10G Ethernet compliance */ 903 u8 e10g_lrm:1; 904 u8 e10g_lr:1; 905 u8 e10g_sr:1; 906 u8 ib_sx:1; /* Infiniband compliance */ 907 u8 ib_lx:1; 908 u8 ib_cu_a:1; 909 u8 ib_cu_p:1; 910 #else 911 u8 ib_cu_p:1; 912 u8 ib_cu_a:1; 913 u8 ib_lx:1; 914 u8 ib_sx:1; /* Infiniband compliance */ 915 u8 e10g_sr:1; 916 u8 e10g_lr:1; 917 u8 e10g_lrm:1; 918 u8 e10g_unall:1; /* 10G Ethernet compliance */ 919 #endif 920 } r; 921 }; 922 923 union sfp_xcvr_so1_code_u { 924 u8 b; 925 struct { 926 u8 escon:2; /* ESCON compliance code */ 927 u8 oc192_reach:1; /* SONET compliance code */ 928 u8 so_reach:2; 929 u8 oc48_reach:3; 930 } r; 931 }; 932 933 union sfp_xcvr_so2_code_u { 934 u8 b; 935 struct { 936 u8 reserved:1; 937 u8 oc12_reach:3; /* OC12 reach */ 938 u8 reserved1:1; 939 u8 oc3_reach:3; /* OC3 reach */ 940 } r; 941 }; 942 943 union sfp_xcvr_eth_code_u { 944 u8 b; 945 struct { 946 u8 base_px:1; 947 u8 base_bx10:1; 948 u8 e100base_fx:1; 949 u8 e100base_lx:1; 950 u8 e1000base_t:1; 951 u8 e1000base_cx:1; 952 u8 e1000base_lx:1; 953 u8 e1000base_sx:1; 954 } r; 955 }; 956 957 struct sfp_xcvr_fc1_code_s { 958 u8 link_len:5; /* FC link length */ 959 u8 xmtr_tech2:3; 960 u8 xmtr_tech1:7; /* FC transmitter technology */ 961 u8 reserved1:1; 962 }; 963 964 union sfp_xcvr_fc2_code_u { 965 u8 b; 966 struct { 967 u8 tw_media:1; /* twin axial pair (tw) */ 968 u8 tp_media:1; /* shielded twisted pair (sp) */ 969 u8 mi_media:1; /* miniature coax (mi) */ 970 u8 tv_media:1; /* video coax (tv) */ 971 u8 m6_media:1; /* multimode, 62.5m (m6) */ 972 u8 m5_media:1; /* multimode, 50m (m5) */ 973 u8 reserved:1; 974 u8 sm_media:1; /* single mode (sm) */ 975 } r; 976 }; 977 978 union sfp_xcvr_fc3_code_u { 979 u8 b; 980 struct { 981 #ifdef __BIGENDIAN 982 u8 rsv4:1; 983 u8 mb800:1; /* 800 Mbytes/sec */ 984 u8 mb1600:1; /* 1600 Mbytes/sec */ 985 u8 mb400:1; /* 400 Mbytes/sec */ 986 u8 rsv2:1; 987 u8 mb200:1; /* 200 Mbytes/sec */ 988 u8 rsv1:1; 989 u8 mb100:1; /* 100 Mbytes/sec */ 990 #else 991 u8 mb100:1; /* 100 Mbytes/sec */ 992 u8 rsv1:1; 993 u8 mb200:1; /* 200 Mbytes/sec */ 994 u8 rsv2:1; 995 u8 mb400:1; /* 400 Mbytes/sec */ 996 u8 mb1600:1; /* 1600 Mbytes/sec */ 997 u8 mb800:1; /* 800 Mbytes/sec */ 998 u8 rsv4:1; 999 #endif 1000 } r; 1001 }; 1002 1003 struct sfp_xcvr_s { 1004 union sfp_xcvr_e10g_code_u e10g; 1005 union sfp_xcvr_so1_code_u so1; 1006 union sfp_xcvr_so2_code_u so2; 1007 union sfp_xcvr_eth_code_u eth; 1008 struct sfp_xcvr_fc1_code_s fc1; 1009 union sfp_xcvr_fc2_code_u fc2; 1010 union sfp_xcvr_fc3_code_u fc3; 1011 }; 1012 1013 /* 1014 * Flash module specific 1015 */ 1016 #define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */ 1017 #define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */ 1018 1019 enum bfa_flash_part_type { 1020 BFA_FLASH_PART_OPTROM = 1, /* option rom partition */ 1021 BFA_FLASH_PART_FWIMG = 2, /* firmware image partition */ 1022 BFA_FLASH_PART_FWCFG = 3, /* firmware tuneable config */ 1023 BFA_FLASH_PART_DRV = 4, /* IOC driver config */ 1024 BFA_FLASH_PART_BOOT = 5, /* boot config */ 1025 BFA_FLASH_PART_ASIC = 6, /* asic bootstrap configuration */ 1026 BFA_FLASH_PART_MFG = 7, /* manufacturing block partition */ 1027 BFA_FLASH_PART_OPTROM2 = 8, /* 2nd option rom partition */ 1028 BFA_FLASH_PART_VPD = 9, /* vpd data of OEM info */ 1029 BFA_FLASH_PART_PBC = 10, /* pre-boot config */ 1030 BFA_FLASH_PART_BOOTOVL = 11, /* boot overlay partition */ 1031 BFA_FLASH_PART_LOG = 12, /* firmware log partition */ 1032 BFA_FLASH_PART_PXECFG = 13, /* pxe boot config partition */ 1033 BFA_FLASH_PART_PXEOVL = 14, /* pxe boot overlay partition */ 1034 BFA_FLASH_PART_PORTCFG = 15, /* port cfg partition */ 1035 BFA_FLASH_PART_ASICBK = 16, /* asic backup partition */ 1036 }; 1037 1038 /* 1039 * flash partition attributes 1040 */ 1041 struct bfa_flash_part_attr_s { 1042 u32 part_type; /* partition type */ 1043 u32 part_instance; /* partition instance */ 1044 u32 part_off; /* partition offset */ 1045 u32 part_size; /* partition size */ 1046 u32 part_len; /* partition content length */ 1047 u32 part_status; /* partition status */ 1048 char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24]; 1049 }; 1050 1051 /* 1052 * flash attributes 1053 */ 1054 struct bfa_flash_attr_s { 1055 u32 status; /* flash overall status */ 1056 u32 npart; /* num of partitions */ 1057 struct bfa_flash_part_attr_s part[BFA_FLASH_PART_MAX]; 1058 }; 1059 1060 /* 1061 * DIAG module specific 1062 */ 1063 #define LB_PATTERN_DEFAULT 0xB5B5B5B5 1064 #define QTEST_CNT_DEFAULT 10 1065 #define QTEST_PAT_DEFAULT LB_PATTERN_DEFAULT 1066 1067 struct bfa_diag_memtest_s { 1068 u8 algo; 1069 u8 rsvd[7]; 1070 }; 1071 1072 struct bfa_diag_memtest_result { 1073 u32 status; 1074 u32 addr; 1075 u32 exp; /* expect value read from reg */ 1076 u32 act; /* actually value read */ 1077 u32 err_status; /* error status reg */ 1078 u32 err_status1; /* extra error info reg */ 1079 u32 err_addr; /* error address reg */ 1080 u8 algo; 1081 u8 rsv[3]; 1082 }; 1083 1084 struct bfa_diag_loopback_result_s { 1085 u32 numtxmfrm; /* no. of transmit frame */ 1086 u32 numosffrm; /* no. of outstanding frame */ 1087 u32 numrcvfrm; /* no. of received good frame */ 1088 u32 badfrminf; /* mis-match info */ 1089 u32 badfrmnum; /* mis-match fram number */ 1090 u8 status; /* loopback test result */ 1091 u8 rsvd[3]; 1092 }; 1093 1094 struct bfa_diag_ledtest_s { 1095 u32 cmd; /* bfa_led_op_t */ 1096 u32 color; /* bfa_led_color_t */ 1097 u16 freq; /* no. of blinks every 10 secs */ 1098 u8 led; /* bitmap of LEDs to be tested */ 1099 u8 rsvd[5]; 1100 }; 1101 1102 struct bfa_diag_loopback_s { 1103 u32 loopcnt; 1104 u32 pattern; 1105 u8 lb_mode; /* bfa_port_opmode_t */ 1106 u8 speed; /* bfa_port_speed_t */ 1107 u8 rsvd[2]; 1108 }; 1109 1110 /* 1111 * PHY module specific 1112 */ 1113 enum bfa_phy_status_e { 1114 BFA_PHY_STATUS_GOOD = 0, /* phy is good */ 1115 BFA_PHY_STATUS_NOT_PRESENT = 1, /* phy does not exist */ 1116 BFA_PHY_STATUS_BAD = 2, /* phy is bad */ 1117 }; 1118 1119 /* 1120 * phy attributes for phy query 1121 */ 1122 struct bfa_phy_attr_s { 1123 u32 status; /* phy present/absent status */ 1124 u32 length; /* firmware length */ 1125 u32 fw_ver; /* firmware version */ 1126 u32 an_status; /* AN status */ 1127 u32 pma_pmd_status; /* PMA/PMD link status */ 1128 u32 pma_pmd_signal; /* PMA/PMD signal detect */ 1129 u32 pcs_status; /* PCS link status */ 1130 }; 1131 1132 /* 1133 * phy stats 1134 */ 1135 struct bfa_phy_stats_s { 1136 u32 status; /* phy stats status */ 1137 u32 link_breaks; /* Num of link breaks after linkup */ 1138 u32 pma_pmd_fault; /* NPMA/PMD fault */ 1139 u32 pcs_fault; /* PCS fault */ 1140 u32 speed_neg; /* Num of speed negotiation */ 1141 u32 tx_eq_training; /* Num of TX EQ training */ 1142 u32 tx_eq_timeout; /* Num of TX EQ timeout */ 1143 u32 crc_error; /* Num of CRC errors */ 1144 }; 1145 1146 #pragma pack() 1147 1148 #endif /* __BFA_DEFS_H__ */ 1149