1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 21da177e4SLinus Torvalds /************************************************************************/ 31da177e4SLinus Torvalds /* */ 41da177e4SLinus Torvalds /* dc395x.h */ 51da177e4SLinus Torvalds /* */ 61da177e4SLinus Torvalds /* Device Driver for Tekram DC395(U/UW/F), DC315(U) */ 71da177e4SLinus Torvalds /* PCI SCSI Bus Master Host Adapter */ 81da177e4SLinus Torvalds /* (SCSI chip set used Tekram ASIC TRM-S1040) */ 91da177e4SLinus Torvalds /* */ 101da177e4SLinus Torvalds /************************************************************************/ 111da177e4SLinus Torvalds #ifndef DC395x_H 121da177e4SLinus Torvalds #define DC395x_H 131da177e4SLinus Torvalds 141da177e4SLinus Torvalds /************************************************************************/ 151da177e4SLinus Torvalds /* */ 161da177e4SLinus Torvalds /* Initial values */ 171da177e4SLinus Torvalds /* */ 181da177e4SLinus Torvalds /************************************************************************/ 191da177e4SLinus Torvalds #define DC395x_MAX_CMD_QUEUE 32 201da177e4SLinus Torvalds /* #define DC395x_MAX_QTAGS 32 */ 211da177e4SLinus Torvalds #define DC395x_MAX_QTAGS 16 221da177e4SLinus Torvalds #define DC395x_MAX_SCSI_ID 16 231da177e4SLinus Torvalds #define DC395x_MAX_CMD_PER_LUN DC395x_MAX_QTAGS 241da177e4SLinus Torvalds #define DC395x_MAX_SG_TABLESIZE 64 /* HW limitation */ 251da177e4SLinus Torvalds #define DC395x_MAX_SG_LISTENTRY 64 /* Must be equal or lower to previous */ 261da177e4SLinus Torvalds /* item */ 271da177e4SLinus Torvalds #define DC395x_MAX_SRB_CNT 63 281da177e4SLinus Torvalds /* #define DC395x_MAX_CAN_QUEUE 7 * DC395x_MAX_QTAGS */ 291da177e4SLinus Torvalds #define DC395x_MAX_CAN_QUEUE DC395x_MAX_SRB_CNT 301da177e4SLinus Torvalds #define DC395x_END_SCAN 2 311da177e4SLinus Torvalds #define DC395x_SEL_TIMEOUT 153 /* 250 ms selection timeout (@ 40 MHz) */ 321da177e4SLinus Torvalds #define DC395x_MAX_RETRIES 3 331da177e4SLinus Torvalds 341da177e4SLinus Torvalds #if 0 351da177e4SLinus Torvalds #define SYNC_FIRST 361da177e4SLinus Torvalds #endif 371da177e4SLinus Torvalds 381da177e4SLinus Torvalds #define NORM_REC_LVL 0 391da177e4SLinus Torvalds 401da177e4SLinus Torvalds /************************************************************************/ 411da177e4SLinus Torvalds /* */ 421da177e4SLinus Torvalds /* Various definitions */ 431da177e4SLinus Torvalds /* */ 441da177e4SLinus Torvalds /************************************************************************/ 451da177e4SLinus Torvalds #define BIT31 0x80000000 461da177e4SLinus Torvalds #define BIT30 0x40000000 471da177e4SLinus Torvalds #define BIT29 0x20000000 481da177e4SLinus Torvalds #define BIT28 0x10000000 491da177e4SLinus Torvalds #define BIT27 0x08000000 501da177e4SLinus Torvalds #define BIT26 0x04000000 511da177e4SLinus Torvalds #define BIT25 0x02000000 521da177e4SLinus Torvalds #define BIT24 0x01000000 531da177e4SLinus Torvalds #define BIT23 0x00800000 541da177e4SLinus Torvalds #define BIT22 0x00400000 551da177e4SLinus Torvalds #define BIT21 0x00200000 561da177e4SLinus Torvalds #define BIT20 0x00100000 571da177e4SLinus Torvalds #define BIT19 0x00080000 581da177e4SLinus Torvalds #define BIT18 0x00040000 591da177e4SLinus Torvalds #define BIT17 0x00020000 601da177e4SLinus Torvalds #define BIT16 0x00010000 611da177e4SLinus Torvalds #define BIT15 0x00008000 621da177e4SLinus Torvalds #define BIT14 0x00004000 631da177e4SLinus Torvalds #define BIT13 0x00002000 641da177e4SLinus Torvalds #define BIT12 0x00001000 651da177e4SLinus Torvalds #define BIT11 0x00000800 661da177e4SLinus Torvalds #define BIT10 0x00000400 671da177e4SLinus Torvalds #define BIT9 0x00000200 681da177e4SLinus Torvalds #define BIT8 0x00000100 691da177e4SLinus Torvalds #define BIT7 0x00000080 701da177e4SLinus Torvalds #define BIT6 0x00000040 711da177e4SLinus Torvalds #define BIT5 0x00000020 721da177e4SLinus Torvalds #define BIT4 0x00000010 731da177e4SLinus Torvalds #define BIT3 0x00000008 741da177e4SLinus Torvalds #define BIT2 0x00000004 751da177e4SLinus Torvalds #define BIT1 0x00000002 761da177e4SLinus Torvalds #define BIT0 0x00000001 771da177e4SLinus Torvalds 781da177e4SLinus Torvalds /* UnitCtrlFlag */ 791da177e4SLinus Torvalds #define UNIT_ALLOCATED BIT0 801da177e4SLinus Torvalds #define UNIT_INFO_CHANGED BIT1 811da177e4SLinus Torvalds #define FORMATING_MEDIA BIT2 821da177e4SLinus Torvalds #define UNIT_RETRY BIT3 831da177e4SLinus Torvalds 841da177e4SLinus Torvalds /* UnitFlags */ 851da177e4SLinus Torvalds #define DASD_SUPPORT BIT0 861da177e4SLinus Torvalds #define SCSI_SUPPORT BIT1 871da177e4SLinus Torvalds #define ASPI_SUPPORT BIT2 881da177e4SLinus Torvalds 891da177e4SLinus Torvalds /* SRBState machine definition */ 901da177e4SLinus Torvalds #define SRB_FREE 0x0000 911da177e4SLinus Torvalds #define SRB_WAIT 0x0001 921da177e4SLinus Torvalds #define SRB_READY 0x0002 931da177e4SLinus Torvalds #define SRB_MSGOUT 0x0004 /* arbitration+msg_out 1st byte */ 941da177e4SLinus Torvalds #define SRB_MSGIN 0x0008 951da177e4SLinus Torvalds #define SRB_EXTEND_MSGIN 0x0010 961da177e4SLinus Torvalds #define SRB_COMMAND 0x0020 971da177e4SLinus Torvalds #define SRB_START_ 0x0040 /* arbitration+msg_out+command_out */ 981da177e4SLinus Torvalds #define SRB_DISCONNECT 0x0080 991da177e4SLinus Torvalds #define SRB_DATA_XFER 0x0100 1001da177e4SLinus Torvalds #define SRB_XFERPAD 0x0200 1011da177e4SLinus Torvalds #define SRB_STATUS 0x0400 1021da177e4SLinus Torvalds #define SRB_COMPLETED 0x0800 1031da177e4SLinus Torvalds #define SRB_ABORT_SENT 0x1000 1041da177e4SLinus Torvalds #define SRB_DO_SYNC_NEGO 0x2000 1051da177e4SLinus Torvalds #define SRB_DO_WIDE_NEGO 0x4000 1061da177e4SLinus Torvalds #define SRB_UNEXPECT_RESEL 0x8000 1071da177e4SLinus Torvalds 1081da177e4SLinus Torvalds /************************************************************************/ 1091da177e4SLinus Torvalds /* */ 1101da177e4SLinus Torvalds /* ACB Config */ 1111da177e4SLinus Torvalds /* */ 1121da177e4SLinus Torvalds /************************************************************************/ 1131da177e4SLinus Torvalds #define HCC_WIDE_CARD 0x20 1141da177e4SLinus Torvalds #define HCC_SCSI_RESET 0x10 1151da177e4SLinus Torvalds #define HCC_PARITY 0x08 1161da177e4SLinus Torvalds #define HCC_AUTOTERM 0x04 1171da177e4SLinus Torvalds #define HCC_LOW8TERM 0x02 1181da177e4SLinus Torvalds #define HCC_UP8TERM 0x01 1191da177e4SLinus Torvalds 1201da177e4SLinus Torvalds /* ACBFlag */ 1211da177e4SLinus Torvalds #define RESET_DEV BIT0 1221da177e4SLinus Torvalds #define RESET_DETECT BIT1 1231da177e4SLinus Torvalds #define RESET_DONE BIT2 1241da177e4SLinus Torvalds 1251da177e4SLinus Torvalds /* DCBFlag */ 1261da177e4SLinus Torvalds #define ABORT_DEV_ BIT0 1271da177e4SLinus Torvalds 1281da177e4SLinus Torvalds /* SRBstatus */ 1291da177e4SLinus Torvalds #define SRB_OK BIT0 1301da177e4SLinus Torvalds #define ABORTION BIT1 1311da177e4SLinus Torvalds #define OVER_RUN BIT2 1321da177e4SLinus Torvalds #define UNDER_RUN BIT3 1331da177e4SLinus Torvalds #define PARITY_ERROR BIT4 1341da177e4SLinus Torvalds #define SRB_ERROR BIT5 1351da177e4SLinus Torvalds 1361da177e4SLinus Torvalds /* SRBFlag */ 1371da177e4SLinus Torvalds #define DATAOUT BIT7 1381da177e4SLinus Torvalds #define DATAIN BIT6 1391da177e4SLinus Torvalds #define RESIDUAL_VALID BIT5 1401da177e4SLinus Torvalds #define ENABLE_TIMER BIT4 1411da177e4SLinus Torvalds #define RESET_DEV0 BIT2 1421da177e4SLinus Torvalds #define ABORT_DEV BIT1 1431da177e4SLinus Torvalds #define AUTO_REQSENSE BIT0 1441da177e4SLinus Torvalds 1451da177e4SLinus Torvalds /* Adapter status */ 1461da177e4SLinus Torvalds #define H_STATUS_GOOD 0 1471da177e4SLinus Torvalds #define H_SEL_TIMEOUT 0x11 1481da177e4SLinus Torvalds #define H_OVER_UNDER_RUN 0x12 1491da177e4SLinus Torvalds #define H_UNEXP_BUS_FREE 0x13 1501da177e4SLinus Torvalds #define H_TARGET_PHASE_F 0x14 1511da177e4SLinus Torvalds #define H_INVALID_CCB_OP 0x16 1521da177e4SLinus Torvalds #define H_LINK_CCB_BAD 0x17 1531da177e4SLinus Torvalds #define H_BAD_TARGET_DIR 0x18 1541da177e4SLinus Torvalds #define H_DUPLICATE_CCB 0x19 1551da177e4SLinus Torvalds #define H_BAD_CCB_OR_SG 0x1A 1561da177e4SLinus Torvalds #define H_ABORT 0x0FF 1571da177e4SLinus Torvalds 1581da177e4SLinus Torvalds /* SCSI BUS Status byte codes */ 1591da177e4SLinus Torvalds #define SCSI_STAT_UNEXP_BUS_F 0xFD /* Unexpect Bus Free */ 1601da177e4SLinus Torvalds #define SCSI_STAT_BUS_RST_DETECT 0xFE /* Scsi Bus Reset detected */ 1611da177e4SLinus Torvalds #define SCSI_STAT_SEL_TIMEOUT 0xFF /* Selection Time out */ 1621da177e4SLinus Torvalds 1631da177e4SLinus Torvalds /* Sync_Mode */ 1641da177e4SLinus Torvalds #define SYNC_WIDE_TAG_ATNT_DISABLE 0 1651da177e4SLinus Torvalds #define SYNC_NEGO_ENABLE BIT0 1661da177e4SLinus Torvalds #define SYNC_NEGO_DONE BIT1 1671da177e4SLinus Torvalds #define WIDE_NEGO_ENABLE BIT2 1681da177e4SLinus Torvalds #define WIDE_NEGO_DONE BIT3 1691da177e4SLinus Torvalds #define WIDE_NEGO_STATE BIT4 1701da177e4SLinus Torvalds #define EN_TAG_QUEUEING BIT5 1711da177e4SLinus Torvalds #define EN_ATN_STOP BIT6 1721da177e4SLinus Torvalds 1731da177e4SLinus Torvalds #define SYNC_NEGO_OFFSET 15 1741da177e4SLinus Torvalds 1751da177e4SLinus Torvalds /* cmd->result */ 1761da177e4SLinus Torvalds #define STATUS_MASK_ 0xFF 1771da177e4SLinus Torvalds #define MSG_MASK 0xFF00 1781da177e4SLinus Torvalds #define RETURN_MASK 0xFF0000 1791da177e4SLinus Torvalds 1801da177e4SLinus Torvalds /************************************************************************/ 1811da177e4SLinus Torvalds /* */ 1821da177e4SLinus Torvalds /* Inquiry Data format */ 1831da177e4SLinus Torvalds /* */ 1841da177e4SLinus Torvalds /************************************************************************/ 1851da177e4SLinus Torvalds struct ScsiInqData 1861da177e4SLinus Torvalds { /* INQ */ 1871da177e4SLinus Torvalds u8 DevType; /* Periph Qualifier & Periph Dev Type */ 1881da177e4SLinus Torvalds u8 RMB_TypeMod; /* rem media bit & Dev Type Modifier */ 1891da177e4SLinus Torvalds u8 Vers; /* ISO, ECMA, & ANSI versions */ 1901da177e4SLinus Torvalds u8 RDF; /* AEN, TRMIOP, & response data format */ 1911da177e4SLinus Torvalds u8 AddLen; /* length of additional data */ 1921da177e4SLinus Torvalds u8 Res1; /* reserved */ 1931da177e4SLinus Torvalds u8 Res2; /* reserved */ 1941da177e4SLinus Torvalds u8 Flags; /* RelADr, Wbus32, Wbus16, Sync, etc. */ 1951da177e4SLinus Torvalds u8 VendorID[8]; /* Vendor Identification */ 1961da177e4SLinus Torvalds u8 ProductID[16]; /* Product Identification */ 1971da177e4SLinus Torvalds u8 ProductRev[4]; /* Product Revision */ 1981da177e4SLinus Torvalds }; 1991da177e4SLinus Torvalds 2001da177e4SLinus Torvalds /* Inquiry byte 0 masks */ 2011da177e4SLinus Torvalds #define SCSI_DEVTYPE 0x1F /* Peripheral Device Type */ 2021da177e4SLinus Torvalds #define SCSI_PERIPHQUAL 0xE0 /* Peripheral Qualifier */ 2031da177e4SLinus Torvalds /* Inquiry byte 1 mask */ 2041da177e4SLinus Torvalds #define SCSI_REMOVABLE_MEDIA 0x80 /* Removable Media bit (1=removable) */ 2051da177e4SLinus Torvalds /* Peripheral Device Type definitions */ 2061da177e4SLinus Torvalds /* See include/scsi/scsi.h */ 2071da177e4SLinus Torvalds #define TYPE_NODEV SCSI_DEVTYPE /* Unknown or no device type */ 2081da177e4SLinus Torvalds #ifndef TYPE_PRINTER /* */ 2091da177e4SLinus Torvalds # define TYPE_PRINTER 0x02 /* Printer device */ 2101da177e4SLinus Torvalds #endif /* */ 2111da177e4SLinus Torvalds #ifndef TYPE_COMM /* */ 2121da177e4SLinus Torvalds # define TYPE_COMM 0x09 /* Communications device */ 2131da177e4SLinus Torvalds #endif 2141da177e4SLinus Torvalds 2151da177e4SLinus Torvalds /************************************************************************/ 2161da177e4SLinus Torvalds /* */ 2171da177e4SLinus Torvalds /* Inquiry flag definitions (Inq data byte 7) */ 2181da177e4SLinus Torvalds /* */ 2191da177e4SLinus Torvalds /************************************************************************/ 2201da177e4SLinus Torvalds #define SCSI_INQ_RELADR 0x80 /* device supports relative addressing */ 2211da177e4SLinus Torvalds #define SCSI_INQ_WBUS32 0x40 /* device supports 32 bit data xfers */ 2221da177e4SLinus Torvalds #define SCSI_INQ_WBUS16 0x20 /* device supports 16 bit data xfers */ 2231da177e4SLinus Torvalds #define SCSI_INQ_SYNC 0x10 /* device supports synchronous xfer */ 2241da177e4SLinus Torvalds #define SCSI_INQ_LINKED 0x08 /* device supports linked commands */ 2251da177e4SLinus Torvalds #define SCSI_INQ_CMDQUEUE 0x02 /* device supports command queueing */ 2261da177e4SLinus Torvalds #define SCSI_INQ_SFTRE 0x01 /* device supports soft resets */ 2271da177e4SLinus Torvalds 2281da177e4SLinus Torvalds #define ENABLE_CE 1 2291da177e4SLinus Torvalds #define DISABLE_CE 0 2301da177e4SLinus Torvalds #define EEPROM_READ 0x80 2311da177e4SLinus Torvalds 2321da177e4SLinus Torvalds /************************************************************************/ 2331da177e4SLinus Torvalds /* */ 2341da177e4SLinus Torvalds /* The PCI configuration register offset for TRM_S1040 */ 2351da177e4SLinus Torvalds /* */ 2361da177e4SLinus Torvalds /************************************************************************/ 2371da177e4SLinus Torvalds #define TRM_S1040_ID 0x00 /* Vendor and Device ID */ 2381da177e4SLinus Torvalds #define TRM_S1040_COMMAND 0x04 /* PCI command register */ 2391da177e4SLinus Torvalds #define TRM_S1040_IOBASE 0x10 /* I/O Space base address */ 2401da177e4SLinus Torvalds #define TRM_S1040_ROMBASE 0x30 /* Expansion ROM Base Address */ 2411da177e4SLinus Torvalds #define TRM_S1040_INTLINE 0x3C /* Interrupt line */ 2421da177e4SLinus Torvalds 2431da177e4SLinus Torvalds /************************************************************************/ 2441da177e4SLinus Torvalds /* */ 2451da177e4SLinus Torvalds /* The SCSI register offset for TRM_S1040 */ 2461da177e4SLinus Torvalds /* */ 2471da177e4SLinus Torvalds /************************************************************************/ 2481da177e4SLinus Torvalds #define TRM_S1040_SCSI_STATUS 0x80 /* SCSI Status (R) */ 2491da177e4SLinus Torvalds #define COMMANDPHASEDONE 0x2000 /* SCSI command phase done */ 2501da177e4SLinus Torvalds #define SCSIXFERDONE 0x0800 /* SCSI SCSI transfer done */ 2511da177e4SLinus Torvalds #define SCSIXFERCNT_2_ZERO 0x0100 /* SCSI SCSI transfer count to zero */ 2521da177e4SLinus Torvalds #define SCSIINTERRUPT 0x0080 /* SCSI interrupt pending */ 2531da177e4SLinus Torvalds #define COMMANDABORT 0x0040 /* SCSI command abort */ 2541da177e4SLinus Torvalds #define SEQUENCERACTIVE 0x0020 /* SCSI sequencer active */ 2551da177e4SLinus Torvalds #define PHASEMISMATCH 0x0010 /* SCSI phase mismatch */ 2561da177e4SLinus Torvalds #define PARITYERROR 0x0008 /* SCSI parity error */ 2571da177e4SLinus Torvalds 2581da177e4SLinus Torvalds #define PHASEMASK 0x0007 /* Phase MSG/CD/IO */ 2591da177e4SLinus Torvalds #define PH_DATA_OUT 0x00 /* Data out phase */ 2601da177e4SLinus Torvalds #define PH_DATA_IN 0x01 /* Data in phase */ 2611da177e4SLinus Torvalds #define PH_COMMAND 0x02 /* Command phase */ 2621da177e4SLinus Torvalds #define PH_STATUS 0x03 /* Status phase */ 2631da177e4SLinus Torvalds #define PH_BUS_FREE 0x05 /* Invalid phase used as bus free */ 2641da177e4SLinus Torvalds #define PH_MSG_OUT 0x06 /* Message out phase */ 2651da177e4SLinus Torvalds #define PH_MSG_IN 0x07 /* Message in phase */ 2661da177e4SLinus Torvalds 2671da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONTROL 0x80 /* SCSI Control (W) */ 2681da177e4SLinus Torvalds #define DO_CLRATN 0x0400 /* Clear ATN */ 2691da177e4SLinus Torvalds #define DO_SETATN 0x0200 /* Set ATN */ 2701da177e4SLinus Torvalds #define DO_CMDABORT 0x0100 /* Abort SCSI command */ 2711da177e4SLinus Torvalds #define DO_RSTMODULE 0x0010 /* Reset SCSI chip */ 2721da177e4SLinus Torvalds #define DO_RSTSCSI 0x0008 /* Reset SCSI bus */ 2731da177e4SLinus Torvalds #define DO_CLRFIFO 0x0004 /* Clear SCSI transfer FIFO */ 2741da177e4SLinus Torvalds #define DO_DATALATCH 0x0002 /* Enable SCSI bus data input (latched) */ 2751da177e4SLinus Torvalds /* #define DO_DATALATCH 0x0000 */ /* KG: DISable SCSI bus data latch */ 2761da177e4SLinus Torvalds #define DO_HWRESELECT 0x0001 /* Enable hardware reselection */ 2771da177e4SLinus Torvalds 2781da177e4SLinus Torvalds #define TRM_S1040_SCSI_FIFOCNT 0x82 /* SCSI FIFO Counter 5bits(R) */ 2791da177e4SLinus Torvalds #define TRM_S1040_SCSI_SIGNAL 0x83 /* SCSI low level signal (R/W) */ 2801da177e4SLinus Torvalds 2811da177e4SLinus Torvalds #define TRM_S1040_SCSI_INTSTATUS 0x84 /* SCSI Interrupt Status (R) */ 2821da177e4SLinus Torvalds #define INT_SCAM 0x80 /* SCAM selection interrupt */ 2831da177e4SLinus Torvalds #define INT_SELECT 0x40 /* Selection interrupt */ 2841da177e4SLinus Torvalds #define INT_SELTIMEOUT 0x20 /* Selection timeout interrupt */ 2851da177e4SLinus Torvalds #define INT_DISCONNECT 0x10 /* Bus disconnected interrupt */ 2861da177e4SLinus Torvalds #define INT_RESELECTED 0x08 /* Reselected interrupt */ 2871da177e4SLinus Torvalds #define INT_SCSIRESET 0x04 /* SCSI reset detected interrupt */ 2881da177e4SLinus Torvalds #define INT_BUSSERVICE 0x02 /* Bus service interrupt */ 2891da177e4SLinus Torvalds #define INT_CMDDONE 0x01 /* SCSI command done interrupt */ 2901da177e4SLinus Torvalds 2911da177e4SLinus Torvalds #define TRM_S1040_SCSI_OFFSET 0x84 /* SCSI Offset Count (W) */ 2921da177e4SLinus Torvalds 2931da177e4SLinus Torvalds /************************************************************************/ 2941da177e4SLinus Torvalds /* */ 2951da177e4SLinus Torvalds /* Bit Name Definition */ 2961da177e4SLinus Torvalds /* --------- ------------- ---------------------------- */ 2971da177e4SLinus Torvalds /* 07-05 0 RSVD Reversed. Always 0. */ 2981da177e4SLinus Torvalds /* 04 0 OFFSET4 Reversed for LVDS. Always 0. */ 2991da177e4SLinus Torvalds /* 03-00 0 OFFSET[03:00] Offset number from 0 to 15 */ 3001da177e4SLinus Torvalds /* */ 3011da177e4SLinus Torvalds /************************************************************************/ 3021da177e4SLinus Torvalds 3031da177e4SLinus Torvalds #define TRM_S1040_SCSI_SYNC 0x85 /* SCSI Synchronous Control (R/W) */ 3041da177e4SLinus Torvalds #define LVDS_SYNC 0x20 /* Enable LVDS synchronous */ 3051da177e4SLinus Torvalds #define WIDE_SYNC 0x10 /* Enable WIDE synchronous */ 3061da177e4SLinus Torvalds #define ALT_SYNC 0x08 /* Enable Fast-20 alternate synchronous */ 3071da177e4SLinus Torvalds 3081da177e4SLinus Torvalds /************************************************************************/ 3091da177e4SLinus Torvalds /* */ 3101da177e4SLinus Torvalds /* SYNCM 7 6 5 4 3 2 1 0 */ 3111da177e4SLinus Torvalds /* Name RSVD RSVD LVDS WIDE ALTPERD PERIOD2 PERIOD1 PERIOD0 */ 3121da177e4SLinus Torvalds /* Default 0 0 0 0 0 0 0 0 */ 3131da177e4SLinus Torvalds /* */ 3141da177e4SLinus Torvalds /* Bit Name Definition */ 3151da177e4SLinus Torvalds /* --------- ------------- --------------------------- */ 3161da177e4SLinus Torvalds /* 07-06 0 RSVD Reversed. Always read 0 */ 3171da177e4SLinus Torvalds /* 05 0 LVDS Reversed. Always read 0 */ 3181da177e4SLinus Torvalds /* 04 0 WIDE/WSCSI Enable wide (16-bits) SCSI */ 3191da177e4SLinus Torvalds /* transfer. */ 3201da177e4SLinus Torvalds /* 03 0 ALTPERD/ALTPD Alternate (Sync./Period) mode. */ 3211da177e4SLinus Torvalds /* */ 3221da177e4SLinus Torvalds /* @@ When this bit is set, */ 3231da177e4SLinus Torvalds /* the synchronous period bits 2:0 */ 3241da177e4SLinus Torvalds /* in the Synchronous Mode register */ 3251da177e4SLinus Torvalds /* are used to transfer data */ 3261da177e4SLinus Torvalds /* at the Fast-20 rate. */ 3271da177e4SLinus Torvalds /* @@ When this bit is unset, */ 3281da177e4SLinus Torvalds /* the synchronous period bits 2:0 */ 3291da177e4SLinus Torvalds /* in the Synchronous Mode Register */ 3301da177e4SLinus Torvalds /* are used to transfer data */ 3311da177e4SLinus Torvalds /* at the Fast-10 rate (or Fast-40 w/ LVDS). */ 3321da177e4SLinus Torvalds /* */ 3331da177e4SLinus Torvalds /* 02-00 0 PERIOD[2:0]/ Synchronous SCSI Transfer Rate. */ 3341da177e4SLinus Torvalds /* SXPD[02:00] These 3 bits specify */ 3351da177e4SLinus Torvalds /* the Synchronous SCSI Transfer */ 3361da177e4SLinus Torvalds /* Rate for Fast-20 and Fast-10. */ 3371da177e4SLinus Torvalds /* These bits are also reset */ 3381da177e4SLinus Torvalds /* by a SCSI Bus reset. */ 3391da177e4SLinus Torvalds /* */ 3401da177e4SLinus Torvalds /* For Fast-10 bit ALTPD = 0 and LVDS = 0 */ 3411da177e4SLinus Torvalds /* and bit2,bit1,bit0 is defined as follows : */ 3421da177e4SLinus Torvalds /* */ 3431da177e4SLinus Torvalds /* 000 100ns, 10.0 MHz */ 3441da177e4SLinus Torvalds /* 001 150ns, 6.6 MHz */ 3451da177e4SLinus Torvalds /* 010 200ns, 5.0 MHz */ 3461da177e4SLinus Torvalds /* 011 250ns, 4.0 MHz */ 3471da177e4SLinus Torvalds /* 100 300ns, 3.3 MHz */ 3481da177e4SLinus Torvalds /* 101 350ns, 2.8 MHz */ 3491da177e4SLinus Torvalds /* 110 400ns, 2.5 MHz */ 3501da177e4SLinus Torvalds /* 111 450ns, 2.2 MHz */ 3511da177e4SLinus Torvalds /* */ 3521da177e4SLinus Torvalds /* For Fast-20 bit ALTPD = 1 and LVDS = 0 */ 3531da177e4SLinus Torvalds /* and bit2,bit1,bit0 is defined as follows : */ 3541da177e4SLinus Torvalds /* */ 3551da177e4SLinus Torvalds /* 000 50ns, 20.0 MHz */ 3561da177e4SLinus Torvalds /* 001 75ns, 13.3 MHz */ 3571da177e4SLinus Torvalds /* 010 100ns, 10.0 MHz */ 3581da177e4SLinus Torvalds /* 011 125ns, 8.0 MHz */ 3591da177e4SLinus Torvalds /* 100 150ns, 6.6 MHz */ 3601da177e4SLinus Torvalds /* 101 175ns, 5.7 MHz */ 3611da177e4SLinus Torvalds /* 110 200ns, 5.0 MHz */ 3621da177e4SLinus Torvalds /* 111 250ns, 4.0 MHz KG: Maybe 225ns, 4.4 MHz */ 3631da177e4SLinus Torvalds /* */ 3641da177e4SLinus Torvalds /* For Fast-40 bit ALTPD = 0 and LVDS = 1 */ 3651da177e4SLinus Torvalds /* and bit2,bit1,bit0 is defined as follows : */ 3661da177e4SLinus Torvalds /* */ 3671da177e4SLinus Torvalds /* 000 25ns, 40.0 MHz */ 3681da177e4SLinus Torvalds /* 001 50ns, 20.0 MHz */ 3691da177e4SLinus Torvalds /* 010 75ns, 13.3 MHz */ 3701da177e4SLinus Torvalds /* 011 100ns, 10.0 MHz */ 3711da177e4SLinus Torvalds /* 100 125ns, 8.0 MHz */ 3721da177e4SLinus Torvalds /* 101 150ns, 6.6 MHz */ 3731da177e4SLinus Torvalds /* 110 175ns, 5.7 MHz */ 3741da177e4SLinus Torvalds /* 111 200ns, 5.0 MHz */ 3751da177e4SLinus Torvalds /* */ 3761da177e4SLinus Torvalds /************************************************************************/ 3771da177e4SLinus Torvalds 3781da177e4SLinus Torvalds #define TRM_S1040_SCSI_TARGETID 0x86 /* SCSI Target ID (R/W) */ 3791da177e4SLinus Torvalds #define TRM_S1040_SCSI_IDMSG 0x87 /* SCSI Identify Message (R) */ 3801da177e4SLinus Torvalds #define TRM_S1040_SCSI_HOSTID 0x87 /* SCSI Host ID (W) */ 3811da177e4SLinus Torvalds #define TRM_S1040_SCSI_COUNTER 0x88 /* SCSI Transfer Counter 24bits(R/W) */ 3821da177e4SLinus Torvalds 3831da177e4SLinus Torvalds #define TRM_S1040_SCSI_INTEN 0x8C /* SCSI Interrupt Enable (R/W) */ 3841da177e4SLinus Torvalds #define EN_SCAM 0x80 /* Enable SCAM selection interrupt */ 3851da177e4SLinus Torvalds #define EN_SELECT 0x40 /* Enable selection interrupt */ 3861da177e4SLinus Torvalds #define EN_SELTIMEOUT 0x20 /* Enable selection timeout interrupt */ 3871da177e4SLinus Torvalds #define EN_DISCONNECT 0x10 /* Enable bus disconnected interrupt */ 3881da177e4SLinus Torvalds #define EN_RESELECTED 0x08 /* Enable reselected interrupt */ 3891da177e4SLinus Torvalds #define EN_SCSIRESET 0x04 /* Enable SCSI reset detected interrupt */ 3901da177e4SLinus Torvalds #define EN_BUSSERVICE 0x02 /* Enable bus service interrupt */ 3911da177e4SLinus Torvalds #define EN_CMDDONE 0x01 /* Enable SCSI command done interrupt */ 3921da177e4SLinus Torvalds 3931da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONFIG0 0x8D /* SCSI Configuration 0 (R/W) */ 3941da177e4SLinus Torvalds #define PHASELATCH 0x40 /* Enable phase latch */ 3951da177e4SLinus Torvalds #define INITIATOR 0x20 /* Enable initiator mode */ 3961da177e4SLinus Torvalds #define PARITYCHECK 0x10 /* Enable parity check */ 3971da177e4SLinus Torvalds #define BLOCKRST 0x01 /* Disable SCSI reset1 */ 3981da177e4SLinus Torvalds 3991da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONFIG1 0x8E /* SCSI Configuration 1 (R/W) */ 4001da177e4SLinus Torvalds #define ACTIVE_NEGPLUS 0x10 /* Enhance active negation */ 4011da177e4SLinus Torvalds #define FILTER_DISABLE 0x08 /* Disable SCSI data filter */ 4021da177e4SLinus Torvalds #define FAST_FILTER 0x04 /* ? */ 4031da177e4SLinus Torvalds #define ACTIVE_NEG 0x02 /* Enable active negation */ 4041da177e4SLinus Torvalds 4051da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONFIG2 0x8F /* SCSI Configuration 2 (R/W) */ 4061da177e4SLinus Torvalds #define CFG2_WIDEFIFO 0x02 /* */ 4071da177e4SLinus Torvalds 4081da177e4SLinus Torvalds #define TRM_S1040_SCSI_COMMAND 0x90 /* SCSI Command (R/W) */ 4091da177e4SLinus Torvalds #define SCMD_COMP 0x12 /* Command complete */ 4101da177e4SLinus Torvalds #define SCMD_SEL_ATN 0x60 /* Selection with ATN */ 4111da177e4SLinus Torvalds #define SCMD_SEL_ATN3 0x64 /* Selection with ATN3 */ 4121da177e4SLinus Torvalds #define SCMD_SEL_ATNSTOP 0xB8 /* Selection with ATN and Stop */ 4131da177e4SLinus Torvalds #define SCMD_FIFO_OUT 0xC0 /* SCSI FIFO transfer out */ 4141da177e4SLinus Torvalds #define SCMD_DMA_OUT 0xC1 /* SCSI DMA transfer out */ 4151da177e4SLinus Torvalds #define SCMD_FIFO_IN 0xC2 /* SCSI FIFO transfer in */ 4161da177e4SLinus Torvalds #define SCMD_DMA_IN 0xC3 /* SCSI DMA transfer in */ 4171da177e4SLinus Torvalds #define SCMD_MSGACCEPT 0xD8 /* Message accept */ 4181da177e4SLinus Torvalds 4191da177e4SLinus Torvalds /************************************************************************/ 4201da177e4SLinus Torvalds /* */ 4211da177e4SLinus Torvalds /* Code Command Description */ 4221da177e4SLinus Torvalds /* ---- ---------------------------------------- */ 4231da177e4SLinus Torvalds /* 02 Enable reselection with FIFO */ 4241da177e4SLinus Torvalds /* 40 Select without ATN with FIFO */ 4251da177e4SLinus Torvalds /* 60 Select with ATN with FIFO */ 4261da177e4SLinus Torvalds /* 64 Select with ATN3 with FIFO */ 4271da177e4SLinus Torvalds /* A0 Select with ATN and stop with FIFO */ 4281da177e4SLinus Torvalds /* C0 Transfer information out with FIFO */ 4291da177e4SLinus Torvalds /* C1 Transfer information out with DMA */ 4301da177e4SLinus Torvalds /* C2 Transfer information in with FIFO */ 4311da177e4SLinus Torvalds /* C3 Transfer information in with DMA */ 4321da177e4SLinus Torvalds /* 12 Initiator command complete with FIFO */ 4331da177e4SLinus Torvalds /* 50 Initiator transfer information out sequence without ATN */ 4341da177e4SLinus Torvalds /* with FIFO */ 4351da177e4SLinus Torvalds /* 70 Initiator transfer information out sequence with ATN */ 4361da177e4SLinus Torvalds /* with FIFO */ 4371da177e4SLinus Torvalds /* 74 Initiator transfer information out sequence with ATN3 */ 4381da177e4SLinus Torvalds /* with FIFO */ 4391da177e4SLinus Torvalds /* 52 Initiator transfer information in sequence without ATN */ 4401da177e4SLinus Torvalds /* with FIFO */ 4411da177e4SLinus Torvalds /* 72 Initiator transfer information in sequence with ATN */ 4421da177e4SLinus Torvalds /* with FIFO */ 4431da177e4SLinus Torvalds /* 76 Initiator transfer information in sequence with ATN3 */ 4441da177e4SLinus Torvalds /* with FIFO */ 4451da177e4SLinus Torvalds /* 90 Initiator transfer information out command complete */ 4461da177e4SLinus Torvalds /* with FIFO */ 4471da177e4SLinus Torvalds /* 92 Initiator transfer information in command complete */ 4481da177e4SLinus Torvalds /* with FIFO */ 4491da177e4SLinus Torvalds /* D2 Enable selection */ 4501da177e4SLinus Torvalds /* 08 Reselection */ 4511da177e4SLinus Torvalds /* 48 Disconnect command with FIFO */ 4521da177e4SLinus Torvalds /* 88 Terminate command with FIFO */ 4531da177e4SLinus Torvalds /* C8 Target command complete with FIFO */ 4541da177e4SLinus Torvalds /* 18 SCAM Arbitration/ Selection */ 4551da177e4SLinus Torvalds /* 5A Enable reselection */ 4561da177e4SLinus Torvalds /* 98 Select without ATN with FIFO */ 4571da177e4SLinus Torvalds /* B8 Select with ATN with FIFO */ 4581da177e4SLinus Torvalds /* D8 Message Accepted */ 4591da177e4SLinus Torvalds /* 58 NOP */ 4601da177e4SLinus Torvalds /* */ 4611da177e4SLinus Torvalds /************************************************************************/ 4621da177e4SLinus Torvalds 4631da177e4SLinus Torvalds #define TRM_S1040_SCSI_TIMEOUT 0x91 /* SCSI Time Out Value (R/W) */ 4641da177e4SLinus Torvalds #define TRM_S1040_SCSI_FIFO 0x98 /* SCSI FIFO (R/W) */ 4651da177e4SLinus Torvalds 4661da177e4SLinus Torvalds #define TRM_S1040_SCSI_TCR0 0x9C /* SCSI Target Control 0 (R/W) */ 4671da177e4SLinus Torvalds #define TCR0_WIDE_NEGO_DONE 0x8000 /* Wide nego done */ 4681da177e4SLinus Torvalds #define TCR0_SYNC_NEGO_DONE 0x4000 /* Synchronous nego done */ 4691da177e4SLinus Torvalds #define TCR0_ENABLE_LVDS 0x2000 /* Enable LVDS synchronous */ 4701da177e4SLinus Torvalds #define TCR0_ENABLE_WIDE 0x1000 /* Enable WIDE synchronous */ 4711da177e4SLinus Torvalds #define TCR0_ENABLE_ALT 0x0800 /* Enable alternate synchronous */ 4721da177e4SLinus Torvalds #define TCR0_PERIOD_MASK 0x0700 /* Transfer rate */ 4731da177e4SLinus Torvalds 4741da177e4SLinus Torvalds #define TCR0_DO_WIDE_NEGO 0x0080 /* Do wide NEGO */ 4751da177e4SLinus Torvalds #define TCR0_DO_SYNC_NEGO 0x0040 /* Do sync NEGO */ 4761da177e4SLinus Torvalds #define TCR0_DISCONNECT_EN 0x0020 /* Disconnection enable */ 4771da177e4SLinus Torvalds #define TCR0_OFFSET_MASK 0x001F /* Offset number */ 4781da177e4SLinus Torvalds 4791da177e4SLinus Torvalds #define TRM_S1040_SCSI_TCR1 0x9E /* SCSI Target Control 1 (R/W) */ 4801da177e4SLinus Torvalds #define MAXTAG_MASK 0x7F00 /* Maximum tags (127) */ 4811da177e4SLinus Torvalds #define NON_TAG_BUSY 0x0080 /* Non tag command active */ 4821da177e4SLinus Torvalds #define ACTTAG_MASK 0x007F /* Active tags */ 4831da177e4SLinus Torvalds 4841da177e4SLinus Torvalds /************************************************************************/ 4851da177e4SLinus Torvalds /* */ 4861da177e4SLinus Torvalds /* The DMA register offset for TRM_S1040 */ 4871da177e4SLinus Torvalds /* */ 4881da177e4SLinus Torvalds /************************************************************************/ 4891da177e4SLinus Torvalds #define TRM_S1040_DMA_COMMAND 0xA0 /* DMA Command (R/W) */ 4901da177e4SLinus Torvalds #define DMACMD_SG 0x02 /* Enable HW S/G support */ 4911da177e4SLinus Torvalds #define DMACMD_DIR 0x01 /* 1 = read from SCSI write to Host */ 4921da177e4SLinus Torvalds #define XFERDATAIN_SG 0x0103 /* Transfer data in w/ SG */ 4931da177e4SLinus Torvalds #define XFERDATAOUT_SG 0x0102 /* Transfer data out w/ SG */ 4941da177e4SLinus Torvalds #define XFERDATAIN 0x0101 /* Transfer data in w/o SG */ 4951da177e4SLinus Torvalds #define XFERDATAOUT 0x0100 /* Transfer data out w/o SG */ 4961da177e4SLinus Torvalds 4971da177e4SLinus Torvalds #define TRM_S1040_DMA_FIFOCNT 0xA1 /* DMA FIFO Counter (R) */ 4981da177e4SLinus Torvalds 4991da177e4SLinus Torvalds #define TRM_S1040_DMA_CONTROL 0xA1 /* DMA Control (W) */ 5001da177e4SLinus Torvalds #define DMARESETMODULE 0x10 /* Reset PCI/DMA module */ 5011da177e4SLinus Torvalds #define STOPDMAXFER 0x08 /* Stop DMA transfer */ 5021da177e4SLinus Torvalds #define ABORTXFER 0x04 /* Abort DMA transfer */ 5031da177e4SLinus Torvalds #define CLRXFIFO 0x02 /* Clear DMA transfer FIFO */ 5041da177e4SLinus Torvalds #define STARTDMAXFER 0x01 /* Start DMA transfer */ 5051da177e4SLinus Torvalds 5061da177e4SLinus Torvalds #define TRM_S1040_DMA_FIFOSTAT 0xA2 /* DMA FIFO Status (R) */ 5071da177e4SLinus Torvalds 5081da177e4SLinus Torvalds #define TRM_S1040_DMA_STATUS 0xA3 /* DMA Interrupt Status (R/W) */ 5091da177e4SLinus Torvalds #define XFERPENDING 0x80 /* Transfer pending */ 5101da177e4SLinus Torvalds #define SCSIBUSY 0x40 /* SCSI busy */ 5111da177e4SLinus Torvalds #define GLOBALINT 0x20 /* DMA_INTEN bit 0-4 set */ 5121da177e4SLinus Torvalds #define FORCEDMACOMP 0x10 /* Force DMA transfer complete */ 5131da177e4SLinus Torvalds #define DMAXFERERROR 0x08 /* DMA transfer error */ 5141da177e4SLinus Torvalds #define DMAXFERABORT 0x04 /* DMA transfer abort */ 5151da177e4SLinus Torvalds #define DMAXFERCOMP 0x02 /* Bus Master XFER Complete status */ 5161da177e4SLinus Torvalds #define SCSICOMP 0x01 /* SCSI complete interrupt */ 5171da177e4SLinus Torvalds 5181da177e4SLinus Torvalds #define TRM_S1040_DMA_INTEN 0xA4 /* DMA Interrupt Enable (R/W) */ 5191da177e4SLinus Torvalds #define EN_FORCEDMACOMP 0x10 /* Force DMA transfer complete */ 5201da177e4SLinus Torvalds #define EN_DMAXFERERROR 0x08 /* DMA transfer error */ 5211da177e4SLinus Torvalds #define EN_DMAXFERABORT 0x04 /* DMA transfer abort */ 5221da177e4SLinus Torvalds #define EN_DMAXFERCOMP 0x02 /* Bus Master XFER Complete status */ 5231da177e4SLinus Torvalds #define EN_SCSIINTR 0x01 /* Enable SCSI complete interrupt */ 5241da177e4SLinus Torvalds 5251da177e4SLinus Torvalds #define TRM_S1040_DMA_CONFIG 0xA6 /* DMA Configuration (R/W) */ 5261da177e4SLinus Torvalds #define DMA_ENHANCE 0x8000 /* Enable DMA enhance feature (SG?) */ 5271da177e4SLinus Torvalds #define DMA_PCI_DUAL_ADDR 0x4000 /* */ 5281da177e4SLinus Torvalds #define DMA_CFG_RES 0x2000 /* Always 1 */ 5291da177e4SLinus Torvalds #define DMA_AUTO_CLR_FIFO 0x1000 /* DISable DMA auto clear FIFO */ 5301da177e4SLinus Torvalds #define DMA_MEM_MULTI_READ 0x0800 /* */ 5311da177e4SLinus Torvalds #define DMA_MEM_WRITE_INVAL 0x0400 /* Memory write and invalidate */ 5321da177e4SLinus Torvalds #define DMA_FIFO_CTRL 0x0300 /* Control FIFO operation with DMA */ 5331da177e4SLinus Torvalds #define DMA_FIFO_HALF_HALF 0x0200 /* Keep half filled on both read/write */ 5341da177e4SLinus Torvalds 5351da177e4SLinus Torvalds #define TRM_S1040_DMA_XCNT 0xA8 /* DMA Transfer Counter (R/W), 24bits */ 5361da177e4SLinus Torvalds #define TRM_S1040_DMA_CXCNT 0xAC /* DMA Current Transfer Counter (R) */ 5371da177e4SLinus Torvalds #define TRM_S1040_DMA_XLOWADDR 0xB0 /* DMA Transfer Physical Low Address */ 5381da177e4SLinus Torvalds #define TRM_S1040_DMA_XHIGHADDR 0xB4 /* DMA Transfer Physical High Address */ 5391da177e4SLinus Torvalds 5401da177e4SLinus Torvalds /************************************************************************/ 5411da177e4SLinus Torvalds /* */ 5421da177e4SLinus Torvalds /* The general register offset for TRM_S1040 */ 5431da177e4SLinus Torvalds /* */ 5441da177e4SLinus Torvalds /************************************************************************/ 5451da177e4SLinus Torvalds #define TRM_S1040_GEN_CONTROL 0xD4 /* Global Control */ 5461da177e4SLinus Torvalds #define CTRL_LED 0x80 /* Control onboard LED */ 5471da177e4SLinus Torvalds #define EN_EEPROM 0x10 /* Enable EEPROM programming */ 5481da177e4SLinus Torvalds #define DIS_TERM 0x08 /* Disable onboard termination */ 5491da177e4SLinus Torvalds #define AUTOTERM 0x04 /* Enable Auto SCSI terminator */ 5501da177e4SLinus Torvalds #define LOW8TERM 0x02 /* Enable Lower 8 bit SCSI terminator */ 5511da177e4SLinus Torvalds #define UP8TERM 0x01 /* Enable Upper 8 bit SCSI terminator */ 5521da177e4SLinus Torvalds 5531da177e4SLinus Torvalds #define TRM_S1040_GEN_STATUS 0xD5 /* Global Status */ 5541da177e4SLinus Torvalds #define GTIMEOUT 0x80 /* Global timer reach 0 */ 5551da177e4SLinus Torvalds #define EXT68HIGH 0x40 /* Higher 8 bit connected externally */ 5561da177e4SLinus Torvalds #define INT68HIGH 0x20 /* Higher 8 bit connected internally */ 5571da177e4SLinus Torvalds #define CON5068 0x10 /* External 50/68 pin connected (low) */ 5581da177e4SLinus Torvalds #define CON68 0x08 /* Internal 68 pin connected (low) */ 5591da177e4SLinus Torvalds #define CON50 0x04 /* Internal 50 pin connected (low!) */ 5601da177e4SLinus Torvalds #define WIDESCSI 0x02 /* Wide SCSI card */ 5611da177e4SLinus Torvalds #define STATUS_LOAD_DEFAULT 0x01 /* */ 5621da177e4SLinus Torvalds 5631da177e4SLinus Torvalds #define TRM_S1040_GEN_NVRAM 0xD6 /* Serial NON-VOLATILE RAM port */ 5641da177e4SLinus Torvalds #define NVR_BITOUT 0x08 /* Serial data out */ 5651da177e4SLinus Torvalds #define NVR_BITIN 0x04 /* Serial data in */ 5661da177e4SLinus Torvalds #define NVR_CLOCK 0x02 /* Serial clock */ 5671da177e4SLinus Torvalds #define NVR_SELECT 0x01 /* Serial select */ 5681da177e4SLinus Torvalds 5691da177e4SLinus Torvalds #define TRM_S1040_GEN_EDATA 0xD7 /* Parallel EEPROM data port */ 5701da177e4SLinus Torvalds #define TRM_S1040_GEN_EADDRESS 0xD8 /* Parallel EEPROM address */ 5711da177e4SLinus Torvalds #define TRM_S1040_GEN_TIMER 0xDB /* Global timer */ 5721da177e4SLinus Torvalds 5731da177e4SLinus Torvalds /************************************************************************/ 5741da177e4SLinus Torvalds /* */ 5751da177e4SLinus Torvalds /* NvmTarCfg0: Target configuration byte 0 :..pDCB->DevMode */ 5761da177e4SLinus Torvalds /* */ 5771da177e4SLinus Torvalds /************************************************************************/ 5781da177e4SLinus Torvalds #define NTC_DO_WIDE_NEGO 0x20 /* Wide negotiate */ 5791da177e4SLinus Torvalds #define NTC_DO_TAG_QUEUEING 0x10 /* Enable SCSI tag queuing */ 5801da177e4SLinus Torvalds #define NTC_DO_SEND_START 0x08 /* Send start command SPINUP */ 5811da177e4SLinus Torvalds #define NTC_DO_DISCONNECT 0x04 /* Enable SCSI disconnect */ 5821da177e4SLinus Torvalds #define NTC_DO_SYNC_NEGO 0x02 /* Sync negotiation */ 58325985edcSLucas De Marchi #define NTC_DO_PARITY_CHK 0x01 /* (it should define at NAC) */ 5841da177e4SLinus Torvalds /* Parity check enable */ 5851da177e4SLinus Torvalds 5861da177e4SLinus Torvalds /************************************************************************/ 5871da177e4SLinus Torvalds /* */ 5881da177e4SLinus Torvalds /* Nvram Initiater bits definition */ 5891da177e4SLinus Torvalds /* */ 5901da177e4SLinus Torvalds /************************************************************************/ 5911da177e4SLinus Torvalds #if 0 5921da177e4SLinus Torvalds #define MORE2_DRV BIT0 5931da177e4SLinus Torvalds #define GREATER_1G BIT1 5941da177e4SLinus Torvalds #define RST_SCSI_BUS BIT2 5951da177e4SLinus Torvalds #define ACTIVE_NEGATION BIT3 5961da177e4SLinus Torvalds #define NO_SEEK BIT4 5971da177e4SLinus Torvalds #define LUN_CHECK BIT5 5981da177e4SLinus Torvalds #endif 5991da177e4SLinus Torvalds 6001da177e4SLinus Torvalds /************************************************************************/ 6011da177e4SLinus Torvalds /* */ 6021da177e4SLinus Torvalds /* Nvram Adapter Cfg bits definition */ 6031da177e4SLinus Torvalds /* */ 6041da177e4SLinus Torvalds /************************************************************************/ 6051da177e4SLinus Torvalds #define NAC_SCANLUN 0x20 /* Include LUN as BIOS device */ 6061da177e4SLinus Torvalds #define NAC_POWERON_SCSI_RESET 0x04 /* Power on reset enable */ 6071da177e4SLinus Torvalds #define NAC_GREATER_1G 0x02 /* > 1G support enable */ 6081da177e4SLinus Torvalds #define NAC_GT2DRIVES 0x01 /* Support more than 2 drives */ 6091da177e4SLinus Torvalds /* #define NAC_DO_PARITY_CHK 0x08 */ /* Parity check enable */ 6101da177e4SLinus Torvalds 6111da177e4SLinus Torvalds #endif 612