1*1da177e4SLinus Torvalds /************************************************************************/ 2*1da177e4SLinus Torvalds /* */ 3*1da177e4SLinus Torvalds /* dc395x.h */ 4*1da177e4SLinus Torvalds /* */ 5*1da177e4SLinus Torvalds /* Device Driver for Tekram DC395(U/UW/F), DC315(U) */ 6*1da177e4SLinus Torvalds /* PCI SCSI Bus Master Host Adapter */ 7*1da177e4SLinus Torvalds /* (SCSI chip set used Tekram ASIC TRM-S1040) */ 8*1da177e4SLinus Torvalds /* */ 9*1da177e4SLinus Torvalds /************************************************************************/ 10*1da177e4SLinus Torvalds #ifndef DC395x_H 11*1da177e4SLinus Torvalds #define DC395x_H 12*1da177e4SLinus Torvalds 13*1da177e4SLinus Torvalds /************************************************************************/ 14*1da177e4SLinus Torvalds /* */ 15*1da177e4SLinus Torvalds /* Initial values */ 16*1da177e4SLinus Torvalds /* */ 17*1da177e4SLinus Torvalds /************************************************************************/ 18*1da177e4SLinus Torvalds #define DC395x_MAX_CMD_QUEUE 32 19*1da177e4SLinus Torvalds /* #define DC395x_MAX_QTAGS 32 */ 20*1da177e4SLinus Torvalds #define DC395x_MAX_QTAGS 16 21*1da177e4SLinus Torvalds #define DC395x_MAX_SCSI_ID 16 22*1da177e4SLinus Torvalds #define DC395x_MAX_CMD_PER_LUN DC395x_MAX_QTAGS 23*1da177e4SLinus Torvalds #define DC395x_MAX_SG_TABLESIZE 64 /* HW limitation */ 24*1da177e4SLinus Torvalds #define DC395x_MAX_SG_LISTENTRY 64 /* Must be equal or lower to previous */ 25*1da177e4SLinus Torvalds /* item */ 26*1da177e4SLinus Torvalds #define DC395x_MAX_SRB_CNT 63 27*1da177e4SLinus Torvalds /* #define DC395x_MAX_CAN_QUEUE 7 * DC395x_MAX_QTAGS */ 28*1da177e4SLinus Torvalds #define DC395x_MAX_CAN_QUEUE DC395x_MAX_SRB_CNT 29*1da177e4SLinus Torvalds #define DC395x_END_SCAN 2 30*1da177e4SLinus Torvalds #define DC395x_SEL_TIMEOUT 153 /* 250 ms selection timeout (@ 40 MHz) */ 31*1da177e4SLinus Torvalds #define DC395x_MAX_RETRIES 3 32*1da177e4SLinus Torvalds 33*1da177e4SLinus Torvalds #if 0 34*1da177e4SLinus Torvalds #define SYNC_FIRST 35*1da177e4SLinus Torvalds #endif 36*1da177e4SLinus Torvalds 37*1da177e4SLinus Torvalds #define NORM_REC_LVL 0 38*1da177e4SLinus Torvalds 39*1da177e4SLinus Torvalds /************************************************************************/ 40*1da177e4SLinus Torvalds /* */ 41*1da177e4SLinus Torvalds /* Various definitions */ 42*1da177e4SLinus Torvalds /* */ 43*1da177e4SLinus Torvalds /************************************************************************/ 44*1da177e4SLinus Torvalds #define BIT31 0x80000000 45*1da177e4SLinus Torvalds #define BIT30 0x40000000 46*1da177e4SLinus Torvalds #define BIT29 0x20000000 47*1da177e4SLinus Torvalds #define BIT28 0x10000000 48*1da177e4SLinus Torvalds #define BIT27 0x08000000 49*1da177e4SLinus Torvalds #define BIT26 0x04000000 50*1da177e4SLinus Torvalds #define BIT25 0x02000000 51*1da177e4SLinus Torvalds #define BIT24 0x01000000 52*1da177e4SLinus Torvalds #define BIT23 0x00800000 53*1da177e4SLinus Torvalds #define BIT22 0x00400000 54*1da177e4SLinus Torvalds #define BIT21 0x00200000 55*1da177e4SLinus Torvalds #define BIT20 0x00100000 56*1da177e4SLinus Torvalds #define BIT19 0x00080000 57*1da177e4SLinus Torvalds #define BIT18 0x00040000 58*1da177e4SLinus Torvalds #define BIT17 0x00020000 59*1da177e4SLinus Torvalds #define BIT16 0x00010000 60*1da177e4SLinus Torvalds #define BIT15 0x00008000 61*1da177e4SLinus Torvalds #define BIT14 0x00004000 62*1da177e4SLinus Torvalds #define BIT13 0x00002000 63*1da177e4SLinus Torvalds #define BIT12 0x00001000 64*1da177e4SLinus Torvalds #define BIT11 0x00000800 65*1da177e4SLinus Torvalds #define BIT10 0x00000400 66*1da177e4SLinus Torvalds #define BIT9 0x00000200 67*1da177e4SLinus Torvalds #define BIT8 0x00000100 68*1da177e4SLinus Torvalds #define BIT7 0x00000080 69*1da177e4SLinus Torvalds #define BIT6 0x00000040 70*1da177e4SLinus Torvalds #define BIT5 0x00000020 71*1da177e4SLinus Torvalds #define BIT4 0x00000010 72*1da177e4SLinus Torvalds #define BIT3 0x00000008 73*1da177e4SLinus Torvalds #define BIT2 0x00000004 74*1da177e4SLinus Torvalds #define BIT1 0x00000002 75*1da177e4SLinus Torvalds #define BIT0 0x00000001 76*1da177e4SLinus Torvalds 77*1da177e4SLinus Torvalds /* UnitCtrlFlag */ 78*1da177e4SLinus Torvalds #define UNIT_ALLOCATED BIT0 79*1da177e4SLinus Torvalds #define UNIT_INFO_CHANGED BIT1 80*1da177e4SLinus Torvalds #define FORMATING_MEDIA BIT2 81*1da177e4SLinus Torvalds #define UNIT_RETRY BIT3 82*1da177e4SLinus Torvalds 83*1da177e4SLinus Torvalds /* UnitFlags */ 84*1da177e4SLinus Torvalds #define DASD_SUPPORT BIT0 85*1da177e4SLinus Torvalds #define SCSI_SUPPORT BIT1 86*1da177e4SLinus Torvalds #define ASPI_SUPPORT BIT2 87*1da177e4SLinus Torvalds 88*1da177e4SLinus Torvalds /* SRBState machine definition */ 89*1da177e4SLinus Torvalds #define SRB_FREE 0x0000 90*1da177e4SLinus Torvalds #define SRB_WAIT 0x0001 91*1da177e4SLinus Torvalds #define SRB_READY 0x0002 92*1da177e4SLinus Torvalds #define SRB_MSGOUT 0x0004 /* arbitration+msg_out 1st byte */ 93*1da177e4SLinus Torvalds #define SRB_MSGIN 0x0008 94*1da177e4SLinus Torvalds #define SRB_EXTEND_MSGIN 0x0010 95*1da177e4SLinus Torvalds #define SRB_COMMAND 0x0020 96*1da177e4SLinus Torvalds #define SRB_START_ 0x0040 /* arbitration+msg_out+command_out */ 97*1da177e4SLinus Torvalds #define SRB_DISCONNECT 0x0080 98*1da177e4SLinus Torvalds #define SRB_DATA_XFER 0x0100 99*1da177e4SLinus Torvalds #define SRB_XFERPAD 0x0200 100*1da177e4SLinus Torvalds #define SRB_STATUS 0x0400 101*1da177e4SLinus Torvalds #define SRB_COMPLETED 0x0800 102*1da177e4SLinus Torvalds #define SRB_ABORT_SENT 0x1000 103*1da177e4SLinus Torvalds #define SRB_DO_SYNC_NEGO 0x2000 104*1da177e4SLinus Torvalds #define SRB_DO_WIDE_NEGO 0x4000 105*1da177e4SLinus Torvalds #define SRB_UNEXPECT_RESEL 0x8000 106*1da177e4SLinus Torvalds 107*1da177e4SLinus Torvalds /************************************************************************/ 108*1da177e4SLinus Torvalds /* */ 109*1da177e4SLinus Torvalds /* ACB Config */ 110*1da177e4SLinus Torvalds /* */ 111*1da177e4SLinus Torvalds /************************************************************************/ 112*1da177e4SLinus Torvalds #define HCC_WIDE_CARD 0x20 113*1da177e4SLinus Torvalds #define HCC_SCSI_RESET 0x10 114*1da177e4SLinus Torvalds #define HCC_PARITY 0x08 115*1da177e4SLinus Torvalds #define HCC_AUTOTERM 0x04 116*1da177e4SLinus Torvalds #define HCC_LOW8TERM 0x02 117*1da177e4SLinus Torvalds #define HCC_UP8TERM 0x01 118*1da177e4SLinus Torvalds 119*1da177e4SLinus Torvalds /* ACBFlag */ 120*1da177e4SLinus Torvalds #define RESET_DEV BIT0 121*1da177e4SLinus Torvalds #define RESET_DETECT BIT1 122*1da177e4SLinus Torvalds #define RESET_DONE BIT2 123*1da177e4SLinus Torvalds 124*1da177e4SLinus Torvalds /* DCBFlag */ 125*1da177e4SLinus Torvalds #define ABORT_DEV_ BIT0 126*1da177e4SLinus Torvalds 127*1da177e4SLinus Torvalds /* SRBstatus */ 128*1da177e4SLinus Torvalds #define SRB_OK BIT0 129*1da177e4SLinus Torvalds #define ABORTION BIT1 130*1da177e4SLinus Torvalds #define OVER_RUN BIT2 131*1da177e4SLinus Torvalds #define UNDER_RUN BIT3 132*1da177e4SLinus Torvalds #define PARITY_ERROR BIT4 133*1da177e4SLinus Torvalds #define SRB_ERROR BIT5 134*1da177e4SLinus Torvalds 135*1da177e4SLinus Torvalds /* SRBFlag */ 136*1da177e4SLinus Torvalds #define DATAOUT BIT7 137*1da177e4SLinus Torvalds #define DATAIN BIT6 138*1da177e4SLinus Torvalds #define RESIDUAL_VALID BIT5 139*1da177e4SLinus Torvalds #define ENABLE_TIMER BIT4 140*1da177e4SLinus Torvalds #define RESET_DEV0 BIT2 141*1da177e4SLinus Torvalds #define ABORT_DEV BIT1 142*1da177e4SLinus Torvalds #define AUTO_REQSENSE BIT0 143*1da177e4SLinus Torvalds 144*1da177e4SLinus Torvalds /* Adapter status */ 145*1da177e4SLinus Torvalds #define H_STATUS_GOOD 0 146*1da177e4SLinus Torvalds #define H_SEL_TIMEOUT 0x11 147*1da177e4SLinus Torvalds #define H_OVER_UNDER_RUN 0x12 148*1da177e4SLinus Torvalds #define H_UNEXP_BUS_FREE 0x13 149*1da177e4SLinus Torvalds #define H_TARGET_PHASE_F 0x14 150*1da177e4SLinus Torvalds #define H_INVALID_CCB_OP 0x16 151*1da177e4SLinus Torvalds #define H_LINK_CCB_BAD 0x17 152*1da177e4SLinus Torvalds #define H_BAD_TARGET_DIR 0x18 153*1da177e4SLinus Torvalds #define H_DUPLICATE_CCB 0x19 154*1da177e4SLinus Torvalds #define H_BAD_CCB_OR_SG 0x1A 155*1da177e4SLinus Torvalds #define H_ABORT 0x0FF 156*1da177e4SLinus Torvalds 157*1da177e4SLinus Torvalds /* SCSI BUS Status byte codes */ 158*1da177e4SLinus Torvalds #define SCSI_STAT_GOOD 0x0 /* Good status */ 159*1da177e4SLinus Torvalds #define SCSI_STAT_CHECKCOND 0x02 /* SCSI Check Condition */ 160*1da177e4SLinus Torvalds #define SCSI_STAT_CONDMET 0x04 /* Condition Met */ 161*1da177e4SLinus Torvalds #define SCSI_STAT_BUSY 0x08 /* Target busy status */ 162*1da177e4SLinus Torvalds #define SCSI_STAT_INTER 0x10 /* Intermediate status */ 163*1da177e4SLinus Torvalds #define SCSI_STAT_INTERCONDMET 0x14 /* Intermediate condition met */ 164*1da177e4SLinus Torvalds #define SCSI_STAT_RESCONFLICT 0x18 /* Reservation conflict */ 165*1da177e4SLinus Torvalds #define SCSI_STAT_CMDTERM 0x22 /* Command Terminated */ 166*1da177e4SLinus Torvalds #define SCSI_STAT_QUEUEFULL 0x28 /* Queue Full */ 167*1da177e4SLinus Torvalds #define SCSI_STAT_UNEXP_BUS_F 0xFD /* Unexpect Bus Free */ 168*1da177e4SLinus Torvalds #define SCSI_STAT_BUS_RST_DETECT 0xFE /* Scsi Bus Reset detected */ 169*1da177e4SLinus Torvalds #define SCSI_STAT_SEL_TIMEOUT 0xFF /* Selection Time out */ 170*1da177e4SLinus Torvalds 171*1da177e4SLinus Torvalds /* Sync_Mode */ 172*1da177e4SLinus Torvalds #define SYNC_WIDE_TAG_ATNT_DISABLE 0 173*1da177e4SLinus Torvalds #define SYNC_NEGO_ENABLE BIT0 174*1da177e4SLinus Torvalds #define SYNC_NEGO_DONE BIT1 175*1da177e4SLinus Torvalds #define WIDE_NEGO_ENABLE BIT2 176*1da177e4SLinus Torvalds #define WIDE_NEGO_DONE BIT3 177*1da177e4SLinus Torvalds #define WIDE_NEGO_STATE BIT4 178*1da177e4SLinus Torvalds #define EN_TAG_QUEUEING BIT5 179*1da177e4SLinus Torvalds #define EN_ATN_STOP BIT6 180*1da177e4SLinus Torvalds 181*1da177e4SLinus Torvalds #define SYNC_NEGO_OFFSET 15 182*1da177e4SLinus Torvalds 183*1da177e4SLinus Torvalds /* SCSI MSG BYTE */ 184*1da177e4SLinus Torvalds #define MSG_COMPLETE 0x00 185*1da177e4SLinus Torvalds #define MSG_EXTENDED 0x01 186*1da177e4SLinus Torvalds #define MSG_SAVE_PTR 0x02 187*1da177e4SLinus Torvalds #define MSG_RESTORE_PTR 0x03 188*1da177e4SLinus Torvalds #define MSG_DISCONNECT 0x04 189*1da177e4SLinus Torvalds #define MSG_INITIATOR_ERROR 0x05 190*1da177e4SLinus Torvalds #define MSG_ABORT 0x06 191*1da177e4SLinus Torvalds #define MSG_REJECT_ 0x07 192*1da177e4SLinus Torvalds #define MSG_NOP 0x08 193*1da177e4SLinus Torvalds #define MSG_PARITY_ERROR 0x09 194*1da177e4SLinus Torvalds #define MSG_LINK_CMD_COMPL 0x0A 195*1da177e4SLinus Torvalds #define MSG_LINK_CMD_COMPL_FLG 0x0B 196*1da177e4SLinus Torvalds #define MSG_BUS_RESET 0x0C 197*1da177e4SLinus Torvalds #define MSG_ABORT_TAG 0x0D 198*1da177e4SLinus Torvalds #define MSG_SIMPLE_QTAG 0x20 199*1da177e4SLinus Torvalds #define MSG_HEAD_QTAG 0x21 200*1da177e4SLinus Torvalds #define MSG_ORDER_QTAG 0x22 201*1da177e4SLinus Torvalds #define MSG_IGNOREWIDE 0x23 202*1da177e4SLinus Torvalds #define MSG_IDENTIFY 0x80 203*1da177e4SLinus Torvalds #define MSG_HOST_ID 0xC0 204*1da177e4SLinus Torvalds 205*1da177e4SLinus Torvalds /* SCSI STATUS BYTE */ 206*1da177e4SLinus Torvalds #define STATUS_GOOD 0x00 207*1da177e4SLinus Torvalds #define CHECK_CONDITION_ 0x02 208*1da177e4SLinus Torvalds #define STATUS_BUSY 0x08 209*1da177e4SLinus Torvalds #define STATUS_INTERMEDIATE 0x10 210*1da177e4SLinus Torvalds #define RESERVE_CONFLICT 0x18 211*1da177e4SLinus Torvalds 212*1da177e4SLinus Torvalds /* cmd->result */ 213*1da177e4SLinus Torvalds #define STATUS_MASK_ 0xFF 214*1da177e4SLinus Torvalds #define MSG_MASK 0xFF00 215*1da177e4SLinus Torvalds #define RETURN_MASK 0xFF0000 216*1da177e4SLinus Torvalds 217*1da177e4SLinus Torvalds /************************************************************************/ 218*1da177e4SLinus Torvalds /* */ 219*1da177e4SLinus Torvalds /* Inquiry Data format */ 220*1da177e4SLinus Torvalds /* */ 221*1da177e4SLinus Torvalds /************************************************************************/ 222*1da177e4SLinus Torvalds struct ScsiInqData 223*1da177e4SLinus Torvalds { /* INQ */ 224*1da177e4SLinus Torvalds u8 DevType; /* Periph Qualifier & Periph Dev Type */ 225*1da177e4SLinus Torvalds u8 RMB_TypeMod; /* rem media bit & Dev Type Modifier */ 226*1da177e4SLinus Torvalds u8 Vers; /* ISO, ECMA, & ANSI versions */ 227*1da177e4SLinus Torvalds u8 RDF; /* AEN, TRMIOP, & response data format */ 228*1da177e4SLinus Torvalds u8 AddLen; /* length of additional data */ 229*1da177e4SLinus Torvalds u8 Res1; /* reserved */ 230*1da177e4SLinus Torvalds u8 Res2; /* reserved */ 231*1da177e4SLinus Torvalds u8 Flags; /* RelADr, Wbus32, Wbus16, Sync, etc. */ 232*1da177e4SLinus Torvalds u8 VendorID[8]; /* Vendor Identification */ 233*1da177e4SLinus Torvalds u8 ProductID[16]; /* Product Identification */ 234*1da177e4SLinus Torvalds u8 ProductRev[4]; /* Product Revision */ 235*1da177e4SLinus Torvalds }; 236*1da177e4SLinus Torvalds 237*1da177e4SLinus Torvalds /* Inquiry byte 0 masks */ 238*1da177e4SLinus Torvalds #define SCSI_DEVTYPE 0x1F /* Peripheral Device Type */ 239*1da177e4SLinus Torvalds #define SCSI_PERIPHQUAL 0xE0 /* Peripheral Qualifier */ 240*1da177e4SLinus Torvalds /* Inquiry byte 1 mask */ 241*1da177e4SLinus Torvalds #define SCSI_REMOVABLE_MEDIA 0x80 /* Removable Media bit (1=removable) */ 242*1da177e4SLinus Torvalds /* Peripheral Device Type definitions */ 243*1da177e4SLinus Torvalds /* See include/scsi/scsi.h */ 244*1da177e4SLinus Torvalds #define TYPE_NODEV SCSI_DEVTYPE /* Unknown or no device type */ 245*1da177e4SLinus Torvalds #ifndef TYPE_PRINTER /* */ 246*1da177e4SLinus Torvalds # define TYPE_PRINTER 0x02 /* Printer device */ 247*1da177e4SLinus Torvalds #endif /* */ 248*1da177e4SLinus Torvalds #ifndef TYPE_COMM /* */ 249*1da177e4SLinus Torvalds # define TYPE_COMM 0x09 /* Communications device */ 250*1da177e4SLinus Torvalds #endif 251*1da177e4SLinus Torvalds 252*1da177e4SLinus Torvalds /************************************************************************/ 253*1da177e4SLinus Torvalds /* */ 254*1da177e4SLinus Torvalds /* Inquiry flag definitions (Inq data byte 7) */ 255*1da177e4SLinus Torvalds /* */ 256*1da177e4SLinus Torvalds /************************************************************************/ 257*1da177e4SLinus Torvalds #define SCSI_INQ_RELADR 0x80 /* device supports relative addressing */ 258*1da177e4SLinus Torvalds #define SCSI_INQ_WBUS32 0x40 /* device supports 32 bit data xfers */ 259*1da177e4SLinus Torvalds #define SCSI_INQ_WBUS16 0x20 /* device supports 16 bit data xfers */ 260*1da177e4SLinus Torvalds #define SCSI_INQ_SYNC 0x10 /* device supports synchronous xfer */ 261*1da177e4SLinus Torvalds #define SCSI_INQ_LINKED 0x08 /* device supports linked commands */ 262*1da177e4SLinus Torvalds #define SCSI_INQ_CMDQUEUE 0x02 /* device supports command queueing */ 263*1da177e4SLinus Torvalds #define SCSI_INQ_SFTRE 0x01 /* device supports soft resets */ 264*1da177e4SLinus Torvalds 265*1da177e4SLinus Torvalds #define ENABLE_CE 1 266*1da177e4SLinus Torvalds #define DISABLE_CE 0 267*1da177e4SLinus Torvalds #define EEPROM_READ 0x80 268*1da177e4SLinus Torvalds 269*1da177e4SLinus Torvalds /************************************************************************/ 270*1da177e4SLinus Torvalds /* */ 271*1da177e4SLinus Torvalds /* The PCI configuration register offset for TRM_S1040 */ 272*1da177e4SLinus Torvalds /* */ 273*1da177e4SLinus Torvalds /************************************************************************/ 274*1da177e4SLinus Torvalds #define TRM_S1040_ID 0x00 /* Vendor and Device ID */ 275*1da177e4SLinus Torvalds #define TRM_S1040_COMMAND 0x04 /* PCI command register */ 276*1da177e4SLinus Torvalds #define TRM_S1040_IOBASE 0x10 /* I/O Space base address */ 277*1da177e4SLinus Torvalds #define TRM_S1040_ROMBASE 0x30 /* Expansion ROM Base Address */ 278*1da177e4SLinus Torvalds #define TRM_S1040_INTLINE 0x3C /* Interrupt line */ 279*1da177e4SLinus Torvalds 280*1da177e4SLinus Torvalds /************************************************************************/ 281*1da177e4SLinus Torvalds /* */ 282*1da177e4SLinus Torvalds /* The SCSI register offset for TRM_S1040 */ 283*1da177e4SLinus Torvalds /* */ 284*1da177e4SLinus Torvalds /************************************************************************/ 285*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_STATUS 0x80 /* SCSI Status (R) */ 286*1da177e4SLinus Torvalds #define COMMANDPHASEDONE 0x2000 /* SCSI command phase done */ 287*1da177e4SLinus Torvalds #define SCSIXFERDONE 0x0800 /* SCSI SCSI transfer done */ 288*1da177e4SLinus Torvalds #define SCSIXFERCNT_2_ZERO 0x0100 /* SCSI SCSI transfer count to zero */ 289*1da177e4SLinus Torvalds #define SCSIINTERRUPT 0x0080 /* SCSI interrupt pending */ 290*1da177e4SLinus Torvalds #define COMMANDABORT 0x0040 /* SCSI command abort */ 291*1da177e4SLinus Torvalds #define SEQUENCERACTIVE 0x0020 /* SCSI sequencer active */ 292*1da177e4SLinus Torvalds #define PHASEMISMATCH 0x0010 /* SCSI phase mismatch */ 293*1da177e4SLinus Torvalds #define PARITYERROR 0x0008 /* SCSI parity error */ 294*1da177e4SLinus Torvalds 295*1da177e4SLinus Torvalds #define PHASEMASK 0x0007 /* Phase MSG/CD/IO */ 296*1da177e4SLinus Torvalds #define PH_DATA_OUT 0x00 /* Data out phase */ 297*1da177e4SLinus Torvalds #define PH_DATA_IN 0x01 /* Data in phase */ 298*1da177e4SLinus Torvalds #define PH_COMMAND 0x02 /* Command phase */ 299*1da177e4SLinus Torvalds #define PH_STATUS 0x03 /* Status phase */ 300*1da177e4SLinus Torvalds #define PH_BUS_FREE 0x05 /* Invalid phase used as bus free */ 301*1da177e4SLinus Torvalds #define PH_MSG_OUT 0x06 /* Message out phase */ 302*1da177e4SLinus Torvalds #define PH_MSG_IN 0x07 /* Message in phase */ 303*1da177e4SLinus Torvalds 304*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONTROL 0x80 /* SCSI Control (W) */ 305*1da177e4SLinus Torvalds #define DO_CLRATN 0x0400 /* Clear ATN */ 306*1da177e4SLinus Torvalds #define DO_SETATN 0x0200 /* Set ATN */ 307*1da177e4SLinus Torvalds #define DO_CMDABORT 0x0100 /* Abort SCSI command */ 308*1da177e4SLinus Torvalds #define DO_RSTMODULE 0x0010 /* Reset SCSI chip */ 309*1da177e4SLinus Torvalds #define DO_RSTSCSI 0x0008 /* Reset SCSI bus */ 310*1da177e4SLinus Torvalds #define DO_CLRFIFO 0x0004 /* Clear SCSI transfer FIFO */ 311*1da177e4SLinus Torvalds #define DO_DATALATCH 0x0002 /* Enable SCSI bus data input (latched) */ 312*1da177e4SLinus Torvalds /* #define DO_DATALATCH 0x0000 */ /* KG: DISable SCSI bus data latch */ 313*1da177e4SLinus Torvalds #define DO_HWRESELECT 0x0001 /* Enable hardware reselection */ 314*1da177e4SLinus Torvalds 315*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_FIFOCNT 0x82 /* SCSI FIFO Counter 5bits(R) */ 316*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_SIGNAL 0x83 /* SCSI low level signal (R/W) */ 317*1da177e4SLinus Torvalds 318*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_INTSTATUS 0x84 /* SCSI Interrupt Status (R) */ 319*1da177e4SLinus Torvalds #define INT_SCAM 0x80 /* SCAM selection interrupt */ 320*1da177e4SLinus Torvalds #define INT_SELECT 0x40 /* Selection interrupt */ 321*1da177e4SLinus Torvalds #define INT_SELTIMEOUT 0x20 /* Selection timeout interrupt */ 322*1da177e4SLinus Torvalds #define INT_DISCONNECT 0x10 /* Bus disconnected interrupt */ 323*1da177e4SLinus Torvalds #define INT_RESELECTED 0x08 /* Reselected interrupt */ 324*1da177e4SLinus Torvalds #define INT_SCSIRESET 0x04 /* SCSI reset detected interrupt */ 325*1da177e4SLinus Torvalds #define INT_BUSSERVICE 0x02 /* Bus service interrupt */ 326*1da177e4SLinus Torvalds #define INT_CMDDONE 0x01 /* SCSI command done interrupt */ 327*1da177e4SLinus Torvalds 328*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_OFFSET 0x84 /* SCSI Offset Count (W) */ 329*1da177e4SLinus Torvalds 330*1da177e4SLinus Torvalds /************************************************************************/ 331*1da177e4SLinus Torvalds /* */ 332*1da177e4SLinus Torvalds /* Bit Name Definition */ 333*1da177e4SLinus Torvalds /* --------- ------------- ---------------------------- */ 334*1da177e4SLinus Torvalds /* 07-05 0 RSVD Reversed. Always 0. */ 335*1da177e4SLinus Torvalds /* 04 0 OFFSET4 Reversed for LVDS. Always 0. */ 336*1da177e4SLinus Torvalds /* 03-00 0 OFFSET[03:00] Offset number from 0 to 15 */ 337*1da177e4SLinus Torvalds /* */ 338*1da177e4SLinus Torvalds /************************************************************************/ 339*1da177e4SLinus Torvalds 340*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_SYNC 0x85 /* SCSI Synchronous Control (R/W) */ 341*1da177e4SLinus Torvalds #define LVDS_SYNC 0x20 /* Enable LVDS synchronous */ 342*1da177e4SLinus Torvalds #define WIDE_SYNC 0x10 /* Enable WIDE synchronous */ 343*1da177e4SLinus Torvalds #define ALT_SYNC 0x08 /* Enable Fast-20 alternate synchronous */ 344*1da177e4SLinus Torvalds 345*1da177e4SLinus Torvalds /************************************************************************/ 346*1da177e4SLinus Torvalds /* */ 347*1da177e4SLinus Torvalds /* SYNCM 7 6 5 4 3 2 1 0 */ 348*1da177e4SLinus Torvalds /* Name RSVD RSVD LVDS WIDE ALTPERD PERIOD2 PERIOD1 PERIOD0 */ 349*1da177e4SLinus Torvalds /* Default 0 0 0 0 0 0 0 0 */ 350*1da177e4SLinus Torvalds /* */ 351*1da177e4SLinus Torvalds /* Bit Name Definition */ 352*1da177e4SLinus Torvalds /* --------- ------------- --------------------------- */ 353*1da177e4SLinus Torvalds /* 07-06 0 RSVD Reversed. Always read 0 */ 354*1da177e4SLinus Torvalds /* 05 0 LVDS Reversed. Always read 0 */ 355*1da177e4SLinus Torvalds /* 04 0 WIDE/WSCSI Enable wide (16-bits) SCSI */ 356*1da177e4SLinus Torvalds /* transfer. */ 357*1da177e4SLinus Torvalds /* 03 0 ALTPERD/ALTPD Alternate (Sync./Period) mode. */ 358*1da177e4SLinus Torvalds /* */ 359*1da177e4SLinus Torvalds /* @@ When this bit is set, */ 360*1da177e4SLinus Torvalds /* the synchronous period bits 2:0 */ 361*1da177e4SLinus Torvalds /* in the Synchronous Mode register */ 362*1da177e4SLinus Torvalds /* are used to transfer data */ 363*1da177e4SLinus Torvalds /* at the Fast-20 rate. */ 364*1da177e4SLinus Torvalds /* @@ When this bit is unset, */ 365*1da177e4SLinus Torvalds /* the synchronous period bits 2:0 */ 366*1da177e4SLinus Torvalds /* in the Synchronous Mode Register */ 367*1da177e4SLinus Torvalds /* are used to transfer data */ 368*1da177e4SLinus Torvalds /* at the Fast-10 rate (or Fast-40 w/ LVDS). */ 369*1da177e4SLinus Torvalds /* */ 370*1da177e4SLinus Torvalds /* 02-00 0 PERIOD[2:0]/ Synchronous SCSI Transfer Rate. */ 371*1da177e4SLinus Torvalds /* SXPD[02:00] These 3 bits specify */ 372*1da177e4SLinus Torvalds /* the Synchronous SCSI Transfer */ 373*1da177e4SLinus Torvalds /* Rate for Fast-20 and Fast-10. */ 374*1da177e4SLinus Torvalds /* These bits are also reset */ 375*1da177e4SLinus Torvalds /* by a SCSI Bus reset. */ 376*1da177e4SLinus Torvalds /* */ 377*1da177e4SLinus Torvalds /* For Fast-10 bit ALTPD = 0 and LVDS = 0 */ 378*1da177e4SLinus Torvalds /* and bit2,bit1,bit0 is defined as follows : */ 379*1da177e4SLinus Torvalds /* */ 380*1da177e4SLinus Torvalds /* 000 100ns, 10.0 MHz */ 381*1da177e4SLinus Torvalds /* 001 150ns, 6.6 MHz */ 382*1da177e4SLinus Torvalds /* 010 200ns, 5.0 MHz */ 383*1da177e4SLinus Torvalds /* 011 250ns, 4.0 MHz */ 384*1da177e4SLinus Torvalds /* 100 300ns, 3.3 MHz */ 385*1da177e4SLinus Torvalds /* 101 350ns, 2.8 MHz */ 386*1da177e4SLinus Torvalds /* 110 400ns, 2.5 MHz */ 387*1da177e4SLinus Torvalds /* 111 450ns, 2.2 MHz */ 388*1da177e4SLinus Torvalds /* */ 389*1da177e4SLinus Torvalds /* For Fast-20 bit ALTPD = 1 and LVDS = 0 */ 390*1da177e4SLinus Torvalds /* and bit2,bit1,bit0 is defined as follows : */ 391*1da177e4SLinus Torvalds /* */ 392*1da177e4SLinus Torvalds /* 000 50ns, 20.0 MHz */ 393*1da177e4SLinus Torvalds /* 001 75ns, 13.3 MHz */ 394*1da177e4SLinus Torvalds /* 010 100ns, 10.0 MHz */ 395*1da177e4SLinus Torvalds /* 011 125ns, 8.0 MHz */ 396*1da177e4SLinus Torvalds /* 100 150ns, 6.6 MHz */ 397*1da177e4SLinus Torvalds /* 101 175ns, 5.7 MHz */ 398*1da177e4SLinus Torvalds /* 110 200ns, 5.0 MHz */ 399*1da177e4SLinus Torvalds /* 111 250ns, 4.0 MHz KG: Maybe 225ns, 4.4 MHz */ 400*1da177e4SLinus Torvalds /* */ 401*1da177e4SLinus Torvalds /* For Fast-40 bit ALTPD = 0 and LVDS = 1 */ 402*1da177e4SLinus Torvalds /* and bit2,bit1,bit0 is defined as follows : */ 403*1da177e4SLinus Torvalds /* */ 404*1da177e4SLinus Torvalds /* 000 25ns, 40.0 MHz */ 405*1da177e4SLinus Torvalds /* 001 50ns, 20.0 MHz */ 406*1da177e4SLinus Torvalds /* 010 75ns, 13.3 MHz */ 407*1da177e4SLinus Torvalds /* 011 100ns, 10.0 MHz */ 408*1da177e4SLinus Torvalds /* 100 125ns, 8.0 MHz */ 409*1da177e4SLinus Torvalds /* 101 150ns, 6.6 MHz */ 410*1da177e4SLinus Torvalds /* 110 175ns, 5.7 MHz */ 411*1da177e4SLinus Torvalds /* 111 200ns, 5.0 MHz */ 412*1da177e4SLinus Torvalds /* */ 413*1da177e4SLinus Torvalds /************************************************************************/ 414*1da177e4SLinus Torvalds 415*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_TARGETID 0x86 /* SCSI Target ID (R/W) */ 416*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_IDMSG 0x87 /* SCSI Identify Message (R) */ 417*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_HOSTID 0x87 /* SCSI Host ID (W) */ 418*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_COUNTER 0x88 /* SCSI Transfer Counter 24bits(R/W) */ 419*1da177e4SLinus Torvalds 420*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_INTEN 0x8C /* SCSI Interrupt Enable (R/W) */ 421*1da177e4SLinus Torvalds #define EN_SCAM 0x80 /* Enable SCAM selection interrupt */ 422*1da177e4SLinus Torvalds #define EN_SELECT 0x40 /* Enable selection interrupt */ 423*1da177e4SLinus Torvalds #define EN_SELTIMEOUT 0x20 /* Enable selection timeout interrupt */ 424*1da177e4SLinus Torvalds #define EN_DISCONNECT 0x10 /* Enable bus disconnected interrupt */ 425*1da177e4SLinus Torvalds #define EN_RESELECTED 0x08 /* Enable reselected interrupt */ 426*1da177e4SLinus Torvalds #define EN_SCSIRESET 0x04 /* Enable SCSI reset detected interrupt */ 427*1da177e4SLinus Torvalds #define EN_BUSSERVICE 0x02 /* Enable bus service interrupt */ 428*1da177e4SLinus Torvalds #define EN_CMDDONE 0x01 /* Enable SCSI command done interrupt */ 429*1da177e4SLinus Torvalds 430*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONFIG0 0x8D /* SCSI Configuration 0 (R/W) */ 431*1da177e4SLinus Torvalds #define PHASELATCH 0x40 /* Enable phase latch */ 432*1da177e4SLinus Torvalds #define INITIATOR 0x20 /* Enable initiator mode */ 433*1da177e4SLinus Torvalds #define PARITYCHECK 0x10 /* Enable parity check */ 434*1da177e4SLinus Torvalds #define BLOCKRST 0x01 /* Disable SCSI reset1 */ 435*1da177e4SLinus Torvalds 436*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONFIG1 0x8E /* SCSI Configuration 1 (R/W) */ 437*1da177e4SLinus Torvalds #define ACTIVE_NEGPLUS 0x10 /* Enhance active negation */ 438*1da177e4SLinus Torvalds #define FILTER_DISABLE 0x08 /* Disable SCSI data filter */ 439*1da177e4SLinus Torvalds #define FAST_FILTER 0x04 /* ? */ 440*1da177e4SLinus Torvalds #define ACTIVE_NEG 0x02 /* Enable active negation */ 441*1da177e4SLinus Torvalds 442*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_CONFIG2 0x8F /* SCSI Configuration 2 (R/W) */ 443*1da177e4SLinus Torvalds #define CFG2_WIDEFIFO 0x02 /* */ 444*1da177e4SLinus Torvalds 445*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_COMMAND 0x90 /* SCSI Command (R/W) */ 446*1da177e4SLinus Torvalds #define SCMD_COMP 0x12 /* Command complete */ 447*1da177e4SLinus Torvalds #define SCMD_SEL_ATN 0x60 /* Selection with ATN */ 448*1da177e4SLinus Torvalds #define SCMD_SEL_ATN3 0x64 /* Selection with ATN3 */ 449*1da177e4SLinus Torvalds #define SCMD_SEL_ATNSTOP 0xB8 /* Selection with ATN and Stop */ 450*1da177e4SLinus Torvalds #define SCMD_FIFO_OUT 0xC0 /* SCSI FIFO transfer out */ 451*1da177e4SLinus Torvalds #define SCMD_DMA_OUT 0xC1 /* SCSI DMA transfer out */ 452*1da177e4SLinus Torvalds #define SCMD_FIFO_IN 0xC2 /* SCSI FIFO transfer in */ 453*1da177e4SLinus Torvalds #define SCMD_DMA_IN 0xC3 /* SCSI DMA transfer in */ 454*1da177e4SLinus Torvalds #define SCMD_MSGACCEPT 0xD8 /* Message accept */ 455*1da177e4SLinus Torvalds 456*1da177e4SLinus Torvalds /************************************************************************/ 457*1da177e4SLinus Torvalds /* */ 458*1da177e4SLinus Torvalds /* Code Command Description */ 459*1da177e4SLinus Torvalds /* ---- ---------------------------------------- */ 460*1da177e4SLinus Torvalds /* 02 Enable reselection with FIFO */ 461*1da177e4SLinus Torvalds /* 40 Select without ATN with FIFO */ 462*1da177e4SLinus Torvalds /* 60 Select with ATN with FIFO */ 463*1da177e4SLinus Torvalds /* 64 Select with ATN3 with FIFO */ 464*1da177e4SLinus Torvalds /* A0 Select with ATN and stop with FIFO */ 465*1da177e4SLinus Torvalds /* C0 Transfer information out with FIFO */ 466*1da177e4SLinus Torvalds /* C1 Transfer information out with DMA */ 467*1da177e4SLinus Torvalds /* C2 Transfer information in with FIFO */ 468*1da177e4SLinus Torvalds /* C3 Transfer information in with DMA */ 469*1da177e4SLinus Torvalds /* 12 Initiator command complete with FIFO */ 470*1da177e4SLinus Torvalds /* 50 Initiator transfer information out sequence without ATN */ 471*1da177e4SLinus Torvalds /* with FIFO */ 472*1da177e4SLinus Torvalds /* 70 Initiator transfer information out sequence with ATN */ 473*1da177e4SLinus Torvalds /* with FIFO */ 474*1da177e4SLinus Torvalds /* 74 Initiator transfer information out sequence with ATN3 */ 475*1da177e4SLinus Torvalds /* with FIFO */ 476*1da177e4SLinus Torvalds /* 52 Initiator transfer information in sequence without ATN */ 477*1da177e4SLinus Torvalds /* with FIFO */ 478*1da177e4SLinus Torvalds /* 72 Initiator transfer information in sequence with ATN */ 479*1da177e4SLinus Torvalds /* with FIFO */ 480*1da177e4SLinus Torvalds /* 76 Initiator transfer information in sequence with ATN3 */ 481*1da177e4SLinus Torvalds /* with FIFO */ 482*1da177e4SLinus Torvalds /* 90 Initiator transfer information out command complete */ 483*1da177e4SLinus Torvalds /* with FIFO */ 484*1da177e4SLinus Torvalds /* 92 Initiator transfer information in command complete */ 485*1da177e4SLinus Torvalds /* with FIFO */ 486*1da177e4SLinus Torvalds /* D2 Enable selection */ 487*1da177e4SLinus Torvalds /* 08 Reselection */ 488*1da177e4SLinus Torvalds /* 48 Disconnect command with FIFO */ 489*1da177e4SLinus Torvalds /* 88 Terminate command with FIFO */ 490*1da177e4SLinus Torvalds /* C8 Target command complete with FIFO */ 491*1da177e4SLinus Torvalds /* 18 SCAM Arbitration/ Selection */ 492*1da177e4SLinus Torvalds /* 5A Enable reselection */ 493*1da177e4SLinus Torvalds /* 98 Select without ATN with FIFO */ 494*1da177e4SLinus Torvalds /* B8 Select with ATN with FIFO */ 495*1da177e4SLinus Torvalds /* D8 Message Accepted */ 496*1da177e4SLinus Torvalds /* 58 NOP */ 497*1da177e4SLinus Torvalds /* */ 498*1da177e4SLinus Torvalds /************************************************************************/ 499*1da177e4SLinus Torvalds 500*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_TIMEOUT 0x91 /* SCSI Time Out Value (R/W) */ 501*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_FIFO 0x98 /* SCSI FIFO (R/W) */ 502*1da177e4SLinus Torvalds 503*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_TCR0 0x9C /* SCSI Target Control 0 (R/W) */ 504*1da177e4SLinus Torvalds #define TCR0_WIDE_NEGO_DONE 0x8000 /* Wide nego done */ 505*1da177e4SLinus Torvalds #define TCR0_SYNC_NEGO_DONE 0x4000 /* Synchronous nego done */ 506*1da177e4SLinus Torvalds #define TCR0_ENABLE_LVDS 0x2000 /* Enable LVDS synchronous */ 507*1da177e4SLinus Torvalds #define TCR0_ENABLE_WIDE 0x1000 /* Enable WIDE synchronous */ 508*1da177e4SLinus Torvalds #define TCR0_ENABLE_ALT 0x0800 /* Enable alternate synchronous */ 509*1da177e4SLinus Torvalds #define TCR0_PERIOD_MASK 0x0700 /* Transfer rate */ 510*1da177e4SLinus Torvalds 511*1da177e4SLinus Torvalds #define TCR0_DO_WIDE_NEGO 0x0080 /* Do wide NEGO */ 512*1da177e4SLinus Torvalds #define TCR0_DO_SYNC_NEGO 0x0040 /* Do sync NEGO */ 513*1da177e4SLinus Torvalds #define TCR0_DISCONNECT_EN 0x0020 /* Disconnection enable */ 514*1da177e4SLinus Torvalds #define TCR0_OFFSET_MASK 0x001F /* Offset number */ 515*1da177e4SLinus Torvalds 516*1da177e4SLinus Torvalds #define TRM_S1040_SCSI_TCR1 0x9E /* SCSI Target Control 1 (R/W) */ 517*1da177e4SLinus Torvalds #define MAXTAG_MASK 0x7F00 /* Maximum tags (127) */ 518*1da177e4SLinus Torvalds #define NON_TAG_BUSY 0x0080 /* Non tag command active */ 519*1da177e4SLinus Torvalds #define ACTTAG_MASK 0x007F /* Active tags */ 520*1da177e4SLinus Torvalds 521*1da177e4SLinus Torvalds /************************************************************************/ 522*1da177e4SLinus Torvalds /* */ 523*1da177e4SLinus Torvalds /* The DMA register offset for TRM_S1040 */ 524*1da177e4SLinus Torvalds /* */ 525*1da177e4SLinus Torvalds /************************************************************************/ 526*1da177e4SLinus Torvalds #define TRM_S1040_DMA_COMMAND 0xA0 /* DMA Command (R/W) */ 527*1da177e4SLinus Torvalds #define DMACMD_SG 0x02 /* Enable HW S/G support */ 528*1da177e4SLinus Torvalds #define DMACMD_DIR 0x01 /* 1 = read from SCSI write to Host */ 529*1da177e4SLinus Torvalds #define XFERDATAIN_SG 0x0103 /* Transfer data in w/ SG */ 530*1da177e4SLinus Torvalds #define XFERDATAOUT_SG 0x0102 /* Transfer data out w/ SG */ 531*1da177e4SLinus Torvalds #define XFERDATAIN 0x0101 /* Transfer data in w/o SG */ 532*1da177e4SLinus Torvalds #define XFERDATAOUT 0x0100 /* Transfer data out w/o SG */ 533*1da177e4SLinus Torvalds 534*1da177e4SLinus Torvalds #define TRM_S1040_DMA_FIFOCNT 0xA1 /* DMA FIFO Counter (R) */ 535*1da177e4SLinus Torvalds 536*1da177e4SLinus Torvalds #define TRM_S1040_DMA_CONTROL 0xA1 /* DMA Control (W) */ 537*1da177e4SLinus Torvalds #define DMARESETMODULE 0x10 /* Reset PCI/DMA module */ 538*1da177e4SLinus Torvalds #define STOPDMAXFER 0x08 /* Stop DMA transfer */ 539*1da177e4SLinus Torvalds #define ABORTXFER 0x04 /* Abort DMA transfer */ 540*1da177e4SLinus Torvalds #define CLRXFIFO 0x02 /* Clear DMA transfer FIFO */ 541*1da177e4SLinus Torvalds #define STARTDMAXFER 0x01 /* Start DMA transfer */ 542*1da177e4SLinus Torvalds 543*1da177e4SLinus Torvalds #define TRM_S1040_DMA_FIFOSTAT 0xA2 /* DMA FIFO Status (R) */ 544*1da177e4SLinus Torvalds 545*1da177e4SLinus Torvalds #define TRM_S1040_DMA_STATUS 0xA3 /* DMA Interrupt Status (R/W) */ 546*1da177e4SLinus Torvalds #define XFERPENDING 0x80 /* Transfer pending */ 547*1da177e4SLinus Torvalds #define SCSIBUSY 0x40 /* SCSI busy */ 548*1da177e4SLinus Torvalds #define GLOBALINT 0x20 /* DMA_INTEN bit 0-4 set */ 549*1da177e4SLinus Torvalds #define FORCEDMACOMP 0x10 /* Force DMA transfer complete */ 550*1da177e4SLinus Torvalds #define DMAXFERERROR 0x08 /* DMA transfer error */ 551*1da177e4SLinus Torvalds #define DMAXFERABORT 0x04 /* DMA transfer abort */ 552*1da177e4SLinus Torvalds #define DMAXFERCOMP 0x02 /* Bus Master XFER Complete status */ 553*1da177e4SLinus Torvalds #define SCSICOMP 0x01 /* SCSI complete interrupt */ 554*1da177e4SLinus Torvalds 555*1da177e4SLinus Torvalds #define TRM_S1040_DMA_INTEN 0xA4 /* DMA Interrupt Enable (R/W) */ 556*1da177e4SLinus Torvalds #define EN_FORCEDMACOMP 0x10 /* Force DMA transfer complete */ 557*1da177e4SLinus Torvalds #define EN_DMAXFERERROR 0x08 /* DMA transfer error */ 558*1da177e4SLinus Torvalds #define EN_DMAXFERABORT 0x04 /* DMA transfer abort */ 559*1da177e4SLinus Torvalds #define EN_DMAXFERCOMP 0x02 /* Bus Master XFER Complete status */ 560*1da177e4SLinus Torvalds #define EN_SCSIINTR 0x01 /* Enable SCSI complete interrupt */ 561*1da177e4SLinus Torvalds 562*1da177e4SLinus Torvalds #define TRM_S1040_DMA_CONFIG 0xA6 /* DMA Configuration (R/W) */ 563*1da177e4SLinus Torvalds #define DMA_ENHANCE 0x8000 /* Enable DMA enhance feature (SG?) */ 564*1da177e4SLinus Torvalds #define DMA_PCI_DUAL_ADDR 0x4000 /* */ 565*1da177e4SLinus Torvalds #define DMA_CFG_RES 0x2000 /* Always 1 */ 566*1da177e4SLinus Torvalds #define DMA_AUTO_CLR_FIFO 0x1000 /* DISable DMA auto clear FIFO */ 567*1da177e4SLinus Torvalds #define DMA_MEM_MULTI_READ 0x0800 /* */ 568*1da177e4SLinus Torvalds #define DMA_MEM_WRITE_INVAL 0x0400 /* Memory write and invalidate */ 569*1da177e4SLinus Torvalds #define DMA_FIFO_CTRL 0x0300 /* Control FIFO operation with DMA */ 570*1da177e4SLinus Torvalds #define DMA_FIFO_HALF_HALF 0x0200 /* Keep half filled on both read/write */ 571*1da177e4SLinus Torvalds 572*1da177e4SLinus Torvalds #define TRM_S1040_DMA_XCNT 0xA8 /* DMA Transfer Counter (R/W), 24bits */ 573*1da177e4SLinus Torvalds #define TRM_S1040_DMA_CXCNT 0xAC /* DMA Current Transfer Counter (R) */ 574*1da177e4SLinus Torvalds #define TRM_S1040_DMA_XLOWADDR 0xB0 /* DMA Transfer Physical Low Address */ 575*1da177e4SLinus Torvalds #define TRM_S1040_DMA_XHIGHADDR 0xB4 /* DMA Transfer Physical High Address */ 576*1da177e4SLinus Torvalds 577*1da177e4SLinus Torvalds /************************************************************************/ 578*1da177e4SLinus Torvalds /* */ 579*1da177e4SLinus Torvalds /* The general register offset for TRM_S1040 */ 580*1da177e4SLinus Torvalds /* */ 581*1da177e4SLinus Torvalds /************************************************************************/ 582*1da177e4SLinus Torvalds #define TRM_S1040_GEN_CONTROL 0xD4 /* Global Control */ 583*1da177e4SLinus Torvalds #define CTRL_LED 0x80 /* Control onboard LED */ 584*1da177e4SLinus Torvalds #define EN_EEPROM 0x10 /* Enable EEPROM programming */ 585*1da177e4SLinus Torvalds #define DIS_TERM 0x08 /* Disable onboard termination */ 586*1da177e4SLinus Torvalds #define AUTOTERM 0x04 /* Enable Auto SCSI terminator */ 587*1da177e4SLinus Torvalds #define LOW8TERM 0x02 /* Enable Lower 8 bit SCSI terminator */ 588*1da177e4SLinus Torvalds #define UP8TERM 0x01 /* Enable Upper 8 bit SCSI terminator */ 589*1da177e4SLinus Torvalds 590*1da177e4SLinus Torvalds #define TRM_S1040_GEN_STATUS 0xD5 /* Global Status */ 591*1da177e4SLinus Torvalds #define GTIMEOUT 0x80 /* Global timer reach 0 */ 592*1da177e4SLinus Torvalds #define EXT68HIGH 0x40 /* Higher 8 bit connected externally */ 593*1da177e4SLinus Torvalds #define INT68HIGH 0x20 /* Higher 8 bit connected internally */ 594*1da177e4SLinus Torvalds #define CON5068 0x10 /* External 50/68 pin connected (low) */ 595*1da177e4SLinus Torvalds #define CON68 0x08 /* Internal 68 pin connected (low) */ 596*1da177e4SLinus Torvalds #define CON50 0x04 /* Internal 50 pin connected (low!) */ 597*1da177e4SLinus Torvalds #define WIDESCSI 0x02 /* Wide SCSI card */ 598*1da177e4SLinus Torvalds #define STATUS_LOAD_DEFAULT 0x01 /* */ 599*1da177e4SLinus Torvalds 600*1da177e4SLinus Torvalds #define TRM_S1040_GEN_NVRAM 0xD6 /* Serial NON-VOLATILE RAM port */ 601*1da177e4SLinus Torvalds #define NVR_BITOUT 0x08 /* Serial data out */ 602*1da177e4SLinus Torvalds #define NVR_BITIN 0x04 /* Serial data in */ 603*1da177e4SLinus Torvalds #define NVR_CLOCK 0x02 /* Serial clock */ 604*1da177e4SLinus Torvalds #define NVR_SELECT 0x01 /* Serial select */ 605*1da177e4SLinus Torvalds 606*1da177e4SLinus Torvalds #define TRM_S1040_GEN_EDATA 0xD7 /* Parallel EEPROM data port */ 607*1da177e4SLinus Torvalds #define TRM_S1040_GEN_EADDRESS 0xD8 /* Parallel EEPROM address */ 608*1da177e4SLinus Torvalds #define TRM_S1040_GEN_TIMER 0xDB /* Global timer */ 609*1da177e4SLinus Torvalds 610*1da177e4SLinus Torvalds /************************************************************************/ 611*1da177e4SLinus Torvalds /* */ 612*1da177e4SLinus Torvalds /* NvmTarCfg0: Target configuration byte 0 :..pDCB->DevMode */ 613*1da177e4SLinus Torvalds /* */ 614*1da177e4SLinus Torvalds /************************************************************************/ 615*1da177e4SLinus Torvalds #define NTC_DO_WIDE_NEGO 0x20 /* Wide negotiate */ 616*1da177e4SLinus Torvalds #define NTC_DO_TAG_QUEUEING 0x10 /* Enable SCSI tag queuing */ 617*1da177e4SLinus Torvalds #define NTC_DO_SEND_START 0x08 /* Send start command SPINUP */ 618*1da177e4SLinus Torvalds #define NTC_DO_DISCONNECT 0x04 /* Enable SCSI disconnect */ 619*1da177e4SLinus Torvalds #define NTC_DO_SYNC_NEGO 0x02 /* Sync negotiation */ 620*1da177e4SLinus Torvalds #define NTC_DO_PARITY_CHK 0x01 /* (it sould define at NAC) */ 621*1da177e4SLinus Torvalds /* Parity check enable */ 622*1da177e4SLinus Torvalds 623*1da177e4SLinus Torvalds /************************************************************************/ 624*1da177e4SLinus Torvalds /* */ 625*1da177e4SLinus Torvalds /* Nvram Initiater bits definition */ 626*1da177e4SLinus Torvalds /* */ 627*1da177e4SLinus Torvalds /************************************************************************/ 628*1da177e4SLinus Torvalds #if 0 629*1da177e4SLinus Torvalds #define MORE2_DRV BIT0 630*1da177e4SLinus Torvalds #define GREATER_1G BIT1 631*1da177e4SLinus Torvalds #define RST_SCSI_BUS BIT2 632*1da177e4SLinus Torvalds #define ACTIVE_NEGATION BIT3 633*1da177e4SLinus Torvalds #define NO_SEEK BIT4 634*1da177e4SLinus Torvalds #define LUN_CHECK BIT5 635*1da177e4SLinus Torvalds #endif 636*1da177e4SLinus Torvalds 637*1da177e4SLinus Torvalds /************************************************************************/ 638*1da177e4SLinus Torvalds /* */ 639*1da177e4SLinus Torvalds /* Nvram Adapter Cfg bits definition */ 640*1da177e4SLinus Torvalds /* */ 641*1da177e4SLinus Torvalds /************************************************************************/ 642*1da177e4SLinus Torvalds #define NAC_SCANLUN 0x20 /* Include LUN as BIOS device */ 643*1da177e4SLinus Torvalds #define NAC_POWERON_SCSI_RESET 0x04 /* Power on reset enable */ 644*1da177e4SLinus Torvalds #define NAC_GREATER_1G 0x02 /* > 1G support enable */ 645*1da177e4SLinus Torvalds #define NAC_GT2DRIVES 0x01 /* Support more than 2 drives */ 646*1da177e4SLinus Torvalds /* #define NAC_DO_PARITY_CHK 0x08 */ /* Parity check enable */ 647*1da177e4SLinus Torvalds 648*1da177e4SLinus Torvalds #endif 649