1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2015 Linaro Ltd. 4 * Copyright (c) 2015 Hisilicon Limited. 5 */ 6 7 #ifndef _HISI_SAS_H_ 8 #define _HISI_SAS_H_ 9 10 #include <linux/acpi.h> 11 #include <linux/clk.h> 12 #include <linux/debugfs.h> 13 #include <linux/dmapool.h> 14 #include <linux/iopoll.h> 15 #include <linux/lcm.h> 16 #include <linux/libata.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/module.h> 19 #include <linux/of_address.h> 20 #include <linux/pci.h> 21 #include <linux/platform_device.h> 22 #include <linux/property.h> 23 #include <linux/regmap.h> 24 #include <scsi/sas_ata.h> 25 #include <scsi/libsas.h> 26 27 #define HISI_SAS_MAX_PHYS 9 28 #define HISI_SAS_MAX_QUEUES 32 29 #define HISI_SAS_QUEUE_SLOTS 4096 30 #define HISI_SAS_MAX_ITCT_ENTRIES 1024 31 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 32 #define HISI_SAS_RESET_BIT 0 33 #define HISI_SAS_REJECT_CMD_BIT 1 34 #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 35 #define HISI_SAS_RESERVED_IPTT 96 36 #define HISI_SAS_UNRESERVED_IPTT \ 37 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 38 39 #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 40 #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 41 42 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 43 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 44 45 #define hisi_sas_status_buf_addr(buf) \ 46 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 47 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) 48 #define hisi_sas_status_buf_addr_dma(slot) \ 49 hisi_sas_status_buf_addr((slot)->buf_dma) 50 51 #define hisi_sas_cmd_hdr_addr(buf) \ 52 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) 53 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) 54 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) 55 56 #define hisi_sas_sge_addr(buf) \ 57 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 58 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) 59 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) 60 61 #define hisi_sas_sge_dif_addr(buf) \ 62 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) 63 #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) 64 #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) 65 66 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 67 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 68 #define HISI_SAS_MAX_STP_RESP_SZ 28 69 70 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 71 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 72 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 73 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 74 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 75 76 #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ 77 SHOST_DIF_TYPE2_PROTECTION | \ 78 SHOST_DIF_TYPE3_PROTECTION) 79 80 #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ 81 SHOST_DIX_TYPE2_PROTECTION | \ 82 SHOST_DIX_TYPE3_PROTECTION) 83 84 #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) 85 86 #define HISI_SAS_WAIT_PHYUP_TIMEOUT 20 87 88 struct hisi_hba; 89 90 enum { 91 PORT_TYPE_SAS = (1U << 1), 92 PORT_TYPE_SATA = (1U << 0), 93 }; 94 95 enum dev_status { 96 HISI_SAS_DEV_INIT, 97 HISI_SAS_DEV_NORMAL, 98 }; 99 100 enum { 101 HISI_SAS_INT_ABT_CMD = 0, 102 HISI_SAS_INT_ABT_DEV = 1, 103 }; 104 105 enum hisi_sas_dev_type { 106 HISI_SAS_DEV_TYPE_STP = 0, 107 HISI_SAS_DEV_TYPE_SSP, 108 HISI_SAS_DEV_TYPE_SATA, 109 }; 110 111 struct hisi_sas_hw_error { 112 u32 irq_msk; 113 u32 msk; 114 int shift; 115 const char *msg; 116 int reg; 117 const struct hisi_sas_hw_error *sub; 118 }; 119 120 struct hisi_sas_rst { 121 struct hisi_hba *hisi_hba; 122 struct completion *completion; 123 struct work_struct work; 124 bool done; 125 }; 126 127 #define HISI_SAS_RST_WORK_INIT(r, c) \ 128 { .hisi_hba = hisi_hba, \ 129 .completion = &c, \ 130 .work = __WORK_INITIALIZER(r.work, \ 131 hisi_sas_sync_rst_work_handler), \ 132 .done = false, \ 133 } 134 135 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 136 DECLARE_COMPLETION_ONSTACK(c); \ 137 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 138 139 enum hisi_sas_bit_err_type { 140 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 141 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 142 }; 143 144 enum hisi_sas_phy_event { 145 HISI_PHYE_PHY_UP = 0U, 146 HISI_PHYE_LINK_RESET, 147 HISI_PHYES_NUM, 148 }; 149 150 struct hisi_sas_phy { 151 struct work_struct works[HISI_PHYES_NUM]; 152 struct hisi_hba *hisi_hba; 153 struct hisi_sas_port *port; 154 struct asd_sas_phy sas_phy; 155 struct sas_identify identify; 156 struct completion *reset_completion; 157 struct timer_list timer; 158 spinlock_t lock; 159 u64 port_id; /* from hw */ 160 u64 frame_rcvd_size; 161 u8 frame_rcvd[32]; 162 u8 phy_attached; 163 u8 in_reset; 164 u8 reserved[2]; 165 u32 phy_type; 166 u32 code_violation_err_count; 167 enum sas_linkrate minimum_linkrate; 168 enum sas_linkrate maximum_linkrate; 169 int enable; 170 }; 171 172 struct hisi_sas_port { 173 struct asd_sas_port sas_port; 174 u8 port_attached; 175 u8 id; /* from hw */ 176 }; 177 178 struct hisi_sas_cq { 179 struct hisi_hba *hisi_hba; 180 const struct cpumask *pci_irq_mask; 181 struct tasklet_struct tasklet; 182 int rd_point; 183 int id; 184 }; 185 186 struct hisi_sas_dq { 187 struct hisi_hba *hisi_hba; 188 struct list_head list; 189 spinlock_t lock; 190 int wr_point; 191 int id; 192 }; 193 194 struct hisi_sas_device { 195 struct hisi_hba *hisi_hba; 196 struct domain_device *sas_device; 197 struct completion *completion; 198 struct hisi_sas_dq *dq; 199 struct list_head list; 200 enum sas_device_type dev_type; 201 enum dev_status dev_status; 202 int device_id; 203 int sata_idx; 204 spinlock_t lock; /* For protecting slots */ 205 }; 206 207 struct hisi_sas_tmf_task { 208 int force_phy; 209 int phy_id; 210 u8 tmf; 211 u16 tag_of_task_to_be_managed; 212 }; 213 214 struct hisi_sas_slot { 215 struct list_head entry; 216 struct list_head delivery; 217 struct sas_task *task; 218 struct hisi_sas_port *port; 219 u64 n_elem; 220 u64 n_elem_dif; 221 int dlvry_queue; 222 int dlvry_queue_slot; 223 int cmplt_queue; 224 int cmplt_queue_slot; 225 int abort; 226 int ready; 227 int device_id; 228 void *cmd_hdr; 229 dma_addr_t cmd_hdr_dma; 230 struct timer_list internal_abort_timer; 231 bool is_internal; 232 struct hisi_sas_tmf_task *tmf; 233 /* Do not reorder/change members after here */ 234 void *buf; 235 dma_addr_t buf_dma; 236 u16 idx; 237 }; 238 239 #define HISI_SAS_DEBUGFS_REG(x) {#x, x} 240 241 struct hisi_sas_debugfs_reg_lu { 242 char *name; 243 int off; 244 }; 245 246 struct hisi_sas_debugfs_reg { 247 const struct hisi_sas_debugfs_reg_lu *lu; 248 int count; 249 int base_off; 250 union { 251 u32 (*read_global_reg)(struct hisi_hba *hisi_hba, u32 off); 252 u32 (*read_port_reg)(struct hisi_hba *hisi_hba, int port, 253 u32 off); 254 }; 255 }; 256 257 struct hisi_sas_iost_itct_cache { 258 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 259 }; 260 261 enum hisi_sas_debugfs_reg_array_member { 262 DEBUGFS_GLOBAL = 0, 263 DEBUGFS_AXI, 264 DEBUGFS_RAS, 265 DEBUGFS_REGS_NUM 266 }; 267 268 enum hisi_sas_debugfs_cache_type { 269 HISI_SAS_ITCT_CACHE, 270 HISI_SAS_IOST_CACHE, 271 }; 272 273 struct hisi_sas_hw { 274 int (*hw_init)(struct hisi_hba *hisi_hba); 275 void (*setup_itct)(struct hisi_hba *hisi_hba, 276 struct hisi_sas_device *device); 277 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, 278 struct domain_device *device); 279 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 280 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 281 void (*start_delivery)(struct hisi_sas_dq *dq); 282 void (*prep_ssp)(struct hisi_hba *hisi_hba, 283 struct hisi_sas_slot *slot); 284 void (*prep_smp)(struct hisi_hba *hisi_hba, 285 struct hisi_sas_slot *slot); 286 void (*prep_stp)(struct hisi_hba *hisi_hba, 287 struct hisi_sas_slot *slot); 288 void (*prep_abort)(struct hisi_hba *hisi_hba, 289 struct hisi_sas_slot *slot, 290 int device_id, int abort_flag, int tag_to_abort); 291 void (*phys_init)(struct hisi_hba *hisi_hba); 292 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 293 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 294 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 295 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 296 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 297 struct sas_phy_linkrates *linkrates); 298 enum sas_linkrate (*phy_get_max_linkrate)(void); 299 void (*clear_itct)(struct hisi_hba *hisi_hba, 300 struct hisi_sas_device *dev); 301 void (*free_device)(struct hisi_sas_device *sas_dev); 302 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 303 void (*dereg_device)(struct hisi_hba *hisi_hba, 304 struct domain_device *device); 305 int (*soft_reset)(struct hisi_hba *hisi_hba); 306 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 307 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 308 u8 reg_index, u8 reg_count, u8 *write_data); 309 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 310 int delay_ms, int timeout_ms); 311 void (*snapshot_prepare)(struct hisi_hba *hisi_hba); 312 void (*snapshot_restore)(struct hisi_hba *hisi_hba); 313 int (*set_bist)(struct hisi_hba *hisi_hba, bool enable); 314 void (*read_iost_itct_cache)(struct hisi_hba *hisi_hba, 315 enum hisi_sas_debugfs_cache_type type, 316 u32 *cache); 317 int complete_hdr_size; 318 struct scsi_host_template *sht; 319 320 const struct hisi_sas_debugfs_reg *debugfs_reg_array[DEBUGFS_REGS_NUM]; 321 const struct hisi_sas_debugfs_reg *debugfs_reg_port; 322 }; 323 324 struct hisi_hba { 325 /* This must be the first element, used by SHOST_TO_SAS_HA */ 326 struct sas_ha_struct *p; 327 328 struct platform_device *platform_dev; 329 struct pci_dev *pci_dev; 330 struct device *dev; 331 332 int prot_mask; 333 334 void __iomem *regs; 335 void __iomem *sgpio_regs; 336 struct regmap *ctrl; 337 u32 ctrl_reset_reg; 338 u32 ctrl_reset_sts_reg; 339 u32 ctrl_clock_ena_reg; 340 u32 refclk_frequency_mhz; 341 u8 sas_addr[SAS_ADDR_SIZE]; 342 343 int n_phy; 344 spinlock_t lock; 345 struct semaphore sem; 346 347 struct timer_list timer; 348 struct workqueue_struct *wq; 349 350 int slot_index_count; 351 int last_slot_index; 352 int last_dev_id; 353 unsigned long *slot_index_tags; 354 unsigned long reject_stp_links_msk; 355 356 /* SCSI/SAS glue */ 357 struct sas_ha_struct sha; 358 struct Scsi_Host *shost; 359 360 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 361 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 362 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 363 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 364 365 int queue_count; 366 367 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 368 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 369 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 370 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 371 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 372 struct hisi_sas_initial_fis *initial_fis; 373 dma_addr_t initial_fis_dma; 374 struct hisi_sas_itct *itct; 375 dma_addr_t itct_dma; 376 struct hisi_sas_iost *iost; 377 dma_addr_t iost_dma; 378 struct hisi_sas_breakpoint *breakpoint; 379 dma_addr_t breakpoint_dma; 380 struct hisi_sas_breakpoint *sata_breakpoint; 381 dma_addr_t sata_breakpoint_dma; 382 struct hisi_sas_slot *slot_info; 383 unsigned long flags; 384 const struct hisi_sas_hw *hw; /* Low level hw interface */ 385 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 386 struct work_struct rst_work; 387 struct work_struct debugfs_work; 388 u32 phy_state; 389 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ 390 u32 intr_coal_count; /* Interrupt count to coalesce */ 391 392 int cq_nvecs; 393 unsigned int *reply_map; 394 395 /* bist */ 396 enum sas_linkrate debugfs_bist_linkrate; 397 int debugfs_bist_code_mode; 398 int debugfs_bist_phy_no; 399 int debugfs_bist_mode; 400 u32 debugfs_bist_cnt; 401 int debugfs_bist_enable; 402 403 /* debugfs memories */ 404 /* Put Global AXI and RAS Register into register array */ 405 u32 *debugfs_regs[DEBUGFS_REGS_NUM]; 406 u32 *debugfs_port_reg[HISI_SAS_MAX_PHYS]; 407 void *debugfs_complete_hdr[HISI_SAS_MAX_QUEUES]; 408 struct hisi_sas_cmd_hdr *debugfs_cmd_hdr[HISI_SAS_MAX_QUEUES]; 409 struct hisi_sas_iost *debugfs_iost; 410 struct hisi_sas_itct *debugfs_itct; 411 u64 *debugfs_iost_cache; 412 u64 *debugfs_itct_cache; 413 414 struct dentry *debugfs_dir; 415 struct dentry *debugfs_dump_dentry; 416 struct dentry *debugfs_bist_dentry; 417 bool debugfs_snapshot; 418 }; 419 420 /* Generic HW DMA host memory structures */ 421 /* Delivery queue header */ 422 struct hisi_sas_cmd_hdr { 423 /* dw0 */ 424 __le32 dw0; 425 426 /* dw1 */ 427 __le32 dw1; 428 429 /* dw2 */ 430 __le32 dw2; 431 432 /* dw3 */ 433 __le32 transfer_tags; 434 435 /* dw4 */ 436 __le32 data_transfer_len; 437 438 /* dw5 */ 439 __le32 first_burst_num; 440 441 /* dw6 */ 442 __le32 sg_len; 443 444 /* dw7 */ 445 __le32 dw7; 446 447 /* dw8-9 */ 448 __le64 cmd_table_addr; 449 450 /* dw10-11 */ 451 __le64 sts_buffer_addr; 452 453 /* dw12-13 */ 454 __le64 prd_table_addr; 455 456 /* dw14-15 */ 457 __le64 dif_prd_table_addr; 458 }; 459 460 struct hisi_sas_itct { 461 __le64 qw0; 462 __le64 sas_addr; 463 __le64 qw2; 464 __le64 qw3; 465 __le64 qw4_15[12]; 466 }; 467 468 struct hisi_sas_iost { 469 __le64 qw0; 470 __le64 qw1; 471 __le64 qw2; 472 __le64 qw3; 473 }; 474 475 struct hisi_sas_err_record { 476 u32 data[4]; 477 }; 478 479 struct hisi_sas_initial_fis { 480 struct hisi_sas_err_record err_record; 481 struct dev_to_host_fis fis; 482 u32 rsvd[3]; 483 }; 484 485 struct hisi_sas_breakpoint { 486 u8 data[128]; 487 }; 488 489 struct hisi_sas_sata_breakpoint { 490 struct hisi_sas_breakpoint tag[32]; 491 }; 492 493 struct hisi_sas_sge { 494 __le64 addr; 495 __le32 page_ctrl_0; 496 __le32 page_ctrl_1; 497 __le32 data_len; 498 __le32 data_off; 499 }; 500 501 struct hisi_sas_command_table_smp { 502 u8 bytes[44]; 503 }; 504 505 struct hisi_sas_command_table_stp { 506 struct host_to_dev_fis command_fis; 507 u8 dummy[12]; 508 u8 atapi_cdb[ATAPI_CDB_LEN]; 509 }; 510 511 #define HISI_SAS_SGE_PAGE_CNT (124) 512 struct hisi_sas_sge_page { 513 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 514 } __aligned(16); 515 516 #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT 517 struct hisi_sas_sge_dif_page { 518 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; 519 } __aligned(16); 520 521 struct hisi_sas_command_table_ssp { 522 struct ssp_frame_hdr hdr; 523 union { 524 struct { 525 struct ssp_command_iu task; 526 u32 prot[7]; 527 }; 528 struct ssp_tmf_iu ssp_task; 529 struct xfer_rdy_iu xfer_rdy; 530 struct ssp_response_iu ssp_res; 531 } u; 532 }; 533 534 union hisi_sas_command_table { 535 struct hisi_sas_command_table_ssp ssp; 536 struct hisi_sas_command_table_smp smp; 537 struct hisi_sas_command_table_stp stp; 538 } __aligned(16); 539 540 struct hisi_sas_status_buffer { 541 struct hisi_sas_err_record err; 542 u8 iu[1024]; 543 } __aligned(16); 544 545 struct hisi_sas_slot_buf_table { 546 struct hisi_sas_status_buffer status_buffer; 547 union hisi_sas_command_table command_header; 548 struct hisi_sas_sge_page sge_page; 549 }; 550 551 struct hisi_sas_slot_dif_buf_table { 552 struct hisi_sas_slot_buf_table slot_buf; 553 struct hisi_sas_sge_dif_page sge_dif_page; 554 }; 555 556 extern struct scsi_transport_template *hisi_sas_stt; 557 558 extern bool hisi_sas_debugfs_enable; 559 extern struct dentry *hisi_sas_debugfs_dir; 560 561 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 562 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); 563 extern void hisi_sas_free(struct hisi_hba *hisi_hba); 564 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, 565 int direction); 566 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 567 extern void hisi_sas_sata_done(struct sas_task *task, 568 struct hisi_sas_slot *slot); 569 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 570 extern int hisi_sas_probe(struct platform_device *pdev, 571 const struct hisi_sas_hw *ops); 572 extern int hisi_sas_remove(struct platform_device *pdev); 573 574 extern int hisi_sas_slave_configure(struct scsi_device *sdev); 575 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 576 extern void hisi_sas_scan_start(struct Scsi_Host *shost); 577 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 578 extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, 579 int enable); 580 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 581 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 582 struct sas_task *task, 583 struct hisi_sas_slot *slot); 584 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 585 extern void hisi_sas_rst_work_handler(struct work_struct *work); 586 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 587 extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba); 588 extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); 589 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 590 enum hisi_sas_phy_event event); 591 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 592 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 593 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); 594 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); 595 extern void hisi_sas_debugfs_init(struct hisi_hba *hisi_hba); 596 extern void hisi_sas_debugfs_exit(struct hisi_hba *hisi_hba); 597 extern void hisi_sas_debugfs_work_handler(struct work_struct *work); 598 #endif 599