1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 24 #define CONFIG_SCSI_LPFC_DEBUG_FS 25 #endif 26 27 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 28 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 29 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 30 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 31 #define LPFC_RPI_LOW_WATER_MARK 10 32 33 #define LPFC_UNREG_FCF 1 34 #define LPFC_SKIP_UNREG_FCF 0 35 36 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 37 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 38 39 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 40 #define LPFC_NEMBED_MBOX_SGL_CNT 254 41 42 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 43 #define LPFC_HBA_HDWQ_MIN 0 44 #define LPFC_HBA_HDWQ_MAX 128 45 #define LPFC_HBA_HDWQ_DEF 0 46 47 /* Common buffer size to accomidate SCSI and NVME IO buffers */ 48 #define LPFC_COMMON_IO_BUF_SZ 768 49 50 /* 51 * Provide the default FCF Record attributes used by the driver 52 * when nonFIP mode is configured and there is no other default 53 * FCF Record attributes. 54 */ 55 #define LPFC_FCOE_FCF_DEF_INDEX 0 56 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 57 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 58 59 #define LPFC_FCOE_NULL_VID 0xFFF 60 #define LPFC_FCOE_IGNORE_VID 0xFFFF 61 62 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 63 #define LPFC_FCOE_FCF_MAC3 0xFF 64 #define LPFC_FCOE_FCF_MAC4 0xFF 65 #define LPFC_FCOE_FCF_MAC5 0xFE 66 #define LPFC_FCOE_FCF_MAP0 0x0E 67 #define LPFC_FCOE_FCF_MAP1 0xFC 68 #define LPFC_FCOE_FCF_MAP2 0x00 69 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 70 #define LPFC_FCOE_FKA_ADV_PER 0 71 #define LPFC_FCOE_FIP_PRIORITY 0x80 72 73 #define sli4_sid_from_fc_hdr(fc_hdr) \ 74 ((fc_hdr)->fh_s_id[0] << 16 | \ 75 (fc_hdr)->fh_s_id[1] << 8 | \ 76 (fc_hdr)->fh_s_id[2]) 77 78 #define sli4_did_from_fc_hdr(fc_hdr) \ 79 ((fc_hdr)->fh_d_id[0] << 16 | \ 80 (fc_hdr)->fh_d_id[1] << 8 | \ 81 (fc_hdr)->fh_d_id[2]) 82 83 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 84 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 85 (fc_hdr)->fh_f_ctl[1] << 8 | \ 86 (fc_hdr)->fh_f_ctl[2]) 87 88 #define sli4_type_from_fc_hdr(fc_hdr) \ 89 ((fc_hdr)->fh_type) 90 91 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 92 93 #define INT_FW_UPGRADE 0 94 #define RUN_FW_UPGRADE 1 95 96 enum lpfc_sli4_queue_type { 97 LPFC_EQ, 98 LPFC_GCQ, 99 LPFC_MCQ, 100 LPFC_WCQ, 101 LPFC_RCQ, 102 LPFC_MQ, 103 LPFC_WQ, 104 LPFC_HRQ, 105 LPFC_DRQ 106 }; 107 108 /* The queue sub-type defines the functional purpose of the queue */ 109 enum lpfc_sli4_queue_subtype { 110 LPFC_NONE, 111 LPFC_MBOX, 112 LPFC_FCP, 113 LPFC_ELS, 114 LPFC_NVME, 115 LPFC_NVMET, 116 LPFC_NVME_LS, 117 LPFC_USOL 118 }; 119 120 /* RQ buffer list */ 121 struct lpfc_rqb { 122 uint16_t entry_count; /* Current number of RQ slots */ 123 uint16_t buffer_count; /* Current number of buffers posted */ 124 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 125 /* Callback for HBQ buffer allocation */ 126 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 127 /* Callback for HBQ buffer free */ 128 void (*rqb_free_buffer)(struct lpfc_hba *, 129 struct rqb_dmabuf *); 130 }; 131 132 struct lpfc_queue { 133 struct list_head list; 134 struct list_head wq_list; 135 struct list_head wqfull_list; 136 enum lpfc_sli4_queue_type type; 137 enum lpfc_sli4_queue_subtype subtype; 138 struct lpfc_hba *phba; 139 struct list_head child_list; 140 struct list_head page_list; 141 struct list_head sgl_list; 142 struct list_head cpu_list; 143 uint32_t entry_count; /* Number of entries to support on the queue */ 144 uint32_t entry_size; /* Size of each queue entry. */ 145 uint32_t entry_cnt_per_pg; 146 uint32_t notify_interval; /* Queue Notification Interval 147 * For chip->host queues (EQ, CQ, RQ): 148 * specifies the interval (number of 149 * entries) where the doorbell is rung to 150 * notify the chip of entry consumption. 151 * For host->chip queues (WQ): 152 * specifies the interval (number of 153 * entries) where consumption CQE is 154 * requested to indicate WQ entries 155 * consumed by the chip. 156 * Not used on an MQ. 157 */ 158 #define LPFC_EQ_NOTIFY_INTRVL 16 159 #define LPFC_CQ_NOTIFY_INTRVL 16 160 #define LPFC_WQ_NOTIFY_INTRVL 16 161 #define LPFC_RQ_NOTIFY_INTRVL 16 162 uint32_t max_proc_limit; /* Queue Processing Limit 163 * For chip->host queues (EQ, CQ): 164 * specifies the maximum number of 165 * entries to be consumed in one 166 * processing iteration sequence. Queue 167 * will be rearmed after each iteration. 168 * Not used on an MQ, RQ or WQ. 169 */ 170 #define LPFC_EQ_MAX_PROC_LIMIT 256 171 #define LPFC_CQ_MIN_PROC_LIMIT 64 172 #define LPFC_CQ_MAX_PROC_LIMIT LPFC_CQE_EXP_COUNT // 4096 173 #define LPFC_CQ_DEF_MAX_PROC_LIMIT LPFC_CQE_DEF_COUNT // 1024 174 #define LPFC_CQ_MIN_THRESHOLD_TO_POLL 64 175 #define LPFC_CQ_MAX_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 176 #define LPFC_CQ_DEF_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 177 uint32_t queue_claimed; /* indicates queue is being processed */ 178 uint32_t queue_id; /* Queue ID assigned by the hardware */ 179 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 180 uint32_t host_index; /* The host's index for putting or getting */ 181 uint32_t hba_index; /* The last known hba index for get or put */ 182 uint32_t q_mode; 183 184 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 185 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 186 187 uint16_t page_count; /* Number of pages allocated for this queue */ 188 uint16_t page_size; /* size of page allocated for this queue */ 189 #define LPFC_EXPANDED_PAGE_SIZE 16384 190 #define LPFC_DEFAULT_PAGE_SIZE 4096 191 uint16_t chann; /* Hardware Queue association WQ/CQ */ 192 /* CPU affinity for EQ */ 193 #define LPFC_FIND_BY_EQ 0 194 #define LPFC_FIND_BY_HDWQ 1 195 uint8_t db_format; 196 #define LPFC_DB_RING_FORMAT 0x01 197 #define LPFC_DB_LIST_FORMAT 0x02 198 uint8_t q_flag; 199 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */ 200 void __iomem *db_regaddr; 201 uint16_t dpp_enable; 202 uint16_t dpp_id; 203 void __iomem *dpp_regaddr; 204 205 /* For q stats */ 206 uint32_t q_cnt_1; 207 uint32_t q_cnt_2; 208 uint32_t q_cnt_3; 209 uint64_t q_cnt_4; 210 /* defines for EQ stats */ 211 #define EQ_max_eqe q_cnt_1 212 #define EQ_no_entry q_cnt_2 213 #define EQ_cqe_cnt q_cnt_3 214 #define EQ_processed q_cnt_4 215 216 /* defines for CQ stats */ 217 #define CQ_mbox q_cnt_1 218 #define CQ_max_cqe q_cnt_1 219 #define CQ_release_wqe q_cnt_2 220 #define CQ_xri_aborted q_cnt_3 221 #define CQ_wq q_cnt_4 222 223 /* defines for WQ stats */ 224 #define WQ_overflow q_cnt_1 225 #define WQ_posted q_cnt_4 226 227 /* defines for RQ stats */ 228 #define RQ_no_posted_buf q_cnt_1 229 #define RQ_no_buf_found q_cnt_2 230 #define RQ_buf_posted q_cnt_3 231 #define RQ_rcv_buf q_cnt_4 232 233 struct work_struct irqwork; 234 struct work_struct spwork; 235 struct delayed_work sched_irqwork; 236 struct delayed_work sched_spwork; 237 238 uint64_t isr_timestamp; 239 uint16_t hdwq; 240 uint16_t last_cpu; /* most recent cpu */ 241 uint8_t qe_valid; 242 struct lpfc_queue *assoc_qp; 243 void **q_pgs; /* array to index entries per page */ 244 }; 245 246 struct lpfc_sli4_link { 247 uint32_t speed; 248 uint8_t duplex; 249 uint8_t status; 250 uint8_t type; 251 uint8_t number; 252 uint8_t fault; 253 uint32_t logical_speed; 254 uint16_t topology; 255 }; 256 257 struct lpfc_fcf_rec { 258 uint8_t fabric_name[8]; 259 uint8_t switch_name[8]; 260 uint8_t mac_addr[6]; 261 uint16_t fcf_indx; 262 uint32_t priority; 263 uint16_t vlan_id; 264 uint32_t addr_mode; 265 uint32_t flag; 266 #define BOOT_ENABLE 0x01 267 #define RECORD_VALID 0x02 268 }; 269 270 struct lpfc_fcf_pri_rec { 271 uint16_t fcf_index; 272 #define LPFC_FCF_ON_PRI_LIST 0x0001 273 #define LPFC_FCF_FLOGI_FAILED 0x0002 274 uint16_t flag; 275 uint32_t priority; 276 }; 277 278 struct lpfc_fcf_pri { 279 struct list_head list; 280 struct lpfc_fcf_pri_rec fcf_rec; 281 }; 282 283 /* 284 * Maximum FCF table index, it is for driver internal book keeping, it 285 * just needs to be no less than the supported HBA's FCF table size. 286 */ 287 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 288 289 struct lpfc_fcf { 290 uint16_t fcfi; 291 uint32_t fcf_flag; 292 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 293 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 294 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 295 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 296 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 297 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 298 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 299 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 300 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 301 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 302 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 303 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 304 uint16_t fcf_redisc_attempted; 305 uint32_t addr_mode; 306 uint32_t eligible_fcf_cnt; 307 struct lpfc_fcf_rec current_rec; 308 struct lpfc_fcf_rec failover_rec; 309 struct list_head fcf_pri_list; 310 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 311 uint32_t current_fcf_scan_pri; 312 struct timer_list redisc_wait; 313 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 314 }; 315 316 317 #define LPFC_REGION23_SIGNATURE "RG23" 318 #define LPFC_REGION23_VERSION 1 319 #define LPFC_REGION23_LAST_REC 0xff 320 #define DRIVER_SPECIFIC_TYPE 0xA2 321 #define LINUX_DRIVER_ID 0x20 322 #define PORT_STE_TYPE 0x1 323 324 struct lpfc_fip_param_hdr { 325 uint8_t type; 326 #define FCOE_PARAM_TYPE 0xA0 327 uint8_t length; 328 #define FCOE_PARAM_LENGTH 2 329 uint8_t parm_version; 330 #define FIPP_VERSION 0x01 331 uint8_t parm_flags; 332 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 333 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 334 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 335 #define FIPP_MODE_ON 0x1 336 #define FIPP_MODE_OFF 0x0 337 #define FIPP_VLAN_VALID 0x1 338 }; 339 340 struct lpfc_fcoe_params { 341 uint8_t fc_map[3]; 342 uint8_t reserved1; 343 uint16_t vlan_tag; 344 uint8_t reserved[2]; 345 }; 346 347 struct lpfc_fcf_conn_hdr { 348 uint8_t type; 349 #define FCOE_CONN_TBL_TYPE 0xA1 350 uint8_t length; /* words */ 351 uint8_t reserved[2]; 352 }; 353 354 struct lpfc_fcf_conn_rec { 355 uint16_t flags; 356 #define FCFCNCT_VALID 0x0001 357 #define FCFCNCT_BOOT 0x0002 358 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 359 #define FCFCNCT_FBNM_VALID 0x0008 360 #define FCFCNCT_SWNM_VALID 0x0010 361 #define FCFCNCT_VLAN_VALID 0x0020 362 #define FCFCNCT_AM_VALID 0x0040 363 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 364 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 365 366 uint16_t vlan_tag; 367 uint8_t fabric_name[8]; 368 uint8_t switch_name[8]; 369 }; 370 371 struct lpfc_fcf_conn_entry { 372 struct list_head list; 373 struct lpfc_fcf_conn_rec conn_rec; 374 }; 375 376 /* 377 * Define the host's bootstrap mailbox. This structure contains 378 * the member attributes needed to create, use, and destroy the 379 * bootstrap mailbox region. 380 * 381 * The macro definitions for the bmbx data structure are defined 382 * in lpfc_hw4.h with the register definition. 383 */ 384 struct lpfc_bmbx { 385 struct lpfc_dmabuf *dmabuf; 386 struct dma_address dma_address; 387 void *avirt; 388 dma_addr_t aphys; 389 uint32_t bmbx_size; 390 }; 391 392 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 393 394 #define LPFC_EQE_SIZE_4B 4 395 #define LPFC_EQE_SIZE_16B 16 396 #define LPFC_CQE_SIZE 16 397 #define LPFC_WQE_SIZE 64 398 #define LPFC_WQE128_SIZE 128 399 #define LPFC_MQE_SIZE 256 400 #define LPFC_RQE_SIZE 8 401 402 #define LPFC_EQE_DEF_COUNT 1024 403 #define LPFC_CQE_DEF_COUNT 1024 404 #define LPFC_CQE_EXP_COUNT 4096 405 #define LPFC_WQE_DEF_COUNT 256 406 #define LPFC_WQE_EXP_COUNT 1024 407 #define LPFC_MQE_DEF_COUNT 16 408 #define LPFC_RQE_DEF_COUNT 512 409 410 #define LPFC_QUEUE_NOARM false 411 #define LPFC_QUEUE_REARM true 412 413 414 /* 415 * SLI4 CT field defines 416 */ 417 #define SLI4_CT_RPI 0 418 #define SLI4_CT_VPI 1 419 #define SLI4_CT_VFI 2 420 #define SLI4_CT_FCFI 3 421 422 /* 423 * SLI4 specific data structures 424 */ 425 struct lpfc_max_cfg_param { 426 uint16_t max_xri; 427 uint16_t xri_base; 428 uint16_t xri_used; 429 uint16_t max_rpi; 430 uint16_t rpi_base; 431 uint16_t rpi_used; 432 uint16_t max_vpi; 433 uint16_t vpi_base; 434 uint16_t vpi_used; 435 uint16_t max_vfi; 436 uint16_t vfi_base; 437 uint16_t vfi_used; 438 uint16_t max_fcfi; 439 uint16_t fcfi_used; 440 uint16_t max_eq; 441 uint16_t max_rq; 442 uint16_t max_cq; 443 uint16_t max_wq; 444 }; 445 446 struct lpfc_hba; 447 /* SLI4 HBA multi-fcp queue handler struct */ 448 #define LPFC_SLI4_HANDLER_NAME_SZ 16 449 struct lpfc_hba_eq_hdl { 450 uint32_t idx; 451 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 452 struct lpfc_hba *phba; 453 }; 454 455 /*BB Credit recovery value*/ 456 struct lpfc_bbscn_params { 457 uint32_t word0; 458 #define lpfc_bbscn_min_SHIFT 0 459 #define lpfc_bbscn_min_MASK 0x0000000F 460 #define lpfc_bbscn_min_WORD word0 461 #define lpfc_bbscn_max_SHIFT 4 462 #define lpfc_bbscn_max_MASK 0x0000000F 463 #define lpfc_bbscn_max_WORD word0 464 #define lpfc_bbscn_def_SHIFT 8 465 #define lpfc_bbscn_def_MASK 0x0000000F 466 #define lpfc_bbscn_def_WORD word0 467 }; 468 469 /* Port Capabilities for SLI4 Parameters */ 470 struct lpfc_pc_sli4_params { 471 uint32_t supported; 472 uint32_t if_type; 473 uint32_t sli_rev; 474 uint32_t sli_family; 475 uint32_t featurelevel_1; 476 uint32_t featurelevel_2; 477 uint32_t proto_types; 478 #define LPFC_SLI4_PROTO_FCOE 0x0000001 479 #define LPFC_SLI4_PROTO_FC 0x0000002 480 #define LPFC_SLI4_PROTO_NIC 0x0000004 481 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 482 #define LPFC_SLI4_PROTO_RDMA 0x0000010 483 uint32_t sge_supp_len; 484 uint32_t if_page_sz; 485 uint32_t rq_db_window; 486 uint32_t loopbk_scope; 487 uint32_t oas_supported; 488 uint32_t eq_pages_max; 489 uint32_t eqe_size; 490 uint32_t cq_pages_max; 491 uint32_t cqe_size; 492 uint32_t mq_pages_max; 493 uint32_t mqe_size; 494 uint32_t mq_elem_cnt; 495 uint32_t wq_pages_max; 496 uint32_t wqe_size; 497 uint32_t rq_pages_max; 498 uint32_t rqe_size; 499 uint32_t hdr_pages_max; 500 uint32_t hdr_size; 501 uint32_t hdr_pp_align; 502 uint32_t sgl_pages_max; 503 uint32_t sgl_pp_align; 504 uint8_t cqv; 505 uint8_t mqv; 506 uint8_t wqv; 507 uint8_t rqv; 508 uint8_t eqav; 509 uint8_t cqav; 510 uint8_t wqsize; 511 uint8_t bv1s; 512 #define LPFC_WQ_SZ64_SUPPORT 1 513 #define LPFC_WQ_SZ128_SUPPORT 2 514 uint8_t wqpcnt; 515 }; 516 517 #define LPFC_CQ_4K_PAGE_SZ 0x1 518 #define LPFC_CQ_16K_PAGE_SZ 0x4 519 #define LPFC_WQ_4K_PAGE_SZ 0x1 520 #define LPFC_WQ_16K_PAGE_SZ 0x4 521 522 struct lpfc_iov { 523 uint32_t pf_number; 524 uint32_t vf_number; 525 }; 526 527 struct lpfc_sli4_lnk_info { 528 uint8_t lnk_dv; 529 #define LPFC_LNK_DAT_INVAL 0 530 #define LPFC_LNK_DAT_VAL 1 531 uint8_t lnk_tp; 532 #define LPFC_LNK_GE 0x0 /* FCoE */ 533 #define LPFC_LNK_FC 0x1 /* FC */ 534 #define LPFC_LNK_FC_TRUNKED 0x2 /* FC_Trunked */ 535 uint8_t lnk_no; 536 uint8_t optic_state; 537 }; 538 539 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 540 LPFC_FOF_IO_CHAN_NUM) 541 542 /* Used for IRQ vector to CPU mapping */ 543 struct lpfc_vector_map_info { 544 uint16_t phys_id; 545 uint16_t core_id; 546 uint16_t irq; 547 uint16_t eq; 548 uint16_t hdwq; 549 uint16_t hyper; 550 }; 551 #define LPFC_VECTOR_MAP_EMPTY 0xffff 552 553 /* Multi-XRI pool */ 554 #define XRI_BATCH 8 555 556 struct lpfc_pbl_pool { 557 struct list_head list; 558 u32 count; 559 spinlock_t lock; /* lock for pbl_pool*/ 560 }; 561 562 struct lpfc_pvt_pool { 563 u32 low_watermark; 564 u32 high_watermark; 565 566 struct list_head list; 567 u32 count; 568 spinlock_t lock; /* lock for pvt_pool */ 569 }; 570 571 struct lpfc_multixri_pool { 572 u32 xri_limit; 573 574 /* Starting point when searching a pbl_pool with round-robin method */ 575 u32 rrb_next_hwqid; 576 577 /* Used by lpfc_adjust_pvt_pool_count. 578 * io_req_count is incremented by 1 during IO submission. The heartbeat 579 * handler uses these two variables to determine if pvt_pool is idle or 580 * busy. 581 */ 582 u32 prev_io_req_count; 583 u32 io_req_count; 584 585 /* statistics */ 586 u32 pbl_empty_count; 587 #ifdef LPFC_MXP_STAT 588 u32 above_limit_count; 589 u32 below_limit_count; 590 u32 local_pbl_hit_count; 591 u32 other_pbl_hit_count; 592 u32 stat_max_hwm; 593 594 #define LPFC_MXP_SNAPSHOT_TAKEN 3 /* snapshot is taken at 3rd heartbeats */ 595 u32 stat_pbl_count; 596 u32 stat_pvt_count; 597 u32 stat_busy_count; 598 u32 stat_snapshot_taken; 599 #endif 600 601 /* TODO: Separate pvt_pool into get and put list */ 602 struct lpfc_pbl_pool pbl_pool; /* Public free XRI pool */ 603 struct lpfc_pvt_pool pvt_pool; /* Private free XRI pool */ 604 }; 605 606 struct lpfc_fc4_ctrl_stat { 607 u32 input_requests; 608 u32 output_requests; 609 u32 control_requests; 610 u32 io_cmpls; 611 }; 612 613 #ifdef LPFC_HDWQ_LOCK_STAT 614 struct lpfc_lock_stat { 615 uint32_t alloc_xri_get; 616 uint32_t alloc_xri_put; 617 uint32_t free_xri; 618 uint32_t wq_access; 619 uint32_t alloc_pvt_pool; 620 uint32_t mv_from_pvt_pool; 621 uint32_t mv_to_pub_pool; 622 uint32_t mv_to_pvt_pool; 623 uint32_t free_pub_pool; 624 uint32_t free_pvt_pool; 625 }; 626 #endif 627 628 struct lpfc_eq_intr_info { 629 struct list_head list; 630 uint32_t icnt; 631 }; 632 633 /* SLI4 HBA data structure entries */ 634 struct lpfc_sli4_hdw_queue { 635 /* Pointers to the constructed SLI4 queues */ 636 struct lpfc_queue *hba_eq; /* Event queues for HBA */ 637 struct lpfc_queue *fcp_cq; /* Fast-path FCP compl queue */ 638 struct lpfc_queue *nvme_cq; /* Fast-path NVME compl queue */ 639 struct lpfc_queue *fcp_wq; /* Fast-path FCP work queue */ 640 struct lpfc_queue *nvme_wq; /* Fast-path NVME work queue */ 641 uint16_t fcp_cq_map; 642 uint16_t nvme_cq_map; 643 644 /* Keep track of IO buffers for this hardware queue */ 645 spinlock_t io_buf_list_get_lock; /* Common buf alloc list lock */ 646 struct list_head lpfc_io_buf_list_get; 647 spinlock_t io_buf_list_put_lock; /* Common buf free list lock */ 648 struct list_head lpfc_io_buf_list_put; 649 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 650 struct list_head lpfc_abts_scsi_buf_list; 651 spinlock_t abts_nvme_buf_list_lock; /* list of aborted NVME IOs */ 652 struct list_head lpfc_abts_nvme_buf_list; 653 uint32_t total_io_bufs; 654 uint32_t get_io_bufs; 655 uint32_t put_io_bufs; 656 uint32_t empty_io_bufs; 657 uint32_t abts_scsi_io_bufs; 658 uint32_t abts_nvme_io_bufs; 659 660 /* Multi-XRI pool per HWQ */ 661 struct lpfc_multixri_pool *p_multixri_pool; 662 663 /* FC-4 Stats counters */ 664 struct lpfc_fc4_ctrl_stat nvme_cstat; 665 struct lpfc_fc4_ctrl_stat scsi_cstat; 666 #ifdef LPFC_HDWQ_LOCK_STAT 667 struct lpfc_lock_stat lock_conflict; 668 #endif 669 670 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 671 #define LPFC_CHECK_CPU_CNT 128 672 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT]; 673 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 674 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 675 #endif 676 }; 677 678 #ifdef LPFC_HDWQ_LOCK_STAT 679 /* compile time trylock stats */ 680 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 681 { \ 682 int only_once = 1; \ 683 while (spin_trylock_irqsave(lock, flag) == 0) { \ 684 if (only_once) { \ 685 only_once = 0; \ 686 qp->lock_conflict.lstat++; \ 687 } \ 688 } \ 689 } 690 #define lpfc_qp_spin_lock(lock, qp, lstat) \ 691 { \ 692 int only_once = 1; \ 693 while (spin_trylock(lock) == 0) { \ 694 if (only_once) { \ 695 only_once = 0; \ 696 qp->lock_conflict.lstat++; \ 697 } \ 698 } \ 699 } 700 #else 701 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 702 spin_lock_irqsave(lock, flag) 703 #define lpfc_qp_spin_lock(lock, qp, lstat) spin_lock(lock) 704 #endif 705 706 struct lpfc_sli4_hba { 707 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 708 * config space registers 709 */ 710 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 711 * control registers 712 */ 713 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 714 * doorbell registers 715 */ 716 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for 717 * dpp registers 718 */ 719 union { 720 struct { 721 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 722 void __iomem *UERRLOregaddr; 723 void __iomem *UERRHIregaddr; 724 void __iomem *UEMASKLOregaddr; 725 void __iomem *UEMASKHIregaddr; 726 } if_type0; 727 struct { 728 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 729 void __iomem *STATUSregaddr; 730 void __iomem *CTRLregaddr; 731 void __iomem *ERR1regaddr; 732 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 733 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 734 void __iomem *ERR2regaddr; 735 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 736 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 737 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 738 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 739 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 740 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 741 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 742 void __iomem *EQDregaddr; 743 } if_type2; 744 } u; 745 746 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 747 void __iomem *PSMPHRregaddr; 748 749 /* Well-known SLI INTF register memory map. */ 750 void __iomem *SLIINTFregaddr; 751 752 /* IF type 0, BAR 1 function CSR register memory map */ 753 void __iomem *ISRregaddr; /* HST_ISR register */ 754 void __iomem *IMRregaddr; /* HST_IMR register */ 755 void __iomem *ISCRregaddr; /* HST_ISCR register */ 756 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 757 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 758 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 759 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */ 760 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */ 761 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 762 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 763 764 uint32_t ue_mask_lo; 765 uint32_t ue_mask_hi; 766 uint32_t ue_to_sr; 767 uint32_t ue_to_rp; 768 struct lpfc_register sli_intf; 769 struct lpfc_pc_sli4_params pc_sli4_params; 770 struct lpfc_bbscn_params bbscn_params; 771 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 772 773 void (*sli4_eq_clr_intr)(struct lpfc_queue *q); 774 void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq, 775 uint32_t count, bool arm); 776 void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq, 777 uint32_t count, bool arm); 778 779 /* Pointers to the constructed SLI4 queues */ 780 struct lpfc_sli4_hdw_queue *hdwq; 781 struct list_head lpfc_wq_list; 782 783 /* Pointers to the constructed SLI4 queues for NVMET */ 784 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 785 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 786 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 787 788 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 789 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 790 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 791 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 792 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 793 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 794 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 795 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 796 797 struct lpfc_name wwnn; 798 struct lpfc_name wwpn; 799 800 uint32_t fw_func_mode; /* FW function protocol mode */ 801 uint32_t ulp0_mode; /* ULP0 protocol mode */ 802 uint32_t ulp1_mode; /* ULP1 protocol mode */ 803 804 /* Optimized Access Storage specific queues/structures */ 805 uint64_t oas_next_lun; 806 uint8_t oas_next_tgt_wwpn[8]; 807 uint8_t oas_next_vpt_wwpn[8]; 808 809 /* Setup information for various queue parameters */ 810 int eq_esize; 811 int eq_ecount; 812 int cq_esize; 813 int cq_ecount; 814 int wq_esize; 815 int wq_ecount; 816 int mq_esize; 817 int mq_ecount; 818 int rq_esize; 819 int rq_ecount; 820 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 821 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 822 823 uint32_t intr_enable; 824 struct lpfc_bmbx bmbx; 825 struct lpfc_max_cfg_param max_cfg_param; 826 uint16_t extents_in_use; /* must allocate resource extents. */ 827 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 828 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 829 uint16_t next_rpi; 830 uint16_t io_xri_max; 831 uint16_t io_xri_cnt; 832 uint16_t io_xri_start; 833 uint16_t els_xri_cnt; 834 uint16_t nvmet_xri_cnt; 835 uint16_t nvmet_io_wait_cnt; 836 uint16_t nvmet_io_wait_total; 837 uint16_t cq_max; 838 struct lpfc_queue **cq_lookup; 839 struct list_head lpfc_els_sgl_list; 840 struct list_head lpfc_abts_els_sgl_list; 841 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 842 struct list_head lpfc_abts_scsi_buf_list; 843 struct list_head lpfc_nvmet_sgl_list; 844 spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */ 845 struct list_head lpfc_abts_nvmet_ctx_list; 846 struct list_head lpfc_nvmet_io_wait_list; 847 struct lpfc_nvmet_ctx_info *nvmet_ctx_info; 848 struct lpfc_sglq **lpfc_sglq_active_list; 849 struct list_head lpfc_rpi_hdr_list; 850 unsigned long *rpi_bmask; 851 uint16_t *rpi_ids; 852 uint16_t rpi_count; 853 struct list_head lpfc_rpi_blk_list; 854 unsigned long *xri_bmask; 855 uint16_t *xri_ids; 856 struct list_head lpfc_xri_blk_list; 857 unsigned long *vfi_bmask; 858 uint16_t *vfi_ids; 859 uint16_t vfi_count; 860 struct list_head lpfc_vfi_blk_list; 861 struct lpfc_sli4_flags sli4_flags; 862 struct list_head sp_queue_event; 863 struct list_head sp_cqe_event_pool; 864 struct list_head sp_asynce_work_queue; 865 struct list_head sp_fcp_xri_aborted_work_queue; 866 struct list_head sp_els_xri_aborted_work_queue; 867 struct list_head sp_unsol_work_queue; 868 struct lpfc_sli4_link link_state; 869 struct lpfc_sli4_lnk_info lnk_info; 870 uint32_t pport_name_sta; 871 #define LPFC_SLI4_PPNAME_NON 0 872 #define LPFC_SLI4_PPNAME_GET 1 873 struct lpfc_iov iov; 874 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 875 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 876 uint32_t physical_port; 877 878 /* CPU to vector mapping information */ 879 struct lpfc_vector_map_info *cpu_map; 880 uint16_t num_possible_cpu; 881 uint16_t num_present_cpu; 882 uint16_t curr_disp_cpu; 883 struct lpfc_eq_intr_info __percpu *eq_info; 884 uint32_t conf_trunk; 885 #define lpfc_conf_trunk_port0_WORD conf_trunk 886 #define lpfc_conf_trunk_port0_SHIFT 0 887 #define lpfc_conf_trunk_port0_MASK 0x1 888 #define lpfc_conf_trunk_port1_WORD conf_trunk 889 #define lpfc_conf_trunk_port1_SHIFT 1 890 #define lpfc_conf_trunk_port1_MASK 0x1 891 #define lpfc_conf_trunk_port2_WORD conf_trunk 892 #define lpfc_conf_trunk_port2_SHIFT 2 893 #define lpfc_conf_trunk_port2_MASK 0x1 894 #define lpfc_conf_trunk_port3_WORD conf_trunk 895 #define lpfc_conf_trunk_port3_SHIFT 3 896 #define lpfc_conf_trunk_port3_MASK 0x1 897 #define lpfc_conf_trunk_port0_nd_WORD conf_trunk 898 #define lpfc_conf_trunk_port0_nd_SHIFT 4 899 #define lpfc_conf_trunk_port0_nd_MASK 0x1 900 #define lpfc_conf_trunk_port1_nd_WORD conf_trunk 901 #define lpfc_conf_trunk_port1_nd_SHIFT 5 902 #define lpfc_conf_trunk_port1_nd_MASK 0x1 903 #define lpfc_conf_trunk_port2_nd_WORD conf_trunk 904 #define lpfc_conf_trunk_port2_nd_SHIFT 6 905 #define lpfc_conf_trunk_port2_nd_MASK 0x1 906 #define lpfc_conf_trunk_port3_nd_WORD conf_trunk 907 #define lpfc_conf_trunk_port3_nd_SHIFT 7 908 #define lpfc_conf_trunk_port3_nd_MASK 0x1 909 }; 910 911 enum lpfc_sge_type { 912 GEN_BUFF_TYPE, 913 SCSI_BUFF_TYPE, 914 NVMET_BUFF_TYPE 915 }; 916 917 enum lpfc_sgl_state { 918 SGL_FREED, 919 SGL_ALLOCATED, 920 SGL_XRI_ABORTED 921 }; 922 923 struct lpfc_sglq { 924 /* lpfc_sglqs are used in double linked lists */ 925 struct list_head list; 926 struct list_head clist; 927 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 928 enum lpfc_sgl_state state; 929 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 930 uint16_t iotag; /* pre-assigned IO tag */ 931 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 932 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 933 struct sli4_sge *sgl; /* pre-assigned SGL */ 934 void *virt; /* virtual address. */ 935 dma_addr_t phys; /* physical address */ 936 }; 937 938 struct lpfc_rpi_hdr { 939 struct list_head list; 940 uint32_t len; 941 struct lpfc_dmabuf *dmabuf; 942 uint32_t page_count; 943 uint32_t start_rpi; 944 uint16_t next_rpi; 945 }; 946 947 struct lpfc_rsrc_blks { 948 struct list_head list; 949 uint16_t rsrc_start; 950 uint16_t rsrc_size; 951 uint16_t rsrc_used; 952 }; 953 954 struct lpfc_rdp_context { 955 struct lpfc_nodelist *ndlp; 956 uint16_t ox_id; 957 uint16_t rx_id; 958 READ_LNK_VAR link_stat; 959 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 960 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 961 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 962 }; 963 964 struct lpfc_lcb_context { 965 uint8_t sub_command; 966 uint8_t type; 967 uint8_t capability; 968 uint8_t frequency; 969 uint16_t duration; 970 uint16_t ox_id; 971 uint16_t rx_id; 972 struct lpfc_nodelist *ndlp; 973 }; 974 975 976 /* 977 * SLI4 specific function prototypes 978 */ 979 int lpfc_pci_function_reset(struct lpfc_hba *); 980 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 981 int lpfc_sli4_hba_setup(struct lpfc_hba *); 982 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 983 uint8_t, uint32_t, bool); 984 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 985 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 986 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 987 struct lpfc_mbx_sge *); 988 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 989 uint16_t); 990 991 void lpfc_sli4_hba_reset(struct lpfc_hba *); 992 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *phba, 993 uint32_t page_size, 994 uint32_t entry_size, 995 uint32_t entry_count, int cpu); 996 void lpfc_sli4_queue_free(struct lpfc_queue *); 997 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 998 void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 999 uint32_t numq, uint32_t usdelay); 1000 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 1001 struct lpfc_queue *, uint32_t, uint32_t); 1002 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 1003 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type, 1004 uint32_t subtype); 1005 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 1006 struct lpfc_queue *, uint32_t); 1007 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 1008 struct lpfc_queue *, uint32_t); 1009 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 1010 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 1011 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 1012 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 1013 uint32_t subtype); 1014 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1015 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1016 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1017 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1018 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 1019 struct lpfc_queue *); 1020 int lpfc_sli4_queue_setup(struct lpfc_hba *); 1021 void lpfc_sli4_queue_unset(struct lpfc_hba *); 1022 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 1023 int lpfc_repost_io_sgl_list(struct lpfc_hba *phba); 1024 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 1025 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 1026 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 1027 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1028 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1029 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1030 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1031 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 1032 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 1033 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 1034 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 1035 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 1036 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 1037 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 1038 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 1039 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 1040 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 1041 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 1042 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 1043 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 1044 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 1045 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 1046 struct sli4_wcqe_xri_aborted *, int); 1047 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 1048 struct sli4_wcqe_xri_aborted *axri, int idx); 1049 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 1050 struct sli4_wcqe_xri_aborted *axri); 1051 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 1052 struct sli4_wcqe_xri_aborted *); 1053 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 1054 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 1055 int lpfc_sli4_brdreset(struct lpfc_hba *); 1056 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 1057 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 1058 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 1059 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 1060 int lpfc_sli4_init_vpi(struct lpfc_vport *); 1061 void lpfc_sli4_eq_clr_intr(struct lpfc_queue *); 1062 void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1063 uint32_t count, bool arm); 1064 void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1065 uint32_t count, bool arm); 1066 void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q); 1067 void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1068 uint32_t count, bool arm); 1069 void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1070 uint32_t count, bool arm); 1071 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 1072 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 1073 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 1074 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 1075 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1076 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1077 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1078 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 1079 int lpfc_sli4_post_status_check(struct lpfc_hba *); 1080 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1081 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1082 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba); 1083 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx) 1084 { 1085 return q->q_pgs[idx / q->entry_cnt_per_pg] + 1086 (q->entry_size * (idx % q->entry_cnt_per_pg)); 1087 } 1088