1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * OMAP SmartReflex Voltage Control 4 * 5 * Author: Thara Gopinath <thara@ti.com> 6 * 7 * Copyright (C) 2012 Texas Instruments, Inc. 8 * Thara Gopinath <thara@ti.com> 9 * 10 * Copyright (C) 2008 Nokia Corporation 11 * Kalle Jokiniemi 12 * 13 * Copyright (C) 2007 Texas Instruments, Inc. 14 * Lesly A M <x0080970@ti.com> 15 */ 16 17 #include <linux/module.h> 18 #include <linux/mod_devicetable.h> 19 #include <linux/interrupt.h> 20 #include <linux/clk.h> 21 #include <linux/io.h> 22 #include <linux/debugfs.h> 23 #include <linux/delay.h> 24 #include <linux/slab.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/power/smartreflex.h> 27 28 #define DRIVER_NAME "smartreflex" 29 #define SMARTREFLEX_NAME_LEN 32 30 #define NVALUE_NAME_LEN 40 31 #define SR_DISABLE_TIMEOUT 200 32 33 /* sr_list contains all the instances of smartreflex module */ 34 static LIST_HEAD(sr_list); 35 36 static struct omap_sr_class_data *sr_class; 37 static struct dentry *sr_dbg_dir; 38 39 static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) 40 { 41 __raw_writel(value, (sr->base + offset)); 42 } 43 44 static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, 45 u32 value) 46 { 47 u32 reg_val; 48 49 /* 50 * Smartreflex error config register is special as it contains 51 * certain status bits which if written a 1 into means a clear 52 * of those bits. So in order to make sure no accidental write of 53 * 1 happens to those status bits, do a clear of them in the read 54 * value. This mean this API doesn't rewrite values in these bits 55 * if they are currently set, but does allow the caller to write 56 * those bits. 57 */ 58 if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1) 59 mask |= ERRCONFIG_STATUS_V1_MASK; 60 else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2) 61 mask |= ERRCONFIG_VPBOUNDINTST_V2; 62 63 reg_val = __raw_readl(sr->base + offset); 64 reg_val &= ~mask; 65 66 value &= mask; 67 68 reg_val |= value; 69 70 __raw_writel(reg_val, (sr->base + offset)); 71 } 72 73 static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) 74 { 75 return __raw_readl(sr->base + offset); 76 } 77 78 static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) 79 { 80 struct omap_sr *sr_info; 81 82 if (!voltdm) { 83 pr_err("%s: Null voltage domain passed!\n", __func__); 84 return ERR_PTR(-EINVAL); 85 } 86 87 list_for_each_entry(sr_info, &sr_list, node) { 88 if (voltdm == sr_info->voltdm) 89 return sr_info; 90 } 91 92 return ERR_PTR(-ENODATA); 93 } 94 95 static irqreturn_t sr_interrupt(int irq, void *data) 96 { 97 struct omap_sr *sr_info = data; 98 u32 status = 0; 99 100 switch (sr_info->ip_type) { 101 case SR_TYPE_V1: 102 /* Read the status bits */ 103 status = sr_read_reg(sr_info, ERRCONFIG_V1); 104 105 /* Clear them by writing back */ 106 sr_write_reg(sr_info, ERRCONFIG_V1, status); 107 break; 108 case SR_TYPE_V2: 109 /* Read the status bits */ 110 status = sr_read_reg(sr_info, IRQSTATUS); 111 112 /* Clear them by writing back */ 113 sr_write_reg(sr_info, IRQSTATUS, status); 114 break; 115 default: 116 dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n", 117 sr_info->ip_type); 118 return IRQ_NONE; 119 } 120 121 if (sr_class->notify) 122 sr_class->notify(sr_info, status); 123 124 return IRQ_HANDLED; 125 } 126 127 static void sr_set_clk_length(struct omap_sr *sr) 128 { 129 u32 fclk_speed; 130 131 /* Try interconnect target module fck first if it already exists */ 132 if (IS_ERR(sr->fck)) 133 return; 134 135 fclk_speed = clk_get_rate(sr->fck); 136 137 switch (fclk_speed) { 138 case 12000000: 139 sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; 140 break; 141 case 13000000: 142 sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; 143 break; 144 case 19200000: 145 sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; 146 break; 147 case 26000000: 148 sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; 149 break; 150 case 38400000: 151 sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; 152 break; 153 default: 154 dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n", 155 __func__, fclk_speed); 156 break; 157 } 158 } 159 160 static void sr_start_vddautocomp(struct omap_sr *sr) 161 { 162 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { 163 dev_warn(&sr->pdev->dev, 164 "%s: smartreflex class driver not registered\n", 165 __func__); 166 return; 167 } 168 169 if (!sr_class->enable(sr)) 170 sr->autocomp_active = true; 171 } 172 173 static void sr_stop_vddautocomp(struct omap_sr *sr) 174 { 175 if (!sr_class || !(sr_class->disable)) { 176 dev_warn(&sr->pdev->dev, 177 "%s: smartreflex class driver not registered\n", 178 __func__); 179 return; 180 } 181 182 if (sr->autocomp_active) { 183 sr_class->disable(sr, 1); 184 sr->autocomp_active = false; 185 } 186 } 187 188 /* 189 * This function handles the initializations which have to be done 190 * only when both sr device and class driver regiter has 191 * completed. This will be attempted to be called from both sr class 192 * driver register and sr device intializtion API's. Only one call 193 * will ultimately succeed. 194 * 195 * Currently this function registers interrupt handler for a particular SR 196 * if smartreflex class driver is already registered and has 197 * requested for interrupts and the SR interrupt line in present. 198 */ 199 static int sr_late_init(struct omap_sr *sr_info) 200 { 201 struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; 202 int ret = 0; 203 204 if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { 205 ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq, 206 sr_interrupt, 0, sr_info->name, sr_info); 207 if (ret) 208 goto error; 209 disable_irq(sr_info->irq); 210 } 211 212 if (pdata && pdata->enable_on_init) 213 sr_start_vddautocomp(sr_info); 214 215 return ret; 216 217 error: 218 list_del(&sr_info->node); 219 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering interrupt handler. Smartreflex will not function as desired\n", 220 __func__); 221 222 return ret; 223 } 224 225 static void sr_v1_disable(struct omap_sr *sr) 226 { 227 int timeout = 0; 228 int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | 229 ERRCONFIG_MCUBOUNDINTST; 230 231 /* Enable MCUDisableAcknowledge interrupt */ 232 sr_modify_reg(sr, ERRCONFIG_V1, 233 ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); 234 235 /* SRCONFIG - disable SR */ 236 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); 237 238 /* Disable all other SR interrupts and clear the status as needed */ 239 if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1) 240 errconf_val |= ERRCONFIG_VPBOUNDINTST_V1; 241 sr_modify_reg(sr, ERRCONFIG_V1, 242 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | 243 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), 244 errconf_val); 245 246 /* 247 * Wait for SR to be disabled. 248 * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. 249 */ 250 sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) & 251 ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, 252 timeout); 253 254 if (timeout >= SR_DISABLE_TIMEOUT) 255 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", 256 __func__); 257 258 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ 259 sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, 260 ERRCONFIG_MCUDISACKINTST); 261 } 262 263 static void sr_v2_disable(struct omap_sr *sr) 264 { 265 int timeout = 0; 266 267 /* Enable MCUDisableAcknowledge interrupt */ 268 sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); 269 270 /* SRCONFIG - disable SR */ 271 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); 272 273 /* 274 * Disable all other SR interrupts and clear the status 275 * write to status register ONLY on need basis - only if status 276 * is set. 277 */ 278 if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2) 279 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, 280 ERRCONFIG_VPBOUNDINTST_V2); 281 else 282 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, 283 0x0); 284 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | 285 IRQENABLE_MCUVALIDINT | 286 IRQENABLE_MCUBOUNDSINT)); 287 sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | 288 IRQSTATUS_MCVALIDINT | 289 IRQSTATUS_MCBOUNDSINT)); 290 291 /* 292 * Wait for SR to be disabled. 293 * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. 294 */ 295 sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) & 296 IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, 297 timeout); 298 299 if (timeout >= SR_DISABLE_TIMEOUT) 300 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", 301 __func__); 302 303 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ 304 sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); 305 sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); 306 } 307 308 static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row( 309 struct omap_sr *sr, u32 efuse_offs) 310 { 311 int i; 312 313 if (!sr->nvalue_table) { 314 dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", 315 __func__); 316 return NULL; 317 } 318 319 for (i = 0; i < sr->nvalue_count; i++) { 320 if (sr->nvalue_table[i].efuse_offs == efuse_offs) 321 return &sr->nvalue_table[i]; 322 } 323 324 return NULL; 325 } 326 327 /* Public Functions */ 328 329 /** 330 * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the 331 * error generator module. 332 * @sr: SR module to be configured. 333 * 334 * This API is to be called from the smartreflex class driver to 335 * configure the error generator module inside the smartreflex module. 336 * SR settings if using the ERROR module inside Smartreflex. 337 * SR CLASS 3 by default uses only the ERROR module where as 338 * SR CLASS 2 can choose between ERROR module and MINMAXAVG 339 * module. Returns 0 on success and error value in case of failure. 340 */ 341 int sr_configure_errgen(struct omap_sr *sr) 342 { 343 u32 sr_config, sr_errconfig, errconfig_offs; 344 u32 vpboundint_en, vpboundint_st; 345 u32 senp_en = 0, senn_en = 0; 346 u8 senp_shift, senn_shift; 347 348 if (!sr) { 349 pr_warn("%s: NULL omap_sr from %pS\n", 350 __func__, (void *)_RET_IP_); 351 return -EINVAL; 352 } 353 354 if (!sr->clk_length) 355 sr_set_clk_length(sr); 356 357 senp_en = sr->senp_mod; 358 senn_en = sr->senn_mod; 359 360 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | 361 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; 362 363 switch (sr->ip_type) { 364 case SR_TYPE_V1: 365 sr_config |= SRCONFIG_DELAYCTRL; 366 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; 367 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; 368 errconfig_offs = ERRCONFIG_V1; 369 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; 370 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; 371 break; 372 case SR_TYPE_V2: 373 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; 374 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; 375 errconfig_offs = ERRCONFIG_V2; 376 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; 377 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; 378 break; 379 default: 380 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n", 381 __func__); 382 return -EINVAL; 383 } 384 385 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); 386 sr_write_reg(sr, SRCONFIG, sr_config); 387 sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | 388 (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | 389 (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); 390 sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | 391 SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), 392 sr_errconfig); 393 394 /* Enabling the interrupts if the ERROR module is used */ 395 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st), 396 vpboundint_en); 397 398 return 0; 399 } 400 401 /** 402 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component 403 * @sr: SR module to be configured. 404 * 405 * This API is to be called from the smartreflex class driver to 406 * disable the error generator module inside the smartreflex module. 407 * 408 * Returns 0 on success and error value in case of failure. 409 */ 410 int sr_disable_errgen(struct omap_sr *sr) 411 { 412 u32 errconfig_offs; 413 u32 vpboundint_en, vpboundint_st; 414 415 if (!sr) { 416 pr_warn("%s: NULL omap_sr from %pS\n", 417 __func__, (void *)_RET_IP_); 418 return -EINVAL; 419 } 420 421 switch (sr->ip_type) { 422 case SR_TYPE_V1: 423 errconfig_offs = ERRCONFIG_V1; 424 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; 425 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; 426 break; 427 case SR_TYPE_V2: 428 errconfig_offs = ERRCONFIG_V2; 429 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; 430 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; 431 break; 432 default: 433 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n", 434 __func__); 435 return -EINVAL; 436 } 437 438 /* Disable the Sensor and errorgen */ 439 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0); 440 441 /* 442 * Disable the interrupts of ERROR module 443 * NOTE: modify is a read, modify,write - an implicit OCP barrier 444 * which is required is present here - sequencing is critical 445 * at this point (after errgen is disabled, vpboundint disable) 446 */ 447 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0); 448 449 return 0; 450 } 451 452 /** 453 * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the 454 * minmaxavg module. 455 * @sr: SR module to be configured. 456 * 457 * This API is to be called from the smartreflex class driver to 458 * configure the minmaxavg module inside the smartreflex module. 459 * SR settings if using the ERROR module inside Smartreflex. 460 * SR CLASS 3 by default uses only the ERROR module where as 461 * SR CLASS 2 can choose between ERROR module and MINMAXAVG 462 * module. Returns 0 on success and error value in case of failure. 463 */ 464 int sr_configure_minmax(struct omap_sr *sr) 465 { 466 u32 sr_config, sr_avgwt; 467 u32 senp_en = 0, senn_en = 0; 468 u8 senp_shift, senn_shift; 469 470 if (!sr) { 471 pr_warn("%s: NULL omap_sr from %pS\n", 472 __func__, (void *)_RET_IP_); 473 return -EINVAL; 474 } 475 476 if (!sr->clk_length) 477 sr_set_clk_length(sr); 478 479 senp_en = sr->senp_mod; 480 senn_en = sr->senn_mod; 481 482 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | 483 SRCONFIG_SENENABLE | 484 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); 485 486 switch (sr->ip_type) { 487 case SR_TYPE_V1: 488 sr_config |= SRCONFIG_DELAYCTRL; 489 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; 490 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; 491 break; 492 case SR_TYPE_V2: 493 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; 494 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; 495 break; 496 default: 497 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n", 498 __func__); 499 return -EINVAL; 500 } 501 502 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); 503 sr_write_reg(sr, SRCONFIG, sr_config); 504 sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | 505 (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); 506 sr_write_reg(sr, AVGWEIGHT, sr_avgwt); 507 508 /* 509 * Enabling the interrupts if MINMAXAVG module is used. 510 * TODO: check if all the interrupts are mandatory 511 */ 512 switch (sr->ip_type) { 513 case SR_TYPE_V1: 514 sr_modify_reg(sr, ERRCONFIG_V1, 515 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | 516 ERRCONFIG_MCUBOUNDINTEN), 517 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | 518 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | 519 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); 520 break; 521 case SR_TYPE_V2: 522 sr_write_reg(sr, IRQSTATUS, 523 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | 524 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); 525 sr_write_reg(sr, IRQENABLE_SET, 526 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | 527 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); 528 break; 529 default: 530 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n", 531 __func__); 532 return -EINVAL; 533 } 534 535 return 0; 536 } 537 538 /** 539 * sr_enable() - Enables the smartreflex module. 540 * @sr: pointer to which the SR module to be configured belongs to. 541 * @volt: The voltage at which the Voltage domain associated with 542 * the smartreflex module is operating at. 543 * This is required only to program the correct Ntarget value. 544 * 545 * This API is to be called from the smartreflex class driver to 546 * enable a smartreflex module. Returns 0 on success. Returns error 547 * value if the voltage passed is wrong or if ntarget value is wrong. 548 */ 549 int sr_enable(struct omap_sr *sr, unsigned long volt) 550 { 551 struct omap_volt_data *volt_data; 552 struct omap_sr_nvalue_table *nvalue_row; 553 int ret; 554 555 if (!sr) { 556 pr_warn("%s: NULL omap_sr from %pS\n", 557 __func__, (void *)_RET_IP_); 558 return -EINVAL; 559 } 560 561 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); 562 563 if (IS_ERR(volt_data)) { 564 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table for nominal voltage %ld\n", 565 __func__, volt); 566 return PTR_ERR(volt_data); 567 } 568 569 nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs); 570 571 if (!nvalue_row) { 572 dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n", 573 __func__, volt); 574 return -ENODATA; 575 } 576 577 /* errminlimit is opp dependent and hence linked to voltage */ 578 sr->err_minlimit = nvalue_row->errminlimit; 579 580 clk_enable(sr->fck); 581 582 /* Check if SR is already enabled. If yes do nothing */ 583 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) 584 goto out_enabled; 585 586 /* Configure SR */ 587 ret = sr_class->configure(sr); 588 if (ret) 589 goto out_enabled; 590 591 sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue); 592 593 /* SRCONFIG - enable SR */ 594 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); 595 596 out_enabled: 597 sr->enabled = 1; 598 599 return 0; 600 } 601 602 /** 603 * sr_disable() - Disables the smartreflex module. 604 * @sr: pointer to which the SR module to be configured belongs to. 605 * 606 * This API is to be called from the smartreflex class driver to 607 * disable a smartreflex module. 608 */ 609 void sr_disable(struct omap_sr *sr) 610 { 611 if (!sr) { 612 pr_warn("%s: NULL omap_sr from %pS\n", 613 __func__, (void *)_RET_IP_); 614 return; 615 } 616 617 /* Check if SR clocks are already disabled. If yes do nothing */ 618 if (!sr->enabled) 619 return; 620 621 /* 622 * Disable SR if only it is indeed enabled. Else just 623 * disable the clocks. 624 */ 625 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { 626 switch (sr->ip_type) { 627 case SR_TYPE_V1: 628 sr_v1_disable(sr); 629 break; 630 case SR_TYPE_V2: 631 sr_v2_disable(sr); 632 break; 633 default: 634 dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", 635 sr->ip_type); 636 } 637 } 638 639 clk_disable(sr->fck); 640 sr->enabled = 0; 641 } 642 643 /** 644 * sr_register_class() - API to register a smartreflex class parameters. 645 * @class_data: The structure containing various sr class specific data. 646 * 647 * This API is to be called by the smartreflex class driver to register itself 648 * with the smartreflex driver during init. Returns 0 on success else the 649 * error value. 650 */ 651 int sr_register_class(struct omap_sr_class_data *class_data) 652 { 653 struct omap_sr *sr_info; 654 655 if (!class_data) { 656 pr_warn("%s:, Smartreflex class data passed is NULL\n", 657 __func__); 658 return -EINVAL; 659 } 660 661 if (sr_class) { 662 pr_warn("%s: Smartreflex class driver already registered\n", 663 __func__); 664 return -EBUSY; 665 } 666 667 sr_class = class_data; 668 669 /* 670 * Call into late init to do initializations that require 671 * both sr driver and sr class driver to be initiallized. 672 */ 673 list_for_each_entry(sr_info, &sr_list, node) 674 sr_late_init(sr_info); 675 676 return 0; 677 } 678 679 /** 680 * omap_sr_enable() - API to enable SR clocks and to call into the 681 * registered smartreflex class enable API. 682 * @voltdm: VDD pointer to which the SR module to be configured belongs to. 683 * 684 * This API is to be called from the kernel in order to enable 685 * a particular smartreflex module. This API will do the initial 686 * configurations to turn on the smartreflex module and in turn call 687 * into the registered smartreflex class enable API. 688 */ 689 void omap_sr_enable(struct voltagedomain *voltdm) 690 { 691 struct omap_sr *sr = _sr_lookup(voltdm); 692 693 if (IS_ERR(sr)) { 694 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__); 695 return; 696 } 697 698 if (!sr->autocomp_active) 699 return; 700 701 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { 702 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n", 703 __func__); 704 return; 705 } 706 707 sr_class->enable(sr); 708 } 709 710 /** 711 * omap_sr_disable() - API to disable SR without resetting the voltage 712 * processor voltage 713 * @voltdm: VDD pointer to which the SR module to be configured belongs to. 714 * 715 * This API is to be called from the kernel in order to disable 716 * a particular smartreflex module. This API will in turn call 717 * into the registered smartreflex class disable API. This API will tell 718 * the smartreflex class disable not to reset the VP voltage after 719 * disabling smartreflex. 720 */ 721 void omap_sr_disable(struct voltagedomain *voltdm) 722 { 723 struct omap_sr *sr = _sr_lookup(voltdm); 724 725 if (IS_ERR(sr)) { 726 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__); 727 return; 728 } 729 730 if (!sr->autocomp_active) 731 return; 732 733 if (!sr_class || !(sr_class->disable)) { 734 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n", 735 __func__); 736 return; 737 } 738 739 sr_class->disable(sr, 0); 740 } 741 742 /** 743 * omap_sr_disable_reset_volt() - API to disable SR and reset the 744 * voltage processor voltage 745 * @voltdm: VDD pointer to which the SR module to be configured belongs to. 746 * 747 * This API is to be called from the kernel in order to disable 748 * a particular smartreflex module. This API will in turn call 749 * into the registered smartreflex class disable API. This API will tell 750 * the smartreflex class disable to reset the VP voltage after 751 * disabling smartreflex. 752 */ 753 void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) 754 { 755 struct omap_sr *sr = _sr_lookup(voltdm); 756 757 if (IS_ERR(sr)) { 758 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__); 759 return; 760 } 761 762 if (!sr->autocomp_active) 763 return; 764 765 if (!sr_class || !(sr_class->disable)) { 766 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n", 767 __func__); 768 return; 769 } 770 771 sr_class->disable(sr, 1); 772 } 773 774 /* PM Debug FS entries to enable and disable smartreflex. */ 775 static int omap_sr_autocomp_show(void *data, u64 *val) 776 { 777 struct omap_sr *sr_info = data; 778 779 if (!sr_info) { 780 pr_warn("%s: omap_sr struct not found\n", __func__); 781 return -EINVAL; 782 } 783 784 *val = sr_info->autocomp_active; 785 786 return 0; 787 } 788 789 static int omap_sr_autocomp_store(void *data, u64 val) 790 { 791 struct omap_sr *sr_info = data; 792 793 if (!sr_info) { 794 pr_warn("%s: omap_sr struct not found\n", __func__); 795 return -EINVAL; 796 } 797 798 /* Sanity check */ 799 if (val > 1) { 800 pr_warn("%s: Invalid argument %lld\n", __func__, val); 801 return -EINVAL; 802 } 803 804 /* control enable/disable only if there is a delta in value */ 805 if (sr_info->autocomp_active != val) { 806 if (!val) 807 sr_stop_vddautocomp(sr_info); 808 else 809 sr_start_vddautocomp(sr_info); 810 } 811 812 return 0; 813 } 814 815 DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, 816 omap_sr_autocomp_store, "%llu\n"); 817 818 static int omap_sr_probe(struct platform_device *pdev) 819 { 820 struct omap_sr *sr_info; 821 struct omap_sr_data *pdata = pdev->dev.platform_data; 822 struct resource *mem; 823 struct dentry *nvalue_dir; 824 int i, ret = 0; 825 826 sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL); 827 if (!sr_info) 828 return -ENOMEM; 829 830 sr_info->name = devm_kzalloc(&pdev->dev, 831 SMARTREFLEX_NAME_LEN, GFP_KERNEL); 832 if (!sr_info->name) 833 return -ENOMEM; 834 835 platform_set_drvdata(pdev, sr_info); 836 837 if (!pdata) { 838 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 839 return -EINVAL; 840 } 841 842 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 843 sr_info->base = devm_ioremap_resource(&pdev->dev, mem); 844 if (IS_ERR(sr_info->base)) 845 return PTR_ERR(sr_info->base); 846 847 ret = platform_get_irq_optional(pdev, 0); 848 if (ret < 0 && ret != -ENXIO) 849 return dev_err_probe(&pdev->dev, ret, "failed to get IRQ resource\n"); 850 if (ret > 0) 851 sr_info->irq = ret; 852 853 sr_info->fck = devm_clk_get(pdev->dev.parent, "fck"); 854 if (IS_ERR(sr_info->fck)) 855 return PTR_ERR(sr_info->fck); 856 clk_prepare(sr_info->fck); 857 858 pm_runtime_enable(&pdev->dev); 859 860 snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name); 861 862 sr_info->pdev = pdev; 863 sr_info->srid = pdev->id; 864 sr_info->voltdm = pdata->voltdm; 865 sr_info->nvalue_table = pdata->nvalue_table; 866 sr_info->nvalue_count = pdata->nvalue_count; 867 sr_info->senn_mod = pdata->senn_mod; 868 sr_info->senp_mod = pdata->senp_mod; 869 sr_info->err_weight = pdata->err_weight; 870 sr_info->err_maxlimit = pdata->err_maxlimit; 871 sr_info->accum_data = pdata->accum_data; 872 sr_info->senn_avgweight = pdata->senn_avgweight; 873 sr_info->senp_avgweight = pdata->senp_avgweight; 874 sr_info->autocomp_active = false; 875 sr_info->ip_type = pdata->ip_type; 876 877 sr_set_clk_length(sr_info); 878 879 list_add(&sr_info->node, &sr_list); 880 881 /* 882 * Call into late init to do initializations that require 883 * both sr driver and sr class driver to be initiallized. 884 */ 885 if (sr_class) { 886 ret = sr_late_init(sr_info); 887 if (ret) { 888 pr_warn("%s: Error in SR late init\n", __func__); 889 goto err_list_del; 890 } 891 } 892 893 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); 894 if (!sr_dbg_dir) 895 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); 896 897 sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir); 898 899 debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, sr_info->dbg_dir, 900 sr_info, &pm_sr_fops); 901 debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir, 902 &sr_info->err_weight); 903 debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir, 904 &sr_info->err_maxlimit); 905 906 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); 907 908 if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) { 909 dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n", 910 __func__, sr_info->name); 911 912 ret = -ENODATA; 913 goto err_debugfs; 914 } 915 916 for (i = 0; i < sr_info->nvalue_count; i++) { 917 char name[NVALUE_NAME_LEN + 1]; 918 919 snprintf(name, sizeof(name), "volt_%lu", 920 sr_info->nvalue_table[i].volt_nominal); 921 debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, 922 &(sr_info->nvalue_table[i].nvalue)); 923 snprintf(name, sizeof(name), "errminlimit_%lu", 924 sr_info->nvalue_table[i].volt_nominal); 925 debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, 926 &(sr_info->nvalue_table[i].errminlimit)); 927 928 } 929 930 return 0; 931 932 err_debugfs: 933 debugfs_remove_recursive(sr_info->dbg_dir); 934 err_list_del: 935 list_del(&sr_info->node); 936 clk_unprepare(sr_info->fck); 937 938 return ret; 939 } 940 941 static int omap_sr_remove(struct platform_device *pdev) 942 { 943 struct omap_sr_data *pdata = pdev->dev.platform_data; 944 struct device *dev = &pdev->dev; 945 struct omap_sr *sr_info; 946 947 if (!pdata) { 948 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 949 return -EINVAL; 950 } 951 952 sr_info = _sr_lookup(pdata->voltdm); 953 if (IS_ERR(sr_info)) { 954 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 955 __func__); 956 return PTR_ERR(sr_info); 957 } 958 959 if (sr_info->autocomp_active) 960 sr_stop_vddautocomp(sr_info); 961 debugfs_remove_recursive(sr_info->dbg_dir); 962 963 pm_runtime_disable(dev); 964 clk_unprepare(sr_info->fck); 965 list_del(&sr_info->node); 966 return 0; 967 } 968 969 static void omap_sr_shutdown(struct platform_device *pdev) 970 { 971 struct omap_sr_data *pdata = pdev->dev.platform_data; 972 struct omap_sr *sr_info; 973 974 if (!pdata) { 975 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 976 return; 977 } 978 979 sr_info = _sr_lookup(pdata->voltdm); 980 if (IS_ERR(sr_info)) { 981 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 982 __func__); 983 return; 984 } 985 986 if (sr_info->autocomp_active) 987 sr_stop_vddautocomp(sr_info); 988 989 return; 990 } 991 992 static const struct of_device_id omap_sr_match[] = { 993 { .compatible = "ti,omap3-smartreflex-core", }, 994 { .compatible = "ti,omap3-smartreflex-mpu-iva", }, 995 { .compatible = "ti,omap4-smartreflex-core", }, 996 { .compatible = "ti,omap4-smartreflex-mpu", }, 997 { .compatible = "ti,omap4-smartreflex-iva", }, 998 { }, 999 }; 1000 MODULE_DEVICE_TABLE(of, omap_sr_match); 1001 1002 static struct platform_driver smartreflex_driver = { 1003 .probe = omap_sr_probe, 1004 .remove = omap_sr_remove, 1005 .shutdown = omap_sr_shutdown, 1006 .driver = { 1007 .name = DRIVER_NAME, 1008 .of_match_table = omap_sr_match, 1009 }, 1010 }; 1011 1012 static int __init sr_init(void) 1013 { 1014 int ret = 0; 1015 1016 ret = platform_driver_register(&smartreflex_driver); 1017 if (ret) { 1018 pr_err("%s: platform driver register failed for SR\n", 1019 __func__); 1020 return ret; 1021 } 1022 1023 return 0; 1024 } 1025 late_initcall(sr_init); 1026 1027 static void __exit sr_exit(void) 1028 { 1029 platform_driver_unregister(&smartreflex_driver); 1030 } 1031 module_exit(sr_exit); 1032 1033 MODULE_DESCRIPTION("OMAP Smartreflex Driver"); 1034 MODULE_LICENSE("GPL"); 1035 MODULE_ALIAS("platform:" DRIVER_NAME); 1036 MODULE_AUTHOR("Texas Instruments Inc"); 1037